MAX11905DIFEVKIT#

Evaluates: MAX11905 MAX11905 Differential Evaluation Kit General Description Features The MAX11905 differential evaluation kit (EV kit) demonstrates the MAX11905, 20-bit, 1.6Msps, single-channel, fully differential SAR ADC with internal reference buffers. The EV kit uses the MAX44205, a low-noise fully differential operational amplifier. The EV kit includes a graphical user interface (GUI) that provides communication from Avnet’s ZedBoard™ development board for the Xilinx Zynq®-7000 SoC. The ZedBoard, not included with the EV kit, must be purchased through Avnet, Inc. ●● Peripheral Module and FMC Connector for Interface ●● 75MHz SPI Clock Capability through FMC Connector ●● 37.5MHz SPI Clock Capability through Peripheral Module Connector ●● Sync In and Sync Out for Coherent Sampling ●● On-Board Input Buffer (MAX44205) ●● On-Board +3.0V Reference Voltage (MAX6126) ●● Windows XP-, Windows Vista-, Windows 7-, and Windows 8/8.1-Compatible Software The ZedBoard communicates with the PC through an Ethernet cable using Windows XP®-, Windows Vista®-, Windows® 7-, or Windows 8/8.1-compatible software. Ordering Information appears at end of data sheet. The EV kit comes with the MAX11905ETP+ installed. System Block Diagram MAX11905 DIFFERENTIAL EV KIT# ZedBoard REFVDD ANALOG INPUT + _ SCLK VCLPH MAX44205 VOCM ANALOG INPUT DIN OUT+ MAX11905 OUT- CNVST VCLPL + VREF _ GND ZedBoard is a trademark of Avnet, Inc. Zynq is a registered trademark of Xilinx, Inc. Windows, Windows XP, and Windows Vista are registered trademarks and registered service marks of Microsoft Corporation. 19-7464; Rev 1; 12/16 DOUT MAX6126 ETHERNET PORT FMC OR PERIPHERAL MODULE MAX11905 Differential Evaluation Kit Quick Start Required Equipment ●● MAX11905 differential EV kit with SD card ●● ZedBoard development board (includes Micro-USB A-to-B cables) ●● Windows PC ●● Ethernet cable ●● +5V DC power supply ●● ±5V dual DC power supply ●● Signal generator with differential outputs (e.g., Audio Precision 2700 series) ●● Soldering iron and 2-pin, 2.54 header Note: In the following sections, software-related items are identified by bolding. Text in bold refers to items directly from the EV kit software. Text in bold and underlined refers to items from the Windows operating system. Procedure The EV kit is fully assembled and tested. Follow the steps below to verify board operation: 1) Download the LabVIEW® Run-Time Engine 2013 from www.ni.com/download/labview-run-time-engine-2013/4059/en/. 2) Visit www.maximintegrated.com/evkitsoftware to download the latest version of the EV kit software, 11905EVKit.ZIP. Save the EV kit software to a temporary folder and uncompress the ZIP file. 3) Solder the 2-pin header on J18-3V3 of the ZedBoard. 4) Connect the Ethernet cable from the PC to the ZedBoard and configure the Internet Protocol Version 4 (TCP/IPv4) properties in the local area connection to IP address 192.168.1.2 and the subnet mask to 255.255.255.0. Evaluates: MAX11905 5) Connect the USB cable from the PC to the ZedBoard’s USB programming connector (J17). 6) Verify that the ZedBoard’s jumpers JP7, JP8, and JP11 have shunts installed at the GND position, and JP9 and JP10 at the 3V3 position. 7) Move the shunt of J18 of the ZedBoard from 1V8 to the 3V3 position. 8) Insert the SD card with the boot image (BOOT.bin). 9) Verify that all jumpers on the EV kit are in their default positions, as shown in Table 1. 10) Connect the ZedBoard to J2 on the EV kit for FMC connection. If the peripheral module is used, the ZedBoard’s JA1 connector must be connected to J1 on the EV kit. 11) Connect the positive terminal of the +5V supply to the +5V test point and the negative terminal to the GND test point. 12) Connect the +5V of the dual supply to the VS+ test point, the -5V supply to the VS- test point, and the ground to the GND test point. 13) The configuration of the op amp is gain of 0.5. Set the signal generator to 11.95VP-P and 10kHz to the INP and INM SMA connectors or test points on the EV kit. 14) Turn on the power to the ZedBoard. 15) Turn on all power supplies. 16) Enable the function generator. 17) Open the EV kit GUI, MAX11905EVKit.exe. 18) Verify that the IP Address is 192.168.1.10, the port is 6001, and that the status bar displays TCP/IP Connection to Zedboard is successful and Connected to ZedBoard (MISO = 1). 19) Click on the Set button within the Configuration tab. 20) Click on the FFT tab (Figure 6) and start capturing data. LabVIEW is a registered trademark of National Instruments Corporation. www.maximintegrated.com Maxim Integrated │  2 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit Table 1. Jumper Descriptions (JU1–JU14) JUMPER JU1 JU2 JU3 JU4 JU5 JU6 SHUNT POSITION Installed Not installed* Installed Not installed* JU8 JU9 JU10 JU11 JU12 JU13 JU14 Connects to 49.9Ω termination. Apply negative end of the differential signal at the INM test point or SMA connector. Connects to 49.9Ω termination. Apply positive end of the differential signal at the INP test point or SMA connector. 1-2* Connects to VOCM to REF/2. 2-3 Connects to VOCM to GND. Installed* Not installed DVDD supply connects to the on-board +1.8V LDO User-supplied DVDD. Apply +1.8V at the DVDD test point. 1-2* REFIN connects to the on-board +3.0V reference. 2-3 User-supplied REFIN. Apply reference voltage at the EXT_REFIN test point. 1-2 Do not use 2-3* OVDD supply connects to the on-board +3.3V LDO Not installed JU7 DESCRIPTION Installed* Not installed User-supplied OVDD. Apply +3.3V at the OVDD test point. AVDD supply connects to the on-board +1.8V LDO User-supplied AVDD. Apply +1.8V at the jumper JU7-2 pin. Installed* REFVDD supply connects to the on-board +3.3V LDO. Not installed User-supplied REFVDD. Apply +3.3V at the JU9-2 pin. 2-3, 5-6, 8-9, 11-12* Connects the SPI signals coming from the peripheral module or FMC connectors to the MAX11905. Not installed User-supplied SPI. Connect the SPI signals at the SCLK, CNVST, DIN, and DOUT test points. Installed Disables the line driver. Not installed* Enables the line driver. Installed* Not installed Input common mode voltage set to REF/2. Input common mode voltage set GND. 1-2* VCLPH set to MAX11905’s REFVDD supply. 2-3 VCLPH set to MAX44205’s VS+ supply. 1-2* VCLPL set to GND. 2-3 VCLPL set to MAX44205’s VS- supply. 1-2* SHDN pulled to VS+ and set to normal operation. 2-3 SHDN pulled to GND and set to shutdown mode. *Default position. www.maximintegrated.com Maxim Integrated │  3 MAX11905 Differential Evaluation Kit General Description of Software The main window of the MAX11905 EV kit software contains five tabs: Configuration, Scope, DMM, Histogram, and FFT. The Configuration tab sheet provides control to communicate with the ZedBoard, SPI, and the IC registers. The other four tabs are used for evaluating the IC’s high-speed ADC. Configuration Tab When all connections are made on the system and are fully powered, the Configuration tab sheet displays the correct IP address, port, and the lower status bar displays as shown Figure 1. These are all indicators that the system and GUI are ready for communication. Before proceeding, connect the connector used on the ZedBoard to either the FMC or PMOD connector on the EV kit. If the FMC connector is used, all SCLK frequencies are applicable. If the PMOD connector is used, the maximum allowed frequency is 37.5MHz. For the Clock Source selection, the ZedBoard internal clock is always a valid option. If the external clock is selected, an external Evaluates: MAX11905 clock must be applied at the DCLK_IN SMA on the EV kit. The Sync-Out CLK (10MHz) checkbox is used to synchronize the signal generator with a 10MHz input. See the Sync Input and Sync Output section for more information. Once the above configurations are completed, adjust to the desired sampling rate, reference voltage, and number of samples, and then click on the Set button. Also in this tab sheet are the IC register controls. The Mode register is accessible using the controls on the MAX11905 Mode Register Configuration group box in the center, or the Mode control on the right. All other registers are read-only and are updated by clicking on the appropriate Read button. The first and second REF must be shorted on the board to use the REF controls. first REF BUF and second REF BUF are internally set to the same value. The GUI forces these two controls to the same value, regardless of the user’s choice. The Reset button resets the firmware, as well as the device. It sends 0x8000 to the Mode register and causes the device to do a power-on reset. The Set button needs to be clicked to save the current screen settings. Figure 1. MAX11905 EV Kit Main Window (Configuration Tab) www.maximintegrated.com Maxim Integrated │  4 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit Scope Tab The Scope tab sheet is used to capture data and display it in the time domain. Sampling rate and number of samples can also be set in this tab if they were not adjusted appropriately in other tabs. The Display Unit drop-down list allows counts and voltages. Once the desired configuration is set, click on the Capture button. The right side of the tab sheet displays details of the waveform, such as average, standard deviation, maximum, minimum, and fundamental frequency. Figure 2 displays the ADC data when differential sinusoidal are applied at the inputs on the EV kit. DMM Tab The DMM tab sheet provides the typical information as a digital multimeter. Once the desired configuration is set, click on the Capture button. Figure 2. MAX11905 EV Kit Main Window (Scope Tab) www.maximintegrated.com Maxim Integrated │  5 MAX11905 Differential Evaluation Kit Figure 3 displays the numerical value when the inputs on the EV kit are shorted to ground using the jumpers (JU1 and JU2). See Table 1 for shunt settings. Histogram Tab The Histogram tab sheet is used to capture the histogram of the data. Sampling rate and number of samples can also be set in this tab if they were not adjusted appropriately in other tabs. Make sure that the number of samples do not exceed 524,288; otherwise, data capturing is Evaluates: MAX11905 longer than expected. Once the desired configuration is set, click on the Capture button. The right side of the tab sheet displays details of the histogram such as average, standard deviation, maximum, minimum, peak-to-peak noise, effective resolution, and noise-free resolution. To use this histogram feature, apply a DC voltage at the input. Figure 4 displays the results when the input of the EV kit are shorted to ground using jumpers JU1 and JU2. See Table 1 for placement of shunt positions. Figure 3. MAX11905 EV Kit Main Window (DMM Tab) www.maximintegrated.com Maxim Integrated │  6 MAX11905 Differential Evaluation Kit FFT Tab The FFT tab sheet (Figure 6) is used to display the FFT of the data. Sampling rate and number of samples can also be set in this tab if they were not adjusted appropriately in other tabs. When coherent sampling is needed, this tab sheet allows the user to calculate the input frequency or the master clock coming into the board. Either adjust the input frequency applied to the signal generator or adjust the master clock applied to the DCLK_IN SMA connector. See the Sync Input and Sync Output section before using this feature. Once the desired configuration is set, click on the Capture button. The right side of the tab sheet displays the performance based on the FFT, such as fundamental frequency, THD, SNR, SINAD, SFDR, ENOB, and noise floor. Evaluates: MAX11905 Figure 5 is the setup Maxim uses to capture data for coherent sampling. The input signal from the signal generator must be exactly 10000.000000 Hz. The low-jitter clock is synchronized with the signal generator. The master clock is initially set to 1000000000 Hz. To achieve coherent sampling, the user must click on the Calculate button and use the Adjusted(Hz) frequency. 99523158.694 Hz was entered into our low-jitter clock. The master clock is fed back to the ZedBoard and multiplied by 3/2, then generates a system clock that drives the Xilinx FPGA. All SPI timing and sampling rate are based off the system clock. Note: If the results do not look similar to Figure 6 and more similar to Figure 7, then check all connections in Figure 5 to make sure the setup is synchronizing properly. Figure 4. MAX11905 EV Kit Main Window (Histogram Tab) www.maximintegrated.com Maxim Integrated │  7 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit LOW-JITTER CLOCK ~100MHz OUT 10MHz ZedBoard SIGNAL GENERATOR _ INM + INP DCLK_IN PC MAX 11905 DIFFERENTIAL EV KIT# ETHERNET CABLE Figure 5. MAX11905 Differential EV Kit Coherent Sampling Setup Figure 6. MAX11905 EV Kit Main Window, Coherent Sampling Results (FFT Tab) www.maximintegrated.com Maxim Integrated │  8 MAX11905 Differential Evaluation Kit Evaluates: MAX11905 Figure 7. MAX11905 EV Kit Main Window, Noncoherent Sampling Results (FFT Tab) www.maximintegrated.com Maxim Integrated │  9 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit General Description of Hardware The EV kit provides a proven layout to demonstrate the performance of the MAX11905 20-bit SAR ADC. Included in the EV kit are digital isolators, ultra-low-noise LDOs (MAX8510) to all supply pins of the IC, on-board reference (MAX6126), fully differential amplifier (MAX44205) for the analog inputs, and sync-in and sync-out signals for coherent sampling. Configuring the MAX44205 Jumpers are included to configure the MAX44205 appropriately. Jumper JU14 shut downs the MAX44205 by placing a shunt in the 2-3 position. Jumper JU11 is used to set the input common-mode voltage to REF/2. Jumper JU3 is used to set the output common-mode voltage to REF/2 by placing a shunt in the 1-2 position. Jumpers JU12 and JU13 are used to set the voltage clamps to protect the analog inputs of the MAX11905 ADC. The default position connects VCLPH to REFVDD and VCLPL to GND. User-Supplied SPI To evaluate the EV kit with a user-supplied SPI bus, remove shunts from jumper JU9. Apply the user-supplied SPI signals to the SCLK, CNVST, DIN, and DOUT test points. Make sure the return ground is the same as the IC’s ground. User-Supplied REFVDD there is a supply limitation on the isolators (U3, U18), the OVDD supply should not be powered below +2.7V when the FMC connector or PMOD of the EV kit are being used. User-Supplied REFIN The IC uses an on-board +3V reference (MAX6126) by default. For user-supplied REFIN, move the shunt on jumper JU5 to the 2-3 position. Make sure that REFIN is 300mV below REFVDD before applying the reference. Analog Inputs Both analog inputs (AIN+ and AIN-) range from 0 to VREF. The differential input range is from -VREF to +VREF and the full-scale range is 2x the VREF. The desired input signals are applied at the INP and INM SMAs or test points. Sync Input and Sync Output The DCLK_IN SMA accepts an approximate 100MHz waveform signal to generate the system clock of the ZedBoard. For maximum performance, use a low-jitter clock that syncs to the user’s analog function generator. The SYNC_OUT SMA outputs a 10MHz square waveform that syncs to the user’s analog function generator. Both options are used for coherent sampling of the IC. Only one option should be used at a time. The relationship between fIN, fS, NCYCLES, and MSAMPLES is given as follows: N fIN = CYCLES f S M SAMPLES The REFVDD supply is powered through a +3.3V LDO by default. For user-supplied REFVDD, remove the shunt on jumper JU8 and apply +2.7V to +3.6V at JU8-1. where: User-Supplied AVDD fIN = Input frequency The AVDD supply is powered through a +1.8V LDO by default. For user-supplied AVDD, remove the shunt on jumper JU7 and apply +1.7V to +1.9V at JU7-2. User-Supplied DVDD The DVDD supply is powered through a +1.8V LDO by default. For user-supplied DVDD, remove the shunt on jumper JU4 and apply +1.7V to +1.9V at JU4-2. User-Supplied OVDD The OVDD supply is powered through a +3.3V LDO by default. For user-supplied OVDD, remove the shunt on jumper JU6 and apply +1.5V to +3.6V at JU6-2. Since www.maximintegrated.com fS = Samping frequency NCYCLES = Prime number of cycles in the sampled set MSAMPLES = Total number of samples Interface Connectors The EV kit and ZedBoard communicate in two ways, using the peripheral module connector (J1) or the FMC connector (J2) on the EV kit. The maximum SPI SCLK frequency is 37.5MHz for the peripheral module connector and 75MHz for the FMC connector. Maxim Integrated │  10 ITEM www.maximintegrated.com C0603C104K3RAC; GRM188R71E104KA01; C1608X7R1E104K 5 C35, C36, C38, C93, C95 C40, C41, C46, C47, C106, 8 C109, C113, C116 C42-C45, C105, C107, C111, GRM31CR71E106KA12L; 8 C115 CL31B106KAHNNN INM, INP, DCLK_IN, 4 SYNC_OUT 10 11 12 5-1814832-1 1UF 2.2UF 1000PF 0.1UF 10UF 4700PF 0.1UF 0.01UF N/A VALUE CAPACITOR; SMT (0603); CERAMIC CHIP; 1UF; 50V; TOL=10%; MODEL=_MK SERIES; TG=-55 DEGC TO +85 DEGC CAPACITOR; SMT (0603); CERAMIC CHIP; 0.1UF; 100V; TOL=10%; TG=-55 DEGC TO +125 DEGC; TC=X7R CAPACITOR; SMT (0603); CERAMIC CHIP; 4700PF; 100V; TOL=5%; MODEL=FT-CAP; TG=-55 DEGC TO +125 DEGC; TC=C0G CAPACITOR; SMT (0805); CERAMIC CHIP; 10UF; 35V; TOL=10%; TG=-55 DEGC TO +85 DEGC; TC=X5R CAPACITOR; SMT; 0402; CERAMIC; 0.1uF; 16V; 5%; X7R; -55degC to + 125degC; 0 +/-15% degC MAX. CAPACITOR; SMT (0603); CERAMIC CHIP; 1000PF; 100V; TOL=5%; MODEL=HT SERIES; TG=-55 DEGC TO +200 DEGC; TC=C0G CAPACITOR; SMT (1210); CERAMIC CHIP; 2.2UF; 100V; TOL=10%; MODEL=GRM SERIES; TG=-55 DEGC to +125 DEGC; TC=X7R TEST POINT; PIN DIA=0.125IN; TOTAL LENGTH=0.35IN; BOARD HOLE=0.063IN; RED; PHOSPHOR BRONZE WIRE SILVER PLATE FINISH; RECOMMENDED FOR BOARD THICKNESS=0.062IN CAPACITOR; SMT (0603); CERAMIC CHIP; 0.01UF; 200V; TOL=10%; MODEL=; TG=-55 DEGC TO +125 DEGC; TC=X7R DESCRIPTION CAPACITOR; SMT; 0603; CERAMIC; 0.1uF; 25V; 10%; X7R; -55degC to + 125degC; +/-15% from KEMET/MURATA/T 55degC to +125degC; NOT RECOMMENDED FOR DK 0.1UF NEW DESIGN USE - 20-000u1-01 MURATA; CAPACITOR; SMT (1206); CERAMIC CHIP; 10UF; SAMSUNG 25V; TOL=10%; TG=-55 DEGC TO +125 DEGC; ELECTRONICS 10UF TC=X7R CONNECTOR; FEMALE; THROUGH HOLE; CONN 5-1814832- SOCKET SMA STR DIE CAST PCB; STRAIGHT; 5PINS TYCO 1 TAIYO YUDEN; TDK; SAMSUNG; MURATA UMK107BJ105KA-T; C1608X5R1H105K080AB; CL10A105KB8NNN; GRM188R61H105KAAL 9 MURATA/TDK GRM32ER72A225KA35; CGA6N3X7R2A225K230 4 C31, C50, C51, C67 8 KEMET KEMET TDK KEMET MURATA; TDK KEMET C0603H102J1GAC 1 C17 7 C0402C104J4RAC 2 C12, C104 2 C4, C10 C0603X472J1GAC C5, C7, C20, C22, C24, C28, C30, C32, C68, C70, C98, 12 C101 C2012X5R1V106K085 MFG 5005 KEYSTONE GRM188R72A104KA35; CC0603KRX7R0BB104 C0603C103K2RAC MFG PART # 6 5 4 3 4 C1, C9, C26, C102 2 C2, C3, C6, C8, C11, C13, C14, C18, C19, C23, C25, C29, C33, C34, C37, C39, 21 C69, C94, C99, C100, C103 2 +5V, +3.3V_Z REF DES 1 QTY MAX11905 Differential Evaluation Kit Evaluates: MAX11905 MAX11905 Differential EV Kit Bill of Materials Maxim Integrated │  11 www.maximintegrated.com 3 JU1, JU2, JU11 6 JU3, JU5, JU6, JU12-JU14 1 JU9 2 R1, R2 4 R3, R6, R16, R19 R4, R5, R14, R15, R17, R18, 9 R39, R42, R44 SEE NOTES VISHAY DALE RN73C1J2K0B; 5-16143524 R8, R9, R45, R49 1 TE CONNECTIVITY 2K 18 19 20 21 22 2 R30, R31 1 R41 27 28 2 R47, R48 5 R26, R27, R32-R34 26 29 9 R21-R24, R35-R38, R43 25 24 23 CRCW060349R9FK RN73C1J49R9B; 91614353-1 288-0603-1.0K-RC CRCW06031003FK; ERJ3EKF1003 RN73C1J10RBTG; 1614350-2 RG1608N-101-W-T1 CRCW06030000ZS; MCR03EZPJ000; ERJ3GEY0R00 TSW-104-26-T-T PCC03SAAN PEC02SAAN ASP-134604-01 1 J2 TE CONNECTIVITY VISHAY DALE XICON TE CONNECTIVITY 1K TEST POINT; PIN DIA=0.125IN; TOTAL LENGTH=0.35IN; BOARD HOLE=0.063IN; BLACK; PHOSPHOR BRONZE WIRE SILVER PLATE FINISH; RECOMMENDED FOR BOARD THICKNESS=0.062IN; NOT FOR COLD TEST TESTPOINT WITH 1.80MM HOLE DIA, RED, MULTIPURPOSE CONNECTOR; THROUGH HOLE; DOUBLE ROW; RIGHT ANGLE; 12PINS; THIS PART IS DEDICATED FOR PMOD PERIPHERAL BOARD CONNECTOR; MALE; SMT; HIGH SPEED/HIGH DENSITY OPEN PIN FIELD TERMINAL ARRAY; STRAIGHT; 160PINS CONNECTOR; MALE; THROUGH HOLE; BREAKAWAY; STRAIGHT; 2PINS CONNECTOR; MALE; THROUGH HOLE; BREAKAWAY; STRAIGHT THROUGH; 3PINS; -65 DEGC TO +125 DEGC CONNECTOR; MALE; THROUGH HOLE; TSW SERIES; TRIPLE ROW; 2.54MM PITCH; STRAIGHT; 12PINS RESISTOR; 0603; 100 OHM; 0.05%; 10PPM; 0.10W; THICK FILM RESISTOR; 0603; 100K; 1%; 100PPM; 0.10W; THICK FILM RESISTOR; 0603; 10 OHM; 0.1%; 10PPM; 0.063W; 10 THICK FILM RESISTOR, 0603, 1K, 0.1%, 10PPM, 1/16W, THIN FILM RESISTOR; 0603; 49.9 OHM; 1%; 100PPM; 0.10W; 49.9 THICK FILM RESISTOR; 0603; 49.9 OHM; 0.1%; 10PPM; 0.063W; 49.9 METAL FILM RESISTOR; 0603; 0 OHM; 0%; JUMPER; 0.10W; 0 THICK FILM RESISTOR; 0603; 33 OHM; 1%; 100PPM; 0.10W; 33 THICK FILM RESISTOR; 0603; 2K OHM; 0.1%; 10PPM; 0.063W; METAL FILM 100 TSW-10426-T-T PCC03SA AN ASP134604-01 PEC02SA AN VISHAY DALE/PANASONIC 100K SUSUMU CO LTD. VISHAY DALE/ROHM/PANA SONIC SAMTEC SULLINS SULLINS SAMTEC SAMTEC 5010 TSW-10608-S-D-RA 17 TSW-106-08-S-D-RA 1 J1 5010 ? N/A N/A 16 15 5006 KEYSTONE 5001 KEYSTONE 1 GND_+5 VS+, VS-, INM1, INP1, 5 TP_VOCM GND1-GND6, GNDA19 GNDA3 14 13 TEST POINT; PIN DIA=0.1IN; TOTAL LENGTH=0.3IN; BOARD HOLE=0.04IN; BLACK; PHOSPHOR BRONZE WIRE SILVER PLATE FINISH; RECOMMENDED FOR BOARD THICKNESS=0.062IN; NOT FOR COLD TEST MAX11905 Differential Evaluation Kit Evaluates: MAX11905 MAX11905 Differential EV Kit Bill of Materials (continued) Maxim Integrated │  12 www.maximintegrated.com 2 R52, R53 17 SU1-SU17 4 TP2-TP5 1 U1 1 U2 2 U3, U18 2 U4, U5 2 U6, U20 1 U7 1 U11 1 U17 1 U21 1 175 31 32 33 34 35 36 37 38 39 40 41 42 43 2 1 1 C21 2 C15, C16 DO NOT PURCHASE(DNP) REF DES ITEM QTY TOTAL 1 R51 30 N/A N/A MFG PART # 74LVC1G126GV MAX1190XDIF M25P16-VMW6TG MAX9632ASA+ MAX44205ATC+ MAX8510EXK33+ MAX8510EXK18 MAX14935FAWE+ MAX6126AASA30+ MAX11905ETP+ STC02SYAN RN73C1E1K0B ERJ-3GEYJ104V 100K N/A N/A MANUFACTURER RESISTOR; 0603; 100K OHM; 5%; 200PPM; 0.10W; THICK FILM RESISTOR; 0402; 1K OHM; 0.1%; 10PPM; 0.063W ; THIN FILM SERIES VOLTAGE REFERENCE IC; DISO; FOUR-CHANNEL; 150MBPS; 5KV DIGITAL ISOLATOR; WSOIC16 300MIL IC; ADC; 20-BIT, 1.6MSPS, LOW-POWER, FULLY DIFFERENTIAL SAR ADC; TQFN20-EP 4X4 OPEN OPEN VALUE DESCRIPTION PACKAGE OUTLINE 0603 NON-POLAR CAPACITOR - EVKIT PACKAGE OUTLINE 1206 NON-POLAR CAPACITOR - EVKIT IC; MMRY; 16MBIT; SERIAL FLASH MEMORY; 75MHZ SPI BUS INTERFACE; MSOIC8 200MIL IC; DRV; SINGLE BUS BUFFER/LINE DRIVER; 3STATE; SOT753 PCB: MAX1190XDIF MAX8510E IC; VREG; ULTRA-LOW-NOISE; HIGH PSRR; LOWXK33+ DROPOUT; 0.12A LINEAR REGULATOR; SC70-5 EVKIT PART - IC; MAX44205ATC+; TQFN12-EP MAX44205 3X3; PACKAGE CODE: T1233-4; PACKAGE DWG. ATC+ NO.: 21-0136 IC; OPAMP; PRECISION, LOW-NOISE, WIDE-BAND MAX9632A AMPLIFIER; NSOIC8 150MIL; -40 DEGC TO +125 SA+ DEGC MAX8510E IC; VREG; ULTRA-LOW-NOISE; HIGH PSRR; LOWXK18 DROPOUT; 0.12A LINEAR REGULATOR; SC70-5 MAX11905 ETP+ MAX6126A ASA30 MAX14935 FAWE+ TEST POINT; PIN DIA=0.125IN; TOTAL LENGTH=0.445IN; BOARD HOLE=0.063IN; BLACK; PHOSPHOR BRONZE WIRE SILVER PLATE FINISH; RECOMMENDED FOR BOARD 5011 THICKNESS=0.062IN TEST POINT; JUMPER; STR; TOTAL LENGTH=0.256IN; BLACK; INSULATION=PBT STC02SYA CONTACT=PHOSPHOR BRONZE; COPPER N PLATED TIN OVERALL MICRON M25P16TECHNOLOGY INC. VMW6TG 74LVC1G1 26GV NXP MAXIM PCB MAXIM MAXIM MAXIM MAXIM MAXIM MAXIM MAXIM 5011 ? SULLINS ELECTRONICS CORP. TE CONNECTIVITY 1K PANASONIC MAX11905 Differential Evaluation Kit Evaluates: MAX11905 MAX11905 Differential EV Kit Bill of Materials (continued) Maxim Integrated │  13 1 C27 1 R7 1 R20 6 N/A N/A N/A N/A N/A N/A ITEM 1 PACKOUT 1 PACKOUT 1 PACKOUT 1 PACKOUT 1 PACKOUT 2 3 4 5 REF DES 1 QTY www.maximintegrated.com N/A N/A N/A N/A N/A MFG PACKOUT (These are purchased parts but not assembled on PCB and will be shipped with PCB) TOTAL 3 4 5 ? ? ? ? ? VALUE OPEN OPEN OPEN LABEL(EV KIT BOX) - PACKOUT WEB INSTRUCTIONS FOR MAXIM DATA SHEET PINK FOAM;FOAM;ANTI-STATIC PE 12inX12inX5MM - PACKOUT ESD BAG;BAG;STATIC SHIELD ZIP 4inX6in;W/ESD LOGO - PACKOUT BOX;SMALL BROWN 9 3/16X7X1 1/4 - PACKOUT DESCRIPTION PACKAGE OUTLINE 0805 NON-POLAR CAPACITOR - EVKIT PACKAGE OUTLINE 0603 RESISTOR - EVKIT PACKAGE OUTLINE 0603 RESISTOR - EVKIT MAX11905 Differential Evaluation Kit Evaluates: MAX11905 MAX11905 Differential EV Kit Bill of Materials (continued) Maxim Integrated │  14 REF/2 IN 5 4 3 2 INP REF/2 5 4 3 2 1 1 IN 1 JU3 10PPM 0.05% R2 100 GND INP GND INM 10PPM 3 1 1 1 C22 10UF 2 C12 0.1UF C3 1UF C38 +5V OPEN 0.1UF R3 0 50 OHM TRACE REF1 JU2 2 50 OHM TRACE REF_GND C104 0.1UF VOCM 0.1% 10PPM 2 0.1% 49.9 10PPM R48 2K R45 C31 2 2K 0.1% R49 2.2UF JU11 0.1% 10PPM OPEN R7 INM 49.9 10PPM 0.1% C21 R47 R8 2K R9 2K JU1 C37 0.1UF REF2 3 13 10 1 12 11 2 IN+ EP 9 SHDN 5 3 6 4 C41 0.1UF VCLPL OUT+ OUT- 0.1% C10 4700PF C40 0.1UF U7 MAX44205ATC+ 10PPM VS- 7 VCLPL VCLPH 1K 8 VS- VS+ 2 VS+ R53 GND VOCM N.C. IN- R51 100K VCLPH 1K 0.1% 10PPM C20 10UF C39 1 NR 2 IN U2 C8 0.1UF OUTF 7 OUTS 6 MAX6126AASA30 IN IN OUTN OUTP C50 2.2UF REF R19 0 10PPM 0.1% R26 10 10PPM 0.1% R27 10 IN 1 C43 10UF C42 10UF A SECOND 4700PF CAP IS PLACED ON TOP OF C10. 0.1UF JU14 1 3 GND 4 GNDS 10PPM 0.1% R52 5 I.C. 8 I.C. OPEN C27 VS+ JU5 2 A SECOND 4700PF CAP IS PLACED ON TOP OF C4. C4 4700PF OUTN IN C111 10UF C15 OPEN 1000PF C17 C51 2.2UF R20 DNI 4 REFGND 5 AIN- 2 REF 3 REFGND 1 REF C11 0.1UF EXT_REFIN C113 0.1UF C106 0.1UF C24 10UF C13 3 3 C14 0.1UF 1 1 10UF C68 10UF REFVDD DGND DIN CNVST SCLK DVDD 11 12 13 14 15 0.1UF C25 MAX11905ETP+ U1 0.1UF C23 C28 JU13 2 VCLPL JU12 2 VCLPH REFVDD 0.1UF AVDD C47 0.1UF C46 0.1UF OVDD OVDD A SECOND 1000PF CAP IS PLACED IN PARALLEL USING C15 AND C16 TERMINALS. 10PPM 0.05% R1 100 VS- C45 10UF OUTP C44 10UF IN 50 OHM TRACE C16 OPEN 3 C105 10UF 50 OHM TRACE VS+ 20 19 18 17 16 REFIN AVDD AGND AGND REFVDD AIN+ AGND OVDD DOUT DGND 6 7 8 9 10 www.maximintegrated.com 21 EP 10UF C30 REF DOUT DVDD CNVST R31 1K 10PPM 0.1% R30 1K 10PPM 0.1% DIN IN JU4 33 R4 JUMPER 2 SCLK 1 VIO_1 C67 2.2UF 10PPM 0.1% R32 10 IN IN IN IN C70 +5V 10UF DIN CNVST SPIB_SCLK2 4 VEE 3 IN+ 5 N.C. 1 6 R34 10 10PPM 0.1% MAX9632ASA+ U11 OUT N.C. 7 8 2 IN-VCC SHDN C69 0.1UF DOUT 10 R33 10PPM 0.1% IN REF/2 MAX11905 Differential Evaluation Kit Evaluates: MAX11905 Figure 8a. MAX11905 Differential EV Kit Schematic (Sheet 1 of 3) Maxim Integrated │  15 IN DOUT SPIB_MISO SPIB_SCLK2 U18P5 U18P6 IN SPIB_SCLK2 IN IN IN IN SPIB_SCLK SPIB_CS SPIB_MOSI U3P11 IN JU9 1 2 4 5 7 8 10 11 IN IN IN IN 100K R21 TSW-104-26-T-T 3 6 9 R38 CNVST R37 12 R35 IN 100K DIN OVDD OVDD 7 7 8 8 5 5 6 6 3 3 4 4 1 1 2 2 10 10 9 9 12 12 11 11 14 14 13 13 16 16 15 15 DNI U19 DNI U9 IN GNDA 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 GNDA +3.3V_A 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 +3.3V_A SPIB_MISO U3P11 IN SPIB_MOSI IN R22 R36 3 100K R23 100K 100K 6 2 100K SPIB_CS IN R5 33 0 R6 33 R14 SPIB_MISO SPIB_SCLK2 U18P5 U18P6 IN IN IN IN IN IN IN IN IN IN IN IN C19 0.1UF SPIA_MISO SPIA_SCLK2 U18P12 U18P11 R24 4 JUMPERS NORMALLY INSTALLED. 100K SPIB_SCLK IN 100K SPIA_SCLK SPIA_CS SPIA_MOSI U3P6 OVDD U18 GNDA 8 INA3 5 OUTA1 6 ENA 7 INA1 3 INA2 4 7 ENA 8 GNDA 5 INA3 6 OUTA1 3 INA1 4 INA2 1 VDDA 2 GNDA ENB 10 GNDB 9 OUTB3 12 INB1 11 OUTB1 14 OUTB2 13 VDDB 16 GNDB 15 GNDA IN IN IN IN IN IN IN IN 0.1UF C18 IN GNDA D C SB WB HOLDB +3.3V_A GNDA GNDA 0.1UF +3.3V_A C34 VDDA 1 GNDA 2 MAX14935FAWE+ 10 ENB 9 GNDB 12 OUTB3 11 INB1 14 OUTB1 13 OUTB2 U3 MAX14935FAWE+ 16 VDDB 15 GNDB 0.1UF C33 OVDD 5 6 1 3 7 GNDA C94 0.1UF +3.3V_A GNDA 1 VSS VCC GNDA R41 49.9 Q 2 SYNC_OUT_Z SPIA_MISO SPIZ_MISO IN GND VCC Q GNDA 74LVC1G126GV U21 4 Y GNDA 0.1UF C103 +3.3V_A M25P16-VMW6TG U17 U3P6 SPIA_SCLK SPIA_MOSI SPIA_CS D C S W HOLD 5 4 3 2 SYNC_OUT SPIA_MISO SPIA_SCLK2 U18P12 U18P11 IN IN IN IN 8 4 5 3 1 9 12 4 5 7 8 10 11 www.maximintegrated.com A 2 OE 1 R43 100K IN IN IN 1 2 PLACE 33 OHM RESISTORS CLOSE TO U3 GNDA 5 4 3 2 33 R42 DCLK_IN 1 IN 33 R44 GNDA J1-2 J1-3 1UF J1-6 J1-5 J1-4 C35 +3.3V_A 6 5 4 3 12 11 10 9 8 7 GNDA 1UF C36 +3.3V_A J1-12 J1-11 J1-10 J1-9 J1-8 J1-7 J1 J1-1 TSW-106-08-S-D-RA GNDA 1UF C95 33 33 R18 R17 0 R16 TP1 33 R39 Q IN SB IN D IN WB IN HOLDB IN C IN GNDA +3.3V_A IN IN SPIZ_MISO SPIA_SCLK IN IN IN SPIA_MOSI SPIZ_SCLK2 SPIA_CS R15 AND R39 CLOSE TO U18 GNDA DCLK_IN_Z JU10 33 R15 2 1 GNDA IN IN IN IN H40 40 H38 38 H39 39 H36 36 H37 37 H34 34 H35 35 H32 32 H33 33 H30 30 H31 31 H28 28 H29 29 H26 26 H27 27 H24 24 H25 25 H22 22 H23 23 H20 20 H21 21 H18 18 H19 19 H16 16 H17 17 H14 14 H15 15 H12 12 H13 13 H10 10 H11 11 H9 9 H7 7 H8 8 H5 5 H6 6 H3 3 H4 4 H1 1 H2 2 J2 ASP-134604-01 DCLK_IN_Z SPIA_SCLK2 SYNC_OUT_Z SPIZ_SCLK2 GNDA C40 40 C38 38 C39 39 C36 36 C37 37 C34 34 C35 35 C32 32 C33 33 C30 30 C31 31 C28 28 C29 29 C26 26 C27 27 C24 24 C25 25 C22 22 C23 23 C20 20 C21 21 C18 18 C19 19 C16 16 C17 17 C14 14 C15 15 C12 12 C13 13 C10 10 C11 11 C8 8 C9 9 C6 6 C7 7 C4 4 C5 5 C3 3 C2 2 C1 1 J2 ASP-134604-01 +3.3V_Z GNDA GNDA 1UF C93 +3.3V_Z D40 40 D38 38 D39 39 D36 36 D37 37 D34 34 D35 35 D32 32 D33 33 D30 30 D31 31 D28 28 D29 29 D26 26 D27 27 D24 24 D25 25 D22 22 D23 23 D20 20 D21 21 D18 18 D19 19 D16 16 D17 17 D14 14 D15 15 D12 12 D13 13 D10 10 D11 11 D9 9 D7 7 D8 8 D5 5 D6 6 D3 3 D4 4 D1 1 D2 2 J2 ASP-134604-01 GNDA MT4 MTHOLE MT1 MTHOLE MT2 MTHOLE MT3 MTHOLE G40 40 G38 38 G39 39 G36 36 G37 37 G34 34 G35 35 G32 32 G33 33 G30 30 G31 31 G28 28 G29 29 G26 26 G27 27 G24 24 G25 25 G22 22 G23 23 G20 20 G21 21 G18 18 G19 19 G16 16 G17 17 G14 14 G15 15 G12 12 G13 13 G10 10 G11 11 G9 9 G7 7 G8 8 G5 5 G6 6 G3 3 G4 4 G1 1 G2 2 J2 ASP-134604-01 1 1 1 1 MAX11905 Differential Evaluation Kit Evaluates: MAX11905 JUMPER Figure 8b. MAX11905 Differential EV Kit Schematic (Sheet 2 of 3) Maxim Integrated │  16 f mc ur L f mc ur J f mc bPPT POt e bPOV POt e POt e bXW ur L ur J bPPU OMPt e bPOX OMPt e OMPt e bXX J Tu J Tu POt e bPOP POt e bV OMPt e bPOO OMPt e bU f mc R r gc m P hm tT t QO f mc R r gc m P hm bPOQ POt e bRQ so OMPt e bQX OMPt e bQ f mc R r gc m tU f mc f mc ‘ so f mc ‘ Q so f mc ‘ P so f mc Q so f mc P so f mc ‘ R bQU OMOPt e so ao S nt s T OMOPt e bX f mc R f mc S so f mc T so f mc U ao S nt s T l ‘ wWTPOdwj RRJ R r gc m J Tu POt e bT P hm tS l ‘ wWTPOdwj PW ao S Q nuc c J Tu P hm OMOPt e itU OMOPt e bP uhn~P nt s T l ‘ wWTPOdwj RRJ ao S nt s T l ‘ wWTPOdwj PW P R Q Q Q www.maximintegrated.com Q J Tu J Tu itV i t l odq itW i t l odq Q P P Q qde uc c ‘ uc c MAX11905 Differential Evaluation Kit Evaluates: MAX11905 Figure 8c. MAX11905 Differential EV Kit Schematic (Sheet 3 of 3) Maxim Integrated │  17 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit 1” Figure 9. MAX11905 Differential EV Kit Component Placement Guide—Component Side 1” Figure 10. MAX11905 Differential EV Kit PCB Layout— Component Side www.maximintegrated.com 1” Figure 11. MAX11905 Differential EV Kit PCB Layout—Layer 2 1” Figure 12. MAX11905 Differential EV Kit PCB Layout—Layer 3 Maxim Integrated │  18 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit 1” Figure 13. MAX11905 Differential EV Kit PCB Layout—Layer 4 1” Figure 14. MAX11905 Differential EV Kit PCB Layout—Layer 5 www.maximintegrated.com 1” Figure 15. MAX11905 Differential EV Kit PCB Layout—Solder Side 1” Figure 16. MAX11905 Differential EV Kit Component Placement Guide—Solder Side Maxim Integrated │  19 MAX11905 Differential Evaluation Kit Evaluates: MAX11905 Ordering Information PART TYPE MAX11905DIFEVKIT# EV Kit #Denotes RoHS compliant. www.maximintegrated.com Maxim Integrated │  20 Evaluates: MAX11905 MAX11905 Differential Evaluation Kit Revision History REVISION NUMBER REVISION DATE 0 12/14 Initial release 1 12/16 Updated second page of schematic and Bill of Materials DESCRIPTION PAGES CHANGED — 10, 12–16 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2016 Maxim Integrated Products, Inc. │  21