19-6390; Rev 0; 6/12
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
General Description
The MAX14581/MAX14582 USB-compliant transceivers
are designed to minimize the area and external components required to interface low-voltage ASICs to USB.
These devices comply with USB 2.0 specification for fullspeed-only (12Mbps) operation. The transceivers include
an internal 3.3V regulator, an internal 1.5kI D+ pullup
resistor, and built-in ±15kV ESD HBM protection circuitry
to protect the USB I/O ports (D+, D-). The MAX14581/
MAX14582 also have internal series resistors, allowing the
devices to be wired directly to a USB connector.
These devices operate with logic-supply voltages as low
as +1.2V, ensuring compatibility with low-voltage ASICs.
A low-power disable mode reduces current consumption
to typically less than 13FA (typ) from VBUS. An enumerate
function controls the D+ pullup resistor, allowing devices
to logically disconnect while remaining plugged in.
The devices have 36I (typ) internal series resistors
on D+/D- for direct connection to the USB connector.
These devices can be used as either peripheral or host
(FS) USB transceivers. As a host USB transceiver, the
MAX14581/MAX14582 require external 15kI pulldown
resistors and driving ENUM logic-low.
The MAX14581 (3-wire) is equipped with DAT and SE0
interface signals. The transceiver provides a USB detection function that monitors the presence of USB VBUS and
signals the event by means of a BD pin.
The MAX14582 (5-wire) is equipped with VP, VM, and
RCV interface signals. The detection of VBUS in the
MAX14582 is encoded as VP = VM = logic-high.
These devices operate over the extended -40NC to
+85NC temperature range and are available in 12-bump
WLP packages.
Benefits and Features
S Provide Flexible USB Transceiver Design
Supports 3-Wire Interface (MAX14581)
Supports 5-Wire Interface (MAX14582)
USB 2.0 (Full-Speed, 12Mbps)-Compliant
Transceiver
+1.2V to +3.6V Interface Voltage (VL)
Enumeration Input Controls D+ Pullup Resistor
13µA (typ) Current in Disable Mode
S Minimize PCB Area
Internal Pullup Resistor on D+
Internal Series Resistors
S Additional Protection Features Increase System
Reliability
Low Output Capacitance for Easy Connection to
an External USB HS Transceiver in Parallel
No Power-Supply Sequencing Required
Ability to Accept D+/D- Voltages Up to 3.6V with
VBUS = 0V
28V-Tolerant VBUS Pin
Bus Detect (BD) Pin for the VBUS Detection
(MAX14581 Only)
High-ESD Protection on D+/D- and VBUS
±15kV HBM
Typical Application Circuits
SYSTEM
VOLTAGE SUPPLY
VL
Tablets
SYSTEM
INTERFACE
MAX14581
VTRM
1FF
D+
GND
USB
CONNECTOR
D-
SYSTEM
VOLTAGE SUPPLY
VBUS
VL
Portable Media Players
1FF
0.1FF
ebook Readers
SYSTEM
INTERFACE
Ordering Information and USB Inter-Chip Typical
Application Circuits appear at end of data sheet.
1FF
BD
DAT
SE0
OE
ENUM
SUS
Applications
Smart Phones
VBUS
0.1FF
RCV
VP
VM
OE
ENUM
SUS
MAX14582
VTRM
1FF
D+
GND
D-
USB
CONNECTOR
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
ABSOLUTE MAXIMUM RATINGS
(All Voltages Referenced to GND, unless otherwise noted.)
Supply Voltage (VBUS)...........................................-0.3V to +30V
Supply Voltage (VL)..................................................-0.3V to +6V
VTRM.......................................... -0.3V to min(+6V, VBUS + 0.3V)
D+, D-......................................................................... -0.3V to 6V
VP, VM, SUS, BD, ENUM,
RCV, OE, DAT, SE0................................... -0.3V to (VL +0.3V)
Short-Circuit Current (D+ and D-) to VBUS or GND....Continuous
Maximum Continuous Current (all other pins)................. Q15mA
Continuous Power Dissipation (TA = +70NC)
WLP (derate 13.7mW/NC above +70NC)......................500mW
Operating Temperature Range........................... -40NC to +85NC
Junction Temperature......................................................+150NC
Storage Temperature Range............................. -65NC to +150NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
WLP
Junction-to-Ambient Thermal Resistance (BJA)...........73NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VBUS = +3.0V to +5.5V, VL = +1.20V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VBUS = +3.6V,
VL = +2.5V, and TA = +25NC.) (Note 2)
PARAMETER
Supply Voltage Range
SYMBOL
MAX
3
5.5
1.2
3.6
Operating VBUS Supply Current
IVBUS
IL
Full-Speed Idle and SE0 Supply
Current
IVBUS (IDLE)
Static VL Supply Current
IVL(STATIC)
Disable-Mode VBUS Supply
Current
TYP
VL
VTRM
Suspend VBUS Supply Current
MIN
VBUS
Regulated Supply Voltage
Output
Operating VL Supply Current
CONDITIONS
IVBUS(SUSP)
IVBUS (DIS)
VBUS > 3.6V
3.0V < VBUS < 3.6V
3
3.3
2.8
3.6
3.6
Full-speed transmitting/receiving at
12Mbps, CL = 50pF on D+ and D-
V
V
8
mA
mA
Full-speed transmitting/receiving at
12Mbps, CL = 15pF on receiver outputs,
VL = 2.5V
1
2
Full-speed idle: VD+ > 2.7V, VD- < 0.3V,
OE = high or low
300
500
SE0: VD+ < 0.3V,VD- < 0.3V, OE = high
or low
140
250
Full-speed idle, SE0, or suspend mode;
OE = high or low
1
4
FA
DAT = SE0 = open, SUS = OE = high
(MAX14581)
33
VM = VP = open, SUS = OE = high
(MAX14582)
33
VL = GND or open, VBUS up to 5V
UNITS
FA
FA
13
23
FA
2
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
ELECTRICAL CHARACTERISTICS (continued)
(VBUS = +3.0V to +5.5V, VL = +1.20V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VBUS = +3.6V,
VL = +2.5V, and TA = +25NC.) (Note 2)
PARAMETER
Sharing-Mode VL Supply
Current
D+/D- Sharing-Mode Load
Current
SYMBOL
IVL(SHARING)
ID(SHARING)
VBUS Power-Supply Detection
Threshold
VTH_VBUS
VBUS Power-Supply Detection
Hysteresis
VHYST_VBUS
VL Power-Supply Detection
Threshold
VTH_VL
CONDITIONS
TYP
MAX
VBUS = GND or open, OE = low,
DAT = SE0 = high or high-Z, SUS = high,
MAX14581
0.1
1
VBUS = GND or open, OE = low,
VP = VM = high or high-Z, SUS = high,
MAX14582
0.1
1
VBUS = GND or open, VD_ = 0V or +5.5V,
OE = high or low
0.1
1
FA
2.4
2.7
V
VL = 1.2V
MIN
UNITS
FA
2.0
(Note 3)
100
mV
0.85
V
DIGITAL INPUTS AND OUTPUTS (VP, VM, DAT, SE0, RCV, OE, ENUM, SUS, BD)
Input-Voltage Low
VIL
Input-Voltage High
VIH
0.3 x VL
0.7 x VL
Output-Voltage Low
VOL
IOL = 2mA
Output-Voltage High
VOH
IOH = -2mA
Input Leakage Current
ILKG
V
V
VL > 1.65V
0.4
1.2V < VL < 1.65V
VL > 1.65V
0.55
VL - 0.4
1.2V < VL < 1.65V
VL - 0.55
V
V
-1
+1
FA
ANALOG INPUTS AND OUTPUTS (D+, D-)
Differential Input Sensitivity
VID
|VD+ - VD-|
0.2
Differential Common-Mode
Voltage
VCM
Includes VID range
0.8
Single-Ended Input
Low Voltage
VILSE
Single-Ended Input
High Voltage
VIHSE
VUSB_OLD
RL = 1.5kI resistor connected to +3.6V
USB Output-Voltage High
VUSB_OHD
RL = 15kI resistor connected to GND
Internal Pullup Resistance
RPULLUP
Driver Output Impedance
ZDRV
D+/D- Off Capacitance
ZIN
CUSB
2.5
V
0.8
V
2.0
USB Output-Voltage Low
Input Impedance
V
0.3
V
2.8
3.6
V
1425
1575
I
44
I
Steady-state drive
28
Driver off
10
Driver off (Note 3)
V
36
MI
8
pF
3
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
ELECTRICAL CHARACTERISTICS (continued)
(VBUS = +3.0V to +5.5V, VL = +1.20V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VBUS = +3.6V,
VL = +2.5V, and TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER CHARACTERISTICS (CL = 50pF)
Rise Time
tFR
10% to 90% of |VOHD - VOLD|; Figures 1, 6
4
20
ns
Fall Time
tFF
90% to 10% of |VOHD - VOLD|; Figures 1, 6
4
20
ns
Rise/Fall Time Matching
tFR/tFF
Excluding the first transition from idle state;
Figures 1, 6 (Note 3, inferred from drive
output impedance)
90
110
%
Output Signal Crossover Voltage
VCRS_F
Excluding the first transition from idle state,
Figure 2 (Note 3)
1.3
2.0
V
tPLH_DRV
Low-to-high transition;
Figures 2, 6
VL > 1.65V
15
1.2V < VL < 1.65V
20
tPHL_DRV
High-to-low transition;
Figures 2, 6
VL > 1.65V
15
20
tPHZ_DRV
High-to-off transition;
Figures 3, 6
1.2V < VL < 1.65V
VL > 1.65V
20
tPLZ_DRV
Low-to-off transition;
Figures 3, 6
1.2V < VL < 1.65V
VL > 1.65V
1.2V < VL < 1.65V
20
Off-to-high transition;
Figures 3, 6
VL > 1.65V
15
1.2V < VL < 1.65V
20
tPZL_DRV
Off-to-low transition;
Figures 3, 6
VL > 1.65V
15
1.2V < VL < 1.65V
20
tPLH_RCV
Low-to-high transition;
Figures 4, 7
VL > 1.65V
15
1.2V < VL < 1.65V
20
tPHL_RCV
High-to-low transition;
Figures 4, 7
VL > 1.65V
15
1.2V < VL < 1.65V
20
tPLH_SE
Low-to-high transition;
Figures 4, 7
VL > 1.65V
15
20
tPHL_SE
High-to-low transition;
Figures 4, 7
1.2V < VL < 1.65V
VL > 1.65V
20
tPHZ_SE
High-to-off transition,
Figure 5
1.2V < VL < 1.65V
VL > 1.65V
1.2V < VL < 1.65V
20
VL > 1.65V
15
1.2V < VL < 1.65V
20
Driver-Propagation Delay
Driver-Disable Delay
tPZH_DRV
Driver-Enable Delay
ns
15
15
ns
ns
RECEIVER (CL = 15pF)
Differential Receiver Propagation
Delay
Single-Ended Receiver
Propagation Delay
Single-Ended Receiver Disable
Delay
tPLZ_SE
Low-to-off transition,
Figure 5
15
ns
ns
15
ns
4
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
ELECTRICAL CHARACTERISTICS (continued)
(VBUS = +3.0V to +5.5V, VL = +1.20V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VBUS = +3.6V,
VL = +2.5V, and TA = +25NC.) (Note 2)
PARAMETER
Single-Ended Receiver Enable
Delay
SYMBOL
CONDITIONS
MIN
TYP
MAX
tPZH_SE
Off-to-high transition,
Figure 5
VL > 1.65V
15
1.2V < VL < 1.65V
20
tPZL_SE
Off-to-low transition,
Figure 5
VL > 1.65V
15
1.2V < VL < 1.65V
20
UNITS
ns
ESD PROTECTION
VBUS
D+, D-
1FF external ceramic capacitor, HBM
Q15
kV
Q15
kV
Note 2: All specifications are 100% production tested at TA = +25NC, unless otherwise noted. Specifications are over -40NC to
+85NC and are guaranteed by design.
Note 3: Guaranteed by design, not production tested.
5
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Timing Diagrams
tFR, tLR
tFF, tLF
VOHD
90%
RISE/FALL TIMES < 4ns
VM
90%
VP
VOLD
10%
10%
tPLH_DRV
tPHL_DRV
D-
Figure 1. Rise and Fall Times
VCRS_F
D+
DAT
tPLH_DRV
tPHL_DRV
DVCRS_F
D+
SEO
tPLH_DRV
tPHL_DRV
D- OR D+
D+ OR D-
Figure 2. Timing of (DAT and SE0) and (VP and VM) to D+
and D6
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Timing Diagrams (continued)
INPUT RISE/FALL TIME < 4ns
+3V
OE
VP/VM
CONNECTED TO GND,
D+/D- CONNECTED
TO PULLUP
D+/D-
tPLZ_DRV
D+/D0V
VL
tPLH_RCV,
tPLH_SE
tPZL_DRV
VP/VM
CONNECTED TO VL,
D+/D- CONNECTED
TO PULLDOWN
OE
tPHL_RCV,
tPHL_SE
DAT, SE0,
RCV, VM, AND VP
Figure 4. D+/D- Timing to VP, VM, and RCV
D+/DOE
tPHZ_DRV
MAX14581
MAX14582
D+ CONNECTED TO
GND, D- CONNECTED TO
+3.0V. DAT/VP PULLED TO
VL WITH 330I.
tPZH_DRV
TEST
D+/D- POINT
DAT/VP
220I
1. DISABLE TIME (D+/D-)
MEASUREMENT
V = 0 FOR tPHZ
V = VTRM FOR tPLZ
tPLZ_SE
DAT/VP
Figure 3. Driver Enable and Disable Timing
tPZL_SE
D+ CONNECTED TO
+3.0V, D- CONNECTED TO
GND. DAT/VP PULLED TO
GND WITH 330I.
tPHZ_SE
tPZH_SE
D+ CONNECTED TO
+3.0V, D- CONNECTED
TO GND. SE0/VM PULLED
TO VL WITH 330I.
SE0/VM
tPLZ_SE
SE0/VM
tPZL_SE
D+ CONNECTED TO
GND, D- CONNECTED
TO GND. SE0/VM PULLED
TO GND WITH 330I.
tPHZ_SE
tPZH_SE
Figure 5. Receiver Enable and Disable Timing
7
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Timing Diagrams (continued)
MAX14581
MAX14582
TEST
POINT
D+/D15kI
MAX14581
MAX14582
CL
50pF
1. ENABLE TIME (D+/D-) MEASUREMENT
2. DAT/SE0 TO D+/D- PROPAGATION DELAY
3. VP/VM TO D+/D- PROPAGATION DELAY
4. D+/D- RISE/FALL TIMES
RCV/VP/VM
TEST
POINT
CL 1. D+/D- TO RCV/VM/VP
15pF PROPAGATION DELAYS
Figure 7. Test Circuit for Receiver Propagation Delay
OE
DAT CONNECTED TO
GND, SE0 CONNECTED
TO GND. D+ PULLED TO
3.0V WITH 220I.
D+
tPLZ_DRV
D+
tPZL_DRV
DAT CONNECTED TO
VL, SE0 CONNECTED
TO GND. D+ PULLED
TO GND WITH 220I.
tPHZ_DRV
tPZH_DRV
DAT CONNECTED TO
VL, SE0 CONNECTED
TO GND. D- PULLED
TO 3.0V WITH 220I.
DtPLZ_DRV
tPZL_DRV
DAT CONNECTED TO
GND, SE0 CONNECTED
TO GND. D- PULLED
TO GND WITH 220I.
D-
tPHZ_DRV
tPZH_DRV
Figure 6. Test Circuit for Enable Time, Disable Time,
Transmitter Propagation Delay, and Transmitter Rise/Fall Time
8
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Typical Operating Characteristics
(VBUS = +3.6V, VL = +2.5V, TA = +25NC, unless otherwise noted.)
TA = +25°C
9
TA = -40°C
7
TA = +25°C
TA = -40°C
6
3
1.8
2.4
3.0
TA = -40°C
3.5
4.0
4.5
5.0
5.5
1.2
1.8
2.4
3.0
VBUS (V)
VL (V)
SINGLE-ENDED RECEIVER
PROPAGATION DELAY vs. VBUS
TRANSMITTER SKEW
vs. TEMPERATURE
RECEIVER SKEW
vs. TEMPERATURE
2
0.8
0.7
1.2
RECEIVER SKEW (ns)
TA = +25°C
1.5
0.6
0.5
0.4
0.3
0.2
3.6
MAX14581 toc06
0.9
TRANSMITTER SKEW (ns)
6
TA = -40°C
1.0
MAX14581 toc04
TA = +85°C
8
MAX14581 toc03
TA = +25°C
4
VL (V)
10
4
6
0
3.0
3.6
MAX14581 toc05
1.2
TA = +85°C
8
2
0
5
PROPAGATION DELAY (ns)
9
10
PROPAGATION DELAY (ns)
TA = +85°C
11
TA = +85°C
MAX14581 toc02
13
12
PROPAGATION DELAY (ns)
MAX14581 toc01
PROPAGATION DELAY (ns)
15
SINGLE-ENDED RECEIVER
PROPAGATION DELAY vs. VL
DIFFERENTIAL RECEIVER
PROPAGATION DELAY vs. VBUS
DIFFERENTIAL RECEIVER
PROPAGATION DELAY vs. VL
0.9
0.6
0.3
0.1
4.5
0
0
5.5
-40
-15
10
35
60
-40
85
-15
10
35
60
VBUS (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
VL SUPPLY CURRENT
vs. D+/D- CAPACITANCE
VBUS SUPPLY CURRENT
vs. D+/D- CAPACITANCE
VBUS SUSPEND CURRENT
vs. VBUS SUPPLY VOLTAGE
12Mbps DATA RATE
TRANSMITTING
20
35
30
25
20
15
10
12Mbps DATA RATE
TRANSMITTING
16
SUPPLY CURRENT (mA)
40
SUPPLY CURRENT (µA)
5.0
12
8
4
30
VBUS SUPPLY CURRENT (µA)
45
4.0
MAX14581 toc08
50
3.5
MAX14581 toc07
3.0
VM = VP = OPEN,
SUS = OE = HIGH
TA = +85°C
26
85
MAX14581 toc09
0
TA = +25°C
22
18
TA = -40°C
14
5
0
10
0
0 20 40 60 80 100 120 140 160 180 200 220
0 20 40 60 80 100 120 140 160 180 200 220
CAPACITANCE (pF)
CAPACITANCE (pF)
3.0
3.5
4.0
4.5
5.0
5.5
VBUS (V)
9
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Typical Operating Characteristics (continued)
(VBUS = +3.6V, VL = +2.5V, TA = +25NC, unless otherwise noted.)
MAX14582 TRANSMITTTING
EYE DIAGRAM
MAX14582 RECEIVING
MAX14581 toc11
MAX14581 toc12
MAX14581 toc10
4.0
VP
2V/div
VM
2V/div
VM
2V/div
D+
2V/div
D+
2V/div
D2V/div
D2V/div
40ns/div
3.5
3.0
D+, D- SIGNALS, V
VP
2V/div
2.5
2.0
1.5
1.0
0.5
0
-0.5
1
0
40ns/div
2
3
4
5
6
7
8
TIME (ns)
LOGIC CURRENT CONSUMPTION IN
SUSUPEND MODE
1.4
1.2
1.0
0.8
0.6
0.4
MAX14581 toc14
1.6
30
VBUS SUPPLY CURRENT (µA)
VM = VP = OPEN,
SUS = OE = HIGH
1.8
VL SUPPLY CURRENT (µA)
MAX14581 toc13
2.0
VBUS CURRENT CONSUMPTION
IN SUSUPEND MODE
VM = VP = OPEN,
SUS = OE = HIGH
26
22
18
14
0.2
10
0
1.2
1.5
1.8
2.1
2.4
VL (V)
2.7
3.0
3.3
3.6
3.0
3.5
4.0
4.5
5.0
5.5
VBUS (V)
10
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Bump Configurations
TOP VIEW
(BUMP SIDE DOWN)
MAX14581
2
3
1
+ VL
SE0
DAT
1
4
+ VL
BD
MAX14582
2
3
4
VM
VP
RCV
VTRM
ENUM
SUS
OE
VBUS
D+
D-
GND
A
A
VTRM
ENUM
SUS
OE
B
B
VBUS
D+
D-
GND
C
C
WLP
WLP
Bump Description
BUMP
A1
A2
NAME
FUNCTION
MAX14581
MAX14582
VL
VL
Digital I/O Connections Logic Supply. VL sets the logic level for the interface signal.
A +1.2V to +3.6V supply is connected to VL. Bypass VL to GND with a 0.1FF
ceramic capacitor.
—
Logic Side Data Input/Output. This pin is an input when OE is low and an output
when OE is high. As an input, SE0 is used to output a single-ended zero (SE0) on
D+/D- (when active-high). D+ and D- are both driven low. As an output, SE0 goes
active-high when both D+ and D- are low regardless of the status of SUS. (See
Tables 3, 4a, and 4b.)
SE0
A3
DAT
—
Logic Side Data Input/Output. This pin is an input when OE is low and an output when
OE is high. As an input, DAT acts as the data for the D+ and D- outputs. As an output
DAT is the output of the differential receiver on D+/D- (SUS = 0) or the output of the
D+ single-ended comparator if SUS = OE = VL. (See Tables 3, 4a, and 4b.)
A4
BD
—
VBUS Detect. This output goes active-high when VBUS is present.
B1
VTRM
VTRM
Internal Regulator Output. VTRM provides a regulated +3.3V output. Bypass VTRM
to GND with a 1FF (min) ceramic capacitor as close as possible to the device.
VTRM normally derives power from VBUS. Alternatively, both VBUS and VTRM can
be driven directly with the same +3.3V ±10% voltage supply. Note: In this case
VBUS and VTRM must be connected to the same supply. VTRM provides power to
internal circuitry only. It can also be used to power an external pullup resistor, if
the application calls for the internal pullup to be disabled. It should not be used to
power external circuitry.
B2
ENUM
ENUM
Enumerate. ENUM controls the connection of the D+ pullup resistor. When ENUM is
low, the pullup is disconnected. When ENUM is high, the pullup is connected to D+.
11
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Bump Description (continued)
BUMP
B3
B4
NAME
FUNCTION
MAX14581
MAX14582
SUS
SUS
Suspend. When SUS is low, the transceiver operates normally. When SUS is activehigh, the transceiver enters a low-power state. The differential receiver on D+/D- is
powered down, and RCV outputs low.
OE
Output Enable. OE controls the USB transmitter outputs (D+, D-) and the interface
signals VP/VM or DAT/SE0. When OE is high, the interface signals are outputs and
D+/D- are inputs. When OE is low, the interface signals are inputs and D+/D- are
outputs.
OE
C1
VBUS
VBUS
USB Power-Supply Input. VBUS is typically sourced from the USB connector or to
the battery for USB inter-chip applications. VBUS should be a supply in the +3.0V to
+5.5V range. VBUS provides power to the internal linear regulator. Bypass VBUS to
GND with a 1FF ceramic capacitor as close as possible to the device.
C2
D+
D+
USB Input/Output. When OE is low, D+ functions as a USB output. When OE is
high, D+ functions as a USB input. A 1.5kI resistor is connected between D+ and
VTRM to indicate full-speed (12Mbps) operation when ENUM is high.
C3
D-
D-
USB Input/Output. When OE is low, D- functions as a USB output. When OE is high,
D- functions as a USB input.
C4
GND
GND
A2
—
Ground
VM
Logic Side Data Input/Output. This pin is an input when OE is low and an output
when OE is high. As an input, VM controls the D- output. As an output, VM is the
output of the single-ended receiver on D-. VM is output high when VBUS is not
present. (See Tables 5 and 6.)
A3
—
VP
Logic Side Data Input/Output. This pin is an input when OE is low and an output
when OE is high. As an input, VP controls the D+ output. As an output, VP is the
output of the single-ended receiver on D+. VP is output high when VBUS is not
present. (See Tables 5 and 6.)
A4
—
RCV
Differential Receiver Output. RCV responds to the differential input on D+ and D-.
(See Table 6.) RCV asserts low if SUS = VL.
12
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Functional Diagrams
VL
VL
MAX14581
BD
SUS
LDO
VTRM
ENUM
SE0
MAX14582
VBUS
SUS
LDO
VBUS
VTRM
ENUM
LEVEL
TRANSLATOR
AND LOGIC
LEVEL
TRANSLATOR
AND LOGIC
D+
D-
DAT
D+
D-
OE
OE
VP
VM
RCV
GND
Detailed Description
The MAX14581/MAX14582 USB-compliant transceivers
are designed to minimize the area and external components required to interface low-voltage ASICs to USB.
These devices comply with USB 2.0 specifications for
full-speed-only (12Mbps) operation. The transceivers
include an internal 3.3V regulator, an internal 1.5kI D+
pullup resistor, and built-in ±15kV ESD protection circuitry to protect the USB I/O ports (D+, D-). The MAX14581/
MAX14582 also have internal series resistors, allowing
these devices to be wired directly to a USB connector.
These devices operate with logic-supply voltages as low
as +1.2V, ensuring compatibility with low-voltage ASICs.
GND
A low-power disable mode reduces current consumption
to less than 13FA (typ). An enumerate function controls
the D+ pullup resistor, allowing devices to logically disconnect while remaining plugged in.
The ICs have 36I (typ) internal resistors on D+/D- for
direct connection to the USB connector.
The MAX14581 is equipped with DAT and SE0 interface
signals and supports 3-wire USB transceiver interface.
Although the 3-wire interface is commonly associated
with USB on-the-go transceivers, the MAX14581 supports USB peripherals only. These transceivers provide a
USB VBUS detection function that monitors the presence
of USB VBUS and signals the event.
13
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Interface
Suspend Mode
Operate the transceivers in low-power mode by asserting
SUS high. In suspend mode, the USB differential receiver
is turned off and VBUS consumes less than 18FA of supply current. The single-ended D+ and D- receivers are
still active when driving SUS high.
The MAX14581/MAX14582 control signals are used to
control the USB D+/D- lines. VL powers the logic-side
interface and sets the input and output thresholds of
these signals. The control signals for the MAX14581 are
DAT, SE0, and OE. The control signals for the MAX14582
are VP, VM, RCV, and OE.
Sharing Mode
Connect VL to a system power supply and leave VBUS
(or VBUS and VTRM) unconnected or connected to GND.
D+ and D- are three-stated, allowing other circuitry to
share the USB D+ and D- line. VL consumes less than
1FA of supply current. When operating the transceivers
in sharing mode, the SUS and OE inputs are ignored,
and the interface signals (SE0, DAT, or RCV) are high
impedance.
Power-Supply Configuration
Normal Operating Mode
See Table 1 for various power-supply configurations.
VBUS supplies power to the USB transceivers. Connect
VBUS to a +3.0V to +5.5V supply. Connect VL to a +1.2V
to +3.6V supply. VBUS is typically connected directly to
the USB connector. An internal regulator provides 3.3V to
internal circuitry, and a regulated 3.3V output at VTRM, in
addition to powering the internal D+ pullup resistor. The
ICs can be powered by connecting both VBUS and VTRM
to the same 3.3V external regulator.
Disable Mode
Connect VBUS to a system power supply and leave VL
unconnected or connect to ground. In disable mode,
D+ and D- are three-stated, and VBUS and/or VTRM (or
VBUS and VTRM) consume less than 13FA (typ). When
operating the transceivers in disable mode, OE, SUS,
and inputs to the interface control signals are according
to Table 2a and Table 2b.
VBUS can also be connected directly to a Li+ battery for
inter-chip communications, when the transceiver is used
for example as the USB analog front-end (AFE) of the 3G
modem, used to communicate with the system-on-chip
(SOC).
Table 1. Power-Supply Configuration
VBUS (V)
VTRM (V)
VL (V)
CONFIGURATION
+3.0V to +5.5
+3.0 to +3.6 output
+1.2 to +3.6V
Normal mode
NOTES
—
+3.0V to +5.5
+3.0 to +3.6 output
GND or unconnected
Disable mode
Tables 2a, 2b
GND or unconnected
High impedance
+1.2 to +3.6V
Sharing mode
Tables 2a, 2b
Table 2a. Disable Mode and Sharing Mode Connection, 3-Wire Interface
INPUTS/OUTPUTS
DISABLE MODE
SHARING MODE
VBUS
3.0V to 5.5V
Unconnected or connected to GND
VL
Unconnected or connected to GND
1.2V to 3.6V input
D+ and D-
High impedance
High impedance
DAT, SE0
High impedance
SUS
Unconnected or connected to GND
5kI pullup resistor to VL
High or low
OE
BD
Unconnected or connected to GND
High or low
Low
Low
14
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Table 2b. Disable Mode and Sharing Mode Connection, 5-Wire Interface
INPUTS/OUTPUTS
DISABLE MODE
SHARING MODE
VBUS
3.0V to 5.5V
Unconnected or connected to GND
VL
Unconnected or connected to GND
1.2V to 3.6V input
D+ and D-
High impedance
High impedance
SUS
Unconnected or connected to GND
High or low
OE
VM, VP
Unconnected or connected to GND
High or low
High impedance
5kI pullup resistor to VL
RCV
Low
Low
3-Wire Interface
The MAX14581 uses DAT and SE0 to drive data or a
single-ended zero onto the D+/D- lines. When OE is low,
SE0 is an input and functions as a single-ended zero
driver. When SE0 is high, both D+ and D- are driven low.
When SE0 is driven low, the D+/D- outputs are controlled
by DAT.
DAT is used to send data on D+/D- when both OE and
SE0 are low. When DAT is high, D+ is driven high and
D- is driven low. When DAT is low, D+ is driven low and
D- is driven high.
In receive mode (OE = high), DAT is the output of the
differential receiver connected to D+ and D- if SUS = 0
or the putput of the D+ single-ended comparator if SUS
= OE = VL. SE0 only goes active-high when both D+ and
D- are low.
5-Wire Interface
In USB mode, the MAX14582 implements a full-speed
(12Mbps) USB interface on D+ and D-, with enumerate
and suspend functions. A differential USB receiver presents the USB state as a logic-level output RCV (Table 6).
VP/VM are outputs of single-ended USB receivers when
OE is high, allowing detection of single-ended zero (SE0)
events. When OE is low, VP and VM serve as inputs to
the USB transmitter. Drive suspend input SUS logic-high
to force the MAX14581/MAX14582 into a suspend mode
and disable the differential USB receiver (Table 6).
Control Signals
USB Detection (MAX14581)
The MAX14581 USB detection function indicates that
VBUS is present. The MAX14581 push-pull bus detection
output (BD) monitors VBUS, and asserts high when VBUS
and VL are present. BD asserts low if VBUS is less than
VTH_VBUS and enters sharing mode.
OE
OE controls the direction of communication when VL and
VBUS are both present.
For the MAX14581 when OE is low, DAT and SE0 operate
as logic inputs and D+/D - are outputs. When OE is high,
DAT and SE0 operate as logic outputs and D+/D- are
inputs.
For the MAX14582 when OE is logic-low, VP and VM
operate as logic inputs, and D+/D- are outputs. When OE
is logic-high, VP and VM operate as logic outputs, and
D+/D are inputs. RCV is the output of the differential USB
receiver connected to D+/D-, and is not affected by the
OE logic level.
SUS
SUS determines whether the MAX14581/MAX14582
operate in normal mode or in suspend mode. Drive SUS
low for normal operation. Drive SUS high to enable suspend mode. In suspend mode, the single-ended receivers (D+/D-) are active to detect a wake-up event. Supply
current decreases to less than 18FA (typ) from VBUS in
suspend mode.
The devices can transmit data on D+ and D- while in
suspend mode. This function is used to signal a remote
wake-up event.
ENUM
A 1.5kI pullup resistor on D+ is used to indicate fullspeed (12Mbps) operation. Drive ENUM high to connect
the internal pullup resistor from D+ to VTRM. Drive ENUM
low to disconnect the internal pullup resistor from D+ to
VTRM.
D+ and DD+ and D- are bidirectional signals and are ESD protected to ±15kV (HBM). OE controls the direction of D+
and D- when in USB normal mode.
15
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
VTRM
An internal linear regulator generates the VTRM voltage
(+3.3V typ). VTRM derives power from VBUS (see the
Power-Supply Configuration section). VTRM powers the
internal USB circuitry and provides the pullup voltage for
the internal 1.5kI resistor. Bypass VTRM to GND with a
1FF ceramic capacitor as close as possible to the device.
Do not use VTRM to provide power to external circuitry.
RCV (MAX14582)
RCV is the output of the differential USB receiver. RCV is
a logic-high for D+ high and D- low. RCV is a logic-low
for D+ low and D- high. RCV retains the last valid logic
state when D+ and D- are both low (SE0). RCV is driven
logic-low when SUS is high. See Table 3, Table 4a, and
Table 4b.
BD (MAX14581)
The VBUS detect (BD) output is asserted high when a
voltage greater than VTH-BUS is presented on VBUS. This
is typically the case when the MAX14581 is connected to
a powered USB. BD is low when VBUS is unconnected.
The MAX14582 doesn’t have the BD pin. Nevertheless,
the status of VBUS is provided by encoding VP and VM
as follows: VP = VM = high.
Table 3. Transmit Truth Table, 3 Wires
(OE = 0)
INPUTS
OUTPUTS
DAT
SE0
D+
D-
0
0
0
1
0
1
0
0
1
0
1
0
1
1
0
0
Table 4a. Receive Truth Table, 3 Wires,
SUS = 0
(OE = 1, SUS = 0)
INPUTS
OUTPUTS
D+
D-
DAT
SE0
0
0
*DAT
1
0
1
**0
0
1
0
**1
0
1
1
X
0
*Last state.
**D+/D- differential receiver output.
X = Undefined
Applications Information
External Capacitors
Use three external capacitors for proper operation.
Bypass VL to GND with a 0.1FF ceramic capacitor.
Bypass VBUS to GND with a 1FF ceramic capacitor.
Bypass VTRM to GND with a 1FF (min) ceramic or plastic
capacitor. Place all capacitors as close as possible to
the device.
USB Data Transfer
Transmitting Data, 3 Wires (MAX14581)
The MAX14581 transmit USB data to the USB differentially on D+ and D- when OE is low. The D+ and D- outputs
are determined by SE0 and DAT (see Table 3).
Table 4b. Receive Truth Table, 3 Wires,
SUS = 1
(OE = 1, SUS = 1)
INPUTS
OUTPUTS
D+
D-
DAT
SE0
0
0
0
1
0
1
0
0
1
0
*1
0
1
1
*1
0
*D+ single-ended receiver output.
Receiving Data, 3 Wires (MAX14581)
Drive OE high and SUS low to receive data on D+/D-.
Differential data received on D+ and D- appears at DAT.
SE0 goes high only when both D+ and D- are low
(Table 4a and Table 4b).
16
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Transmitting Data, 5 Wires
To transmit data to the USB, operate the MAX14582 in
USB mode (see the Power-Supply Configuration section)
and drive OE low. The MAX14582 transmits data to the
USB differentially on D+ and D-. VP and VM serve as differential input signals to the driver. When VP and VM are both
driven low, a single-ended zero (SE0) is output on D+/D-.
Receiving Data, 5 Wires
To receive data from the USB, operate the MAX14582 in
USB mode (see the Power-Supply Configuration section).
Drive OE high and SUS low. Differential data received at
D+/D- appears as a logic signal at RCV. VP and VM are
the outputs of single-ended receivers on D+ and D-.
Table 5. Transmit Truth Table, 5 Wires
Host Usage
As a host USB transceiver, the MAX14581/MAX14582
require external 15kI pulldown resistors and connecting
ENUM = low.
ESD Protection
The MAX14581/MAX14582 feature ±15kV (HBM) ESD
protection on D+ and D-. The ESD structures withstand
high ESD in all states: normal operation, suspend, sharing mode, disable mode, and powered down. VBUS (with
a 1FF ceramic capacitor) and D+/D- are characterized
for protection to the following limits:
U ±15kV using the Human Body Model
Table 6. Receive Truth Table, 5 Wires
(OE = 0)
INPUTS
OUTPUTS
(OE = 1)
OUTPUTS
INPUTS
VP
VM
D+
D-
0
0
0
0
0
1
0
1
0
1
1
1
1
D+
D-
VP
VM
RCV
(SUS = 0)
RCV
(SUS = 1)
1
0
0
0
0
*RCV
0
0
0
1
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
X
0
Note: The SE1 condition (D+ = D- = 1) is a forbidden
condition in the USB protocol.
*Last state.
X = Undefined.
17
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
RC
50I to 100I
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
ESD Test Conditions
RD
330I
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
Figure 8. Human Body ESD Test Model
IP 100%
90%
IR
HBM ESD Protection
Figure 8 shows the Human Body Model, and Figure 9
shows the current waveform it generates when discharged
into a low impedance. This model consists of a 100pF
capacitor charged to the ESD voltage of interest, which
is then discharged into the test device through a 1.5kI
resistor.
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
AMPERES
36.8%
10%
0
0
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 9. Human Body Model Current Waveform
18
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
USB Inter-Chip Typical Application Circuits
SYSTEM
VOLTAGE
SUPPLY
BATTERY
VOLTAGE
SUPPLY
VL
VBUS
VBUS
1FF
0.1FF
SYSTEM
VOLTAGE
SUPPLY
0.1FF
MAX14581
MAX14581
DAT
SE0
OE
SYSTEM
INTERFACE
VTRM
VTRM
BD
VL
1FF
1FF
BD
DAT
SEO
OE
1FF
SYSTEM
INTERFACE
ENUM
SUS
ENUM
SUS
D+
D+
15kI
GND
D-
D-
GND
15kI
SYSTEM
VOLTAGE
SUPPLY
BATTERY
VOLTAGE
SUPPLY
VL
1FF
1FF
0.1FF
MAX14582
MAX14582
SYSTEM
INTERFACE
VTRM
VTRM
RCV
VL
VBUS
VBUS
0.1FF
SYSTEM
VOLTAGE
SUPPLY
VP
VM
OE
1FF
RCV
VP
VM
OE
1FF
SYSTEM
INTERFACE
ENUM
SUS
ENUM
SUS
D+
D+
15kI
GND
D-
D-
GND
15kI
19
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
TOP MARK
MAX14581EWC+T
-40°C to +85°C
12 WLP
ACF
MAX14582EWC+T
-40°C to +85°C
12 WLP
ACD
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
12 WLP
W121A1+1
21-0449
Refer to
Application
Note 1891
20
MAX14581/MAX14582
Industry’s Smallest and Lowest (VL) Full-Speed
USB Transceivers, with Low VIO 3/5-Wire Interface
Revision History
REVISION
NUMBER
REVISION
DATE
0
6/12
DESCRIPTION
Initial release
PAGES
CHANGED
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 160 Rio Robles, San Jose, CA 95134 1-408-601-1000
© 2012
Maxim Integrated Products
21
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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