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MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
General Description
Benefits and Features
The MAX14914, MAX14914A and MAX14914B are the
family of high-side/push-pull drivers that operate as both
an industrial digital output (DO) and an industrial digital input (DI). The MAX14914 family features full IEC 61131-2
compliance in both their DO and DI modes of operation.
The high-side switch current is resistor settable from
135mA (min) to 1.3A (min). The high-side driver’s on-resistance is 120mΩ (typ) at 125°C ambient temperature.
Optional push-pull operation allows driving of cables and
fast discharge of load capacitance. The output voltage
is monitored and indicated through the DOI_LVL pin for
safety applications.
● Reduces Power and Heat Dissipation
• 240mΩ (max) HS RON at TA = 125°C
• 0.9mA (typ) High-Side DO-Mode Supply Current
• Accurate Internal Current Limiter for Type 1, Type
2, and Type 3 Digital Inputs
The MAX14914 family complies with Type 1, Type 2, or
Type 3 input characteristics when configured for DI operation.
The MAX14914A is a low-DOI-leakage version of
MAX14914, designed to work together with the
MAX22000 Industrial Configurable Analog IO device. The
MAX14914B features a high-side switch overcurrent indication.
Applications
●
●
●
●
Industrial Digital Outputs and Inputs Modules
Configurable Digital Input/Output
Motor Control
Safety Systems
● Enhances System Robustness
• SafeDemagTM for Safe Turn-Off of Unlimited
Inductance
• 60V Supply Tolerance
• Accurate Short-Circuit DO Mode Current Limiting
• ±2kV IEC 61000-4-5 Surge Protection
• ±20kV IEC 61000-4-2 Air-Gap ESD Protection
• ±7kV IEC 61000-4-2 Contact ESD Protection
• -40°C to +125°C Ambient Operating Temperature
● Reduces BOM Count and PCB Space
• Small 4mm x 4mm TQFN Package
• Internal Clamp for Fast Inductive Load Turn-Off
• On-Chip 5V Regulator
● Provides Flexibility
• Configurable as a Digital Input, or a High-Side or
Push-Pull Digital Output
• Low-Leakage Mode (MAX14914A) Allows High
Accuracy AIO/DIO applications
• Resistor Settable Current Limiting for the High-Side
Switch (135mA to 1.3A)
• Pin-Selectable Type 1/3 or Type 2 DI Operation
● Improves System Speed and Throughput
• Propagation Delay of Less Than 2μs
Ordering Information and Typical Application Diagram
appears at end of data sheet.
SafeDemag is a trademark of Maxim Integrated Products, Inc.
19-8712; Rev 4; 9/20
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Block Diagram of MAX14914 and MAX14914A
VL
INTERFACE
LOGIC SUPPLY
5V SUPPLY TO
ANALOG SECTION
FAULT
GND
REGIN
V5
VDD
5V REGULATOR
DI_EN
OV_VDD
THERMAL
SHUTDOWN
PROTECTION
GND
DOI_LVL
VTH
DOI
GND
DI SINK
CURRENT
DI_EN
GND
IN
DOI
PP
OUTPUT
MODE
CLIM
CURRENT
LIMITER
DOI
OUTPUT
DRIVE
CONTROL LOGIC
GND
www.maximintegrated.com
PGND
Maxim Integrated | 2
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Absolute Maximum Ratings
VDD......................................................................... -0.3V to +65V
REGIN .......................... -0.3V to lower of +65V and (VDD + 0.3V)
PGND .................................................................... -0.3V to +0.3V
DOI (VDD < VDD_OVLOTH)...............(VDD - 49V) to (VDD + 0.3V)
DOI (VDD > VDD_OVLOTH)............................ -1V to (VDD + 0.3V)
V5 .............................. -0.3V to lower of +6V and (REGIN + 0.3V)
VL ............................................................................. -0.3V to +6V
IN, PP, DIN_EN, /FAULT, CLIM ............................... -0.3V to +6V
DOI_LVL........................................................ -0.3V to (VL + 0.3V)
OV_VDD, OV_CURR ... -0.3V to lower of +65V and (VDD + 0.3V)
DOI Load Current...............................................Internally Limited
Continuous Current (any other terminal)........-100mA to +100mA
Continuous Power Dissipation (TA = +70°C, derate 28,6mW/°C
above +70°C)..................................................................2280mW
Inductive Demagnetization Energy (ILOAD < 0.6A)........ Unlimited
Operating Temperature Range ...........................-40°C to +125°C
Junction Temperature ........................................Internally Limited
Storage Temperature Range ..............................-65°C to +150°C
Lead Temperature (Soldering, 10s) .................................. +260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Package Information
16 TQFN
Package Code
T1644+4A
Outline Number
21-0139
Land Pattern Number
90-0070
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA)
35°C/W
Junction-to-Case Thermal Resistance (θJC)
2.7°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
Electrical Characteristics
(VDD = +10V to +40V, V5 = +4.5V to +5.5V, TA = -40°C to +125°C, unless otherwise noted., Typical values are at TA = +25ºC , VDD =
+24V, VL= +3.3V and V5 = +5V, RLIM = 50kΩ.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VDD SUPPLY
Supply Voltage
Supply Current
www.maximintegrated.com
VDD
Operting Conditions
10
40
Tolerant
0
60
IDD_ON_HS
HS mode, PP = low, IN = VL, DOI high
(no switching), no load, V5 = VL = REGIN
= 5V, VDD = 40V.
0.6
IDD_ON_PP
PP mode, PP = high, 10kHz switching, V5
= VL = REGIN = 5V, VDD = 40V, no load
0.85
1.4
IDD_ON_DI
DI mode, DI_EN = VL, REGIN = VDD =
40V
0.13
0.3
V
0.95
mA
mA
Maxim Integrated | 3
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Electrical Characteristics (continued)
(VDD = +10V to +40V, V5 = +4.5V to +5.5V, TA = -40°C to +125°C, unless otherwise noted., Typical values are at TA = +25ºC , VDD =
+24V, VL= +3.3V and V5 = +5V, RLIM = 50kΩ.) (Note 1)
PARAMETER
Undervoltage-Lockout
Threshold
Undervoltage-Lockout
Hysteresis
VDD OvervoltageLockout Threshold
VDD OvervoltageLockout Hysteresis
MIN
TYP
MAX
UNITS
VDD_UVLO
SYMBOL
VDD rising, V5 = VL
8.5
9.1
9.7
V
VDD_UVLO
VDD falling, V5 = VL
8
8.6
9
V
VDD_UVHYST
CONDITIONS
V5 = V L
0.5
V
VDD_OVLO
VDD rising, V5 = VL
41.5
43.5
45
V
VDD_OVLO
VDD falling, V5 = VL
40.5
42.2
44
V
VDD_OVHYST
V5 = V L
1
V
VL LOGIC INTERFACE SUPPLY
VL Supply Voltage
VL
VL Supply Current
IL
VL POR Threshold
VL_POR
2.5
5.5
V
10
25
uA
1.27
1.52
V
HS mode, REGIN = 40V, IN = VL, no load
on DOI, no load on V5
0.3
0.5
mA
0.35
0.6
mA
0.5
mA
All logic inputs high or low, all outputs
unloaded
VL falling
1.12
5V SUPPLY / LINEAR REGULATOR
REGIN Current HS
Mode
IREGIN_ON_H
S
REGIN Current PP
Mode
IREGIN_ON_PP
PP = high, REGIN = 40V, 10kHz
switching, no load on DOI, no load on V5
REGIN Current DI Mode
IREGIN_ON_DI
DI_EN = VL, REGIN = 40V
V5 Supply Current
REGIN Undervoltage
Threshold
REGIN Undervoltage
Hysteresis
IV5_HS
HS mode, REGIN = V5 = 5V, IN = VL, no
load on DOI
0.24
0.4
IV5_PP
PP mode, REGIN = V5 = 5V, 10kHz
switching, no load on DOI
0.3
0.5
IV5_DI
DI mode, DI_EN = high, REGIN = V5 =
5V
0.22
0.4
VREG_UV
V5 UndervoltageLockout Hysteresis
V5UV_UVHYST
V5
7.6
0.45
T
V5_UVLO
V5 Current Limit
6.75
VREG_UVHYS
V5 UndervoltageLockout Threshold
V5 Output Voltage
REGIN rising. V5 enabled when REGIN >
VREG_UV.
V5 rising
3.8
0mA - 20mA external load
4.75
4.2
5.0
V
V
0.3
IV5_CL
mA
V
V
5.25
25
V
mA
DRIVER OUTPUT (DOI)
HS On-Resistance
LS Output Low
www.maximintegrated.com
RDOI_ON_HS
VDOI_LOW
PP = X, IN = high, IDOI = 500mA
PP = high, IN = low, IDOI = 100mA
120
240
mΩ
1.2
V
Maxim Integrated | 4
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Electrical Characteristics (continued)
(VDD = +10V to +40V, V5 = +4.5V to +5.5V, TA = -40°C to +125°C, unless otherwise noted., Typical values are at TA = +25ºC , VDD =
+24V, VL= +3.3V and V5 = +5V, RLIM = 50kΩ.) (Note 1)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
VDOI_CL
Relative to VDD, IDOI = 500mA, VDD <
VDD_OVLO
-63
-55
-49
V
VDOI_CL
Relative to GND, IDOI = 500mA,
VDD_OVLO < VDD < 60V
-4.5
-2.9
-1.5
V
VDD = 40V, PP = IN = low, DI_EN = low,
0V < VDOI < VDD, VL > VL_POR
-60
60
VDD = 60V, PP = IN = X, DI_EN = low,
0V < VDOI < VDD, VL > VL_POR
-150
150
VDD = 40V, VL < VL_POR, PP = IN =
DI_EN = X, 0V < VDOI < 15V
-2.4
0
VDD = 40V, VL < VL_POR, PP = IN =
DI_EN = X, 0V < VDOI < 15V, T = -40°C
to +85°C
-0.4
0
μA
DOI Clamp Voltage
DOI Leakage
MAX14914,
MAX14914A,
MAX14914B
DOI Leakage
MAX14914A
IDOI_LK
IDOI_LK
CONDITIONS
μA
VDD = 34V, VL < VL_POR, PP = IN =
DI_EN = X, -15V < VDOI < 0V
-80
OUTPUT DRIVER CURRENT LIMITING (DOI)
HS Current-Limit
Minimum
ICLIM_HS_MIN
RLIM = 220kΩ
135
196
255
mA
HS Current-Limit
Maximum
ICLIM_HS_MAX
RLIM = 27kΩ
1.3
1.6
1.9
A
HS Current-Limit Offset
Error
ICLIM_HS_OE
(Note 2)
-25
+25
mA
HS Current-Limit Gain
Error
ICLIM_HS_GE
(Note 2)
-20
+20
%
CLIM Voltage
VCLIM
1.21
CLIM Short Resistor
Threshold Value
RLIM_SHORT
(Note 3)
10
CLIM Open Resistor
Threshold Value
RLIM_OPEN
(Note 4)
LS Current Limit
ICLIM_LS
12.9
V
15
kΩ
440
750
kΩ
150
280
mA
DIGITAL INPUT / DOI MONITOR
DO Monitor Threshold
Voltage
VTH_DO
DI_EN = low, DOI rising
1.5
2.0
V
VTH_DO
DI_EN = low, DOI falling
1.3
1.8
V
DO Monitor Hysteresis
VHYS_DO
DI Threshold Voltage
DI Hysteresis
DI Current Sink Type 1/
3
www.maximintegrated.com
VTH_DI
VHYS_DI
DI_EN = low
0.2
6.7
8
DI_EN = high, DOI falling
5.5
6.8
DI_EN = high
1.2
DI_EN = high, PP = low, 0V < VDOI < 5V
IDOI
V
DI_EN = high, DOI rising
DI_EN = high, PP = low, 8V < VDOI <
40V, VDOI < VDD
V
V
2.6
2.0
2.3
2.6
mA
Maxim Integrated | 5
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Electrical Characteristics (continued)
(VDD = +10V to +40V, V5 = +4.5V to +5.5V, TA = -40°C to +125°C, unless otherwise noted., Typical values are at TA = +25ºC , VDD =
+24V, VL= +3.3V and V5 = +5V, RLIM = 50kΩ.) (Note 1)
PARAMETER
DI Current Sink Type 2
SYMBOL
IDOI
CONDITIONS
MIN
DI_EN = high, PP = high, 0V < VDOI < 5V
0
DI_EN = high, PP = high, 8V < VDOI <
40V, VDOI < VDD
6.0
TYP
MAX
UNITS
7.5
7.0
7.7
mA
LOGIC (I/O)
Input Voltage High
VIH
Input Voltage Low
VIL
Input Threshold
Hysteresis
Input Pulldown Resistor
0.7xVL
0.3xVL
VIHYST
RI
V
0.11xVL
All logic input pins
275
kΩ
V
-1
+1
μA
GND < VFAULT < V5
-1
+1
µA
ILEAK
GND < VOV_VDD < VDD
-1
+1
μA
ILEAK
GND < VOV_CURR < VDD
-1
+1
μA
VOL
DOI_LVL Tristate
Leakage
ILEAK
GND < VDOI_LVL < VL
FAULT Output Tristate
Leakage
ILEAK
OV_VDD Leakage
OV_CURR Leakage
200
V
0.33
Output Logic Low
140
V
ILOAD = +5mA
THERMAL PROTECTION
Driver ThermalShutdown Temperature
Driver ThermalShutdown Hysteresis
TJSHDN
Junction temperature rising
TJSHDN_HYST
Chip Thermal Shutdown
TCSHDN
Chip Thermal-Shutdown
Hysteresis
TCSHDN_HYS
Temperature rising
T
170
°C
15
°C
150
°C
10
°C
TIMING CHARACTERISTICS / OUTPUT DRIVER (DOI)
Output Propagation
Delay LH
tPD_LH
PP = low, delay from IN to DOI rising by
1V, RL = 5kΩ, CL = 100pF (Figure 1)
0.4
1.5
µs
tPD_HL
PP = low, delay between IN switching low
to DOI falling by 1V, RL= 5kΩ, CL =
100pF, VDD = 24V (Figure 1)
0.6
1.5
µs
tPD_HL
PP = high, delay between IN switching
low to DOI falling by 1V, RL = 5kΩ, CL =
100pF (Figure 1)
0.6
1.5
µs
tR
PP = X, 20% to 80% VDD, RL = 5kΩ, CL
= 100pF (Figure 2)
0.9
2
µs
tF
PP = low, 80% to 20% VDD, VDD = 24V,
RL = 5kΩ, CL = 100pF (Figure 2)
0.65
2
µs
tF
PP = low, 80% to 20% VDD, VDD = 24V,
RL = 47Ω, CL = 100pF (Figure 2)
1
Output Propagation
Delay HL
DOI Output Rise Time
DOI Output Fall Time
µs
TIMING CHARACTERISTICS / PROPAGATION DELAY (DOI to DOI_LVL)
Propagation Delay LH
www.maximintegrated.com
tPDL_LH
DI_EN = low, delay from DOI rising to 5V
to DOI_LVL low (Figure 3)
2.7
5
µs
Maxim Integrated | 6
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Electrical Characteristics (continued)
(VDD = +10V to +40V, V5 = +4.5V to +5.5V, TA = -40°C to +125°C, unless otherwise noted., Typical values are at TA = +25ºC , VDD =
+24V, VL= +3.3V and V5 = +5V, RLIM = 50kΩ.) (Note 1)
SYMBOL
CONDITIONS
Propagation Delay LH
DI
PARAMETER
tPDL_HL_DI
DI_EN = high, delay from DOI rising to 8V
to DOI_LVL low
MIN
TYP
1.1
Propagation Delay HL
tPDL_HL
DI_EN = low, delay from DOI falling to
3.5V to DOI_LVL high
0.9
Propagation Delay HL
DI
tPDL_HL_DI
DI_EN = high, delay from DOI falling to
5.5V to DOI_LVL high
0.9
MAX
UNITS
µs
8
μs
μs
TIMING CHARACTERISTICS / GLITCH REJECTION (IN)
Pulse Length of
Rejected Glitch
Glitch Filter Delay Time
tFPL_GF
0
tD_GF
140
80
ns
300
ns
TIMING CHARACTERISTICS / FAULT DETECTION (OV_VDD)
OV_VDD Threshold
VTH_OV_VDD
DI_EN = low, relative to VDD. MAX14914
and MAX14914A
0.22
V
OVLO_VDD Debounce
Time
TDOVLO_VDD
DI_EN = low. MAX14914 and
MAX14914A.
200
μs
Electrical Characteristics—ESD and SURGE Protection
PARAMETER
ESD
IEC Surge
SYMBOL
VESD
VSURGE
CONDITIONS
MIN
TYP
DOI pin Contact Discharge (Note 5)
±7
DOI pin Air Discharge (Note 5)
±20
All other pins. Human Body Model
±2
DOI to PGND or Earth GND per IEC
61000-4-5 (42Ω/0.5μF) (Note 6)
±2
MAX
UNITS
kV
kV
Note 1: All the MAX14914ATE+ and MAX14914BATE+ units are production tested at TA = +25°C. All the MAX14914AATE+ units are
production tested at TA = +25°C and +125°C. Specifications over temperature are guaranteed by characterization and design.
Note 2: Specification is guaranteed by design; not production tested.
Note 3: Lower resistor values than CLIM_SHORT act like a CLIM pin short to GND
Note 4: Higher resistor values than CLIM_OPEN act like a CLIM open circuit.
Note 5: Bypass VDD pin to PGND with 1μF capacitor as close as possible to the device for high ESD protection.
Note 6: With TVS protection on VDD to PGND.
www.maximintegrated.com
Maxim Integrated | 7
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
IN
tPD_LH
tPD_HL
VDD - 1V
DOI
1V
Figure 1. IN to DOI Propagation Delay
IN
tPD_LH
tPD_HL
80%
DOI
80%
20%
20%
tR_LH
tR_HL
Figure 2. DOI Rise and Fall Time
www.maximintegrated.com
Maxim Integrated | 8
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
DOI
5V
3.5V
tPDL_LH
tPDL_HL
DOI_LVL
Figure 3. DOI to DOI_LVL Propagation Delay
www.maximintegrated.com
Maxim Integrated | 9
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Typical Operating Characteristics
(VDD = +24V, VL = +3.3V, V5 = +5V, TA = +25°C, unless otherwise noted.)
www.maximintegrated.com
Maxim Integrated | 10
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Typical Operating Characteristics (continued)
(VDD = +24V, VL = +3.3V, V5 = +5V, TA = +25°C, unless otherwise noted.)
www.maximintegrated.com
Maxim Integrated | 11
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Pin Configurations
MAX14914 and MAX14914A
REGIN
14
OV_VDD
15
V5
16
DOI
DOI
PGND
11
10
9
MAX14914
MAX14914A
EP
+
2
VL
GND
1
3
8
PP
7
IN
6
DI_EN
5
DOI_LVL
4
FAULT
13
12
CLIM
VDD
VDD
TOP VIEW
TQFN
4mm x 4mm
*EP = EXPOSED PAD. CONNECT EP TO GND
MAX14914B
VDD
13
REGIN
14
VDD
DOI
DOI
PGND
TOP VIEW
12
11
10
9
8
PP
7
IN
6
DI_EN
5
DOI_LVL
MAX14914B
16
EP
+
VL
1
2
3
4
FAULT
V5
CLIM
15
GND
OV_CURR
TQFN
4mm x 4mm
*EP = EXPOSED PAD. CONNECT EP TO GND
www.maximintegrated.com
Maxim Integrated | 12
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Pin Description
PIN
MAX14914
and
MAX14914A
MAX14914B
1
1
VL
2
2
3
4
5
NAME
FUNCTION
TYPE
Logic Supply Input. VL defines the levels on all I/O logic interface
pins. Bypass VL to GND through a 100nF ceramic capacitor.
Supply
GND
Analog Ground
Supply
3
CLIM
Current Limit Set Input. Connect a resistor from CLIM to GND to
set the current limit. See Detailed Description for further
information.
Analog Input
4
FAULT
Open-Drain Fault Output. The FAULT transistor turns on when a
fault condition (driver thermal shutdown or loss of ground) occurs.
Connect a pullup to VL or V5.
Logic Output
DOI_LVL
Open-Drain DOI Level Output. DOI_LVL is logic-low when DOI
voltage is higher than the threshold voltage. DOI_LVL is logic-high
(using a pullup resistor) when DOI voltage is lower than the
threshold voltage. The threshold voltage depends on DI_EN.
Connect a pullup to VL or V5.
Logic Output
5
6
6
DI_EN
Digital Input Mode Logic Enable Input. Set DI_EN high to enable
digital input operation on the DOI pin, which enables the internal
current sink and sets Type 1, Type 2, or Type 3 thresholds on
DOI_LVL. Select between Type 1 and 3, and Type 2 DI
characteristics through the PP input.
7
7
IN
Switch Control Input. Drive IN high to close the HS switch; drive
IN low to open the HS switch and close the LS switch (when PP =
low).
Logic Input
Push-Pull DO or DI Type Select Input. In DO mode, set PP high to
enable push-pull mode operation of the DO driver. In DI mode, set
PP low for IEC Type 1/3 input characteristics and set high for
Type 2 input characteristics.
Logic Input
8
8
PP
9
9
PGND
10, 11
10, 11
12, 13
14
15
—
Analog
Power Ground
Supply
DOI
High-Side / Push-Pull Output (DI_EN = low) or Digital Input
(DI_EN = high). Connect both DOI pins together externally.
Power
12, 13
VDD
Supply Voltage, Nominally 24V. Bypass VDD to GND through a
1uF capacitor.
Supply
14
REGIN
5V Regulator Input. Connect REGIN to VDD when using the
internal 5V regulator. Connect REGIN to V5 when powering V5
from an external regulator.
Supply
—
15
www.maximintegrated.com
OV_VDD
Open-Drain Overvoltage Output for the MAX14914 and
MAX14914A. The OV_VDD transistor turns off when: 1) a device
configured for DI operation; 2) DOI level is higher than VDD.
Connect a pullup to VDD.
OV_CURR
Open-Drain Overcurrent Output for the MAX14914B. OV_CURR
turns active low when the load current exceeds the high-side
current limit. Connect a pullup resistor between OV_CURR and
V L.
Maxim Integrated | 13
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Pin Description (continued)
PIN
MAX14914
and
MAX14914A
MAX14914B
NAME
FUNCTION
TYPE
Supply
16
16
V5
Analog Supply Voltage/LDO Output. The MAX14914 requires a
5V supply for normal operation, which can come from the internal
linear regulator (REGIN connected to VDD) or from an external
regulator (REGIN connected to V5). Bypass to GND through a
1μF ceramic capacitor.
—
—
EP
Exposed Pad. Connect EP to GND.
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Maxim Integrated | 14
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Functional Diagrams
MAX14914 and MAX14914A
VL
V5
INTERFACE
LOGIC SUPPLY
5V SUPPLY TO
ANALOG SECTION
FAULT
GND
REGIN
VDD
5V REGULATOR
DI_EN
OV_VDD
THERMAL
SHUTDOWN
PROTECTION
GND
DOI_LVL
VTH
DOI
GND
DI SINK
CURRENT
DI_EN
GND
IN
DOI
PP
OUTPUT
MODE
CLIM
CURRENT
LIMITER
DOI
OUTPUT
DRIVE
CONTROL LOGIC
GND
www.maximintegrated.com
PGND
Maxim Integrated | 15
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Functional Diagrams (continued)
MAX14914B
VL
V5
INTERFACE
LOGIC SUPPLY
5V SUPPLY TO
ANALOG SECTION
FAULT
REGIN
VDD
5V REGULATOR
GND
OV_CURR
THERMAL
SHUTDOWN
PROTECTION
GND
DOI_LVL
VTH
DOI
GND
DI SINK
CURRENT
DI_EN
GND
IN
DOI
PP
OUTPUT
MODE
CLIM
CURRENT
LIMITER
DOI
OUTPUT
DRIVE
CONTROL LOGIC
GND
www.maximintegrated.com
PGND
Maxim Integrated | 16
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Detailed Description
The MAX14914 family of parts is a high-side/push-pull driver that operates as an industrial digital output and can also
operate as an industrial digital input. The MAX14914 family is specified for operation with supplies up to 40V. The highside switch current limiting is resistor settable from 135mA (min) to 1.3A (min). The high-side driver on-resistance is
120mΩ (typ) and 240mΩ (max) at +125°C ambient temperature. Optional push-pull operation allows driving of cables
and fast discharge of load capacitance. A separate digital DOI_LVL allows supervision of the DOI voltage in DO mode
for safety applications. The MAX14914 family complies with IEC Type 1, Type 2, or Type 3 input characteristics when
configured for digital input operation.
The difference between the MAX14914, MAX14914A and MAX14914B versions is summarized in Table 1, and the
summary of the control signals is shown in Table 2.
Table 1. Features Selection
DOI OVERVOLTAGE
DOI OVERCURRENT
(OV_VDD)
(OV_CURR)
LOW DOI LEAKAGE
(VL < VL_POR)
MAX14914
YES
NO
NO
MAX14914A
YES
NO
YES
MAX14914B
NO
YES
NO
Table 2. Operation Truth Table
MODE
DI_EN
IN
PP
DOI
DOI_LVL
DO High-Side
low
low
low
three-state
high/low
DO High-Side
low
high
low
high
low
DO Push-Pull
low
low
high
low
high
DO Push-Pull
low
high
high
high
low
DI Type 1/3
high
x
low
high
low
DI Type 1/3
high
x
low
low
high
DI Type 2
high
x
high
high
low
DI Type 2
high
x
high
low
high
5V Supply and Regulator
The MAX14914 family requires a 5V supply on the V5 pin for normal operation. This 5V supply can come from an external
supply or from the internal 5V linear regulator. Connect REGIN pin to VDD to enable the internal regulator. Connect
REGIN pin to V5 pin to disable the internal regulator, when an external 5V is used. The internal 5V regulator also can
power the external loads/circuits with of up to 20mA.
Logic Interface
The logic interface features flexible logic levels, allowing interfacing to a wide range of common logic. The VL supply
input defines the logic levels and can be set in the range of 2.5V to 5.5V. Connect a 0.1µF capacitor to VL.
Digital Output Operation
The driver can be configured for high-side (PP pin is driven low) or push-pull (PP pin is driven high) operation. In DO
high-side mode, the DOI output voltage is high (VDD) when the logic level on IN pin is high, and three-state (Hi-Z), when
the logic level on IN pin is low. In DO Push-Pull mode, the DOI output voltage follows the logic level on IN pin. The highside driver has 240mΩ (max) on-resistance at 500mA and TA = 125°C. The DOI voltage can go below ground, as will
occur during inductive load demagnetization. An internal clamping diode limits the negative excursion to (VDD - VCL). See
Driving Inductive Loads for details. The low-side (LS) switch speeds up the discharge of RC loads in Push-Pull mode.
www.maximintegrated.com
Maxim Integrated | 17
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
VDD
VCL
DOI
HS
MAX14914
ZL
LS
PGND
Figure 4. Digital Output Driver
Low DOI Leakage Mode
The MAX14914A features a low-leakage mode in which the DOI leakage current is less than 0.4μA with temperature up
to +85°C and DOI between 0V and +15V. This is useful when the DOI pin is connected to an analog input/output (I/O)
line and does not affect the performance of the analog I/O device. Low-leakage mode is enabled when the VL voltage
is held low below VL_POR (min) = 1.12V. Note that the logic inputs, like IN, DI_EN and PP, can be held high or low in
low-leakage mode.
Current Limit Adjustment
The MAX14914 family has a settable current limiting of the HS switch. The load current is limited to between 135mA
(min) and 1.3A (min), depending on the value of the resistor used at the CLIM pin. A short-circuit or overcurrent generally
creates a temperature rise in the chip; both the HS and LS FET’s temperatures are continuously monitored. When any
switch temperatures exceed 170°C, the DOI output is put in Hi-Z until the temperature falls by 15°C. Connect a resistor
(RLIM) from CLIM to GND to set the required current limit. The current is given by:
ILIM = K x VLIM / RLIM
where, VLIM = 1.21V and K = 35.6 x 103. If no resistor is connected to CLIM (i.e., CLIM is kept floating) or RLIM is more
than 440k, the ILIM is internally set to 1.1A (typ). If the RLIM resistor is less than 12.9k (typ), the output is turned off.
CLIM is short-circuit protected.
Use the formulas below to validate the accuracy range
ILIM_MAX = ILIM x (1 + |ICLIM_HS_GE|/100) + |ICLIM_HS_OE|
ILIM_MIN = ILIM x (1 - |ICLIM_HS_GE|/100) - |ICLIM_HS_OE|
Low-Side Current Limit
The low-side transistor has fixed-current limiting, when enabled in push-pull mode (PP driven high). The low-side driver
limits current at 200mA (typ). The load current is actively controlled and the low-side switch only turns off if the driver
temperature has fallen by the hysteresis value.
www.maximintegrated.com
Maxim Integrated | 18
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Overcurrent Signaling
The MAX14914B features an overcurrent output (OV_CURR), which provides a diagnostic signal as soon as the load
current exceeds the high-side driver set current limit in both high-side and push-pull DO modes (DI_EN = low and PP = x).
When the high-side FET detects an overcurrent for a duration longer than 8μs, the OV_CURR open-drain signal becomes
active low and remains low until the overcurrent condition disappears. The overcurrent condition also disappears every
time the high-side switch turns off when a short-circuit condition exists and the FET turns off for thermal shutdown
protection. Note that OV_CURR does not signal an overcurrent on the low-side driver in push-pull mode. The typical
application circuit with the overcurrent signaling is shown in Figure 5.
24V
40V
VL
V5
REGIN
VDD
FAULT
DOI_LVL
OV_CURR
IN
MAX14914B
DOI
DOI
DI_EN
DO/DI
PP
CLIM
GND
PGND
Figure 5. MAX14914B Application Diagram
Short-Circuit Protection
Short circuits at the DOI output generates high transient current until the active current limiting kicks in. In order to protect
the MAX14914_ against high currents that can be seen over an extended time, especially if the output is switching at a
high rate into a short circuit, the MAX14914_ enters a protect mode. When the MAX14914_ detects that the DOI current
is over 3x higher than the set current limit, the driver is switched to protect mode with reduced turn-on slew rate of the
rising and falling edges for a duration of 4ms. The FAULT signal does not become active and the chip operates normally,
but with reduced slew rate. If the cause for the short circuit is not removed, the protect mode will remain for an additional
4ms until the short circuit is removed.
Overvoltage Lockout
When the VDD supply voltage exceeds the OVLO threshold voltage of 42.2V (typ), for a time duration larger than 200μs,
the high-side and low-side switches automatically turn off. They remain off until VDD is reduced to below the threshold
OVLO voltage minus hysteresis. When VDD is above the OVLO threshold, the OV_VDD output is active.
www.maximintegrated.com
Maxim Integrated | 19
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Undervoltage Lockout
When the VDD, V5, or VL supply voltages are under their respective UVLO thresholds the DOI driver is turned off (threestated). DOI automatically turns back on, once VDD, V5, and VL rise above their UVLO threshold.
Note that when VL ≤ 1.12V, the MAX14914ATE+ and MAX14914BATE+ force the OV_VDD pin low while the
MAX14914AATE+ keeps this pin in a Hi-Z state.
Driving Capacitive Loads
When charging/discharging purely capacitive loads with a push-pull driver, the driver dissipates power that is proportional
to the switching frequency. The power can be estimated by PD ~ C x VDD2 x f, where C is the load capacitance, VDD is
the supply voltage, and f is the switching frequency. For example, in an application with a 10nF load and 10kHz switching
frequency, the driver dissipates 130mW at VDD = 36V. Therefore, switching a higher capacitance can induce thermal
shutdown and that limits the operational frequency.
Driving Inductive Loads
The DOI pins can be pulled below ground potential when the high-side transistor is off. The MAX14914_ has an internal
clamping diode from VDD to DOI that limits the negative voltage excursion to (VDD - 55V) typ. Turning off the current
flowing in ground-connected inductive loads results in a negative voltage at the DOI pin limited to VCL below VDD by the
internal clamping diodes.
The MAX14914_ features SafeDemag, meaning that there are no limits for load inductance that it can demagnetize, for
load currents of up to 600mA. Turn-off of large inductive loads with currents larger than 600mA requires an external
clamping diode, as shown in Figure 6. The clamping (breakdown) voltage of such diode needs to be less than VCL: VZ <
VCL. Ensure that the Zener diode is able to dissipate the energy.
VDD
VCL
VZ
HS
DOI
MAX14914
ZL
LS
PGND
Figure 6. External Inductive Load Clamping
Monitoring of the DOI Output
The driver output (DOI) is monitored in both high-side and push-pull modes and corresponding logic level can be seen
through the inversed DOI_LVL logic output. The threshold voltage for the DOI_LVL comparator is between 1.5V and
2.0V. This feature is useful for functional safety applications.
www.maximintegrated.com
Maxim Integrated | 20
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Digital Input Operation
The MAX14914_ can operate as an industrial digital input. Drive the DI_EN pin high to enable digital input operation.
The 2.3mA/7mA internal current sink on DIO is then enabled and the DOI_LVL logic output presents the inverse of the
DOI logic, with threshold voltages compliant with IEC61131-2 Type 1, Type 2, or Type 3 levels. IN DI mode, the PP
input allows selection between IEC Type 1/3 and Type 2 input characteristics. Set PP low for Type 1/3 compatibility and
set PP high for Type 2 compatibility. In order to allow the DOI input voltage to go above the VDD supply voltage and
preventing race condition, an external Schottky diode can be placed in series with the VDD supply, as shown in Figure
7. Alternatively, an external pMOS transistor can be placed in series with the 24V supply, as shown in Figure 8, to allow
the DOI voltage to exceed VDD. The gate of the pMOS can be driven by the open drain OV_VDD output (MAX14914 and
MAX14914A only). When DI_EN = high, the OV_VDD pin turns the pMOS off permanently. Therefore, VDD is one forward
diode voltage (of the pMOS) below the external 24V field supply, when the DOI voltage is less than the field supply
voltage. The MAX14914_ is parasitically powered by the external DOI input, when the DOI voltage is higher than the VDD
supply. Note that the power dissipation increases strongly when Type 2 DI mode is selected (PP = high), particularly with
high DOI input voltages due to the 7mA (typ) current sink. When the VDOI voltage exceeds 42.5V (typ) the sink current
is automatically decreased from 7mA (typ) to 2.3mA (typ) to reduce the power dissipation.
24V
40V
VL
V5
REGIN
VDD
FAULT
DOI_LVL
IN
DI_EN
MAX14914
MAX14914A
MAX14914B
DOI
DOI
DO/DI
PP
CLIM
GND
PGND
Figure 7. DO/DI Configuration with External Schottky Diode
www.maximintegrated.com
Maxim Integrated | 21
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
24V
40V
VL
V5
REGIN
VDD
OV_VDD
FAULT
DOI_LVL
IN
MAX14914
MAX14914A
DI_EN
DOI
DOI
DO/DI
PP
CLIM
GND
PGND
Figure 8. DO/DI Configuration with External pMOSFET
www.maximintegrated.com
Maxim Integrated | 22
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Applications Information
Layout Considerations
The PCB designer should follow some critical recommendations in order to get the best performance from the design.
● Keep the input/output traces as short as possible. Avoid using vias to make low-inductance paths for
the signals.
● Have a solid ground plane underneath the high-speed signal layer.
A suppressor/TVS diode should be used between VDD and PGND to clamp positive-surge transients on the VDD supply
input and surges from DOI. The standoff voltage should be higher than the maximum operating voltage of the device
while the breakdown voltage should be below 65V. As long field-supply cables can generate large voltage transients on
the VDD supply due to large dI/dt, it is recommended to add a large 10µF capacitor on VDD at the point of field supply
entry.
Surge Protection
DOI is protected against ±2kV/42Ω surge pulses as per IEC61000-4-5. Thus, no external surge suppression is needed
on DOI. A suppressor/TVS diode (SMBJ40A, for example) should be used between VDD and PGND to clamp high-surge
transients on the VDD supply input and surges from DOI. The breakdown voltage of TVS should be higher than the
maximum operating voltage of the equipment, while the maximum clamping voltage should be below 65V.
Conducted RF Immunity
To insure that the DOI driver, configured for HS mode with the switch turned off, is not turned on during IEC61000-4-6
RF immunity testing, a 10nF capacitor should be applied between the DOI output and PGND. For PP mode a capacitor
on DOI is not needed.
Reverse Current into DOI
Reverse current flow into DOI pin in DO mode will heat up the device and can destroy it thermally. The allowed
reverse current depends on VDD, the ambient temperature and the thermal resistance. At 25°C ambient temperature the
continuous reverse current into DOI pin should be limited to 250mA at VDD = 40V and 400mA at VDD = 24V. Using a
pMOS transistor or a Schottky diode (as shown in Figure 7 and Figure 8) removes the reverse current flow path into the
24V field supply.
www.maximintegrated.com
Maxim Integrated | 23
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Typical Application Circuits
24V
40V
VL
V5
VDD
REGIN
FAULT
DOI_LVL
IN
DI_EN
MAX14914
MAX14914A
MAX14914B
DOI
DO/DI
DOI
PP
CLIM
GND
PGND
Ordering Information
PART
PACKAGE
BODY SIZE
PIN PITCH
TEMP RANGE (°C)
MAX14914ATE+
TQFN16
4mm x 4mm
0.65mm
-40 to +125
MAX14914ATE+T
TQFN16
4mm x 4mm
0.65mm
-40 to +125
MAX14914AATE+
TQFN16
4mm x 4mm
0.65mm
-40 to +125
MAX14914AATE+T
TQFN16
4mm x 4mm
0.65mm
-40 to +125
MAX14914BATE+
TQFN16
4mm x 4mm
0.65mm
-40 to +125
MAX14914BATE+T
TQFN16
4mm x 4mm
0.65mm
-40 to +125
+Denotes a lead (Pb)-free/RoHS-compliant package
T = Tape and Reel
www.maximintegrated.com
Maxim Integrated | 24
MAX14914, MAX14914A,
MAX14914B
High-Side Switch with Settable
Current-Limiting, Push-Pull Driver Option and
Digital Input Configuration
Revision History
REVISION
NUMBER
REVISION
DATE
0
12/16
Initial release
1
07/17
Corrected pin number in Pin Description section and updated various typos
2
12/17
Updated the Electrical Characteristics global specifications
6/18
Updated the Electrical Characteristics, Typical Operating Characteristics, Pin Description,
and Function Diagram sections, and Figures 4 and 5
9/20
Added MAX14914A and MAX14914B; updated the General Description, Benefits and
Features, Block Diagram, Electrical Characteristics, Pin Configuration, Pin Description,
Functional Diagrams, Overvoltage Lockout, Undervoltage Lockout, Driving Inductive Loads,
and Ordering Information sections; updated Figures 1–2 and before renumbering, Figures
6–7; added TOC18, the Low DOI Leakage Mode and Overcurrent Signaling sections, and a
new Figure 5 and renumbered subsequent figures
3
4
PAGES
CHANGED
DESCRIPTION
—
1, 10, 13
2-5
5, 9, 10,
12–14
1–25
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max
limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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