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MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
General Description
The MAX14930–MAX14932 are a family of 4-channel 2.75kVRMS digital isolators utilizing Maxim’s
proprietary process technology. The MAX14130–
MAX14131 are 4-channel 1kVRMS digital isolators in
smaller footprint QSOP packages. For applications
requiring 5kVRMS of isolation, see the MAX14934–
MAX14936. The MAX14930–MAX14932 family transfers
digital signals between circuits with different power
domains at ambient temperatures up to +125°C.
The MAX14930–MAX14932 family offers all three possible
unidirectional channel configurations to accommodate
any 4-channel design; including SPI, RS-232, RS-485,
and digital I/O applications. For applications requiring
bidirectional channels, such as I2C, see the MAX14933.
Devices are available with data rates from DC up to
1Mbps, 25Mbps, or 150Mbps. Each device is also available in either a default high or default low configuration.
The default is the state an output goes to when its input is
unpowered. See the Product Selector Guide and Ordering
Information for the suffixes associated with each option.
Independent 1.71V to 5.5V supplies on each side of the
isolator also make the devices suitable for use as level
translators.
The MAX14930–MAX14932 are available in both a 16-pin
wide body (10.3mm x 7.5mm) and narrow body (9.9mm x
3.9mm) SOIC package. The MAX14130–MAX14131 are
available in a 16-pin (6mm x 5mm) QSOP package. All
devices are rated for operation at ambient temperatures
of -40°C to +125°C.
Product Selector Guide and Ordering Information appear at
end of data sheet.
Functional Diagram
VDDA
Benefits and Features
● Robust Galvanic Isolation of Digital Signals
• Withstands up to 2.75kVRMS for 60s (VISO)
(MAX14930–MAX14932)
• Continuously Withstands 443VRMS (VIOWM)
(MAX14930–MAX14932)
• 630VPK Repetitive Peak Voltage (VIORM)
(MAX14930–MAX14932)
• Withstands ±10kV Surge per IEC 61000-4-5
● Interfaces Directly with Most Micros and FPGAs
• Accepts 1.71V to 5.5V Supplies
● Many Options Support Broad Applications
• 3 Data Rates (1Mbps, 25Mbps, 150Mbps)
• 3 Channel Direction Configuration
• 2 Output Default States (High or Low)
• 3 Packages (4mm, 8mm Creepage and Clearance)
● Low Power Consumption at High Data Rates
At 1.8V:
• 2.5mA per Channel Typical at 1Mbps
• 5.25mA per Channel Typical at 100Mbps
At 3.3V:
• 2.6mA per Channel Typical at 1Mbps
• 7.1mA per Channel Typical at 100Mbps
Safety Regulatory Approvals
(see Safety Regulatory Approvals)
● UL According to UL1577
● cUL According to CSA Bulletin 5A
● VDE 0884-11 Basic Insulation
Applications
●
●
●
●
●
VDDA
VDDB
MAX14930/MAX14130
Fieldbus Communications for Industrial Automation
Isolated SPI, RS-232, RS-485/RS-422
General Multichannel Isolation Applications
Battery Management
Medical Systems
VDDA
VDDB
MAX14931/MAX14131
VDDB
MAX14932
ENB
ENB
ENB
INA1
OUTB1
INA1
OUTB1
INA1
OUTB1
INA2
OUTB2
INA2
OUTB2
INA2
OUTB2
INA3
OUTB3
INA3
OUTB3
OUTA1
INB1
INA4
OUTB4
OUTA1
INB1
OUTA2
INB2
ENA
GNDA
GNDB
ENA
GNDA
GNDB
GNDA
GNDB
19-7066; Rev 11, 3/22
© 2022 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
One Analog Way, Wilmington, MA 01887 U.S.A.
|
Tel: 781.329.4700
|
© 2022 Analog Devices, Inc. All rights reserved.
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Absolute Maximum Ratings
VDDA to GNDA, VDDB to GNDB..............................-0.3V to +6V
INA_, ENA to GNDA.................................................-0.3V to +6V
INB_, ENB to GNDB................................................-0.3V to +6V
OUTA_ to GNDA..................................... -0.3V to (VDDA + 0.3V)
OUTB_ to GNDB..................................... -0.3V to (VDDB + 0.3V)
Short-Circuit Duration
(OUTA_ to GNDA, OUTB_ to GNDB) ...................Continuous
Continuous Power Dissipation (TA = +70°C)
Wide SOIC (derate 14.1mW/°C above +70°C)....... 1126.8mW
Narrow SOIC (derate 20mW/°C above +70°C) .........1600mW
QSOP (derate 9.6mW/°C above +70°C)...................771.5mW
Operating Temperature Range.......................... -40°C to +125°C
Maximum Junction Temperature......................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 16 Wide SOIC
Package Code
W16M+8
Outline Number
21-0042
Land Pattern Number
90-0107
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
71°C/W
Junction to Case (θJC)
23°C/W
PACKAGE TYPE: 16 Narrow SOIC
Package Code
S16M+11
Outline Number
21-0041
Land Pattern Number
90-0442
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
50°C/W
Junction to Case (θJC)
8°C/W
PACKAGE TYPE: 16 QSOP
Package Code
E16MS+1F
Outline Number
21-0055
Land Pattern Number
90-0167
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
103.7°C/W
Junction to Case (θJC)
37°C/W
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
www.analog.com
Analog Devices │ 2
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
DC Electrical Characteristics
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted.
Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
5.5
V
1.71
V
POWER SUPPLY
Operating Supply Voltage
VDDA
Relative to GNDA
1.71
VDDB
Relative to GNDB
1.71
VDD_ rising
1.45
Undervoltage Lockout Threshold
VUVLO_
Undervoltage Lockout Threshold
Hysteresis
VUVLO_
50
HYST
500kHz
square wave
IDDA
12.5MHz
square wave
(Note 2)
50MHz
square wave
(Note 2)
Supply Current (MAX14x30_)
500kHz
square wave
IDDB
12.5MHz
square wave
(Note 2)
50MHz
square wave
(Note 2)
www.analog.com
1.58
mV
VDDA = 5V
1.2
1.9
VDDA = 3.3V
1.2
1.9
VDDA = 2.5V
1.2
1.9
VDDA = 1.8V
1.1
1.9
VDDA = 5V
2.1
2.7
VDDA = 3.3V
2
2.7
VDDA = 2.5V
2
2.7
VDDA = 1.8V
2
2.6
VDDA = 5V
5
6.6
VDDA = 3.3V
4.6
6.1
VDDA = 2.5V
4.5
6.0
VDDA = 1.8V
4.5
6.0
VDDB = 5V
8.1
11.2
VDDB = 3.3V
7.9
11.1
VDDB = 2.5V
7.9
11.0
VDDB = 1.8V
7.7
10.8
VDDB = 5V
12.8
15.9
VDDB = 3.3V
11.1
14.2
VDDB = 2.5V
10.2
13.4
VDDB = 1.8V
9.4
12.4
VDDB = 5V
27.2
35.4
VDDB = 3.3V
21.7
27.8
VDDB = 2.5V
17.6
23.0
VDDB = 1.8V
14.4
18.9
mA
Analog Devices │ 3
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
DC Electrical Characteristics (continued)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted.
Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
500kHz
square wave
IDDA
12.5MHz
square wave
(Note 2)
50MHz
square wave
(Note 2)
Supply Current (MAX14x31_)
500kHz
square wave
IDDB
12.5MHz
square wave
(Note 2)
50MHz
square wave
(Note 2)
www.analog.com
MIN
TYP
MAX
VDDA = 5V
3.4
5.3
VDDA = 3.3V
3.3
5.3
VDDA = 2.5V
3.3
5.3
VDDA = 1.8V
3.2
5.1
VDDA = 5V
5.6
7.1
VDDA = 3.3V
5
6.6
VDDA = 2.5V
4.7
6.4
VDDA = 1.8V
4.5
6.1
VDDA = 5V
12.4
16.0
VDDA = 3.3V
10.1
13.0
VDDA = 2.5V
9.1
11.6
VDDA = 1.8V
8.2
10.4
VDDB = 5V
6.5
9.2
VDDB = 3.3V
6.4
9.1
VDDB = 2.5V
6.3
9.1
VDDB = 1.8V
6.2
8.9
VDDB = 5V
10.3
12.8
VDDB = 3.3V
8.9
11.6
VDDB = 2.5V
8.2
11.0
VDDB = 1.8V
7.6
10.3
VDDB = 5V
22.7
29.1
VDDB = 3.3V
17.7
23.0
VDDB = 2.5V
14.7
19.4
VDDB = 1.8V
11.9
15.9
UNITS
mA
Analog Devices │ 4
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
DC Electrical Characteristics (continued)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted.
Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
500kHz
square wave
IDDA
12.5MHz
square wave
(Note 2)
50MHz
square wave
(Note 2)
Supply Current (MAX14932_)
500kHz
square wave
TYP
MAX
VDDA = 5V
5.2
7.2
VDDA = 3.3V
5.2
7.2
VDDA = 2.5V
5.2
7.2
VDDA = 1.8V
5
7.0
VDDA = 5V
8.2
10.0
VDDA = 3.3V
7.2
9.1
VDDA = 2.5V
6.7
8.7
VDDA = 1.8V
6.3
8.2
VDDA = 5V
18
18.6
VDDA = 3.3V
14.2
15.1
VDDA = 2.5V
12.3
13.6
VDDA = 1.8V
10.5
12.1
VDDB = 5V
5.2
7.2
VDDB = 3.3V
5.2
7.2
VDDB = 2.5V
5.2
7.2
VDDB = 1.8V
IDDB
12.5MHz
square wave
(Note 2)
50MHz
square wave
(Note 2)
www.analog.com
MIN
5
7.0
VDDB = 5V
8.2
10.0
VDDB = 3.3V
7.2
9.1
VDDB = 2.5V
6.7
8.7
VDDB = 1.8V
6.3
8.2
VDDB = 5V
18
18.6
VDDB = 3.3V
14.2
15.1
VDDB = 2.5V
12.3
13.5
VDDB = 1.8V
10.5
12.1
UNITS
mA
Analog Devices │ 5
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
DC Electrical Characteristics (continued)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted.
Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC INPUTS AND OUTPUTS
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Leakage Current
VIL
VHYS
IL
CIN
EN_ Pullup Current
IPU
Output Voltage Low
www.analog.com
0.7 x
VDDA
ENB, INB_ relative to GNDB
0.7 x
VDDB
VIH
Input Capacitance
Output Voltage High
ENA, INA_ relative to GNDA
VOH
VOL
V
ENA, INA_ relative to GNDA
1.71V ≤ VDDA ≤ 1.89V
0.6
2.25V ≤ VDDA ≤ 5.5V
0.8
ENB, INB_ relative to GNDB
1.71V ≤ VDDB ≤ 1.89V
0.6
2.25V ≤ VDDB ≤ 5.5V
0.8
VINA_ relative to
GNDA or
VINB_ relative to
GNDB
MAX1493_A/D
410
MAX1493_B/E
410
MAX1493_C/F,
MAX1413_C/F
80
VINA_ = 0 or VDDA,
VINB_ = 0 or VDDB
-1
INA_, INB_, f = 1MHz
mV
+1
2
-4
VOUTA_ relative to GNDA,
IOUTA_ = -4mA (Note 3)
VDDA 0.4
VOUTB_ relative to GNDB,
IOUTB_ = -4mA (Note 3)
VDDB 0.4
-2.3
V
µA
pF
-1
µA
V
VOUTA_ relative to GNDA,
IOUTA_ = 4mA (Note 3)
0.4
VOUTB_ relative to GNDB,
IOUTB_ = 4mA (Note 3)
0.4
V
Analog Devices │ 6
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Dynamic Electrical Characteristics (MAX1493_A/D)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted. Typical
values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
INPUT AND OUTPUT CHANNELS
Common-Mode Transient
Immunity
SYMBOL
CMTI
Maximum Data Rate
DRMAX
Minimum Pulse Width
PWMIN
Glitch Rejection
Propagation Delay (Figure 1)
tPHL
PWD
tSPLH
Propagation Delay Skew
Part-to-Part (Same Channel)
tSPHL
tSCSLH
Propagation Delay Skew Channel-to-Channel (Same Direction)
tSCSHL
www.analog.com
MIN
IN__ = GND_ or VDD_(Note 4)
TYP
MAX
25
Mbps
INA_ to OUTB_, INB_ to OUTA_
1
32
µs
ns
INA_ to
OUTB_,
INB_ to
OUTA_,
CL = 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
38.2
54.1
3.0V ≤ VDDA, VDDB ≤ 3.6V
38.7
54.6
2.25V ≤ VDDA, VDDB ≤ 2.75V
39.7
55.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
42.9
58.4
INA_ to
OUTB_,
INB_ to
OUTA_,
CL = 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
38.6
55.3
3.0V ≤ VDDA, VDDB ≤ 3.6V
38.9
55.6
2.25V ≤ VDDA, VDDB ≤ 2.75V
39.8
56.1
1.71V ≤ VDDA, VDDB ≤ 1.89V
42.3
60.2
4.5V ≤ VDDA, VDDB ≤ 5.5V
0.4
4.5
3.0V ≤ VDDA, VDDB ≤ 3.6V
0.2
4.3
2.25V ≤ VDDA, VDDB ≤ 2.75V
0.1
3.9
1.71V ≤ VDDA, VDDB ≤ 1.89V
0.6
|tPLH - tPHL|
UNITS
kV/µs
1
INA_ to OUTB_, INB_ to OUTA_
tPLH
Pulse-Width Distortion
CONDITIONS
ns
ns
4.7
4.5V ≤ VDDA, VDDB ≤ 5.5V
26.6
3.0V ≤ VDDA, VDDB ≤ 3.6V
26.6
2.25V ≤ VDDA, VDDB ≤ 2.75V
26.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
26.9
4.5V ≤ VDDA, VDDB ≤ 5.5V
27.9
3.0V ≤ VDDA, VDDB ≤ 3.6V
27.7
2.25V ≤ VDDA, VDDB ≤ 2.75V
27.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
29.7
4.5V ≤ VDDA, VDDB ≤ 5.5V
6.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
6.7
2.25V ≤ VDDA, VDDB ≤ 2.75V
6.7
1.71V ≤ VDDA, VDDB ≤ 1.89V
6.7
4.5V ≤ VDDA, VDDB ≤ 5.5V
6.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
6.7
2.25V ≤ VDDA, VDDB ≤ 2.75V
6.7
1.71V ≤ VDDA, VDDB ≤ 1.89V
6.7
ns
ns
Analog Devices │ 7
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Dynamic Electrical Characteristics (MAX1493_A/D) (Continued)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted. Typical
values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYMBOL
tSCOLH
Propagation Delay Skew
Channel-to-Channel (Opposing
Direction)
tSCOHL
Rise Time (Figure 1)
Fall Time (Figure 1)
Enable to Data Valid
Enable to Three-State
www.analog.com
tR
tF
tEN
tTRI
CONDITIONS
MIN
TYP
MAX
4.5V ≤ VDDA, VDDB ≤ 5.5V
26.6
3.0V ≤ VDDA, VDDB ≤ 3.6V
26.6
2.25V ≤ VDDA, VDDB ≤ 2.75V
26.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
26.9
4.5V ≤ VDDA, VDDB ≤ 5.5V
27.9
3.0V ≤ VDDA, VDDB ≤ 3.6V
27.7
2.25V ≤ VDDA, VDDB ≤ 2.75V
27.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
29.7
4.5V ≤ VDDA, VDDB ≤ 5.5V
OUTA_/
3.0V ≤ VDDA, VDDB ≤ 3.6V
OUTB_,
10% to 90%, 2.25V ≤ VDDA, VDDB ≤ 2.75V
CL= 15pF
1.71V ≤ VDDA, VDDB ≤ 1.89V
2
4.5V ≤ VDDA, VDDB ≤ 5.5V
2
OUTA_/
3.0V ≤ VDDA, VDDB ≤ 3.6V
OUTB_,
90% to 10%, 2.25V ≤ VDDA, VDDB ≤ 2.75V
CL= 15pF
1.71V ≤ VDDA, VDDB ≤ 1.89V
ENA to
OUTA_,
ENB to
OUTB_,
CL= 15pF
ENA to
OUTA_,
ENB to
OUTB_,
CL= 15pF
2
UNITS
ns
ns
2
2
2
ns
2
2
4.5V ≤ VDDA, VDDB ≤ 5.5V
5.1
3.0V ≤ VDDA, VDDB ≤ 3.6V
5.5
2.25V ≤ VDDA, VDDB ≤ 2.75V
6.7
1.71V ≤ VDDA, VDDB ≤ 1.89V
16.3
4.5V ≤ VDDA, VDDB ≤ 5.5V
2.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
4.4
2.25V ≤ VDDA, VDDB ≤ 2.75V
7.0
1.71V ≤ VDDA, VDDB ≤ 1.89V
11.7
ns
ns
Analog Devices │ 8
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Dynamic Electrical Characteristics (MAX1493_B/E)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted. Typical
values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT AND OUTPUT CHANNELS
Common-Mode Transient
Immunity
CMTI
Maximum Data Rate
DRMAX
Minimum Pulse Width
PWMIN
Glitch Rejection
Propagation Delay (Figure 1)
tPHL
PWD
tSPLH
Propagation Delay Skew
Part-to-Part (Same Channel)
tSPHL
tSCSLH
Propagation Delay Skew Channelto-Channel
(Same Direction)
tSCSHL
www.analog.com
25
kV/µs
25
Mbps
INA_ to OUTB_, INB_ to OUTA_
INA_ to OUTB_, INB_ to OUTA_
tPLH
Pulse-Width Distortion
IN__ = GND_ or VDD_ (Note 4)
40
15
ns
INA_ to
OUTB_,
INB_ to
OUTA_,
CL = 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
20.9
27.5
3.0V ≤ VDDA, VDDB ≤ 3.6V
21.4
28.7
2.25V ≤ VDDA, VDDB ≤ 2.75V
22.4
31.2
1.71V ≤ VDDA, VDDB ≤ 1.89V
25.7
36.9
INA_ to
OUTB_,
INB_ to
OUTA_,
CL = 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
21.1
28.8
3.0V ≤ VDDA, VDDB ≤ 3.6V
21.5
29.8
2.25V ≤ VDDA, VDDB ≤ 2.75V
22.3
31.9
1.71V ≤ VDDA, VDDB ≤ 1.89V
24.9
37.4
4.5V ≤ VDDA, VDDB ≤ 5.5V
0.2
2.6
3.0V ≤ VDDA, VDDB ≤ 3.6V
0.1
2.6
2.25V ≤ VDDA, VDDB ≤ 2.75V
0.1
2.4
1.71V ≤ VDDA, VDDB ≤ 1.89V
0.7
3.2
|tPLH - tPHL|
ns
4.5V ≤ VDDA, VDDB ≤ 5.5V
11.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
11.5
2.25V ≤ VDDA, VDDB ≤ 2.75V
11.3
1.71V ≤ VDDA, VDDB ≤ 1.89V
13.6
4.5V ≤ VDDA, VDDB ≤ 5.5V
9.8
3.0V ≤ VDDA, VDDB ≤ 3.6V
9.8
2.25V ≤ VDDA, VDDB ≤ 2.75V
11.1
1.71V ≤ VDDA, VDDB ≤ 1.89V
14.4
4.5V ≤ VDDA, VDDB ≤ 5.5V
3
3.0V ≤ VDDA, VDDB ≤ 3.6V
3
2.25V ≤ VDDA, VDDB ≤ 2.75V
3
1.71V ≤ VDDA, VDDB ≤ 1.89V
3
4.5V ≤ VDDA, VDDB ≤ 5.5V
3
3.0V ≤ VDDA, VDDB ≤ 3.6V
3
2.25V ≤ VDDA, VDDB ≤ 2.75V
3
1.71V ≤ VDDA, VDDB ≤ 1.89V
3
ns
ns
ns
ns
Analog Devices │ 9
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Dynamic Electrical Characteristics (MAX1493_B/E) (Continued)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted. Typical
values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYMBOL
tSCOLH
Propagation Delay Skew Channel
to Channel (Opposing Direction)
tSCOHL
Rise Time (Figure 1)
Fall Time (Figure 1)
Enable to Data Valid
Enable to Three-State
www.analog.com
tR
tF
tEN
tTRI
CONDITIONS
MIN
TYP
MAX
4.5V ≤ VDDA, VDDB ≤ 5.5V
11.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
11.5
2.25V ≤ VDDA, VDDB ≤ 2.75V
11.3
1.71V ≤ VDDA, VDDB ≤ 1.89V
13.6
4.5V ≤ VDDA, VDDB ≤ 5.5V
9.8
3.0V ≤ VDDA, VDDB ≤ 3.6V
9.8
2.25V ≤ VDDA, VDDB ≤ 2.75V
11.1
1.71V ≤ VDDA, VDDB ≤ 1.89V
14.4
OUTA_/
OUTB_,
10% to 90%,
CL= 15pF
OUTA_/
OUTB_,
90% to 10%,
CL= 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
2
3.0V ≤ VDDA, VDDB ≤ 3.6V
2
2.25V ≤ VDDA, VDDB ≤ 2.75V
2
1.71V ≤ VDDA, VDDB ≤ 1.89V
2
4.5V ≤ VDDA, VDDB ≤ 5.5V
2
3.0V ≤ VDDA, VDDB ≤ 3.6V
2
2.25V ≤ VDDA, VDDB ≤ 2.75V
2
1.71V ≤ VDDA, VDDB ≤ 1.89V
2
UNITS
ns
ns
ns
ENA to
OUTA_,
ENB to
OUTB_,
CL= 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
5.1
3.0V ≤ VDDA, VDDB ≤ 3.6V
5.5
2.25V ≤ VDDA, VDDB ≤ 2.75V
6.7
1.71V ≤ VDDA, VDDB ≤ 1.89V
16.3
ENA to
OUTA_,
ENB to
OUTB_,
CL= 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
2.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
4.4
2.25V ≤ VDDA, VDDB ≤ 2.75V
7.0
1.71V ≤ VDDA, VDDB ≤ 1.89V
11.7
ns
ns
Analog Devices │ 10
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Dynamic Electrical Characteristics (MAX1493_C/F, MAX1413_C/F)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted. Typical
values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT AND OUTPUT CHANNELS
Common-Mode Transient
Immunity
CMTI
Maximum Data Rate
DRMAX
Minimum Pulse Width
PWMIN
tPLH
Propagation Delay (Figure 1)
tPHL
Pulse-Width Distortion
PWD
tSPLH
Propagation Delay Skew Partto-Part (Same Channel)
tSPHL
tSCSLH
Propagation Delay Skew
Channel-to-Channel
(Same Direction)
tSCSHL
www.analog.com
IN__ = GND_ or VDD_(Note 4)
25
kV/µs
150
Mbps
INA_ to OUTB_, INB_ to OUTB_
6.67
INA_ to
OUTB_,
INB_ to
OUTA_,
CL = 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
5.1
7.5
3.0V ≤ VDDA, VDDB ≤ 3.6V
5.2
8.1
2.25V ≤ VDDA, VDDB ≤ 2.75V
5.8
9.7
1.71V ≤ VDDA, VDDB ≤ 1.89V
8.1
14
INA_ to
OUTB_,
INB_ to
OUTA_,
CL = 15pF
4.5V ≤ VDDA, VDDB ≤ 5.5V
4.9
7.4
3.0V ≤ VDDA, VDDB ≤ 3.6V
5.3
8.3
2.25V ≤ VDDA, VDDB ≤ 2.75V
5.9
10.2
1.71V ≤ VDDA, VDDB ≤ 1.89V
8.2
14.9
4.5V ≤ VDDA, VDDB ≤ 5.5V
0.2
1
3.0V ≤ VDDA, VDDB ≤ 3.6V
0.1
1
2.25V ≤ VDDA, VDDB ≤ 2.75V
0.1
1
1.71V ≤ VDDA, VDDB ≤ 1.89V
0.1
1
|tPLH - tPHL|
4.5V ≤ VDDA, VDDB ≤ 5.5V
3.0
3.0V ≤ VDDA, VDDB ≤ 3.6V
3.3
2.25V ≤ VDDA, VDDB ≤ 2.75V
4.3
1.71V ≤ VDDA, VDDB ≤ 1.89V
7.1
4.5V ≤ VDDA, VDDB ≤ 5.5V
2.8
3.0V ≤ VDDA, VDDB ≤ 3.6V
3.4
2.25V ≤ VDDA, VDDB ≤ 2.75V
4.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
7.9
4.5V ≤ VDDA, VDDB ≤ 5.5V
0.9
3.0V ≤ VDDA, VDDB ≤ 3.6V
1.2
2.25V ≤ VDDA, VDDB ≤ 2.75V
1.4
1.71V ≤ VDDA, VDDB ≤ 1.89V
1.6
4.5V ≤ VDDA, VDDB ≤ 5.5V
0.9
3.0V ≤ VDDA, VDDB ≤ 3.6V
1.2
2.25V ≤ VDDA, VDDB ≤ 2.75V
1.4
1.71V ≤ VDDA, VDDB ≤ 1.89V
1.6
ns
ns
ns
ns
ns
Analog Devices │ 11
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Dynamic Electrical Characteristics (MAX1493_C/F, MAX1413_C/F)) (continued)
(VDDA - VGNDA = +1.71V to +5.5V, VDDB - VGNDB = +1.71V to +5.5V, CL = 15pF, TA = -40°C to +125°C, unless otherwise noted. Typical
values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYMBOL
tSCOLH
Propagation Delay Skew
Channel-to-Channel (Opposing
Direction)
tSCOHL
CONDITIONS
MIN
TYP
3
3.0V ≤ VDDA, VDDB ≤ 3.6V
3.3
2.25V ≤ VDDA, VDDB ≤ 2.75V
4.3
1.71V ≤ VDDA, VDDB ≤ 1.89V
7.1
4.5V ≤ VDDA, VDDB ≤ 5.5V
2.8
3.0V ≤ VDDA, VDDB ≤ 3.6V
3.4
2.25V ≤ VDDA, VDDB ≤ 2.75V
4.6
1.71V ≤ VDDA, VDDB ≤ 1.89V
Rise Time (Figure 1)
Fall Time (Figure 1)
Enable to Data Valid
Enable to Three-State
Peak Eye Diagram Jitter
www.analog.com
tR
tF
tEN
tTRI
TJIT(PK)
MAX
4.5V ≤ VDDA, VDDB ≤ 5.5V
OUTA_/
OUTB_,
10% to 90%,
CL= 15pF
OUTA_/
OUTB_,
90% to 10%,
CL= 15pF
ENA to OUTA_,
ENB to OUTB_,
CL= 15pF
ENA to OUTA_,
ENB to OUTB_,
CL= 15pF
UNITS
ns
7.9
4.5V ≤ VDDA, VDDB ≤ 5.5V
2
3.0V ≤ VDDA, VDDB ≤ 3.6V
2
2.25V ≤ VDDA, VDDB ≤ 2.75V
2
1.71V ≤ VDDA, VDDB ≤ 1.89V
2
4.5V ≤ VDDA, VDDB ≤ 5.5V
2
3.0V ≤ VDDA, VDDB ≤ 3.6V
2
2.25V ≤ VDDA, VDDB ≤ 2.75V
2
1.71V ≤ VDDA, VDDB ≤ 1.89V
2
ns
ns
4.5V ≤ VDDA, VDDB ≤ 5.5V
5.1
3.0V ≤ VDDA, VDDB ≤ 3.6V
5.5
2.25V ≤ VDDA, VDDB ≤ 2.75V
6.7
1.71V ≤ VDDA, VDDB ≤ 1.89V
16.3
4.5V ≤ VDDA, VDDB ≤ 5.5V
2.7
3.0V ≤ VDDA, VDDB ≤ 3.6V
4.4
2.25V ≤ VDDA, VDDB ≤ 2.75V
7.0
VDDA, VDDB ≤ 1.89V
11.7
VDDA, VDDB = 5.0V
140
VDDA, VDDB = 3.3V
130
VDDA, VDDB = 2.5V
140
VDDA, VDDB = 1.8V
160
ns
ns
ps
Analog Devices │ 12
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
ESD Protection
PARAMETER
SYMBOL
ESD
Note
Note
Note
Note
1:
2:
3:
4:
CONDITIONS
MIN
TYP
Human Body Model, all pins
MAX
UNITS
kV
±4
All devices are 100% production tested at TA = +125°C. Specifications over temperature are guaranteed by design.
Not production tested. Guaranteed by design.
All currents into the device are positive. All currents out of the device are negative.
CMTI is the maximum sustainable common-mode voltage slew rate while maintaining the correct output. CMTI applies to both rising
and falling common-mode voltage edges. Tested with the transient generator connected between GNDA and GNDB
(VCM = 1000V).
VDDA
INA1, INA2
50%
GNDA
VDDA
0.1µF
50Ω
TEST
SOURCE
VDDA
VDDB
MAX14930
MAX14931
MAX14932
MAX14130
INA_ MAX14131 OUTB_
GNDA
GNDB
0.1µF
50%
tPLH
VDDB
tPHL
VDDB
OUTB1
50%
50%
GNDB
CL
RL
VDDB
tSCSHL
90%
50%
OUTB2
(A)
GNDB
10%
tR
tF
(B)
Figure 1. Test Circuit (A) and Timing Diagram (B)
Safety Regulatory Approvals
UL
The MAX14930–MAX14932 are certified under UL1577. For more details, refer to file E351759.
Rated up to 3750VRMS isolation voltage for single protection.
cUL (Equivalent to CSA notice 5A)
The MAX14930–MAX14932 are certified up to 3750VRMS for single protection. For more details, refer to file E351759.
VDE
The MAX14930-MAX14932 are certified to DIN VDE V 0884-11: 2017-01. For details, see file ref. 5015017-4880-0001/272147/
TL7/SCT. Basic Insulation, Maximum Transient Isolation Voltage 4600VPK, Maximum Repetitive Peak Isolation Voltage 630VPK
These couplers are suitable for “safe electrical insulation” only within the safety ratings. Compliance with the safety ratings shall be
ensured by means of suitable protective circuits.
www.analog.com
Analog Devices │ 13
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
IEC Insulation Testing
TUV
The MAX14930–MAX14932 are tested under TUV.
IEC 60950-1: Up to 630VPK (443VRMS) working voltage for basic insulation.
IEC 61010-1 (ed. 3): Up to 443VRMS working voltage for basic insulation. For details, see Technical Report number 095-72100581-100.
IEC 60601-1 (ed. 3): For details, see Technical Report number 095-72100581-200.
Basic Insulation 1 MOOP, 630VPK (443VRMS)
Withstand Isolation Voltage (VISO) for 60s, 2750VRMS
MAX14930–MAX14932 Insulation Characteristics
PARAMETER
Partial Discharge Test Voltage
SYMBOL
VPR
CONDITIONS
VALUE
UNITS
Method B1 = VIORM x 1.875
(t = 1s, partial discharge < 5pC)
1182
VP
Maximum Repetitive Peak Isolation Voltage
VIORM
(Note 5)
630
VP
Maximum Working Isolation Voltage
VIOWM
Continuous RMS voltage (Note 5)
443
VRMS
Maximum Transient Isolation Voltage
VIOTM
t = 1s (Note 5)
4600
VP
fSW = 60Hz, duration = 60s
(Note 5, 6)
2750
VRMS
10
kV
Maximum Withstand Isolation Voltage
Maximum Surge Isolation Voltage
Insulation Resistance
VISO
VIOSM
RIO
Basic insulation, 1.2/50µs pulse
per IEC 61000-4-5 (Note 5, 8)
VIO = 500V, TA = 25°C
> 1012
VIO = 500V, 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500V at TS = 150°C
Barrier Capacitance Side A to Side B
CIO
Minimum Creepage Distance
CPG
Minimum Clearance Distance
CLR
Internal Clearance
Comparative Tracking Index
Climatic Category
Pollution Degree
(DIN VDE 0110, Table 1)
www.analog.com
fSW = 1MHz (Note 9)
2
Wide SOIC
8
Narrow SOIC
4
Wide SOIC
8
Narrow SOIC
4
Distance through insulation
CTI
>
Material Group II (IEC 60112)
Ω
109
0.015
pF
mm
mm
mm
575
40/125/21
2
Analog Devices │ 14
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
MAX14130–MAX14131 Insulation Characteristics
PARAMETER
Partial Discharge Test Voltage
SYMBOL
VPR
CONDITIONS
VALUE
UNITS
Method B1 = VIORM x 1.875
(t = 1s, partial discharge < 5pC)
795
VP
424
VP
Maximum Repetitive Peak Isolation Voltage
VIORM
(Note 5)
Maximum Working Isolation Voltage
VIOWM
Continuous RMS voltage (Note 5)
300
VRMS
Maximum Transient Isolation Voltage
VIOTM
t = 1s (Note 5)
1700
VP
Maximum Withstand Isolation Voltage
VISO
fSW = 60Hz, duration = 60s
(Note 5, 7)
1000
VRMS
4
kV
Maximum Surge Isolation Voltage
Insulation Resistance
VIOSM
RIO
Basic insulation, 1.2/50µs pulse
per IEC 61000-4-5 (Note 5, 8)
VIO = 500V, TA = 25°C
> 1012
VIO = 500V, 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500V at TS = 150°C
> 109
Ω
Barrier Capacitance Side A to Side B
CIO
fSW = 1MHz (Note 9)
2
pF
Minimum Creepage Distance
CPG
QSOP
4
mm
Minimum Clearance Distance
CLR
QSOP
4
mm
0.015
mm
Internal Clearance
Comparative Tracking Index
Distance through insulation
CTI
Material Group II (IEC 60112)
Climatic Category
Pollution Degree
(DIN VDE 0110, Table 1)
Note
Note
Note
Note
Note
563
40/125/21
2
5: VISO, VIOTM, VIOSM, VIOWM, and VIORM are defined by the IEC 60747-5-5 standard.
6: MAX14930–MAX14932 are qualified at VISO for 60s and 100% production tested at 120% of VISO for 1s.
7: MAX14130–MAX14131 VISO is production tested at 720VRMS for 1 second and guaranteed by design for 1kVRMS.
8: Devices are immersed in oil during surge characterization.
9: Capacitance is measured with all pins on field-side and logic-side tied together.
Safety Limits
Damage to the IC can result in a low-resistance path
to ground or to the supply and, without current limiting,
the MAX14930–MAX14932 and MAX14130–MAX14131
could dissipate excessive amounts of power. Excessive
power dissipation can damage the die and result in damage to the isolation barrier, potentially causing downstream issues. Table 1 shows the safety limits for the
MAX14930–MAX14932 and MAX14130–MAX14131.
The maximum safety temperature (TS) for the device is
the 150°C maximum junction temperature specified in
the Absolute Maximum Ratings. The power dissipation
www.analog.com
(PD) and junction-to-ambient thermal impedance (θJA)
determine the junction temperature. Thermal impedance values (θJA and θJC) are available in the Package
Information section of the datasheet. Calculate the junction temperature (TJ) as:
TJ = TA + (PD x θJA)
Figure 2 to Figure 4 show the thermal derating curves
for the safety power limiting of the devices and Figure 5
shows the thermal derating curve for the safety current
limiting of the devices. Ensure that the junction temperature does not exceed 150°C.
Analog Devices │ 15
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
THERMAL DERATING CURVE
FOR SAFETY POWER LIMITING
THERMAL DERATING CURVE
FOR SAFETY POWER LIMITING
1800
1400
16 WIDE SOIC PACKAGE,
MULTILAYER BOARD
SAFE POWER LIMIT (mW)
SAFE POWER LIMIT (mW)
1600
1400
1200
1000
800
600
16 QSOP PACKAGE,
MULTILAYER BOARD
1200
1000
800
600
400
400
200
200
0
0
25
50
75
100
125
150
175
0
200
0
25
AMBIENT TEMPERATURE (°C)
Figure 2. Thermal Derating Curve for Safety Power Limiting Wide SOIC
100
125
150
175
200
THERMAL DERATING CURVE
FOR SAFETY CURRENT LIMITING
3000
350
16 NARROW SOIC PACKAGE,
MULTILAYER BOARD
2500
MULTILAYER BOARD
SAFE CURRENT LIMIT (mA)
SAFE POWER LIMIT (mW)
75
Figure 4. Thermal Derating Curve for Safety Power Limiting QSOP
THERMAL DERATING CURVE
FOR SAFETY POWER LIMITING
2000
1500
1000
500
0
50
AMBIENT TEMPERATURE (°C)
300
250
200
150
100
50
0
25
50
75
100
125
150
175
0
200
0
25
AMBIENT TEMPERATURE (°C)
50
75
100
125
150
175
200
AMBIENT TEMPERATURE (°C)
Figure 3. Thermal Derating Curve for Safety Power Limiting Narrow SOIC
Figure 5. Thermal Derating Curve for Safety Current Limiting
Table 1. Safety Limiting Values for the MAX14930–MAX14932 and MAX14130–MAX14131
PARAMETER
SYMBOL
Safety Current on Any Pin
(No Damage to Isolation Barrier)
IS
Total Safety Power Dissipation
Maximum Safety Temperature
www.analog.com
PS
TS
TEST CONDITIONS
TJ = 150°C, TA = 25°C
TJ = 150°C, TA = 25°C
MAX
UNITS
300
mA
Wide SOIC
1760
Narrow SOIC
2500
QSOP
1205
150
mW
°C
Analog Devices │ 16
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Typical Operating Characteristics
(VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDA = VGNDB, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT (mA)
2.2
2.0
1.8
VDDA
VDD_= 1.8V
= 1.8V
1.6
VDD_= 2.5V
= 2.5V
VDDA
1.4
VDD_= 3.3V
= 3.3V
VDDA
V
1.2
1.0
15
10
VDD_= 1.8V
= 1.8V
VDDA
= 2.5V
VDD_= 2.5V
VDDA
5
VDD_= 3.3V
= 3.3V
VDDA
= 5.0V
25
50
75
100
125
0
150
0
25
PROPAGATION DELAY
vs. TEMPERATURE
8
6
VDD_
1.8V
= 1.8V
= 2.5V
VDD_ = 3.3V
3.3V
5VVDD_ = 5.0V
4
VDD_
2.5V
2
-50
-25
0
25
50
100
125
25.0
20.0
VDD_
1.8V
= 1.8V
= 2.5V
VDD_ = 3.3V
3.3V
5VVDD_ = 5.0V
VDD_
2.5V
15.0
10.0
150
-50
-25
75
100
toc05
50
20.0
15.0
MAX1493_B/E
10.0
MAX1493_C/F, MAX1413_C/F
1.5
2.5
125
toc06
25.0
20.0
MAX1493_B/E
15.0
10.0
MAX1493_C/F, MAX1413_C/F
3.5
4.5
5.5
0.0
1.5
2.5
MINIMUM PULSE WIDTH
toc07
3.5
4.5
5.5
VDDB VOLTAGE (V)
VDDA VOLTAGE (V)
EYE DIAGRAM at 150Mbps
MINIMUM PULSE WIDTH
toc08
toc09
MAX1493_B/E
MAX1493_C/F, MAX1413_C/F
1V/div
40ns
IN__
5ns
1V/div
IN__
500mV/
div
OUT__
1V/div
1V/div
OUT__
10ns/div
www.analog.com
100
5.0
TEMPERATURE (°C)
MAX1493_C/F, MAX1413_C/F
30s OF PRBS
75
VDDB = 3.3V
INA_ TO OUTB_
30.0
25.0
0.0
25
PROPAGATION DELAY
vs. VDDB VOLTAGE
35.0
5.0
125
0
TEMPERATURE (°C)
VDDB = 3.3V
INA_ TO OUTB_
30.0
10
0
75
PROPAGATION DELAY
vs. VDDA VOLTAGE
35.0
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
toc04
VDDA = VDDB
INA_ TO OUTB_
MAX1493_C/F, MAX1413_C/F
12
30.0
DATA RATE (Mbps)
DATA RATE (Mbps)
14
50
toc03
VDDA = VDDB
INA_ TO OUTB_
MAX1493_B/E
VDD_= 5V
= 5.0V
VDDA
DD_
VDDA
= 5V
0
PROPAGATION DELAY
vs. TEMPERATURE
35.0
DRIVING ONE CHANNEL ON SIDE A
ALL OTHER CHANNELS LOW
MAX14930C/F
20
2.4
toc02
PROPAGATION DELAY (ns)
2.6
SIDE B SUPPLY CURRENT
vs. DATA RATE
25
DRIVING ONE CHANNEL ON SIDE A
ALL OTHER CHANNELS LOW
MAX1493_C/F, MAX1413_C/F
2.8
SUPPLY CURRENT (mA)
toc01
PROPAGATION DELAY (ns)
SIDE A SUPPLY CURRENT
vs. DATA RATE
3.0
2.5ns/div
Analog Devices │ 17
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Pin Configurations
TOP VIEW
VDDA
1
GNDA
+
16 VDDB
VDDA
1
2
15 GNDB
GNDA
INA1
3
14 OUTB1
INA2
4
INA3
5
INA4
+
+
16 VDDB
VDDA
1
2
15 GNDB
GNDA
2
15 GNDB
INA1
3
14 OUTB1
INA1
3
14 OUTB1
13 OUTB2
INA2
4
13 OUTB2
INA2
4
12 OUTB3
INA3
5
12 OUTB3
OUTA1
5
12 INB1
6
11 OUTB4
OUTA1
6
11 INB1
OUTA2
6
11 INB2
I.C.
7
10 ENB
ENA
7
10 ENB
ENA
7
10 ENB
GNDA
8
9
GNDA
8
9
GNDA
8
9
MAX14930
MAX14130
GNDB
SOIC, QSOP
MAX14931
MAX14131
GNDB
SOIC, QSOP
16 VDDB
13 OUTB2
MAX14932
GNDB
SOIC
Pin Description
PIN
NAME
VOLTAGE
RELATIVE TO
FUNCTION
MAX14x30
MAX14x31
MAX14932
1
1
1
VDDA
2, 8
2, 8
2, 8
GNDA
3
3
3
INA1
Logic Input 1 on Side A. INA1 corresponds to OUTB1.
GNDA
4
4
4
INA2
Logic Input 2 on Side A. INA2 corresponds to OUTB2.
GNDA
Power Supply. Bypass VDDA with a 0.1µF ceramic
capacitor as close as possible to the pin.
GNDA
Ground Reference for Side A
—
5
5
—
INA3
Logic Input 3 on Side A. INA3 corresponds to OUTB3.
GNDA
6
—
—
INA4
Logic Input 4 on Side A. INA4 corresponds to OUTB4.
GNDA
7
—
—
I.C.
Internally Connected. Leave unconnected or connect
to GNDA or VDDA.
—
—
6
5
OUTA1
Logic Output 1 on Side A
GNDA
—
—
6
OUTA2
Logic Output 2 on Side A
GNDA
Active-High Enable for Side A. ENA has an internal
2μA pullup to VDDA.
GNDA
—
7
7
ENA
9, 15
9, 15
9, 15
GNDB
10
10
10
ENB
11
—
—
OUTB4
—
11
12
—
—
11
12
12
—
13
13
14
14
16
16
www.analog.com
Ground Reference for Side B
—
Active-High Enable for Side B. ENB has an internal
2μA pullup to VDDB.
GNDB
Logic Output 4 on Side B
GNDB
INB1
Logic Input 1 on Side B. INB1 corresponds to OUTA1.
GNDB
INB2
Logic Input 2 on Side B. INB2 corresponds to OUTA2.
GNDB
OUTB3
Logic Output 3 on Side B
GNDB
13
OUTB2
Logic Output 2 on Side B
GNDB
14
OUTB1
Logic Output 1 on Side B
GNDB
16
VDDB
Power Supply. Bypass VDDB with a 0.1µF ceramic
capacitor as close as possible to the pin.
GNDB
Analog Devices │ 18
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Typical Application Circuits
3.3V
5V
0.1µF
24V
0.1µF
VDDA
VDDB
MAX14930
5V OUT
ENB
INA1
OUTB1
INA2
OUTB2
INA3
OUTB3
INA4
OUTB4
GNDA
GNDB
3.3V
GPIO PORT
5V
0.1µF
24V DIGITAL I/O
0.1µF
VDDA
VDDB
MAX14930
ENB
OUTB1
INA1
OUTB2
INA2
OUTB3
INA3
OUTB4
INA4
GNDB
GNDA
ISOLATION
www.analog.com
Analog Devices │ 19
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Typical Application Circuits (continued)
1.8V
3.3V
0.1µF
0.1µF
VDDB
VDDA
MAX14931
µC
ENA
ENB
GPIO
INA1
OUTB1
CS
SCLK
INA2
OUTB2
SCLK
MOSI
INA3
OUTB3
MOSI
MISO
OUTA1
INB1
MISO
GNDA
ADC
GNDB
ISOLATION
5V
2.5V
0.1µF
0.1µF
VDDA
VDDB
MAX14932
µC
ENA
ENB
RTS
INA1
OUTB1
T1IN
Tx
INA2
OUTB2
T2IN
MAX13223
RS-232
TRANSCEIVER
CTS
OUTA3
INB3
R1OUT
Rx
OUTA4
INB4
R2OUT
GNDA
GNDB
ISOLATION
www.analog.com
Analog Devices │ 20
MAX14930–MAX14932,
MAX14130–MAX14131
Detailed Description
The
MAX14930–MAX14932
and
MAX14130–
MAX14131 are a family of 4-channel digital isolators.
The MAX14930–MAX14932 family transfers digital
signals between circuits with different power domains.
The devices are rated for up to 2.75kVRMS isolation
voltage for 60 seconds. The MAX14130–MAX14131
are rated for up to 1kVRMS isolation voltage for 60
seconds. This family of digital isolators offers lowpower operation, high electromagnetic interference (EMI)
immunity, and stable temperature performance through
Maxim’s proprietary process technology. The devices
isolate different ground domains and block high-voltage/
high-current transients from sensitive or human interface
circuitry.
The devices offer three unidirectional channel configurations
for design convenience. The MAX14x30 features four
channels transferring digital signals in one direction for
applications such as isolated digital I/O. The MAX14x31
has three channels transmitting data in one direction and
one channel transmitting in the opposite direction, making
it ideal for applications such as isolated SPI and RS-485
communication. The MAX14932 provides further design
flexibility with two channels in each direction for isolated
RS-232 or other applications.
Devices are available with data rates from DC up to 1Mbps
(A/D versions), 25Mbps (B/E versions), or 150Mbps (C/F
versions). Each device can also be ordered with defaulthigh or default-low outputs. This is the state an output will
go to when the input side of the device is unpowered.
The devices have two supply inputs, VDDA and VDDB,
that independently set the logic levels on either side of
the device. VDDA and VDDB are referenced to GNDA and
GNDB, respectively. The MAX14930–MAX14932 family
also features a refresh circuit to ensure output accuracy
when an input remains in the same state indefinitely.
www.analog.com
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Digital Isolation
The MAX14930–MAX14932 family provides galvanic
isolation for digital signals that are transmitted between
two ground domains. Up to 630VPEAK of continuous
isolation is supported, as well as transient differences of
up to 2.75kVRMS for up to 60 seconds. The MAX14130–
MAX14131 family provides galvanic isolation for digital
signals that are transmitted between two ground domains.
Up to 424VPEAK of continuous isolation is supported, as
well as transient differences of up to 1kVRMS for up to 60
seconds.
Level Shifting
The wide supply voltage range of both VDDA and
V DDB allows the MAX14930–MAX14932 and
MAX14130–MAX14131 family to be used for level translation in addition to isolation. VDDA and VDDB can
be independently set to any voltage from 1.71V to
5.5V. The supply voltage sets the logic level on the
corresponding side of the isolator.
Unidirectional Channels
Each channel of the MAX14930–MAX14932 and
MAX14130–MAX14131 is unidirectional; it only passes
data in one direction, as indicated in the functional diagram.
Each device features four unidirectional channels that
operate independently with guaranteed data rates from
DC up to 1Mbps (A/D versions), 25Mbps (B/E versions), or
150Mbps (C/F versions). The output driver of each channel
is push-pull, eliminating the need for pullup resistors. The
outputs are able to drive both TTL and CMOS logic inputs.
Startup and Undervoltage Lockout
The VDDA and VDDB supplies are both internally monitored
for undervoltage conditions. Undervoltage events can
occur during power-up, power-down, or during normal
operation due to a sagging supply voltage. When an
undervoltage condition is detected on either supply, all
outputs go to their default states regardless of the status
of the inputs (Table 2). Figure 6 through Figure 9 show the
behavior of the outputs during power-up and power-down.
Analog Devices │ 21
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Table 2. Output Behavior During Undervoltage Conditions
VIN
VDDA
VDDB
1
Powered
Powered
0
Powered
Powered
X
Undervoltage
Powered
X
Powered
Undervoltage
ENA
ENB
VOUTA
VOUTB
1
1
1
1
0
0
Hi-Z
Hi-Z
1
1
0
0
0
0
Hi-Z
Hi-Z
1
1
Default
Default
0
0
Hi-Z
Hi-Z
1
1
Default
Default
0
0
Hi-Z
Hi-Z
Note: EN_ = 0 (Hi-Z Mode) takes precedence over the default value.
MAX1493_A/B/C
INPUT SET TO HIGH
MAX1493_D/E/F, MAX1413_C/F
INPUT SET TO HIGH
VDDA
3V/div
VDDA
3V/div
VDDB
VDDB
OUTA_
OUTA_
OUTB_
OUTB_
200µs/div
200µs/div
Figure 6. Undervoltage Lockout Behavior
(MAX1493_ A/B/C High)
Figure 8. Undervoltage Lockout Behavior
(MAX1493_ D/E/F, MAX1413_C/F High)
MAX1493_D/E/F, MAX1413_C/F
INPUT SET TO LOW
MAX1493_A/B/C
INPUT SET TO LOW
VDDA
VDDA
3V/div
3V/div
VDDB
VDDB
OUTA_
OUTA_
OUTB_
200µs/div
Figure 7. Undervoltage Lockout Behavior
(MAX1493_ A/B/C Low)
www.analog.com
OUTB_
200µs/div
Figure 9. Undervoltage Lockout Behavior
(MAX1493_ D/E/F, MAX1413_C/F Low)
Analog Devices │ 22
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Applications Information
Layout Considerations
Power-Supply Sequencing
The MAX14930–MAX14932 and MAX14130–MAX14131
do not require special power-supply sequencing. The
logic levels are set independently on either side by VDDA
and VDDB. Each supply can be present over the entire
specified range regardless of the level or presence of the
other supply.
Power-Supply Decoupling
To reduce ripple and the chance of introducing data errors,
bypass VDDA and VDDB with 0.1µF ceramic capacitors to
GNDA and GNDB, respectively. Place the bypass capacitors
as close to the power-supply input pins as possible.
The PCB designer should follow some critical recommendations in order to get the best performance from the
design.
●
Keep the input/output traces as short as possible. To
keep signal paths low-inductance, avoid using vias.
●
Have a solid ground plane underneath the high-speed
signal layer.
●
Keep the area underneath the MAX14930–MAX14932
and MAX14130–MAX14131 free from ground and
signal planes. Any galvanic or metallic connection
between the Side A and Side B defeats the isolation.
Product Selector Guide
MAX14 9 3 1 F A
PACKAGE
9: SOIC
1: QS OP
CHANNEL
CONFIGURATION
0: 4/0
1: 3/1
2: 2/2
S
E +
DEVICE CONFIGURATION
MAX DATA RATE
1Mbps
25Mbps
150Mbps
DEFAULT-HIGH OUTP UT
A
B
C
DEFAULT-LOW OUTPUT
D
E
F
MAX IMUM DATA RATE
DEFAULT OUTPUT
(SEE TABLE)
TEMP RANGE : -40°C TO +125°C
PACKAGE
W: W IDE SOIC
S: NARROW SOI C
E: QSOP
PINS: 16
LEAD-FREE/RoHS COMPLIANT
www.analog.com
Analog Devices │ 23
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Ordering Information
PART
CHANNEL
DATA RATE
OUTPUT
CONFIGURATION
(Mbps)
MAX14930AASE+
MAX14930AAWE+
MAX14930BASE+
MAX14930BAWE+
MAX14930CASE+
MAX14930CAWE+
MAX14930DASE+
MAX14930DAWE+
MAX14930EASE+
MAX14930EAWE+
MAX14930FASE+
MAX14930FAWE+
MAX14931AASE+
MAX14931AAWE+
MAX14931BASE+
MAX14931BAWE+
MAX14931CASE+
MAX14931CAWE+
MAX14931DASE+
MAX14931DAWE+
MAX14931EASE+
MAX14931EAWE+
MAX14931FASE+
MAX14931FAWE+
MAX14932AASE+
MAX14932AAWE+
MAX14932BASE+
MAX14932BAWE+
MAX14932CASE+
MAX14932CAWE+
MAX14932DASE+
MAX14932DAWE+
MAX14932EASE+
MAX14932EAWE+
MAX14932FASE+
MAX14932FAWE+
MAX14130FAEE+
MAX14130FAEE+T
MAX14131CAEE+
MAX14131FAEE+
MAX14131FAEE+T
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
3/1
3/1
3/1
3/1
3/1
3/1
3/1
3/1
3/1
3/1
3/1
3/1
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
4/0
4/0
3/1
3/1
3/1
1
1
25
25
150
150
1
1
25
25
150
150
1
1
25
25
150
150
1
1
25
25
150
150
1
1
25
25
150
150
1
1
25
25
150
150
150
150
150
150
150
Default High
Default High
Default High
Default High
Default High
Default High
Default Low
Default Low
Default Low
Default Low
Default Low
Default Low
Default High
Default High
Default High
Default High
Default High
Default High
Default Low
Default Low
Default Low
Default Low
Default Low
Default Low
Default High
Default High
Default High
Default High
Default High
Default High
Default Low
Default Low
Default Low
Default Low
Default Low
Default Low
Default Low
Default Low
Default High
Default Low
Default Low
ISOLATION
TEMP RANGE
VOLTAGE (kVRMS)
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
2.75
1
1
1
1
1
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 Narrow SOIC
16 Wide SOIC
16 QSOP
16 QSOP
16 QSOP
16 QSOP
16 QSOP
+Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
PROCESS: BiCMOS
www.analog.com
Analog Devices │ 24
MAX14930–MAX14932,
MAX14130–MAX14131
4-Channel, 1kVRMS and 2.75kVRMS,
Digital Isolators
Revision History
REVISION
NUMBER
REVISION
DATE
0
9/14
Initial release
1
12/14
Changed future product status on several parts in the Ordering Information/Selector
Guide table. Changed “basic insulation” to “single protection” in Safety Regulatory
Approvals table.
2
3/15
Changed future product status for MAX14930FAWE+, MAX14931DASE+, MAX14932AAWE+, MAX14932BASE+, MAX14932DAWE+, MAX14932EAWE+,
and MAX14932FAWE+
22
3
5/15
Added UL/cUL, TUV information, and fixed corresponding isolation parameters
1, 13-14, 16
4
10/15
Added 3.75kV versions: MAX14930FASE+CZ0 and MAX14931FASE+CZ1
1, 13, 14, 1719, 22, 23
5
4/16
Fixed typos, updated Safety Regulatory Approvals table, and updated Ordering Information and Selection Guide
1, 13, 14, 22
6
5/16
Moved TUV information to new IEC Insulation section and updated Ordering Information table
1, 13, 22
7
7/16
Added MAX14130 and MAX14131 versions in QSOP package
8
1/17
Updated Figure 1 text, removed VDE pending status, and removed future product
status from MAX14131FAEE+T and MAX14131FAEE+T
8.1
PAGES
CHANGED
DESCRIPTION
—
13, 22
1–4, 6, 11, 12,
14–16, 19–24
13, 15, 23
Corrected typos
23
Updated General Description, Dynamic Electrical Characteristics (MAX1493_A/D),
Dynamic Electrical Characteristics (MAX1493_B/E), Dynamic Electrical
Characteristics (MAX1493_C/F), Safety Regulatory Approvals, Typical Operating
Circuits, and Layout Considerations sections; added Safety Limits and Product
Selector Guide sections; added new Figure 2–5 and renumbered subsequent figures;
added Table 1 and renumbered subsequent tables; added Product Selector Guide
9
11/20
10
8/21
Updated Benefits and Features section and Insulation Characteristics Table
3/22
Updated Benefits and Features section, DC Electrical Characteristics table, Dynamic
Electrical Characteristics table, MAX14130-14131 Insulation Characteristics table,
1, 6, 11, 12, 13,
Typcial Operating Characteristics, Figure 8, and Figure 9; Added MAX14131CAEE+ to 15, 17, 22, 24
Ordering Information table
11
1, 5–10, 14– 24
1, 15
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is
assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that
may result from its use.Specifications subject to change without notice. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the
property of their respective owners.
w w w . a n a l o g . c o m
Analog Devices │ 25
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