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MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
General Description
The MAX15108A high-efficiency, current-mode, synchronous
step-down switching regulator with integrated power
switches delivers up to 8A of output current. The regulator
operates from 2.7V to 5.5V and provides an output
voltage from 0.6V up to 95% of the input voltage, making
the device ideal for distributed power systems, portable
devices, and preregulation applications.
The IC utilizes a current-mode control architecture with a
high gain transconductance error amplifier. The currentmode control architecture facilitates easy compensation
design and ensures cycle-by-cycle current limit with fast
response to line and load transients.
The low RDS(ON) integrated switches ensure high
efficiency at heavy loads while minimizing critical
inductance, making the layout design a much simpler task
with respect to discrete solutions. The IC’s simple layout
and footprint assures first-pass success in new designs.
The regulator features a 1MHz, factory-trimmed fixedfrequency PWM mode operation. The high switching
frequency, along with the PWM current-mode architecture
allows for a compact, all ceramic capacitor design.
The IC features a capacitor-programmable soft-start
to reduce input inrush current. Internal control circuitry
ensures safe-startup into a prebiased output. Power
sequencing is controlled with the enable input and powergood output.
The IC is available in a 20-bump (4 x 5 array), 2.5mm x
2mm, WLP package and is fully specified over the -40°C
to +105°C temperature range.
Applications
●●
●●
●●
●●
●●
●●
Distributed Power Systems
DDR Memory
Base Stations
Portable Devices
Notebook Power
Server Power
Ordering Information appears at end of data sheet.
19-6702; Rev 2; 1/20
Features
●● Continuous 8A Output Current
●● Efficiency Up to 96%
●● ±1% Accuracy Over Load, Line, and Temperature
●● Operates from a 2.7V to 5.5V Supply
●● Adjustable Output from 0.6V to 0.95 x VIN
●● Programmable Soft-Start
●● Safe Startup into Prebiased Output
●● External Reference Input
●● 1MHz Switching Frequency
●● Stable with Low-ESR Ceramic Output Capacitors
●● Forced PWM Mode
●● Enable Input and Power-Good Output for PowerSupply Sequencing
●● Cycle-by-Cycle Overcurrent Protection
●● Fully Protected Features Against Overcurrent and
Overtemperature
●● Input Undervoltage Lockout
●● 20-Bump (4 x 5 Array), 2.5mm x 2mm, WLP Package
Typical Operating Circuit
LX
2.7V TO
5.5V
EN
IN
PGND
MAX15108A
FB
INX
PGOOD
SS
COMP
OUTPUT
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Absolute Maximum Ratings
IN, PGOOD to PGND...............................................-0.3V to +6V
LX to PGND................................................-0.3V to (VIN + 0.3V)
LX to PGND.................................... -1V to (VIN + 0.3V) for 50ns
EN, COMP, FB, SS to PGND......................-0.3V to (VIN + 0.3V)
Continuous LX Current (Note 1)............................. -12A to +12A
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TBOARD = +70°C)
WLP (derate 31.7mW/°C above TBOARD = +70°C).......1.27W
Operating Temperature Range.......................... -40°C to +105°C
Operating Junction Temperature (Note 2)........................ +125°C
Storage Temperature Range............................. -65°C to +150°C
Soldering Temperature (reflow) (Note 3).......................... +260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 1: LX has internal clamp diodes to PGND and IN. Do not exceed the power dissipation limits of the device when forward
biasing these diodes.
Note 2: Limit the junction temperature to +125°C for continuous operation at full current.
Note 3: The WLP package is constructed using a unique set of package techniques that impose a limit on the thermal profile the
device can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles
recommended in the industry-standard specification JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.
Preheating is required. Hand or wave soldering is not allowed.
Package Thermal Characteristics (Note 4)
WLP
Junction-to-Ambient Thermal Resistance (θJA)........31.5°C/W
Note 4: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VIN = 5V, CSS = 4.7nF, TA = TJ = -40°C to +105°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 4)
PARAMETER
IN Voltage Range
IN Shutdown Supply Current
IN Supply Current
VIN Undervoltage Lockout Threshold
SYMBOL
VIN
IIN
VIN Undervoltage Lockout Hysteresis
ERROR AMPLIFIER
Transconductance
Voltage Gain
FB Set-Point Accuracy
FB Input Bias Current
COMP to Current-Sense
Transconductance
CONDITIONS
MIN
VEN = 0V
VFB
MAX
UNITS
5.5
V
0.3
3
µA
VEN = 5V, VFB = 0.75V, not switching
3.4
6
mA
2.6
2.7
LX stops switching, VIN falling
200
mV
1.4
mS
LX starts switching, VIN rising
gMV
AVEA
TYP
2.7
90
Over line, load, and temperature
IFB
594
600
-100
GMOD
V
dB
606
mV
+100
nA
25
A/V
0.93
V
1
V
14
A
Low-Side Switch Sink
Current-Limit Threshold
14
A
Low-Side Switch Source
Current-Limit Threshold
14
A
COMP Clamp Low
VFB = 0.75V
Compensation RAMP Valley
POWER SWITCHES
High-Side Switch Current-Limit
Threshold
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IHSCL
Maxim Integrated │ 2
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Electrical Characteristics (continued)
(VIN = 5V, CSS = 4.7nF, TA = TJ = -40°C to +105°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 4)
PARAMETER
SYMBOL
LX Leakage Current
CONDITIONS
VEN = 0V
RMS LX Output Current
MIN
TYP
MAX
UNITS
10
µA
8
A
OSCILLATOR
Switching Frequency
Maximum Duty Cycle
Minimum Controllable On-Time
fSW
850
DMAX
1000
1150
kHz
94
%
100
ns
ENABLE
EN Input High Threshold Voltage
VEN rising
EN Input Low Threshold Voltage
EN Input Leakage Current
SS Discharge Resistance
SS Prebias Mode Stop Voltage
V
VEN = 5V
SOFT-START, PREBIAS
Soft-Start Current
1.3
VEN falling
ISS
RSS
VSS = 0.45V, sourcing
ISS = 10mA, sinking
SS rising
0.4
V
1
µA
10
µA
8.5
Ω
0.58
V
8
Events
1024
Clock
Cycles
HICCUP
Number of Consecutive
Current-Limit Events to Hiccup
Timeout
POWER-GOOD OUTPUT
PGOOD Threshold
FB rising
PGOOD Threshold Hysteresis
FB falling
25
PGOOD VOL
IPGOOD = 5mA, VFB = 0.5V
22
PGOOD Leakage
THERMAL SHUTDOWN
0.56
VPGOOD = 5V, VFB = 0.75V
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
0.54
Temperature falling
0.58
V
mV
100
mV
1
µA
+160
°C
25
°C
Note 5: Specifications are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by
design and characterization.
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Maxim Integrated │ 3
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Typical Operating Characteristics
(Circuit of Typical Application Circuit, TA = +25°C, unless otherwise noted.)
70
VOUT = 1.8V
60
VOUT = 0.9V
50
40
VOUT = 1.2V
30
20
VOUT = 1.8V
70
VOUT = 2.5V
VOUT = 1.5V
60
VOUT = 0.9V
50
VOUT = 1.2V
40
30
20
VOUT = 1.5V
1080
1070
1060
1050
1040
1030
1020
1010
1000
10
10
990
0
0
980
1
2
3
4
5
6
8
7
0
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)
1.510
ILOAD = 2A
1.505
1.500
1.495
ILOAD = 8A
1.490
5
6
7
8
3.1
2.7
2.7
3.1
3.9
4.3
4.7
5.1
5.5
INPUT VOLTAGE (V)
1.53
OUTPUT VOLTAGE vs. OUTPUT CURRENT
(PWM MODE, VOUT = 1.5V)
1.52
VIN = 5V
1.51
1.50
VIN = 3.3V
1.49
3.5
3.9
4.3
4.7
5.1
5.5
1.47
0
1
2
3
4
LOAD-TRANSIENT RESPONSE
(VIN = 5V, VOUT = 1.5V)
VOUT
50mV/div
AC-COUPLED
0.1
0
-0.1
8A
ILOAD
2A/div
VOUT = 0.9V
VOUT = 1.5V
4A
VOUT = 1.8V
2.7
3.1
3.5
8
MAX15108A toc07
VOUT = 1.2V
VOUT = 2.5V
-0.4
7
OUTPUT VOLTAGE ERROR %
vs. SUPPLY VOLTAGE
0.2
-0.3
6
OUTPUT CURRENT (A)
NORMALIZED AT VIN = 3.3V
-0.2
5
SUPPLY VOLTAGE (V)
0.3
-0.5
3.5
MAX15108A toc06
OUTPUT VOLTAGE ERROR (%)
0.4
4
1.48
1.485
0.5
3
OUTPUT VOLTAGE vs. SUPPLY VOLTAGE
(PWM MODE, VOUT = 1.5V)
1.515
1.480
2
OUTPUT CURRENT (A)
MAX15108A toc04
1.520
1
OUTPUT VOLTAGE (V)
0
MAX15108A toc03
VOUT = 3.3V
80
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX15108A toc05
VOUT = 2.5V
90
EFFICIENCY (%)
EFFICIENCY (%)
80
100
SWITCHING FREQUENCY (kHz)
90
MAX15108A toc01
100
EFFICIENCY vs. OUTPUT CURRENT
(VIN = 3.3V, PWM MODE)
MAX15108A toc02
EFFICIENCY vs. OUTPUT CURRENT
(VIN = 5V, PWM MODE)
ILOAD = 8A
3.9
4.3
4.7
5.1
5.5
40µs/div
SUPPLY VOLTAGE (V)
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Maxim Integrated │ 4
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Typical Operating Characteristics (continued)
(Circuit of Typical Application Circuit, TA = +25°C, unless otherwise noted.)
SWITCHING WAVEFORMS
(IOUT = 8A, VIN = 5V)
SHUTDOWN WAVEFORM (ILOAD = 8A)
MAX15108A toc08
MAX15108A toc09
VOUT
10mV/div
AC-COUPLED
VEN
2V/div
VLX
5V/div
ILX
5A/div
ILX
5A/div
VLX
2V/div
VOUT
400ns/div
VPGOOD
1V/div
10µs/div
SOFT-START WAVEFORMS (ILOAD = 8A)
VLX
2V/div
ILX
5A/div
VOUT
1V/div
VPGOOD
2V/div
2.0
1.6
1.2
0.8
0.4
0
1ms/div
MAX15108A toc11
VEN
2V/div
INPUT SHUTDOWN CURRENT (µA)
MAX15108A toc10
INPUT SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
5.1
5.5
SUPPLY VOLTAGE (V)
MAX15108A toc12
1.0
IIN
2A/div
VOUT
1V/div
VOUT = 0V ONLY IN A SHORT
IOUT
10A/div
400µs/div
RMS INPUT CURRENT (A)
0.9
MAX15108A toc13
RMS INPUT CURRENT
vs. SUPPLY VOLTAGE
OVERLOAD HICCUP MODE
SHORT-CIRCUIT ON OUTPUT
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
2.7
3.1
3.5
3.9
4.3
4.7
SUPPLY VOLTAGE (V)
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Maxim Integrated │ 5
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Typical Operating Characteristics (continued)
(Circuit of Typical Application Circuit, TA = +25°C, unless otherwise noted.)
FB VOLTAGE vs. TEMPERATURE
(VOUT = 1.5V)
SOFT-START (PWM MODE)
MAX15108A toc15
MAX15108A toc14
0.615
NO LOAD
FB VOLTAGE (V)
0.610
VSS
500mV/div
VOUT
1V/div
0.605
ILX
2A/div
0.600
VIN = 3.3V, PWM MODE
0.595
0.585
VPGOOD
2V/div
VIN = 5V, PWM MODE
0.590
-40
-15
10
35
65
60
400µs/div
TEMPERATURE (°C)
ENABLE INTO PREBIASED 0.5V OUTPUT
(NO LOAD, PWM MODE)
ENABLE INTO PREBIASED 0.5V OUTPUT
(8A LOAD, PWM MODE)
MAX15108A toc17
MAX15108A toc16
VEN
2V/div
VEN
2V/div
VOUT
1V/div
VOUT
1V/div
ILX
2A/div
ILX
5A/div
VPGOOD
2V/div
VPGOOD
2V/div
400µs/div
400µs/div
SAFE OPERATING AREA (SOA)
(NO AIRFLOW, NO HEATSINK TA = 105°C, VIN = 5.0V)
OUTPUT VOLTAGE (V)
3.5
3
2.5
2
1.5
1
0.5
5
5.5
6
6.5
7
7.5
8
8.5
9
OUTPUT CURRENT (A)
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Maxim Integrated │ 6
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Pin Configuration
BUMP VIEW
MAX15108A
5
4
3
2
1
PGND
PGOOD
LX
LX
PGND
A
FB
I.C.
IN
LX
PGND
B
SS
I.C.
IN
LX
PGND
C
COMP
EN
IN
INX
PGND
D
WLP
Pin Description
BUMP
NAME
FUNCTION
A1, A5, B1,
C1, D1
PGND
Power Ground. Low-side switch source terminal. Connect PGND and the return terminals of input
and output capacitors to the power ground plane.
A2, A3,
B2, C2
LX
Inductor Connection. Connect LX to the switching side of the inductor. LX is high impedance when
the device is in shutdown mode.
A4
PGOOD
B3, C3, D3
IN
Input Power Supply. Input supply range is 2.7V to 5.5V. Bypass IN with a minimum 10µF ceramic
capacitor to PGND. See the Typical Application Circuit.
B4, C4
I.C.
Internally Connected. Leave unconnected.
B5
FB
Feedback Input. Connect FB to the center tap of an external resistive voltage-divider from the
output to PGND to set the output voltage from 0.6V to 95% of VIN.
C5
SS
Soft-Start. Connect a capacitor from SS to PGND to set the startup time. See the Setting the
Soft-Start Startup Time section for details on setting the soft-start time. SS is also an external
reference input. Apply an external voltage reference from 0V to VIN - 1.5V to drive soft-start
externally.
D2
INX
Input Bump for Control Section. Connect to IN.
D4
EN
Enable Input. EN is a digital input that turns the regulator on and off. Drive EN high to turn on the
regulator. Connect to IN for always-on operation.
D5
COMP
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Open-Drain Power-Good Output. PGOOD goes low when VFB is below 530mV.
Error Amplifier Output. Connect compensation network from COMP to signal ground (SGND). See
the Compensation Design Guidelines section.
Maxim Integrated │ 7
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Functional Diagram
MAX15108A
EN
IN
INX
BIAS
GENERATOR
SHDN
EN LOGIC, IN UVLO
THERMAL SHDN
HIGH-SIDE
CURRENT LIMIT
VOLTAGE
REFERENCE
CURRENT-SENSE
AMPLIFIER
IN
LX
LX
IN
STRONG PREBIAS
FORCED_START
0.58V
CONTROL
LOGIC
SS
LX
CK
SS BUFFER
IN
0.6V
10µA
PGND
ERROR
AMPLIFIER
FB
Σ
GROUND SENSE
BUFFER
COMP
LOW-SIDE
SOURCE-SINK CURRENT LIMIT
AND ZERO-CROSSING
COMPARATOR
RAMP
OSCILLATOR
RAMP GEN
CK
POWER-GOOD
COMPARATOR
SINK
SOURCE
PGOOD
0.555V RISING,
0.53V FALLING
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Maxim Integrated │ 8
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Detailed Description
The MAX15108A high-efficiency, current-mode switching
regulator delivers up to 8A of output current. The regulator
provides output voltages from 0.6V to (0.95 x VIN) with
2.7V to 5.5V input supplies, making the device ideal for
on-board point-of-load applications.
The IC delivers current-mode control architecture using a
high gain transconductance error amplifier. The currentmode control architecture facilitates easy compensation
design and ensures cycle-by-cycle current limit with fast
response to line and load transients.
The regulator features a 1MHz fixed switching frequency,
allowing for all-ceramic capacitor designs with fast transient responses. The high operating frequency minimizes
the size of external components. The IC is available in a
2.5mm x 2mm (4 x 5 array), 0.5mm pitch WLP package.
The low RDS(ON) integrated switches ensure high efficiency at heavy loads while minimizing critical inductance,
making the layout design a much simpler task than that
of discrete solutions. The IC’s simple layout and footprint
assure first-pass success in new designs.
The IC features PWM current-mode control, allowing for
an all-ceramic capacitor solution. The regulator offers
capacitor-programmable soft-start to reduce input inrush
current. The device safely starts up into a prebiased
output. The IC includes an enable input and open-drain
PGOOD output for sequencing with other devices.
Controller Function—PWM Logic
The controller logic block determines the duty cycle of the
high-side MOSFET under different line, load, and temperature conditions. Under normal operation, where the
current-limit and temperature protection are not triggered,
the controller logic block takes the output from the PWM
comparator to generate the driver signals for both high-side
and low-side MOSFETs. The control logic block controls
the break-before-make logic and all the necessary timing.
The high-side MOSFET turns on at the beginning of the
oscillator cycle and turns off when the COMP voltage
crosses the internal current-mode ramp waveform. The
internal ramp is the sum of the compensation ramp and
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the current-mode ramp derived from the inductor current
(current sense block). The high-side MOSFET also turns
off if the maximum duty cycle exceeds 95%, or when the
current limit is reached. The low-side MOSFET turns on
for the remainder of the switching cycle.
Starting into a Prebiased Output
The IC can soft-start into a prebiased output without discharging the output capacitor. In safe prebiased startup,
both low-side and high-side MOSFETs remain off to avoid
discharging the prebiased output. PWM operation starts
when the voltage on SS crosses the voltage on FB.
The IC can start into a prebiased voltage higher than the
nominal set point without abruptly discharging the output.
Forced PWM operation starts when the SS voltage reaches 0.58V, forcing the converter to start. When the low-side
sink current-limit threshold of 1A is reached, the low-side
switch turns off before the end of the clock period. The
low-side sink current limit is 1A. The high-side switch
turns on until one of the following conditions is satisfied:
• High-side source current hits the reduced high-side
current limit (14A). The high-side switch turns off for
the remaining time of clock period.
• The clock period ends.
Reduced high-side current limit is activated in order to
recirculate the current into the high-side power switch
rather than into the internal high-side body diode, which
can cause damage to the device. The high-side current
limit is set to 14A.
Low-side sink current limit protects the low-side switch
from excessive reverse current during prebiased
operation.
Enable Input
The IC features independent device enable control and
power-good signal that allow for flexible power sequencing. Drive the enable input (EN) high to enable the
regulator, or connect EN to IN for always-on operation.
Power-good (PGOOD) is an open-drain output that deasserts when VFB is above 555mV, and asserts low if VFB
is below 530mV.
Maxim Integrated │ 9
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Programmable Soft-Start (SS)
The IC utilizes a soft-start feature to slowly ramp up the
regulated output voltage to reduce input inrush current
during startup. Connect a capacitor from SS to SGND to
set the startup time. See the Setting the Soft-Start Startup
Time section for capacitor selection details.
Error Amplifier
A high-gain error amplifier provides accuracy for the
voltage feedback loop regulation. Connect a compensation network between COMP and SGND. See the
Compensation Design Guidelines section. The error
amplifier transconductance is 1.4mS. COMP clamp low
is set to 0.93V, just below the PWM ramp compensation
valley, helping COMP to rapidly return to the correct set
point during load and line transients.
PWM Comparator
The PWM comparator compares COMP voltage to the
current-derived ramp waveform (LX current to COMP voltage transconductance value is 25A/V). To avoid instability
due to subharmonic oscillations when the duty cycle is
around 50% or higher, a compensation ramp is added to
the current-derived ramp waveform. The compensation
ramp slope (0.3V x 1MHz = 0.3V/µs) is equivalent to half
of the inductor current down-slope in the worst case (load
2A, current ripple 30% and maximum duty-cycle operation
of 95%). The compensation ramp valley is set to 1V.
Overcurrent Protection and Hiccup
When the converter output is connected to ground or the
device is overloaded, each high-side MOSFET currentlimit event (14A) turns off the high-side MOSFET and
turns on the low-side MOSFET. A 3-bit counter increments on each current-limit event. The counter is reset
after three consecutive events of high-side MOSFET
turn-on without reaching the current limit. If the currentlimit condition persists, the counter fills up reaching eight
events. The control logic then discharges SS, stops both
high-side and low-side MOSFETs and waits for a hiccup
period (1024 clock cycles) before attempting a new softstart sequence. The hiccup-mode also operates during
soft-start.
Thermal Shutdown Protection
The IC contains an internal thermal sensor that limits
the total power dissipation to protect it in the event of an
extended thermal fault condition. When the die temperature exceeds +160°C, the thermal sensor shuts down the
device, turning off the DC-DC converter to allow the die
to cool. After the die temperature falls by 25°C, the device
restarts, following the soft-start sequence.
Applications Information
Setting the Output Voltage
Connect a voltage-divider (R1 and R2, see Figure 1) from
OUT to FB to PGND to set the DC-DC converter output
voltage. Choose R1 and R2 so that the DC errors due to
the FB input bias current do not affect the output-voltage
precision. With lower value resistors, the DC error is
reduced, but the amount of power consumed in the resistive divider increases. A typical tradeoff value for R2 is
5kΩ, but values between 1kΩ and 20kΩ are acceptable.
Once R2 is chosen, calculate R1 using:
VOUT
R=
- 1
1 R2 ×
VFB
where the feedback threshold voltage VFB = 0.6V.
Inductor Selection
A large inductor value results in reduced inductor ripple
current, leading to a reduced output ripple voltage. A highvalue inductor is of a larger physical size with a higher
series resistance (DCR) and a lower saturation current
rating. Choose inductor values to produce a ripple current
equal to 30% of the load current.
Choose the inductor with the following formula:
=
L
V
VOUT
× 1- OUT
f SW × ∆IL
VIN
where fSW is the internally fixed 1MHz switching frequency, and ∆IL is the estimated inductor ripple current
(typically set to 0.3 x ILOAD). In addition, the peak inductor current, IL_PK, must always be below the high-side
current-limit value, IHSCL, and the inductor saturation
current rating, IL_SAT.
Ensure that the following relationship is satisfied:
IL_PK
= ILOAD +
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1
× ∆IL < MIN(IHSCL ,IL_SAT )
2
Maxim Integrated │ 10
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Input Capacitor Selection
For a step-down converter, the input capacitor CIN helps
to keep the DC input voltage steady, in spite of discontinuous input AC current. Use low-ESR capacitors to
minimize the voltage ripple due to ESR.
Size CIN using the following formula:
=
C IN
Setting the Soft-Start Startup Time
The soft-start feature ramps up the output voltage slowly,
reducing input inrush current during startup. Size the CSS
capacitor to achieve the desired soft-start time, tSS, using:
ILOAD
V
× OUT
f SW × ∆VIN_RIPPLE
VIN
× t SS
I
C SS = SS
VFB
Make sure that the selected capacitance can accommodate the input ripple current given by:
IRMS
=
Select the output capacitors to produce an output ripple
voltage that is less than 2% of the set output voltage.
IO ×
VOUT × (VIN - VOUT )
VIN
ISS, the soft-start current, is 10µA, and VFB, the output
feedback voltage threshold, is 0.6V. When using large
COUT capacitance values, the high-side current limit can
trigger during the soft-start period. To ensure the correct
soft-start time, tSS, choose CSS large enough to satisfy:
If necessary, use multiple capacitors in parallel to meet
the RMS current rating requirement.
Output Capacitor Selection
Use low-ESR ceramic capacitors to minimize the voltage
ripple due to ESR. Use the following formula to estimate
the total output voltage peak-to-peak ripple:
∆VOUT=
VOUT × I SS
(IHSCL_MIN - I OUT ) × VFB
IHSCL_MIN is the minimum high-side switch current-limit
value.
VOUT VOUT
1
× 1
× R ESR_COUT +
f SW × L
VIN
8 × f SW × C OUT
POWER MODULATOR
ERROR AMPLIFIER
FEEDBACK
DIVIDER
COMPENSATION
RAMP
VOUT
R1
C SS >> C OUT ×
Σ
FB
VIN
gMC
COMP
QHS
LO
CONTROL
LOGIC
R2
ROUT
gMV
RC
OUTPUT FILTER
AND LOAD
PWM
COMPARATOR
*CCC
QLS
VOUT
DCR
IL
ESR
RLOAD
COUT
CC
VCOMP
ROUT = AVEA/gMV
REF
*CCC IS OPTIONAL.
GMOD
VOUT
IL
NOTE: THE GMOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF
THE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS A
SIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE.
Figure 1. Peak Current-Mode Regulator Transfer Model
www.maximintegrated.com
Maxim Integrated │ 11
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
An external tracking reference with steady-state value
between 0V and VIN - 1.5V can be applied to SS. In this
case, connect an RC network from external tracking reference and SS as in Figure 2. Set RSS to approximately
1kΩ. In this application, RSS is needed to ensure that,
during hiccup period, SS can be internally pulled down.
When an external reference is connected to SS, the softstart must be provided externally.
Compensation Design Guidelines
The IC uses a fixed-frequency, peak-current-mode control
scheme to provide easy compensation and fast transient
response. The inductor peak current is monitored on a
cycle-by-cycle basis and compared to the COMP voltage
(output of the voltage error amplifier). The regulator’s
duty cycle is modulated based on the inductor’s peak
current value. This cycle-by-cycle control of the inductor
current emulates a controlled current source. As a result,
the inductor’s pole frequency is shifted beyond the gain
bandwidth of the regulator. System stability is provided
with the addition of a simple series capacitor-resistor from
COMP to PGND. This pole-zero combination serves to
tailor the desired response of the closed-loop system. The
basic regulator loop consists of a power modulator (comprising the regulator’s pulse-width modulator, compensation ramp, control circuitry, MOSFETs, and inductor),
the capacitive output filter and load, an output feedback
divider, and a voltage-loop error amplifier with its associated compensation circuitry. See Figure 1.
The average current through the inductor is expressed as:
VREF_EXT
For a buck converter:
=
VOUT R LOAD × IL
where RLOAD is the equivalent load resistor value.
Combining the above two relationships, the power modulator’s transfer function in terms of VOUT with respect to
VCOMP is:
VOUT
R LOAD × IL
=
= R LOAD × G MOD
VCOMP
IL
G MOD
Having defined the power modulator’s transfer function
gain, the total system loop gain can be written as follows
(see Figure 1):
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SS
CSS
MAX15108A
Figure 2. Setting Soft-Start Time
α=
R OUT × (sC CR C + 1)
s(C C + C CC )(R C + R OUT ) + 1 ×
s(C C || C CC )(R C || R OUT ) + 1
=
β G MOD × R LOAD ×
=
Gain
(sC OUTESR + 1)
sC OUT (ESR + R LOAD ) + 1
R2
A
× VEA × α × β
R 1 + R 2 R OUT
where ROUT is the quotient of the error amplifier’s DC
gain, AVEA, divided by the error amplifier’s transconductance, gMV; ROUT is much larger than RC.
R2
V
= FB
R 1 + R 2 VOUT
Also, CC is much larger than CCC, therefore:
C C + C CC ≈ C C
=
IL G MOD × VCOMP
where IL is the average inductor current and GMOD is the
power modulator’s transconductance.
RSS
and
C C || C CC ≈ C CC
Rewriting:
(sC CR C + 1)
VFB
×
Gain =
A VEA ×
VOUT
A VEA
sC
1
sC
R
1
+
×
+
C
( CC C )
g MV
G MOD R LOAD ×
(sC OUTESR + 1)
sC OUT (ESR + R LOAD ) + 1
The dominant poles and zeros of the transfer loop gain
are shown below:
f P1 =
g MV
AVEA
_dB/20 × C
2π × 10
C
Maxim Integrated │ 12
MAX15108A
f P2 =
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
1
2π × C OUT (ESR + R LOAD )
f P3 =
f Z1 =
f Z2 =
1
2π × C CCR C
1
2π × C CR C
1
2π × C OUTESR
The order of pole-zero occurrence is:
f P1 < f P2 < f Z1 < f Z2 ≤ f P3
Under heavy load, fP2, approaches fZ1. A graphical representation of the asymptotic system closed-loop response,
including dominant pole and zero locations is shown in
Figure 3.
If COUT is large, or exhibits a lossy equivalent series resistance
(large ESR), the circuit’s second zero might come into play
around the crossover frequency (fCO = ω/2π). In this case,
a third pole can be induced by a second (optional) small
compensation capacitor (CCC), connected from COMP
to PGND. The loop response’s fourth asymptote (in bold,
Figure 3) is the one of interest in establishing the desired
crossover frequency (and determining the compensation
component values). A lower crossover frequency provides for stable closed-loop operation at the expense of
a slower load and line transient response. Increasing the
crossover frequency improves the transient response at
the (potential) cost of system instability. A standard rule of
thumb sets the crossover frequency ≤ 1/10th of the switching frequency. First, select the passive and active power
components that meet the application’s requirements.
Then, choose the small-signal compensation components
to achieve the desired closed-loop frequency response
and phase margin as outlined in the Closing the Loop:
Designing the Compensation Circuitry section.
1ST ASYMPTOTE
VFB x VOUT -1 x 10AVEA[dB]/20 x GMOD x RLOAD
GAIN
2ND ASYMPTOTE
VFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD
3RD ASYMPTOTE
VFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD x (COUT(ESR + RLOAD))-1
4TH ASYMPTOTE
VFB x VOUT -1 x gMV x RC x GMOD x RLOAD x (COUT(ESR + RLOAD))-1
3RD POLE
(CCCRC)-1
2ND ZERO
(COUTESR)-1
UNITY
1ST POLE
gMV x (10AVEA[dB]/20 CC)-1
RAD/S
1ST ZERO
(CCRC)-1
CO
2ND POLE
(COUT(ESR + RLOAD))-1
5TH ASYMPTOTE
VFB x VOUT -1 x gMV x RC x GMOD x (ESR || RLOAD)
6TH ASYMPTOTE
VFB x VOUT -1 x gMV x (CCC)-1 x GMOD x (ESR || RLOAD)
Figure 3. Asymptotic Loop Response of Peak Current-Mode Regulator
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Maxim Integrated │ 13
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Closing the Loop:
Designing the Compensation Circuitry
Select the desired crossover frequency. Choose fCO
approximately 1/10th of the switching frequency fSW, or
fCO ≈ 100kHz.
Select RC using the transfer-loop’s fourth asymptote gain
(assuming fCO > fP1, fP2, and fZ1 and setting the overall
loop gain to unity) as follows:
=
1
VFB
× g MV × R C × G MOD × R LOAD ×
VOUT
1
2π × f CO × C OUT × (ESR + R LOAD )
Therefore:
VOUT 2π × f CO × C OUT × (ESR + R LOAD )
=
RC
×
VFB
g MV × G MOD × R LOAD
For RLOAD much greater than ESR, the equation can be
further simplified as follows:
=
RC
VOUT 2π × f CO × C OUT
×
VFB
g MV × G MOD
where VFB is equal to 0.6V.
Determine CC by selecting the desired first system zero,
fZ1, based on the desired phase margin. Typically, setting
fZ1 below 1/5th of fCO provides sufficient phase margin.
=
f Z1
f
1
≤ CO
2π × C CR C
5
Therefore:
CC ≥
5
2π × f CO × R C
If the ESR output zero is located at less than one-half the
switching frequency, use the (optional) secondary compensation capacitor, CCC, to cancel it, as follows:
1
1
= f=
P3 f=
Z2
2π × C CCR C
2π × C OUTESR
Therefore:
C CC =
www.maximintegrated.com
C OUT × ESR
RC
If the ESR zero exceeds 1/2 the switching frequency, use
the following equation:
=
f P3
f
1
= SW
2π × C CCR C
2
Therefore:
C CC =
2
2π × f SW × R C
Overall CCC detracts from the overall system phase
margin. Place this third pole well beyond the desired
crossover frequency to minimize the interaction with the
system loop response at crossover. Ignore CCC in these
calculations if CCC is smaller than 10pF.
Power Dissipation
The IC is available in a 20-bump WLP package and can
dissipate up to 745.5mW at +70°C board temperature.
When the die temperature exceeds +160°C, the thermal- shutdown protection is activated. See the Thermal
Shutdown Protection section.
Layout Procedure
Careful PCB layout is critical to achieve clean and stable
operation. It is highly recommended to duplicate the
MAX15108A evaluation kit layout for optimum performance. If deviation is necessary, follow these guidelines
for good PCB layout:
1) Connect input and output capacitors to the power
ground plane.
2) Place bypass capacitors as close to IN and the softstart capacitor as close to SS as possible.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the output
capacitors, and the input capacitors.
4) Connect IN, LX, and PGND separately to a large
copper area to help cool the IC to further improve
efficiency.
5) Ensure all feedback connections are short and direct.
Place the feedback resistors and compensation components as close as possible to the IC.
6) Route high-speed switching nodes (such as LX) away
from sensitive analog areas (such as FB, COMP,
SGND, and SS). See the MAX15108A EV kit layout for
a tested layout example.
Maxim Integrated │ 14
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Typical Application Circuit
LX
EN
VIN
2.7V TO 5.5V
CIN2
22µF
CIN2
22µF
VOUT
OUTPUT
LOUT
0.33µH
COUT1
47µF
COUT1
0.1µF
COUT2
47µF
PGND
IN
S
MAX15108A
RPULL
100kΩ
INX
FB
R1
8.06kΩ
PGOOD
OPTIONAL
EXTERNAL
REFERENCE
COMP
REXT_REF
1kΩ
REA
2.43kΩ
SS
CSS
33nF
CEA2
100pF
S
R2
5.36kΩ
CEA
4700pF
S
S = "SGND", FOR SMALL-SIGNAL RETURN ONLY.
Ordering Information
PART
TEMP RANGE
MAX15108AEWP+
-40°C to +105°C
Package Information
PIN-PACKAGE
20 WLP
+Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
PROCESS: BiCMOS
www.maximintegrated.com
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
20 WLP
W202D2Z+1
21-0505
Refer to
Application
Note 1891
Maxim Integrated │ 15
MAX15108A
High-Efficiency, 8A, Current-Mode
Synchronous Step-Down Switching Regulator
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
6/13
Initial release
1
5/16
Changed max operating temperature and added Safe Operating Area to Typical
Operating Characteristics section
2
1/20
Corrected the LX connections in the Functional Diagram
DESCRIPTION
—
1-2,
6, 15
8
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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