19-0882; Rev 0; 7/07
Low-Power Battery Backup
Circuits in Small µDFN Packages
The MAX16033–MAX16040 supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery control functions
in microprocessor (µP) systems. The devices significantly improve system reliability and accuracy compared to other ICs or discrete components. The
MAX16033–MAX16040 provide µP reset, backup-battery switchover, power-fail warning, watchdog, and
chip-enable gating features.
The MAX16033–MAX16040 operate from supply voltages up to 5.5V. The factory-set reset threshold voltage
ranges from 2.32V to 4.63V. The devices feature a manual-reset input (MAX16033/MAX16037), a watchdog
timer input (MAX16034/MAX16038), a battery-on output
(MAX16035/MAX16039), an auxiliary adjustable reset
input (MAX16036/MAX16040), and chip-enable gating
(MAX16033–MAX16036). Each device includes a
power-fail comparator and offers an active-low pushpull reset or an active-low open-drain reset.
The MAX16033–MAX16040 are available in 2mm x
2mm, 8-pin or 10-pin µDFN packages and are fully
specified from -40°C to +85°C.
Features
o Low 1.2V Operating Supply Voltage
o Precision Monitoring of 5.0V, 3.3V, 3.0V, and 2.5V
Power-Supply Voltages
o Independent Power-Fail Comparator
o Debounced Manual-Reset Input
o Watchdog Timer, 1.6s Timeout
o Battery-On Output Indicator
o Auxiliary User-Adjustable RESETIN
o Low 13µA Quiescent Supply Current
o Two Available Output Structures:
Active-Low Push-Pull Reset
Active-Low Open-Drain Reset
o Active-Low Reset Valid Down to 1.2V
o Power-Supply Transient Immunity
o 140ms (min) Reset Timeout Period
o Small 2mm x 2mm, 8-Pin and 10-Pin µDFN
Packages
Ordering Information
PART*
Applications
Portable/BatteryPowered Equipment
PINPACKAGE
PKG
CODE
Controllers
MAX16033LLB_ _+T
Computers
MAX16033PLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
MAX16034LLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
MAX16034PLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
POS Equipment
Fax Machines
Critical µP/µC Power
Monitoring
Industrial Control
Set-Top Boxes
TEMP RANGE
Real-Time Clocks
Intelligent Instrument
Pin Configurations and Typical Operating Circuit appear at
end of data sheet.
-40°C to +85°C 10 µDFN-10 L1022-1
Ordering Information continued on last page.
*These parts offer a choice of reset threshold voltages. From the
Reset Threshold Ranges table, insert the desired threshold voltage code in the blank to complete the part number. See Selector
Guide for a listing of device features.
+Denotes a lead-free package.
T = Tape and reel.
Selector Guide
PART
MR
MAX16033_
✓
WATCHDOG
BATTON
MAX16040_
PIN-PACKAGE
✓
✓
10 µDFN-10
✓
✓
10 µDFN-10
✓
✓
10 µDFN-10
✓
MAX16036_
MAX16039_
PFI, PFO
✓
MAX16035_
MAX16038_
CEIN/CEOUT
✓
MAX16034_
MAX16037_
RESETIN
✓
✓
✓
✓
✓
✓
10 µDFN-10
✓
8 µDFN-8
✓
8 µDFN-8
✓
8 µDFN-8
✓
8 µDFN-8
Note: Replace “_” with L for push-pull or P for open-drain RESET and PFO outputs.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX16033–MAX16040
General Description
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
ABSOLUTE MAXIMUM RATINGS
Terminal Voltages (with respect to GND)
VCC, BATT, OUT .......................................................-0.3V to +6V
RESET (open drain), PFO (open drain) ....................-0.3V to +6V
RESET (push-pull), PFO (push-pull), BATTON, RESETIN, WDI
MR, CEIN, CEOUT, PFI ............................-0.3V to (VOUT + 0.3V)
Input Current
VCC Peak..............................................................................1A
VCC Continuous ............................................................250mA
BATT Peak ....................................................................250mA
BATT Continuous ............................................................40mA
GND ................................................................................75mA
Output Current
OUT ..................................Short-Circuit Protected for up to 5s
RESET, BATTON .............................................................20mA
Continuous Power Dissipation (TA = +70°C)
8-Pin µDFN (derate 4.8mW/°C above +70°C) ..........380.6mW
10-Pin µDFN (derate 5mW/°C above +70°C) ...........402.8mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 2.25V to 5.5V, VBATT = 3V, RESET not asserted, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER
Operating Voltage Range
Supply Current
SYMBOL
VCC, VBATT
ICC
CONDITIONS
No load (Note 2)
No load, VCC > VTH
VBATT = 2.8V,
VCC = 0V,
excluding IOUT
Supply Current in Battery
Backup Mode
BATT Standby Current (Note 3)
IBATT
VCC to OUT On-Resistance
RON
MIN
(VBATT + 0.2V) < VCC
< 5.5V
TYP
0
Battery-Switchover Threshold
2
VOUT
VSW
UNITS
5.5
V
VCC = 2.8V
13
30
VCC = 3.6V
16
35
VCC = 5.5V
22
50
TA = +25°C
1
TA = -40°C to +85°C
2
TA = +25°C
-0.1
+0.02
TA = -40°C to +85°C
-0.3
+0.02
VCC = 4.75V, VCC > VTH, IOUT = 150mA
3.1
VCC = 3.15V, VCC > VTH, IOUT = 65mA
3.7
µA
Ω
4.6
VBATT = 4.50V, VCC = 0V, IOUT = 20mA
VBATT
- 0.2
VBATT = 3.15V, VCC = 0V, IOUT = 10mA
VBATT
- 0.15
VBATT = 2.5V, VCC = 0V, IOUT = 5mA
VBATT
- 0.15
VCC - VBATT, VCC < VTH
µA
µA
VCC = 2.5V, VCC > VTH, IOUT = 25mA
Output Voltage in Battery
Backup Mode
MAX
V
VCC rising
0
VCC falling
-40
_______________________________________________________________________________________
mV
Low-Power Battery Backup
Circuits in Small µDFN Packages
(VCC = 2.25V to 5.5V, VBATT = 3V, RESET not asserted, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MAX160_ _ _L_46
4.50
4.63
4.75
MAX160_ _ _L_44
4.25
4.38
4.50
MAX160_ _ _L_31
3.00
3.08
3.15
MAX160_ _ _L_29
2.85
2.93
3.00
MAX160_ _ _L_26
2.55
2.63
2.70
MAX160_ _ _L_23
2.25
2.32
2.38
UNITS
RESET OUTPUT
Reset Threshold
VTH
VCC Falling Reset Delay
Reset Active Timeout Period
VCC falling at 10V/ms
tRP
25
140
µs
280
ISINK = 1.6mA, VCC > 2.1V
0.3
ISINK = 100µA, VCC > 1.2V
0.4
RESET Output Low Voltage
VOL
RESET asserted
RESET Output High Voltage
VOH
MAX160_ _L only (push-pull), RESET not
asserted, ISOURCE = 500µA, VCC > VTH(MAX)
RESET Output Leakage
Current
ILKG
MAX160_ _P only (open drain), not asserted
VPFI
VPFI falling
1.185
VPFI = 0V or VCC
-100
V
0.8 x
VCC
ms
V
V
1
µA
1.285
V
+100
nA
POWER-FAIL COMPARATOR
PFI Input Threshold
PFI Hysteresis
1.235
1
PFI Input Current
%
VCC > 2.1V, ISINK = 1.6mA
0.3
VCC > 1.2V, ISINK = 100µA
0.4
PFO Output Low Voltage
VOL
Output asserted
PFO Output High Voltage
VOH
MAX160_ _L only (push-pull), VCC > VTH(MAX),
ISOURCE = 500µA, output not asserted
PFO Leakage Current
MAX160_ _P only (open drain), VPFO = 5.5V,
not asserted
PFO Delay Time
VPFI + 100mV to VPFI - 100mV
0.8 x
VCC
V
V
1
4
µA
µs
MANUAL RESET (MAX16033/MAX16037)
0.3 x
VCC
VIL
MR Input Voltage
VIH
Pullup Resistance to VCC
20
Minimum Pulse Width
1
Glitch Immunity
MR to Reset Delay
V
0.7 x
VCC
VCC = 3.3V
165
kΩ
µs
100
ns
120
ns
_______________________________________________________________________________________
3
MAX16033–MAX16040
ELECTRICAL CHARACTERISTICS (continued)
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.25V to 5.5V, VBATT = 3V, RESET not asserted, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.00
1.65
2.25
s
WATCHDOG (MAX16034/MAX16038)
Watchdog Timeout Period
tWD
Minimum WDI Input Pulse Width
tWDI
(Note 4)
100
ns
0.3 x
VCC
VIL
WDI Input Voltage
V
0.7 x
VCC
VIH
WDI Input Current
-1.0
+1.0
µA
BATTON (MAX16035/MAX16039)
Output Voltage
VOL
ISINK = 3.2mA, VBATT = 2.1V
0.4
Sink current, VCC = 5V
Output Short-Circuit Current
60
Source current, VBATT > 2V
V
mA
10
30
120
µA
1.185
1.235
1.285
V
0.01
25
nA
RESETIN (MAX16036/MAX16040)
RESETIN Threshold
VRTH
RESETIN Input Current
RESETIN to Reset Delay
(VRTH + 100mV) to (VRTH - 100mV)
1.5
µs
CHIP-ENABLE GATING (MAX16033–MAX16036)
CEIN Leakage Current
RESET asserted
±1
µA
CEIN to CEOUT Resistance
RESET not asserted, VCC = VTH(MAX),
VCEIN = VCC / 2, ISINK = 10mA
100
Ω
CEOUT Short-Circuit Current
RESET asserted, VCEOUT = 0V
mA
CEIN to CEOUT Propagation
Delay (Note 4)
50Ω source impedance driver,
CLOAD = 50pF
1
2.0
VCC = 4.75V
1.5
7
VCC = 3.15V
2
9
VCC = 5V, VCC > VBATT, ISOURCE = 100µA
0.7 x
VCC
VCC = 0V, VBATT > 2.2V, ISOURCE = 1µA
VBATT
- 0.1
CEOUT Output-Voltage High
RESET to CEOUT Delay
Note 1:
Note 2:
Note 3:
Note 4:
4
ns
V
1
All devices are 100% production tested at TA = +25°C. All overtemperature limits are guaranteed by design.
VBATT can be 0V any time, or VCC can go down to 0V if VBATT is active (except at startup).
Positive current flows into BATT.
Guaranteed by design.
_______________________________________________________________________________________
µs
Low-Power Battery Backup
Circuits in Small µDFN Packages
16
15
14
13
12
0.7
0.6
0.5
0.4
0.3
0.2
0.1
10
0
10
35
85
60
MAX16033 toc03
VBATT = 2V
7
6
5
4
3
2
VBATT = 5V
VBATT = 3V
1
-15
10
35
-40
85
60
-15
10
35
85
60
TEMPERATURE (°C)
VCC-TO-OUT ON-RESISTANCE
vs. TEMPERATURE
RESET TIMEOUT PERIOD
vs. TEMPERATURE
VCC-TO-RESET PROPAGATION DELAY
vs. TEMPERATURE
VCC = 4.5V
IOUT = 150mA
0.2
120
220
215
210
205
200
195
190
185
0
5
20
35
50
65
80
-40
-15
TEMPERATURE (°C)
75
60
1V/ms
45
30
15
10V/ms
10
35
-40
85
60
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
1.003
1.002
1.001
1.000
0.999
0.998
0.997
0.996
0.995
0.994
0.993
0.992
0.991
0.990
MAX16033 toc07
NORMALIZED RESET THRESHOLD
0.25V/ms
90
0
180
-40 -25 -10
VCC FALLING
105
300
MAX16033 toc08
VCC = 3V
IOUT = 65mA
VCC = 5V
225
VCC-TO-RESET PROPAGATION DELAY (µs)
230
MAX16033 toc05
VCC = 2.5V
IOUT = 25mA
MAX16033 toc06
TEMPERATURE (°C)
0.8
0.4
8
TEMPERATURE (°C)
1.0
0.6
VCC = 0V
9
0
-40
RESET TIMEOUT PERIOD (ms)
1.2
-15
MAX16033 toc04
1.4
VCC-TO-OUT ON-RESISTANCE (Ω)
0.8
11
-40
1.0
BATTERY-TO-OUT ON-RESISTANCE (Ω)
17
MAXIMUM TRANSIENT DURATION (µs)
SUPPLY CURRENT (µA)
18
VBATT = 3V
VCC = 0V
0.9
BATTERY SUPPLY CURRENT (µA)
VCC = 5V
19
1.0
MAX16033 toc01
20
BATT-TO-OUT ON-RESISTANCE
vs. TEMPERATURE
BATTERY SUPPLY CURRENT
(BACKUP MODE) vs. TEMPERATURE
MAX16033 toc02
SUPPLY CURRENT
vs. TEMPERATURE
RESET OCCURS
ABOVE CURVE
250
MAX160_ _-46
(VTH = 4.63V)
200
150
MAX160_ _-29
(VTH = 2.93V)
100
50
0
-40
-20
0
20
40
TEMPERATURE (°C)
60
80
1
10
100
1000
10,000
RESET THRESHOLD OVERDRIVE (VTH - VCC) (mV)
_______________________________________________________________________________________
5
MAX16033–MAX16040
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
1.25
VBATT = 2.5V
VBATT = 2.3V
0.75
0.50
1.240
1.235
1.230
1.225
0.25
1.220
0
1.215
-0.25
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-40
2.3
2.0
1.8
1.5
1.3
-15
10
35
-40
85
60
-15
10
35
60
TEMPERATURE (°C)
CEIN PROPAGATION DELAY
vs. CEOUT LOAD CAPACITANCE
CEIN TO CEOUT ON-RESISTANCE
vs. TEMPERATURE
WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
VCC = 3V
1.5
VCC = 5V
1.0
0
30
25
20
VCC = 3V
15
10
VCC = 5V
2.0
5
50
75
100
125
150
175
-15
CEOUT LOAD CAPACITANCE (pF)
10
35
1.7
1.6
1.5
1.4
1.3
1.2
-40
85
60
-15
10
35
TEMPERATURE (°C)
TEMPERATURE (°C)
PFI-TO-PFO DELAY
vs. TEMPERATURE
PFI THRESHOLD
vs. TEMPERATURE
1.250
MAX16033 toc16
VOD = 30mV
MAX16033 toc15
5.00
1.245
1.240
4.25
4.00
3.75
3.50
PFI THRESHOLD (V)
PFI-TO-PFO DELAY (µs)
1.8
1.0
-40
4.75
4.50
3.25
3.00
2.75
1.235
1.230
1.225
1.220
2.50
2.25
2.00
1.215
FALLING EDGE
1.210
-40
-15
10
35
TEMPERATURE (°C)
60
85
1.1
0
25
VCC = 5V
1.9
WATCHDOG TIMEOUT PERIOD (s)
CEIN TO CEOUT ON-RESISTANCE (Ω)
2.0
MAX16033 toc13
35
MAX16033 toc12
2.5
MAX16033 toc11
2.5
TEMPERATURE (°C)
0.5
6
VOD = 50mV
SUPPLY VOLTAGE (V)
3.0
0
MAX16036/
MAX16040
2.8
1.0
1.210
0
3.0
MAX16033 toc14
1.00
MAX16036/
MAX16040
RESETIN-TO-RESET PROPAGATION DELAY (µs)
VBATT = 2.8V
1.245
RESETIN THRESHOLD (V)
BATTERY SUPPLY CURRENT (µA)
1.75
MAX16033 toc10
VTH = 2.93V
1.50
1.250
MAX16033 toc09
2.00
RESETIN-TO-RESET PROPAGATION
DELAY vs. TEMPERATURE
RESETIN THRESHOLD
vs. TEMPERATURE
BATTERY SUPPLY CURRENT
vs. SUPPLY VOLTAGE
CEIN PROPAGATION DELAY (ns)
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
85
-40
-15
10
35
60
TEMPERATURE (°C)
_______________________________________________________________________________________
85
60
85
Low-Power Battery Backup
Circuits in Small µDFN Packages
PIN
MAX16033–
MAX16036
(10-pin µDFN)
MAX16037–
MAX16040
(8-pin µDFN)
NAME
FUNCTION
Active-Low Reset Output. RESET remains low when VCC is below the reset
threshold (VTH), the manual-reset input is low, or RESETIN is low. It asserts low in
pulses when the internal watchdog times out. RESET remains low for the reset
timeout period (tRP) after VCC rises above the reset threshold, after the manual-reset
input goes from low to high, after RESETIN goes high, or after the watchdog triggers
a reset event. The MAX160_ _L is an active-low push-pull output, while the
MAX160_ _P is an active-low open-drain output.
1
1
RESET
2
—
CEIN
3
2
PFI
4
3
GND
5
4
Chip-Enable Input. The input to the chip-enable gating circuit. Connect to GND or
OUT if not used.
Power-Fail Input. PFO goes low when VPFI falls below 1.235V.
Ground
MR
Manual-Reset Input (MAX16033/MAX16037). Driving MR low asserts RESET. RESET
remains asserted as long as MR is low and for the reset timeout period (tRP) after
MR transitions from low to high. Leave unconnected, or connect to VCC if not used.
MR has an internal 20kΩ pullup to VCC.
WDI
Watchdog Input (MAX16034/MAX16038). If WDI remains high or low for longer than
the watchdog timeout period (tWD), the internal watchdog timer runs out and a reset
pulse is triggered for the reset timeout period (tRP). The internal watchdog clears
whenever RESET asserts or whenever WDI sees a rising or falling edge (Figure 2).
BATTON
Battery-On Output (MAX16035/MAX16039). BATTON goes high during battery
backup mode.
RESETIN
Reset Input (MAX16036/MAX16040). When RESETIN falls below 1.235V, RESET
asserts. RESET remains asserted as long as RESETIN is low and for at least tRP
after RESETIN goes high.
6
5
PFO
Active-Low Power-Fail Output. PFO goes low when VPFI falls below 1.235V. PFO
stays low until VPFI goes above 1.235V. PFO also goes low when VCC falls below
the reset threshold voltage.
7
6
VCC
Supply Voltage, 1.2V to 5.5V
8
7
OUT
Output. OUT sources from VCC when RESET is not asserted and from the greater of
VCC or BATT when VCC is below the reset threshold voltage.
Backup Battery Input. When VCC falls below the reset threshold, OUT switches to
BATT if VBATT is 40mV greater than VCC. When VCC rises above VBATT, OUT
switches to VCC. The 40mV hysteresis prevents repeated switching if VCC falls
slowly.
9
8
BATT
10
—
CEOUT
Chip-Enable Output. CEOUT goes low only when CEIN is low and reset is not
asserted. When CEOUT is disconnected from CEIN, CEOUT is actively pulled up to
OUT.
_______________________________________________________________________________________
7
MAX16033–MAX16040
Pin Description
Low-Power Battery Backup
Circuits in Small µDFN Packages
MAX16033–MAX16040
Functional Diagram
BATTON (MAX16035/MAX16039 ONLY)
1.235V
MAX16033–
MAX16040
VCC
OUT
CHIP-ENABLE
OUTPUT
CONTROL
BATT
CEIN
(MAX16033–MAX16036 ONLY)
CEOUT
RESET
GENERATOR
MR
(MAX16033/MAX16037 ONLY)
WATCHDOG
TRANSITION
DETECTOR
WDI
(MAX16034/MAX16038 ONLY)
RESET
WATCHDOG
TIMER
RESETIN
(MAX16036/MAX16040 ONLY)
PFO
1.235V
1.235V
GND
8
PFI
_______________________________________________________________________________________
Low-Power Battery Backup
Circuits in Small µDFN Packages
The Typical Operating Circuit shows a typical connection for the MAX16033–MAX16040. OUT powers the
static random-access memory (SRAM). If V CC is
greater than the reset threshold (VTH), or if VCC is lower
than VTH but higher than VBATT, VCC is connected to
OUT. If VCC is lower than VTH and VCC is less than
VBATT, BATT is connected to OUT. OUT supplies up to
200mA from VCC. In battery-backup mode, an internal
MOSFET connects the backup battery to OUT. The onresistance of the MOSFET is a function of the backupbattery voltage and temperature and is shown in the
BATT-to-OUT On-Resistance vs. Temperature graph in
the Typical Operating Characteristics.
Chip-Enable Signal Gating
(MAX16033–MAX16036 Only)
The MAX16033–MAX16036 provide internal gating of
chip-enable (CE) signals to prevent erroneous data
from being written to CMOS RAM in the event of a
power failure or brownout condition. During normal
operation, the CE gate is enabled and passes all CE
transitions. When reset asserts, this path becomes
disabled, preventing erroneous data from corrupting
the CMOS RAM. The MAX16033–MAX16036 provide a
series transmission gate from CEIN to CEOUT. A 2ns
(typ) propagation delay from CEIN to CEOUT allows
these devices to be used with most µPs and highspeed DSPs.
When RESET is deasserted, CEIN is connected to
CEOUT through a low on-resistance transmission gate.
If CEIN is high when RESET is asserted, CEOUT
remains high regardless of any subsequent transitions
on CEIN during the reset event.
If CEIN is low when RESET is asserted, CEOUT is held
low for 1µs to allow completion of the read/write operation (Figure 1). After the 1µs delay expires, CEOUT
goes high and stays high regardless of any subsequent
transitions on CEIN during the reset event. When
CEOUT is disconnected from CEIN, CEOUT is actively
pulled up to OUT.
The propagation delay through the chip-enable circuitry depends on both the source impedance of the drive
to CEIN and the capacitive loading at CEOUT. The
chip-enable propagation delay is specified from the
50% point of CEIN to the 50% point of CEOUT, using a
50Ω driver and 50pF load capacitance. Minimize the
capacitive load at CEOUT and use a low output-impedance driver to minimize propagation delay.
In high-impedance mode, the leakage current at CEIN
is ±1µA (max) over temperature. In low-impedance
mode, the impedance of CEIN appears as a 75Ω resistor in series with the load at CEOUT.
VCC
VTH
CEIN
CEOUT
*
RESET-TO-CEOUT DELAY
tRD
tRD
tRP
RESET
tRP
PFO
PFI > VPFI
* IF CEIN GOES HIGH BEFORE RESET ASSERTS,
CEOUT GOES HIGH WITHOUT DELAY AS CEIN GOES HIGH.
Figure 1. RESET and Chip-Enable Timing
_______________________________________________________________________________________
9
MAX16033–MAX16040
Detailed Description
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
Backup Battery Switchover
To preserve the contents of the RAM in a brownout or
power failure, the MAX16033–MAX16040 automatically
switch to back up the battery installed at BATT when
the following two conditions are met:
1) VCC falls below the reset threshold voltage.
2) VCC is below VBATT.
VCC. This input can be driven from TTL/CMOS logic
outputs or with open-drain/collector outputs. Connect a
normally-open momentary switch from MR to GND to
create a manual-reset function; external debounce circuitry is not required. When driving MR from long
cables or when using the device in a noisy environment, connect a 0.1µF capacitor from MR to GND to
provide additional noise immunity.
Table 1 lists the status of the inputs and outputs in battery-backup mode. The devices do not power-up if the
only voltage source is VBATT. OUT only powers up from
VCC at startup.
Watchdog Input
(MAX16034/MAX16038 Only)
Table 1. Input and Output Status in
Battery-Backup Mode
PIN
STATUS
VCC
Disconnected from OUT
OUT
Connected to BATT
BATT
Connected to OUT. Current drawn from the
battery is less than 1µA (at VBATT = 2.8V,
excluding IOUT) when VCC = 0V.
RESET
Asserted
BATTON
High state
MR, RESETIN,
CEIN, and WDI
CEOUT
PFO
The watchdog monitors µP activity through the watchdog input (WDI). RESET asserts when the µP fails to
toggle WDI. Connect WDI to a bus line or µP I/O line. A
change of state (high to low, low to high, or a minimum
100ns pulse) resets the watchdog timer. If WDI remains
high or low for longer than the watchdog timeout period
(tWD), the internal watchdog timer runs out and triggers
a reset pulse for the reset timeout period (tRP). The
internal watchdog timer clears whenever reset is
asserted or whenever WDI sees a rising or falling edge.
If WDI remains in either a high or low state, a reset
pulse periodically asserts after every watchdog timeout
period (tWD); see Figure 2.
Inputs ignored
Connected to OUT
WDI
Asserted
tRP
RESET
Manual-Reset Input
(MAX16033/MAX16037 Only)
Many µP-based products require manual-reset capability, allowing the user or external logic circuitry to initiate
a reset. For the MAX16033/MAX16037, a logic-low on
MR asserts RESET. RESET remains asserted while MR
is low and for a minimum of 140ms (tRP) after it returns
high. MR has an internal 20kΩ (min) pullup resistor to
10
tWD
tRP
tWD
tWD = WATCHDOG TIMEOUT PERIOD
tRP = RESET TIMEOUT PERIOD
Figure 2. MAX16034/MAX16038 Watchdog Timeout Period and
Reset Active Time
______________________________________________________________________________________
Low-Power Battery Backup
Circuits in Small µDFN Packages
BATTON is a push-pull output that asserts high when in
battery-backup mode. BATTON typically sinks 3.2mA
at a 0.4V saturation voltage. In battery-backup mode,
this terminal sources approximately 10µA from OUT.
Use BATTON to indicate battery-switchover status or to
supply base drive to an external pass transistor for
higher current applications (see Figure 3).
RESETIN Comparator
(MAX16036/MAX16040 Only)
An internal 1.235V reference sets the RESETIN threshold voltage. RESET asserts when the voltage at
RESETIN is below 1.235V. Use the RESETIN function to
monitor a secondary power supply.
Power-Fail Comparator
The MAX16033–MAX16040 issue an interrupt (nonmaskable or regular) to the µP when a power failure occurs.
The power line is monitored by two external resistors connected to the power-fail input (PFI). When the voltage at
PFI falls below 1.235V, the power-fail output (PFO) drives
the processor’s NMI input low. An earlier power-fail warning can be generated if the unregulated DC input of the
regulator is available for monitoring. The MAX16033–
MAX16040 turn off the power-fail comparator and force
PFO low when VCC falls below the reset threshold voltage (see Figure 1). The MAX160_ _L devices provide
push-pull PFO outputs. The MAX160_ _P devices provide
open-drain PFO outputs.
VCC
Use the following equations to set the reset threshold
voltage (VRTH) of the secondary power supply (see
Figure 4):
VRTH = VREF (R1 / R2 + 1)
where VREF = 1.235V. To simplify the resistor selection,
choose a value for R2 and calculate R1.
R1 = R2 [(VRTH / VREF) - 1]
Since the input current at RESETIN is 25nA (max), large
values (up to 1MΩ) can be used for R2 with no significant loss in accuracy.
VIN
MAX16036
MAX16040
R1
RESETIN
R2
Figure 4. Setting RESETIN Voltage for the
MAX16036/MAX16040
2.4V TO 5.5V
0.1µF
VCC
BATTON
BATT
OUT
(CEOUT)
CE
CMOS RAM
MAX16035
MAX16039
(CEIN)
ADDRESS
DECODE
A0–A15
µP
GND
RESET
RESET
( ) FOR MAX16035 ONLY
Figure 3. MAX16035/MAX16039 BATTON Driving an External Pass Transistor
______________________________________________________________________________________
11
MAX16033–MAX16040
BATTON Indicator
(MAX16035/MAX16039 Only)
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
RESET
A µP’s reset input puts the µP in a known state. The
MAX16033–MAX16040 µP supervisory circuits assert a
reset to prevent code-execution errors during powerup, power-down, and brownout conditions. RESET
asserts when VCC is below the reset threshold voltage
and for at least 140ms (tRP) after VCC rises above the
reset threshold. RESET also asserts when MR is low
(MAX16033/MAX16037) or when RESETIN is below
1.235V (MAX16036/MAX16040). The MAX16034/
MAX16038 watchdog function causes RESET to assert in
pulses following a watchdog timeout (Figure 2). The
MAX160_ _L devices provide push-pull RESET outputs.
The MAX160_ _P devices provide open-drain RESET
outputs.
3V OR 3.3V
Applications Information
Operation Without a Backup Power Source
The MAX16033–MAX16040 provide a battery backup
function. If a backup power source is not used, connect
BATT to GND and OUT to VCC.
Using a Super Cap as a
Backup Power Source
Super caps are capacitors with extremely high capacitance, such as 0.47F. Figure 5 shows two methods to
use a super cap as a backup power source. Connect
the super cap through a diode to the 3V input (Figure
5a) or connect the super cap through a diode to 5V
(Figure 5b) if a 5V supply is available. The 5V supply
charges the super cap to a voltage close to 5V, allowing a longer backup period. Since VBATT can be higher
than VCC while VCC is above the reset threshold voltage, there are no special precautions required when
using these µP supervisors with a super cap.
3V OR 3.3V
VCC
VCC
5V
MAX16033–
MAX16040
1N4148
MAX16033–
MAX16040
1N4148
BATT
BATT
0.47F
0.47F
(a)
(b)
Figure 5. Using a Super Cap as a Backup Source
12
______________________________________________________________________________________
Low-Power Battery Backup
Circuits in Small µDFN Packages
MAX16033–MAX16040
START
VCC
VCC
RESET
TO µP
SET
WDI
LOW
SUBROUTINE
OR PROGRAM LOOP
SET
WDI HIGH
MAX16033–
MAX16040
V+
MR
R1
PFI
PFO
GND
RETURN
R2
END
Figure 6. Watchdog Flow Diagram
Watchdog Software Considerations
One way to help the watchdog timer to monitor software execution more closely is to set and reset the
watchdog at different points in the program, rather than
pulsing the watchdog input periodically. Figure 6
shows a flow diagram where the I/O driving the watchdog is set low in the beginning of the program, set high
at the beginning of every subroutine or loop, and set
low again when the program returns to the beginning. If
the program should hang in any subroutine, the watchdog would timeout and reset the µP.
Replacing the Backup Battery
Decouple BATT to GND with a 0.1µF capacitor. The
backup power source may be removed while V CC
remains valid without the danger of triggering a reset
pulse. The device does not enter battery-backup mode
when VCC stays above the reset threshold voltage.
Power-Fail Comparator
Monitoring an Additional Power Supply
Monitor another voltage by connecting a resistive divider
to PFI as shown in Figure 7. The threshold voltage is:
VTH(PFI) = 1.235 (R1 / R2 + 1)
where VTH(PFI) is the threshold at which the monitored
voltage will trip PFO.
To simplify the resistor selection, choose a value for R2
and calculate R1.
R1 = R2 [(VTH(PFI) / 1.235) - 1]
Figure 7. Monitoring an Additional Power Supply
Connect PFO to MR in applications that require RESET to
assert when the second voltage falls below its threshold.
RESET remains asserted as long as PFO holds MR low,
and for 140ms (min) after PFO goes high.
Adding Hysteresis to the Power-Fail Comparator
The power-fail comparator provides a typical hysteresis
of 12mV, which is sufficient for most applications where
a power-supply line is being monitored through an
external voltage-divider. Connect a voltage-divider
between PFI and PFO as shown in Figure 8a to provide
additional noise immunity. Select the ratio of R1 and R2
such that VPFI falls to 1.235V when VIN drops to its trip
point, VTRIP. R3 adds hysteresis and is typically more
than 10 times the value of R1 or R2. The hysteresis window extends above (VH) and below (VL) the original trip
point, VTRIP. Connecting an ordinary signal diode in
series with R3 as shown in Figure 8b causes the lower
trip point (VL) to coincide with the trip point without hysteresis (VTRIP). This method provides additional noise
margin without compromising the accuracy of the
power-fail threshold when the monitored voltage is
falling. Set the current through R1 and R2 to be at least
10µA to ensure that the 100nA (max) PFI input current
does not shift the trip point. Set R3 to be higher than
10kΩ to reduce the load at PFO. Capacitor C1 adds
additional noise rejection.
______________________________________________________________________________________
13
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
(a)
(b)
VCC
VIN
VCC
VIN
MAX16033–
MAX16040
R1
MAX16033–
MAX16040
R1
PFI
R2
PFI
R3
C1
R2
C1
R3
PFO (PUSH-PULL)
PFO (PUSH-PULL)
GND
GND
TO µP
TO µP
PFO
0V
PFO
VL
VTRIP
VH
VIN
0V
VTRIP
VH
VIN
R1 ⎞
⎛
VTRIP = VPFT⎜1 +
⎟
⎝
R2 ⎠
R1 ⎞
⎛
VTRIP = VPFT⎜1 +
⎟
⎝
R2 ⎠
R1
R1 ⎞
⎛
VH = (VPFT + VPFH)⎜1 +
+
⎟
⎝
R2
R3 ⎠
R1
R1 ⎞
R1
⎛
VH = (VPFT + VPFH)⎜1 +
+
VD
⎟ −
⎝
⎠
R2
R3
R3
VL = VTRIP
VPFT = 1.235V
R1
R1 ⎞
R1
⎛
VL = VPFT⎜1 +
VCC
+
⎟ −
⎝
⎠
R2
R3
R3
VPFT = 1.235V
VPFH = 12mV
VPFH = 12mV
VD = DIODE FORWARD VOLTAGE
Figure 8. (a) Adding Additional Hysteresis to the Power-Fail Comparator. (b) Shifting the Additional Hysteresis above VTRIP
14
______________________________________________________________________________________
Low-Power Battery Backup
Circuits in Small µDFN Packages
Negative-Going VCC Transients
The MAX16033–MAX16040 are relatively immune to
short-duration, negative-going V CC transients.
Resetting the µP when V CC experiences only small
glitches is not usually desired.
The Typical Operating Characteristics section contains
a Maximum Transient Duration vs. Reset Threshold
Overdrive graph. The graph shows the maximum pulse
width of a negative-going VCC transient that would not
trigger a reset pulse. As the amplitude of the transient
increases (i.e., goes further below the reset threshold
voltage), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below
the reset threshold and lasts for 25µs does not trigger a
reset pulse.
A 0.1µF bypass capacitor mounted close to VCC provides additional transient immunity.
3.0V OR 3.3V
VCC
MAX16033–
MAX16040
R1
PFI
PFO
R2
GND
V-
PFO
VL
VTRIP
V0V
⎡
VCC ⎤
1⎞
⎛ 1
VTRIP = R2⎢( VPFT + VPFH) ⎜
+
⎟ −
⎥
⎝ R1
R2 ⎠
R1 ⎦
⎣
⎡
VCC ⎤
1⎞
⎛ 1
VL = R2⎢( VPFT) ⎜
+
⎟ −
⎥
⎝
⎠
R
R
R1 ⎦
1
2
⎣
VPFT = 1.235V
VPFH = 12mV
Figure 9. Monitoring a Negative Voltage
______________________________________________________________________________________
15
MAX16033–MAX16040
Monitoring a Negative Voltage
Connect the circuit as shown in Figure 9 to use the
power-fail comparator to monitor a negative supply rail.
PFO stays low when V- is good. When V- rises to cause
PFI to be above +1.235V, PFO goes high. Ensure VCC
comes up before the negative supply.
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
Device Marking Codes
TOP
MARK
PART
TOP
MARK
PART
TOP
MARK
PART
TOP
MARK
PART
MAX16033LLB23+T
+ABE
MAX16035LLB23+T
+ACC
MAX16037LLA23+T
+ABX
MAX16039LLA23+T
+ACV
MAX16033LLB26+T
+ABF
MAX16035LLB26+T
+ACD
MAX16037LLA26+T
+ABY
MAX16039LLA26+T
+ACW
MAX16033LLB29+T
+ABG
MAX16035LLB29+
+ACE
MAX16037LLA29+
+ABZ
MAX16039LLA29+T
+ACX
MAX16033LLB31+T
+ABH
MAX16035LLB31+
+ACF
MAX16037LLA31+
+ACA
MAX16039LLA31+T
+ACY
MAX16033LLB44+T
+ABI
MAX16035LLB44+T
+ACG
MAX16037LLA44+T
+ACB
MAX16039LLA44+T
+ACZ
MAX16033LLB46+T
+ABJ
MAX16035LLB46+
+ACH
MAX16037LLA46+
+ACC
MAX16039LLA46+T
+ADA
MAX16033PLB23+T
+ABK
MAX16035PLB23+T
+ACI
MAX16037PLA23+T
+ACD
MAX16039PLA23+T
+ADB
MAX16033PLB26+T
MAX16033PLB29+
+ABL
+ACJ
+ACF
MAX16039PLA26+T
MAX16039PLA29+
+ADC
+ACK
MAX16037PLA26+T
MAX16037PLA29+
+ACE
+ABM
MAX16035PLB26+T
MAX16035PLB29+
MAX16033PLB31+
+ABN
MAX16035PLB31+
+ACL
MAX16037PLA31+
+ACG
MAX16039PLA31+
+ADE
MAX16033PLB44+T
+ABO
MAX16035PLB44+T
+ACM
MAX16037PLA44+T
+ACH
MAX16039PLA44+T
+ADF
MAX16033PLB46+
+ABP
MAX16035PLB46+
+ACN
MAX16037PLA46+
+ACI
MAX16039PLA46+
+ADG
MAX16034LLB23+T
+ABQ
MAX16036LLB23+T
+ACO
MAX16038LLA23+T
+ACJ
MAX16040LLA23+T
+ADH
MAX16034LLB26+T
+ABR
+ACP
MAX16040LLA26+T
+ADI
+ABS
+ACQ
MAX16038LLA26+T
MAX16038LLA29+
+ACK
MAX16034LLB29+T
MAX16036LLB26+T
MAX16036LLB29+
+ACL
MAX16040LLA29+T
+ADJ
MAX16034LLB31+T
+ABT
MAX16036LLB31+
+ACR
MAX16038LLA31+
+ACM
MAX16040LLA31+T
+ADK
MAX16034LLB44+T
+ABU
+ACS
+ACN
MAX16040LLA44+T
+ADL
+ADM
+ADD
MAX16034LLB46+T
+ABV
MAX16036LLB44+T
MAX16036LLB46+
+ACT
MAX16038LLA44+T
MAX16038LLA46+
+ACO
MAX16040LLA46+T
MAX16034PLB23+T
+ABW
MAX16036PLB23+T
+ACU
MAX16038PLA23+T
+ACP
MAX16040PLA23+T
+ADN
MAX16034PLB26+T
+ABX
MAX16036PLB26+T
+ACV
MAX16038PLA26+T
+ACQ
MAX16040PLA26+T
+ADO
MAX16034PLB29+
+ABY
MAX16036PLB29+
+ACW
MAX16038PLA29+
+ACR
MAX16040PLA29+
+ADP
MAX16034PLB31+
ABZ
MAX16036PLB31+
+ACX
MAX16038PLA31+
+ACS
MAX16040PAL31+
+ADQ
MAX16034PLB44+T
MAX16034PLB46+
+ACA
MAX16036PLB44+T
MAX16036PLB46+
+ACY
MAX16038PLA44+T
MAX16038PLA46+
+ACT
MAX16040PLA44+T
MAX16040PLA46+
+ADR
+ACB
+ACZ
+ACU
+ADS
Note: 48 standard versions shown in bold are available. Sample stock is generally held on standard versions only. Contact factory for
nonstandard versions availability.
16
______________________________________________________________________________________
Low-Power Battery Backup
Circuits in Small µDFN Packages
CEOUT
BATT
OUT
VCC
PFO
CEOUT
BATT
OUT
VCC
PFO
TOP VIEW
10
9
8
7
6
10
9
8
7
6
MAX16035
MAX16036
MAX16033
MAX16034
GND
MR (WDI)
RESET
CEIN
5
10-µDFN
( ) FOR MAX16034 ONLY
10-µDFN
( ) FOR MAX16036 ONLY
PFO
PFI
4
GND
CEIN
PFI
RESET
3
VCC
2
OUT
1
BATT
5
PFO
4
VCC
3
OUT
2
BATT
1
BATTON
(RESETIN)
+
+
8
7
6
5
8
7
6
5
MAX16037
MAX16038
MAX16039
MAX16040
MR (WDI)
2
3
4
BATTON
(RESETIN)
GND
8-µDFN
( ) FOR MAX16038 ONLY
1
GND
4
PFI
3
RESET
2
PFI
+
1
RESET
+
8-µDFN
( ) FOR MAX16040 ONLY
+ DENOTES A LEAD-FREE PACKAGE.
______________________________________________________________________________________
17
MAX16033–MAX16040
Pin Configurations
Low-Power Battery Backup
Circuits in Small µDFN Packages
MAX16033–MAX16040
Typical Operating Circuit
2.4V TO 5.5V
0.1µF
REALTIME
CLOCK
CMOS
RAM
CE
VCC
BATT
ADDITIONAL
DC VOLTAGE
OUT
0.1µF
MAX16033–
MAX16040
R3
RESETIN*
R4
ADDITIONAL
DC VOLTAGE
A0–A15
RESET
R1
PFO
I/O
WDI***
I/O
µP
PFI
R2
RESET
CEOUT**
CEIN**
GND
ADDRESS
DECODE
* RESETIN APPLIES TO MAX16035/MAX16039 ONLY.
**CEIN AND CEOUT APPLY TO MAX16033–MAX16036 ONLY.
***WDI APPLIES TO MAX16034/MAX16038 ONLY.
18
______________________________________________________________________________________
Low-Power Battery Backup
Circuits in Small µDFN Packages
PART*
TEMP RANGE
PINPACKAGE
PKG
CODE
Reset Threshold Ranges
SUFFIX
RESET THRESHOLD VOLTAGE (V)
MIN
TYP
MAX
MAX16035LLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
46
4.50
4.63
4.75
MAX16035PLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
44
4.25
4.38
4.50
MAX16036LLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
31
3.00
3.08
3.15
MAX16036PLB_ _+T
-40°C to +85°C 10 µDFN-10 L1022-1
29
2.85
2.93
3.00
MAX16037LLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
26
2.55
2.63
2.70
MAX16037PLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
23
2.25
2.32
2.38
MAX16038LLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
MAX16038PLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
MAX16039LLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
MAX16039PLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
MAX16040LLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
MAX16040PLA_ _+T
-40°C to +85°C 8 µDFN-8
L822-1
Chip Information
PROCESS: BiCMOS
*These parts offer a choice of reset threshold voltages. From the
Reset Threshold Ranges table, insert the desired threshold voltage code in the blank to complete the part number. See Selector
Guide for a listing of device features.
+Denotes a lead-free package.
T = Tape and reel.
______________________________________________________________________________________
19
MAX16033–MAX16040
Ordering Information (continued)
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
A
D
XXXX
XXXX
XXXX
b
e
N
SOLDER
MASK
COVERAGE
E
PIN 1
0.10x45∞
L
PIN 1
INDEX AREA
6, 8, 10L UDFN.EPS
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
L1
1
SAMPLE
MARKING
A
A
(N/2 -1) x e)
7
CL
b
L
A
A2
A1
CL
L
e
EVEN TERMINAL
e
ODD TERMINAL
PACKAGE OUTLINE,
6, 8, 10L uDFN, 2x2x0.80 mm
-DRAWING NOT TO SCALE-
20
21-0164
______________________________________________________________________________________
A
1
2
Low-Power Battery Backup
Circuits in Small µDFN Packages
COMMON DIMENSIONS
SYMBOL
MIN.
NOM.
A
0.70
0.75
0.80
A1
0.15
0.20
0.25
0.035
A2
0.020
0.025
D
1.95
2.00
E
1.95
2.00
L
0.30
0.40
L1
MAX.
-
2.05
2.05
0.50
0.10 REF.
PACKAGE VARIATIONS
PKG. CODE
N
e
b
(N/2 -1) x e
L622-1
6
0.65 BSC
0.30±0.05
1.30 REF.
L822-1
8
0.50 BSC
0.25±0.05
1.50 REF.
L1022-1
10
0.40 BSC
0.20±0.03
1.60 REF.
PACKAGE OUTLINE,
6, 8, 10L uDFN, 2x2x0.80 mm
-DRAWING NOT TO SCALE-
21-0164
A
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21
© 2007 Maxim Integrated Products
Heaney
is a registered trademark of Maxim Integrated Products, Inc.
MAX16033–MAX16040
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
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