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MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
General Description
The MAX16545B/C is a circuit-breaker protection IC with an
integrated low-resistance MOSFET and lossless current-sense
circuitry featuring PMBus™/SMBus control and reporting. The
IC is designed to provide the optimum solution for distribution,
control, monitoring and protection of the system’s 12V power
supply. An internal LDO provides the bias supply voltage for
the protection IC.
If no fault is detected, the MAX16545B/C initiates the startup.
The device has been designed to provide controlled, monotonic
startup. Programmable soft-start ramp and delay is implemented
to limit the inrush current during startup. The MAX16545B is set
for 16A Startup OCP, and the MAX16545C is set for 24A Startup
OCP.
The IC monitors the current and the voltage of the 12V system
power rail and provides multiple levels of protection with fast
turn off if a fault is detected. Three methods of overcurrent
protection are provided. Programmable moderate OCP level
allows surge currents for a limited time. User-selectable severe
OCP level provides a fast disconnect if a current exceeding
the severe OCP threshold is detected. An additional fixed high
shutdown OCP level provides instantaneous disconnect to
further protect the device.
The lossless current sense provides high-accuracy current
sensing over load and temperature, improving overall system
energy efficiency, and reducing dissipation. A signal proportional
to the load current is reported through an analog output and
extensive reporting is provided through the SMBus/PMBus.
Output voltage is monitored at all times. If at any time the
output voltage falls below the programmable output undervoltage lockout threshold, the PWRGD signal is asserted low. If
at any time the input voltage falls below the programmable
input undervoltage lockout threshold, the PWRGD signal
is asserted low. The MAX16545B/C can be programmed
through PMBus to provide input overvoltage protection. Input
overvoltage protection is disabled by default. When enabled
through PMBus, if the input voltage exceeds a programmable
overvoltage threshold, the MOSFET is latched off and a fault
is communicated.
The IC is used to distribute and control power to a system
from the +12V power supply. See Basic Application Circuit.
PMBus is a trademark of SMIF, Inc.
19-8779; Rev 4; 6/19
Benefits and Features
●● High Density (6.5mm x 4mm for 60A): Less than 25%
of the Board Area of Conventional Solutions
• Monolithic Integration of Power, Control, and
Monitoring (Integrated Power MOSFET with
0.95mΩ Total Resistance in 12V Power Path
(RDSON), Including Package)
• Integrated Lossless, Precise Current Sensing
• Integrated LDO Provides VDD Supply (1.8V Bias
Supply)
●● Enables Advanced System Power Management
• PMBus/SMBus Telemetry with Extensive Status
Monitoring and Reporting
• Load Current Indicator (ILOAD) Pin Provides Analog Output Current Reporting With High Accuracy
• Programmable Soft-Start for Inrush Current
Limiting
• Increases Power-Supply Reliability with IC SelfProtection Features
• Very Fast Fault Detection and Isolation
• VIN to VOUT Short Protection During Startup
• Overtemperature Protection
• Three Levels of Overcurrent Protection
• Programmable Moderate OCP
• Programmable Severe OCP Provides Isolation
< 5µs.
• Fail-Safe Safe OCP Provides Isolation < 250ns.
Applications
Servers, Networking, Storage, Communication Equipment
and AC/DC Power Supplies
●● Integrated Protection IC on 12V: Circuit Breaker,
Hot Swap, Inrush Control
Ordering Information appears at end of data sheet.
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Basic Application Circuit
SOFT-START
PROGRAMMING
12V
POWER
SUPPLY
VIN
SS
VOUT
MAX16545B
MAX16545C
EN/UVLO
PWRGD
ENABLE
FAULT
OUTPUT
LOAD
PMB US
ROCP
SYSTEM
CONTROLLER
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MODERA TE
OCP
PROGRAMMING
GND
ILOAD
CURRENT
REPORTING
Maxim Integrated │ 2
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Absolute Maximum Ratings
Supply Voltage (VIN) DC........................................-0.3V to +16V
Supply Voltage (VIN) 150µs.................................................+22V
Bias Supply Voltage (VDD)....................................-0.3V to +2.5V
PWRGD, FAULT....................................................-0.3V to +5.5V
EN/UVLO, ROCP..................................................-0.3V to +2.5V
SMBUS_CLK, SMBUS_DATA..................................-0.3V to +6V
SMBUS_ALERT.......................................................-0.3V to +6V
SMBUS_ID............................................................-0.3V to +2.5V
ILOAD_IN, ILOAD.................................................-0.3V to +2.5V
Output Voltage (VOUT) DC.....................................-0.3V to +16V
VBST (Relative to VOUT).......................................-0.3V to +2.5V
SS...........................................................................-0.3V to +16V
Junction Temperature (TJ)................................................+150°C
Storage Temperature Range............................. -65°C to +165°C
Peak Reflow Temperature................................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any
other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Operating Ratings
Supply Voltage (VIN)............................................ 10.8V to 13.2V
Bias Supply Voltage (VDD)................................... 1.76V to 1.94V
Junction Temperature (TJ).....................................0°C to +125°C
Package Information
PACKAGE TYPE: 22 FCQFN
Package Code
P224A6F+1
Outline Number
21-1006
Land Pattern Number
90-0510
THERMAL RESISTANCE
Junction to Case (θJC) (max)
0.31°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
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Maxim Integrated │ 3
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Electrical Characteristics
(VIN = 12V ±10%, TA = TJ = 0°C to +125°C, unless otherwise noted. Specifications are 100% production tested at TA = TJ = +32°C.
Limits over operating temperature are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
10.8
12
13.2
V
12V SUPPLY (V IN)
Supply Voltage Range
VIN
Supply Current
IIN
FET off
3.2
6.1
FET on: IOUT = 0 (Note 1)
3.7
6.5
FET on: IOUT = 60A (Note 1)
mA
10
INTEGRATED 1.8V LINEAR REGULATOR
LDO Output Voltage Range
1.76
VDD UVLO, Falling
VDD UVLO, Rising
VDD
VDD UVLO Hysteresis
(Note 1)
VDD UVLO Speed
(Note 1)
1.85
1.94
1.55
1.6
1.67
1.62
1.67
1.71
30
60
80
2
V
mV
µs
UNDERVOLTAGE LOCKOUT: 12V SUPPLY (V IN)
VIN_UVLO Rising Threshold
VIN_UVLO Hysteresis
Programmable 12V VIN
Undervoltage Threshold for
Rising Input
Response Time
VIN_UVLO
At EN/UVLO Pin
VIN_UVLO
Programmable through resistor-divider,
measured at VIN with 1% resistors on the
divider.
tD
0.95
1
1.05
50
8
From EN/UVLO = 0V To FET Off
(Note 1)
V
mV
V
2
µs
EN/UVLO PIN INTERNAL PARAMETERS
EN/UVLO Pin Leakage
EN/UVLO Pin = 1.8V
EN/UVLO Internal-Pulldown
Resistor
5
7.2
11
µA
110
250
450
kΩ
275
µs
BOOST VOLTAGE (V BST)
VBST Charging Time to 1.6V
above VOUT
BST Voltage above VOUT
tCHARGE
CBST = 100nF
VBST
1.8
Rising UVLO Threshold above
VOUT
Falling UVLO Threshold above
VOUT
0.8
1.2
1.6
0.7
1.1
1.5
60
130
400
mV
2.3
µs
V
BOOST UVLO
UVLO Hysteresis
Falling-Lockout Response
Time
V
tD
INTEGRATED MOSFET CHARACTERISTICS
On-Resistance
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RDS(ON)
(Note 1)
0.95
mΩ
Maxim Integrated │ 4
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Electrical Characteristics (continued)
(VIN = 12V ±10%, TA = TJ = 0°C to +125°C, unless otherwise noted. Specifications are 100% production tested at TA = TJ = +32°C.
Limits over operating temperature are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OVERCURRENT PROTECTION (OCP)
Gain from ROCP Pin Current
to IOUT
Moderate OCP Voltage
Threshold
Moderate OCP Threshold
Accuracy
Moderate OCP Threshold
Range
Allowable Range for No Fault
Detection
GOCP
VOCPM
IOCP
(MODERATE)
(Note 1)
8
A/μA
Referred to voltage over ROCP (Note 1)
0.8
V
Referred to IOUT using Equation 1
(Note 1)
±12
%
(Note 1)
ROCP
30
70
A
26
380
kΩ
IOUT > Moderate OCP,
IOUT < Severe OCP
PMBus Programmable, default 100μs
(Note 1)
20
100
100
250
Moderate OCP Fault Detect
Delay Timeout Accuracy
(Note 1)
±25
Severe OCP Threshold,
% above Moderate OCP
PMBus Programmable, default 130%
(Note 1)
130
(Note 1)
±15
%
From fault threshold exceeded to FET off
10
µs
120
A
±20
%
Moderate OCP Timeout
tOCPM
Severe OCP Threshold
Accuracy
Severe OCP Delay
Safe OCP Threshold
Safe OCP Threshold Accuracy
Safe OCP Delay
IOCP(SEVERE)
tD(SEVERE)
Startup OCP Threshold
Startup OCP Threshold
Accuracy
Startup OCP Delay
IOCP(STARTUP)
ms
%
%
150
IOCP(SAFE)
tD(SAFE)
μs
From fault threshold exceeded
to FET off
250
ns
PMBus programmable,
MAX16545B default = 16A,
MAX16545C default = 24A (Note 1)
16
24
8
A
(Note 1)
±20
%
tD(STARTUP)
10
µs
2
kΩ
38
µA
1.5
ms
SOFT-START AND C OUT
Soft-Start Discharge
Resistance
SS
Soft-Start Charging Current
ISS
Soft-Start Time
tSS
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1
20
CSS = 0nF, IOUT = 0A
Maxim Integrated │ 5
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Electrical Characteristics (continued)
(VIN = 12V ±10%, TA = TJ = 0°C to +125°C, unless otherwise noted. Specifications are 100% production tested at TA = TJ = +32°C.
Limits over operating temperature are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
Soft-Start Capacitor Discharge
Threshold
MIN
TYP
MAX
UNITS
0.10
0.21
0.29
V
CSS Discharge Check
Duration During Startup
2.2
s
FET V GS UNDERVOLTAGE LOCKOUT
VGS Rising UVLO Threshold
VGS Falling UVLO Threshold
VGS UVLO Hysteresis
VGS_UVLO
VGS UVLO Masking Time
VGS UVLO masking time at startup
0.87
1.3
1.61
V
0.74
1.17
1.47
V
87
100
466
mV
90
100
110
ms
PASS FET SHORT DETECTION DURING STARTUP
Duration of VOUT Discharge
Check
tDISCHARGE
Pulldown Resistance on VOUT
During Self-Check
RDISCHARGE
Threshold for Self-Check
Procedure
Delay from Self-Check Pass to
Start VOUT Ramp
VOUT_
SELFCHECK
tD
2.2
PMBus Programmable, default 9V
(Note 1)
s
400
455
560
Ω
5.8
6.8
7.8
9.0
6
7
8
9.2
0.02
10
20
6.2
7.2
8.2
9.4
V
PMBus Programmable, default 0.02ms
(Note 1)
ms
PWRGD PIN
PWRGD Output-High Voltage
VOH
External pullup leakage below 1μA
5.5
V
PWRGD Output-Low Voltage
VOL
Sinking 4mA
0.4
V
5
µs
Propagation Delay from
VOUT_UVLO Detect to
PWRGD Pin Asserted Low
tD
Rising Threshold for PWRGD
Asserted High
Accuracy
PWRGD Assertion Delay After
VOUT Settles
8
9
10
11
PMBus Programmable, default 11V (Note
1)
-5
VTH(PWRGD)
(Note 1)
V
+5
5
ms
PWRGD Hysteresis
8V
0.36
0.41
0.46
PWRGD Hysteresis
9V
0.42
0.47
0.52
PWRGD Hysteresis
10V
0.45
0.51
0.56
PWRGD Hysteresis
11V
0.50
0.55
0.61
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%
V
Maxim Integrated │ 6
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Electrical Characteristics (continued)
(VIN = 12V ±10%, TA = TJ = 0°C to +125°C, unless otherwise noted. Specifications are 100% production tested at TA = TJ = +32°C.
Limits over operating temperature are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OVERTEMPERATURE PROTECTION (OTP)
Overtemperature Protection
Threshold
TOTP
PMBus programmable (Note 1)
135
°C
SMBus DATA (SMBUS_DATA) AND CLOCK (SMBUS_CLOCK) PINS
Leakage Current
Input-Low Voltage
For pullup voltage = 5.5V
VIL
Input-High Voltage
VIH
Output-Low Voltage
VOL
External-Pullup Voltage
SMBUS_ALERT PIN
Output-Low Voltage
VOL
10
µA
0.8
V
0.4
V
5.5
V
0.4
V
1
µA
5.5
V
2.1
V
SMBUS_DATA, sinking 4mA
VOH Max
Leakage Current
External-Pullup Voltage
6.2
Sinking 4mA
For pullup = 5.5V
VOH Max
FAULT ISOLATION DELAY
Fault-Detection Time
tD
From fault detection to start of gate
pulldown
60
ns
Pass FET Turn-Off Time
tF
From start of gate pulldown to pass FET
off
50
ns
FAULT PIN
FAULT Input-High Voltage
FAULT Input-Low Voltage
1
VIH
V
VIL
0.66
V
FAULT Output-High Voltage
VOH
External pullup, leakage below 1μA
5.5
V
FAULT Output-Low Voltage
VOL
Sinking 4mA
0.4
V
140
ns
Propagation Delay from Fault
Detect to FAULT Asserted Low
td
V IN OVERVOLTAGE PROTECTION (OVP)
Programmable Threshold for
OVP
Deglitching Time
Deglitching Time Accuracy
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VIN_OVP
tFILTER_OVP
PMBus programmable, default 16V
(Note 1)
14
16
17
18
V
20
µs
±5
%
Maxim Integrated │ 7
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Electrical Characteristics (continued)
(VIN = 12V ±10%, TA = TJ = 0°C to +125°C, unless otherwise noted. Specifications are 100% production tested at TA = TJ = +32°C.
Limits over operating temperature are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0
70
A
0
1.35
V
CURRENT REPORTING (ILOAD) PIN
Current reporting range from single
MAX16545B/C device.
Linear IOUT Reporting Range
Linear-Voltage Range
IOUT = 0A
Offset Current
Current-Reporting Gain
GILOAD
ILOAD current divided by IOUT current
(Note 1)
No capacitor in parallel with RLOAD
resistor.
Bandwidth
0.65
µA
5
μA/A
100
kHz
CURRENT REPORTING (ILOAD_IN) PIN
Linear Current Range. Gain
from ILOAD_IN Pin to ILOAD
Pin = 1
ILOAD_IN
Only when used with VT503 (Note 2)
0
350
µA
ANALOG CURRENT REPORTING ACCURACY
Analog Current-Reporting
Accuracy
IOUT
IOUT = 60A (Note 2)
-1.3
+1.3
IOUT = 8A (Note 2)
-1.8
+1.8
IOUT = 60A (Note 2)
-1.6
+1.6
IOUT = 8A (Note 2)
-2.3
+2.3
IOUT = 8A, VIN = 12V, RLOAD = 4.5kΩ
(Note 2)
-3
+3
IOUT = 60A, VIN = 12V, RLOAD = 4.5kΩ
(Note 2)
-2
+2
-1
+1
10.8V < VOUT < 13.2V
-1
+1
8V < VOUT < 10.8V
-3
+3
-6
+6
IOUT = 60A
-2.5
+2.5
IOUT = 8A
-4.6
+4.6
%
SMBus/PMBus TELEMETRY ACCURACY
Digital Current-Reporting
Accuracy
READ_IOUT
(8Ch),
READ_IIN (89h)
Digital Power-Reporting
Accuracy
READ_PIN (97h)
Digital Input-Voltage Reporting
Accuracy
READ_VIN (88h)
Digital Output-Voltage
Reporting Accuracy
READ_VOUT
(8Bh)
Digital-Temperature Reporting
Accuracy
READ_
TEMPERATURE (Note 2)
_1 (8Dh)
Digital-Energy Reporting
Accuracy
READ_EIN (86h)
%
%
%
%
°C
%
Note 1: Denotes specifications that apply for typical operating junction temperature (TA = TJ = +32°C).
Note 2: Reporting accuracy presented includes 0.1% external resistor tolerance contribution.
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Maxim Integrated │ 8
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Typical Operating Characteristics
Output Current Monitoring
and Reporting - Frequency Response
Output Current Monitoring and Reporting - Linearity
1.6
VILOAD (V)
1.4
1.2
1.0
0.8
06
0.6
0.4
0.2
0
Time/div: 500µs
0
Conditions: IOUT = 0A to 60A
1: IOUT (20A/div)
2: VILOAD (500mV/div)
15
20
25
30
35
40
45
50
55
60
IOUT (A)
Input Power Reporting - PMBus
800
60
700
50
600
PIN PMBus (W)
IVIN PMBus (A)
10
Conditions: RILOAD = 4.53kΩ (0.1%)
IOUT = 0A to 60A
Input Current Reporting - PMBus
70
5
500
40
400
30
300
20
200
10
100
0
0
5
10 15 20 25 30 35 40 45 50 55 60
IVIN (A)
Conditions: IOUT = 0A to 60A
VIN = 12V
Reporting of PMBus Register 89h
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0
0
200
400
600
800
PIN (W)
Conditions: IOUT = 0A to 60A
VIN = 12V
Reporting of PMBus Register 97h
Maxim Integrated │ 9
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Typical Operating Characteristics (continued)
5
4
3
2
1
0
-1
-2
-3
-4
-5
8
12
16
20
24
28
32
36
40
44
48
52
56
60
IOUT (A)
Conditions: IOUT = 0-60A
VIN = 12V
RILOAD = 4.53kΩ (0.1%)
Data on 8 Samples
Limits as defined in EC table
Digital Power Reporting Accuracy
Digital PIN Reporting Error (%)
5
Digital IVIN Reporting Error (%)
Analog IOUT Reporting Error (%)
Digital IVIN Reporting Accuracy
Analog IOUT Reporting Accuracy
5
4
3
2
1
0
-1
-2
-3
-4
-5
8
12 16 20 24 28 32 36 40 44 48 52 56 60
IOUT (A)
Conditions: IOUT = 0A to 60A
VIN = 12V
RILOAD = 4.53kΩ (0.1%)
Data on 8 Samples
Limits as defined in EC table
Startup Controlled with EN/UVLO - No Load
4
3
2
1
0
-1
-2
-3
-4
-5
8
12 16 20 24 28 32 36 40 44 48 52 56 60
IOUT (A)
Conditions: IOUT = 0-60A
VIN = 12V
RILOAD = 4.53kΩ (0.1%)
Data on 8 Samples
Limits as defined in EC table
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Time/Div: 20ms
Conditions: CSS = 47nF
COUT = 2 x 180µF + 6 x 10µF + 2 x 2.2µF
1. VOUT (5V/div)
2. EN/UVLO (1V/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Maxim Integrated │ 10
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Typical Operating Characteristics (continued)
Startup Into Load, Controlled with EN/UVLO 1Ω Resistive Load
Time/Div: 10ms
Conditions: RLOAD = 1Ω, Present at Startup
CSS = 22nF
COUT = 2 x 180µF + 6 x 10µF + 2 x 2.2µF
1. VOUT (5V/div)
2. IOUT (10A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Startup Into Load, Controlled with VIN 1Ω Resistive Load
Time/Div: 10ms
Conditions: CSS = 22nF
COUT = 4 x 330µF + 2 x 180µF + 1 x 10µF + 1 x 2.2µF
RLOAD = 1Ω Present at Startup
1. VOUT (5V/div)
2. IOUT (20A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
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Startup Controlled with VIN - No Load
Time/Div: 50ms
Conditions: CSS = 47nF
COUT = 2 x 180µF + 6 x 10µF + 2 x 2.2µF
No Load at Startup
1. VOUT (5V/div)
2. VIN (5V/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Start Into Short Condition VOUT to GND Short Present at Startup
Time/Div: 500µs
Conditions: VOUT Shorted to GND Prior to Startup
1. VOUT (5V/div)
2. IVIN (10A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Maxim Integrated │ 11
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Typical Operating Characteristics (continued)
Hot Swap Startup - No Load
Time/Div: 50ms
Conditions: CSS = 47nF
No Input Capacitors
COUT = 2 x 180µF + 6 x 10µF + 2 x 2.2µF
No Load Present at Startup
1. VOUT (5V/div)
2. VIN (5V/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
PWRGD Response
Time/Div: 50ms
Conditions: CSS = 47nF
PWRGD Threshold = 8V
VIN_UVLO Threshold = 6.2V
No Load
1. VOUT (5V/div)
2. VIN (2V/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
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Hot Swap Startup Into Load - 1Ω Resistive Load
Time/Div: 5ms
Conditions: CSS = 22nF
No Input Capacitors
COUT = 4 x 330µF + 2 x 180µF + 1 x 10µF + 1 x 2.2µF
RLOAD = 1Ω Present at Startup
1. VOUT (5V/div)
2. IOUT (5A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Integrated FET Self-Check Function
Time/Div: 500ms
Conditions: VOUT Shorted to VIN Prior to Startup
1. VOUT (5V/div)
2. EN/UVLO (1V/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Maxim Integrated │ 12
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Typical Operating Characteristics (continued)
CSS Discharge Fail Protection
Time/Div: 500ms
Conditions: CSS = 47nF
SS Shorted to VIN Prior to Startup
1. VOUT (5V/div)
2. SS (5V/div)
3. EN/UVLO (1V/div)
4. FAULT (2V/div)
Severe OCP
Time/Div: 200µs
Conditions: IOUT = 60A to 120A
OCPM = 68A
Moderate OCP Timeout = 250ms
Severe OCP Setting = 130%
1. VOUT (5V/div)
2. IOUT (20A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
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ROCP Change During Operation
Time/Div: 200ms
Conditions: OCPM_High = 68A
OCPM_LOW = 40A
IOUT = 20A to 45A
0.05A/µs
t = 600ms
Moderate OCP Timeout = 100ms
2. IOUT (10A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Shutdown Controlled by VIN - No Load
Time/Div: 1s
Conditions: IOUT = 0A
FAULT and PWRGD Pullup Voltages Derived
From 12V Supply
1. VOUT (5V/div)
2. VIN (5V/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Maxim Integrated │ 13
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
RDS(ON) (mΩ)
Typical Operating Characteristics (continued)
ON Resistance Including Package Resistance
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0 95
0.95
0.90
0.85
0.80
0
20
80
120
40
60
100
Shutdown Controlled by VIN, 1Ω Resistive Load
Time/Div: 20ms
TJ (°C)
Conditions: RLOAD = 1Ω
1. VOUT (5V/div)
2. IOUT (20A/div)
3. PWRGD (2V/div)
4. FAULT (2V/div)
Single-Pulse Operating Area (SOA)
Thermal Evaluation
130
120
110
100
90
80
70
60
50
40
30
20
10
0
1,000.0
Limited by IDM
t>250ns
1µ
s
Limited by RDS(ON)
DC
250ms
100ms
10ms
1ms
1µs
300ns
250ns
10.0
TA = 55°C, Airflow = 400LFM
TA = 55°C, Airflow = 200LFM
1.0
TA = 70°C, Airflow = 200LFM
Limited by device
characteristics
TA = 70°C, Airflow = 400LFM
0
10
20
30
IOUT (A)
40
50
Conditions: IOUT = 0A to 60A
Thermal Evaluation was performed on
Maxim’s evaluation board
No Heatsink
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60
0.1
0.001
0.01
0.1
VDS(V)
Conditions: TJ = 105°C
1.00
10
100
16V 22V
Maxim Integrated │ 14
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
VDD
ILOAD_IN
SMBUS_ID
SMBUS_DATA
ROCP
PWRGD
FAULT
Pin Configuration
22
21
20
19
18
17
16
SMBUS_CLK
1
15
SMBUS_ALERT
ILOAD
2
14
EN/UVLO
SS
3
13
GND
VBST
4
12
VIN
VOUT
5
11
VIN
10
VIN
9
VIN
VOUT
VOUT
VOUT
6
7
8
(TOP VIEW)
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Maxim Integrated │ 15
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Pin Description
PIN
NAME
1
SMBUS_CLK
FUNCTION
SMBus Clock Node.
ILOAD
Analog Current Representation of the Load Current. Connect this pin to ground through a properly
sized resistor for proper voltage representation. Always keep this pin connected to ground through
a resistor. A capacitor parallel to the RILOAD resistor is required (see Figure 6 for the recommended
value).
3
SS
Soft-Start Node. A capacitor is connected from SS to GND to program soft-start. The soft-start
program capacitor should not exceed 75nF. If a fast-load transient (di/dt > 2.5A/ms) resulting in fast
and large transient output voltage deviation is possible in the application, an additional capacitor
between SS and VOUT is recommended to keep the pass FET VGS above its UVLO threshold.
4
VBST
Charge-Pump Supply for Pass FET Gate Drive. Connect this node to VOUT through a 220nF bypass
capacitor. This supply is designed to be used by the MAX16545B/C and the MAX16543 only. No
additional load or external components other than a bypass capacitor are allowed on the BST pin.
5-8
VOUT
12V Output Power—Load Side.
9-12
VIN
13
GND
2
12V Input Power—Power Supply Side.
Ground. Connect this node to GND plane through vias for proper operation.
12V Input Voltage UVLO pin. Normally connected to the center node of a resistor-divider connected
from VIN to ground. A properly sized capacitor can be placed in parallel to the bottom resistor of the
resistor-divider for additional filtering. In addition to 12V UVLO programming, this node can be used
to enable/disable the MAX16545B/C.
14
EN/UVLO
15
SMBUS_ALERT
16
FAULT
17
PWRGD
18
ROCP
19
SMBUS_DATA
20
SMBUS_ID
SMBus Address Programming and Current Hysteresis Flag. Connect this pin to GND through a
properly sized resistor to select desired address setting.
21
ILOAD_IN
System Current Reporting Input Pin. If current reporting from a single MAX16545B/C device is
desired, connect this pin to GND through a 10kΩ resistor. Use this pin to sum currents from up to
two MAX16543 devices if used in higher-current applications. In this case, the connection from the
ILOAD pin of MAX16543 to ILOAD_IN of MAX16545B/C should be made through a 500Ω resistor.
Refer to the MAX16543 Follower Device section for details.
22
VDD
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SMBus Alert. Open-drain, active-low pin.
Fault Communication (Bidirectional) Pin. This pin is used to indicate/receive detection of latching
fault. See the FAULT Reporting section for more details. Connect this pin to the system bias supply
rail through a 10kΩ resistor. 5V compliant, active-low pin.
Report VIN and VOUT status. See the Power Good (PWRGD) Output section for more details.
Connect this pin to system bias supply rail through a 10kΩ resistor. 5V compliant.
Moderate OCP Threshold Programming Input. Connect this pin to GND using an appropriate
programming resistor. See the Moderate OCP Threshold section for additional details. No other
components are allowed on this pin.
SMBus Data Node.
Internal 1.8V Linear Regulator (LDO) Output. Connect this pin to GND through a 1μF (or higher)
capacitor. See Figure 6 for the correct value. No additional loads or components other than up to two
MAX16543 devices and external properly sized capacitor are allowed on the VDD pin.
Maxim Integrated │ 16
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Block Diagram
INTEGRATED MOSFET
VIN
●
●
● VOUT
CURRENT
SENSE
TEMPERATURE
SENSE
FET DRIVER
FET CONTROL
SS
●
SOFT-START
BOOST UVLO
VBST
●
VDD
●
GATE DRIVE
1.8V LDO
GATE UVLO
●
PROTECTION
ROCP
●
`
● SMBUS_CLK
OVP
EN/UVLO
●
● SMBUS_DATA
OCP
VIN
UVLO
DIGITAL CONTROL
FAULT MONITORING
SMBUS INTERFACE
FAULT_CTRL
● FAULT
VDD
UVLO
POR
SMBUS_ID
●
ILOAD_IN
●
SMBUS_ALERT
TOTAL CURRENT
MONITORING
●
● ILOAD
PWRGD
● PWRGD
GND
●
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Maxim Integrated │ 17
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Theory of Operation
The MAX16545B/C integrated circuit-breaker IC is
designed to provide a complete single-chip circuit-breaker
protection solution for the 12V power bus, in applications
where a power supply is either permanently connected (no
removable assemblies), or is connected and disconnected
at the input side only. It combines power monitoring and
control functions with a low on-resistance pass FET device
that acts as a disconnect switch to limit maximum power
distributed to the load. The IC implements proprietary
integrated lossless current sensing techniques to provide
a highly accurate and compact circuit-breaker protection
solution. The device integrates PMBus/SMBus interface for
digital control and monitoring.
An integrated N-channel power MOSFET is driven by the
FET control circuit that includes a boost circuit to provide
a gate drive. An internal LDO provides VDD bias supply,
enabling effective use of the device in input hot-swap
applications. See the Block Diagram.
Startup
The MAX16545B/C enables the integrated 1.8V VDD LDO
once the 12V supply voltage is high enough to guarantee
LDO operation. Once VDD is valid, the device reads the
SMBus_ID programming resistor value to set the SMBus
address, and initiates itself. During this period, the gate
drive supply capacitor becomes fully charged. Once these
two functions are complete, the device can be controlled
through the enable input.
The enable input (EN/UVLO) has a precise threshold and
provides a VIN_UVLO function, where the enable voltage
is derived from VIN through a resistor-divider, with an
optional control signal used in conjunction with the divider
as shown in Figure 1 and Figure 5. The EN/UVLO pin
must not be pulled high externally other than to pull the
EN/UVLO pin high through a properly sized resistor-divider from the input supply. Though the enable signal can be
pulled low to disable the part, this should only be allowed
to occur when the input voltage supply is within operating
range specified in Electrical Characteristics table.
Safe Operating Area (SOA)
During soft-start, it is important to keep the FET within
its safe operating area. The peak current allowed during
startup is shown in Figure 2. In case resistive short is
possible in the application, it is required to use startup
OCP feature to protect the device. The MAX16545B has
a default startup OCP of 16A, and the MAX16545C has
a default startup OCP of 24A. The startup OCP threshold
must be programmed to a value lower than safe peak
current. Figure 2 assumes pure capacitive or RC load on
the output.
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During normal operation, VGS_UVLO ensures FET is
operating in deep triode region while three levels of OCP
limit the device operating current within safe boundaries. Refer to the SOA curves under Typical Operating
Characteristics for more detail.
Self-Check
Once VBST_UVLO has been cleared, the internal VDD_LDO
is fully enabled and the EN/UVLO pin is above the enable
threshold, the MAX16545B/C initiates a timed output discharge as a self-check procedure. By default, the device
initiates this procedure immediately after VBST_UVLO has
been cleared and the internal VDD_LDO is fully enabled.
If the output does not fall below the programmed selfcheck threshold after a fixed period, the pass FET could
be potentially shorted and the IC asserts both FAULT and
PWRGD pins low. The latched fault condition remains
until restart (EN/UVLO, VIN toggling or restarting through
the OPERATION command). The threshold for the selfcheck procedure can be programmed to one of four different values through the SMBus. See the Config Register
(D0h) for more details. If the output voltage is below the
programmed self-check threshold, the self-check is considered passed and the device proceeds with startup.
Because the device actively discharges the output when
disabled, it should not be used in applications where the
output can remain powered through another path.
In addition a soft-start capacitor discharge procedure
is performed during every restart. The MAX16545B/C
utilizes an integrated resistive element, with resistance
approximately 1kΩ, to discharge the CSS capacitor. The
device checks if the voltage across the CSS capacitor
is below the soft-start threshold shown in the Electrical
Characteristics table after a fixed period of time. If the
voltage across the CSS capacitor is not below the softstart threshold, the device latches the pass FET OFF and
asserts the FAULT pin low.
The MAX16545B/C checks the ROCP value at all times,
including startup (after the bias supply is valid). This
check ensures proper moderate OCP threshold selection.
If the wrong ROCP value is detected, the device reports
the fault by asserting the FAULT signal low. Each latched
fault condition is kept until restart (EN/UVLO, VIN toggling
or restarting through the OPERATION command).
Soft-Start
Once the self-check procedure is complete, the output
voltage soft-start ramp is initiated. During startup, the
CSS capacitor is charged using a constant current source.
Since the integrated FET is configured as a source follower, the output voltage is ramped monotonically at a
rate determined by the external soft-start capacitor. The
soft-start capacitor should not exceed 75nF.
Maxim Integrated │ 18
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
CSS
SYSTEM VDD
VIN
VIN
CBST
SS
VBST
VOUT
VOUT
VDD
EN/UVLO
MAX16545B
MAX16545C
PWRGD
FAULT
SMB US_ALERT
ENABLE
SMB US_CLK
SMB US_DATA
ILOAD
ROCP SMB US_ID
GND
ILOAD_IN
SYSTEM
CONTROLLER
ROCP
RILOAD
Figure 1. Configuration Example
MAX16545B/MAX16545C STARTUP SOA
32
INITIAL TJ = 25°C
SAFE PEAK STARTUP CURRENT (A)
28
INITIAL TJ = 50°C
INITIAL TJ = 75°C
24
INITIAL TJ = 100°C
INITIAL TJ = 125°C
20
16
12
8
4
0
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
SOFT-START DURATION (MS)
Figure 2. Startup SOA
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Maxim Integrated │ 19
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
LDO Operative
12VIN
SMBUS_ID READ
1.8V LDO
VBST charge
VBST
Soft-Start Time
EN/UVLO
1ms
Css Discharge
30ms
Self-Check Procedure
Startup Delay
VCSS
12VOUT
Master
PWRGD
T0
T1
T2
T4
T3
T6
T7'
T7
T5
Figure 3. Startup Timing Diagram
VDD Undervoltage Lockout
The MAX16545B/C implements VDD_UVLO fault monitor and protection. VDD is monitored at all times. Startup
procedures are not initiated until VDD_UVLO is cleared. If
VDD falls below VDD_UVLO during normal operation, the
part shuts down. Once VDD returns to acceptable values,
the part performs a turn-on procedure from soft-start delay
phase.
Current Hysteresis
SMBUS_ID pin is used as current hysteresis flag after
RSMBus_ID decoding is done. If output current is greater
than MFR_SPECIFIC_HYSTH level, the current hysteresis flag is set to high. If output current is less than
MFR_SPECIFIC_HYSTL level, then the current hysteresis flag is set to low.
SMBus_ID Resistor Out of Range
After VDD_UVLO is cleared, the SMBus_ID programming resistor is read. If it is out of range, a latching fault
is tripped. This fault can be cleared by EN/UVLO, VIN
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toggling, or restarting through the OPERATIONS command. The EN/UVLO toggling may mean pulling EN/
UVLO above the threshold and then low after the fault is
detected to reset the fault latch. The value is read again
when EN/UVLO goes high for the second time.
VBST and VGS UVLO
VBST_UVLO is checked when EN/UVLO is above the
enable threshold and remains active while the device
is enabled. The VBST_UVLO can also be tripped before
the FET is turned on, the latching fault can still be reset
by EN/UVLO or VIN toggling or restarting through the
OPERATION command. The gate drive (VGS) UVLO
protection has 10μs internal deglitching filter to prevent
false tripping due to output voltage overshoot if a large,
fast-unloading transient is present. If additional filtering
is desired, an external capacitor can be placed between
VOUT and VSS pins. VBST and VGS UVLO are latching
faults, which result in the pass FET being latched off and
FAULT asserted low. VGS_UVLO is masked for 100ms
during startup to avoid tripping a latching fault.
Maxim Integrated │ 20
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
VIN_UVLO
The VIN is sensed at the EN/UVLO pin through a resistordivider that is used to program the desired VIN_UVLO
threshold. The VIN_UVLO circuit has hysteresis, and if the
EN/UVLO pin voltage falls below the programmed value
during operation, the device turns the integrated FET off
and PWRGD is deasserted. The integrated FET turns on
again if the positive threshold is exceeded and performs
self-test and soft-start. The MAX16545B/C supports VIN_
UVLO warning and fault reporting through PMBus.
Overvoltage Protection (OVP)
The device includes VIN overvoltage protection (OVP) to
protect the system from an overvoltage event that can
harm the downstream circuitry. Overvoltage protection is
disabled by default and can be enabled and programmed
through OTP. The input voltage is constantly monitored,
and if at any time it rises above PMBus programmed
threshold, the pass FET is latched off, FAULT asserted
low and a fault reported.
Overcurrent Detection
The IC actively monitors load current on a 12V power
bus at all times, including startup. Startup overcurrent
proection (OCP) is active during startup. The startup OCP
threshold can be changed to one of three programmable
options using PMBus. Note that changing the startup
OCP to a higher value can violate the startup SOA, in
such cases, tSS needs to be lowered to remain in SOA
(Figure 2). If, at any time during startup, the load current
exceeds the programmed startup OCP threshold, the integrated pass FET is turned off within 10μs and the FAULT
pin is asserted low. This is a latching fault. The device provides three levels of overcurrent protection during normal
operation (after the startup procedure is complete and the
PWRGD flag is set high). The moderate OCP threshold is
set using an external resistor and is therefore programmable over a wide continuous range. Moderate OCP threshold can be exceeded for a limited, programmable, timeout
period without resulting in a fault condition. If the load
current on the 12V power bus exceeds the moderate OCP
threshold for the entire timeout period, but its magnitude
is less than a programmable severe overcurrent threshold
(Table 3), the integrated pass FET is latched off at the end
of the timeout period and the FAULT pin will be asserted
low to indicate a moderate OCP fault condition. Restarting
the system requires EN/UVLO or VIN toggling or restarting through the OPERATION command. Moderate OCP
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timeout is user programmable through PMBus with four
different values.
Severe OCP is the second level of OCP. Severe OCP
threshold is programmed relative to moderate OCP
threshold. Fixed 10μs timeout is supported for the severe
OCP. If at any time the load current exceeds the severe
OCP threshold and the timeout is disabled, the device
turns the integrated pass FET OFF and asserts the
FAULT low. If timeout is enabled, the MAX16545B/C tolerates current exceeding the severe OCP threshold for the
duration of the timeout. If the current is still higher than
the severe OCP threshold by the end of the timeout, the
device turns off and asserts FAULT low. Severe overcurrent protection is a latching fault.
The device features a third level of protection against
severe overload faults, called safe OCP with internallyfixed threshold. If at any time the load current on a 12V
power bus exceeds the safe OCP threshold, the device
turns the pass FET OFF within 250ns and asserts the
FAULT low. The severe OCP threshold should be set to a
value less than the safe OCP threshold.
Table 1. Timing Diagram Example Shown
in Figure 6
POINT/PERIOD
DESCRIPTION
t0
12V VIN applied.
t1
The LDO has enough headroom to
start up.
t2
The internal 1.8V LDO is ready and
MAX16545B/C logic is fully operational.
External bypass capacitors connected to
the VDD pin is fully charged.
t3-t14
t4
SMBus ID resistor reading and VBST
charging. EN/UVLO signal status is
ignored from T3 to T4.
EN/UVLO is active. Startup check-up
procedures can be started after the EN/
UVLO is cleared.
t4-t5
User-programmable startup delay.
t5-t6
Self-test procedure. CSS discharge.
t6-t7
VOUT ramp
t7
Power good (PWRGD) output asserted.
t7+
PWRGD is high, normal operation starts.
Maxim Integrated │ 21
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
The IC supports on-the-fly moderate OCP threshold
changes. The concept is shown in Figure 4. If the resistance seen by the ROCP pin is changed during operation,
the device adjusts the moderate OCP threshold matching
the value selected by external resistive network.
Wrong ROCP Protection
The MAX16545B/C is protected against out of range
ROCP values. Protection is enabled at any time, including
startup. If the ROCP resistor value is detected out of the
permitted range, the device latches the integrated FET
OFF, and it asserts the FAULT pin low. A EN/UVLO or VIN
toggling or a restart through the OPERATION command
must be performed in order to clear the fault and restart
the device. If ROCP is changing during operation by the
system (Figure 4), the design must be such that ROCP is
within range at all times.
Note: If the switch that changes OCP threshold is slower
to transition, the effective resistance on the ROCP pin can
cause severe OCP to trigger during on-the-fly transitions.
Overtemperature Protection (OTP)
The IC includes protection against overtemperature conditions (OTP). If the junction temperature exceeds the
programmable fault threshold, the IC latches the integrated FET OFF and asserts the FAULT output low. To
reenable the IC, the following options are available:
• Toggle EN/UVLO or VIN
• Restart through the OPERATION command
Overtemperature fault and warning thresholds are userprogrammable through the PMBus. Exceeding the overtemperature warning threshold does not latch the FET off.
MIRRO R
+
P RO G RA M S MO D E RA TE
AND SEVERE O C P
TH RE SH O LDS
Fault Input and FAULT Pullup
The FAULT pin is a bidirectional open-drain pin that can
be used for fault communication, from an external circuitry to the MAX16545B/C. To communicate a fault to the
device, the external circuitry must pull the FAULT pin low.
If FAULT is externally pulled low, the device treats it as a
latching fault. Therefore, the pullup voltage source must
be considered to ensure the rail is operational and pulled
high before the device startup cycle.
These are the options for the pullup rail:
• VDD: 1.8V internal LDO rail. This rail is limited to 1.8V,
thus the external system has to be compliant with it.
• System 3.3V or 5V rail. FAULT is 5V compliant, and
therefore, an external higher voltage rail can be used
for pullup. This rail has to be stable when the device is
initiating its startup procedure. If it is not, a false fault
communication can occur.
Power Good (PWRGD) Output
The MAX16545B/C provides a dedicated pin for power
good reporting (PWRGD). PWRGD is asserted high after
startup, when the output voltage exceeds the programmed
PWRGD threshold and the FET is fully enhanced and
operating in its resistive region. In all the other conditions,
the PWRGD pin is deasserted low.
• VDD: 1.8V internal LDO rail. This rail is limited to 1.8V,
thus the external system has to be compliant with it.
• System 3.3V or 5V rail. PWRGD is 5V compliant, and
therefore an external higher voltage rail can be used
for pullup.
Analog Load Current Signal Output
R OCP
SYSTEM
C ONTROLLER
R OCP
ON-TH E-FLY
Figure 4. On-the-Fly Analog Programmable Moderate OCP
Threshold
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The device provides a dedicated pin for fault reporting,
FAULT. If at any time a latching fault is detected, the
FAULT pin is immediately latched low. EN/UVLO or VIN
toggling, or a restart through the OPERATION command
is required to reset the device after latching fault detection.
PWRGD is an open-drain pin, thus an external pullup resistor connected to pullup supply rail is needed.
Different options are available for the pullup rail:
MAX16545B
VREF
FAULT Reporting
The IC includes an output pin, ILOAD to allow the
user to monitor the load current device. The current
sourced by the ILOAD pin is proportional to the current
through the device with the ratio shown in the Electrical
Characteristics table. A properly sized resistor between
the ILOAD pin and GND should be added. A capacitor
parallel to this resistor is required for proper operation.
The MAX16545B/C reports zero current on the ILOAD pin
Maxim Integrated │ 22
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Table 2. Faults Detected and Actions
PARAMETER
FAULT ASSERTED
DESCRIPTION
VDD_UVLO
Internal VDD LDO UVLO
VBST_UVLO
UVLO for VBST
VGS_UVLO
UVLO for VGS
VIN_UVLO
EN/UVLO pin below UVLO threshold
LATCHING
No
No
Yes (Note 1)
Yes
Yes
Yes
N/A (Note 2)
N/A (Note 2)
VIN_UV
VIN below PMBus programmed threshold
Yes
Yes
ROCP_FAULT
ROCP detected out of valid range
SMBus_ID resistor detected out of range
Yes
Yes
Yes
Yes
R_SMBus_ID FAULT
CSS Discharge FAULT
FET Short
Startup OCP
Moderate OCP
Severe OCP
Safe OCP
OTP
VIN_OVP
Soft-start capacitor discharge failed
Yes
Yes
Pass FET short detected during startup self-check
Yes
Yes
Startup overcurrent fault detected
Yes
Yes
Moderate overcurrent fault detected
Yes
Yes
Severe overcurrent fault detected
Yes
Yes
Safe overcurrent fault detected
Yes
Yes
Overtemperature fault threshold exceeded
Yes
Yes
VIN overvoltage detected
Yes
Yes
Note 1: If VBST_UVLO fault occurs before startup, FAULT is not reported and status registers are not updated.
Note 2: VIN_UVLO clears FAULT and the latching event.
during soft-start, it starts reporting load current 5ms after
the pass FET VGS is above its UVLO threshold.
If another device reports the current to the MAX16545B/C
through the ILOAD_IN pin, the MAX16545B/C reports the
total current on the ILOAD pin. When choosing a load
resistor to provide a current reporting voltage, the total
system current must be considered.
MAX16543 Follower Device
Up to two MAX16543 protection ICs can be used in
parallel with the MAX16545B/C to increase total current
capability. Specifically,
●● MAX16545B/C + 1 × MAX16543, 90A current capability
●● MAX16545B/C + 2 × MAX16543, 120A current capability
In these configurations, connect the ILOAD pins of
MAX16543 to the ILOAD_IN pin of MAX16545B/C
through 500Ω resistors for total current reporting. Refer
to the MAX16543 datasheet for more details.
PMBus/SMBus Reporting and Warning
The MAX16545B/C provides PMBus-compliant digital
telemetry through the SMBus as shown in Table 4. The
IC supports input power and input energy reporting. For
average values the sample size is programmable. Peak
values for input/output voltage, output current, input
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Table 3. Requirements for PWRGD
Assertion
PARAMETER
VOUT
VIN
Self-Check
VGS
CONDITION
VOUT > PWRGD threshold
VIN > VIN_UVLO
MOSFET (VIN to VOUT) short not detected
during startup
FET is on and in triode region. There’s a
minimum delay of 5ms before PWRGD
assertion after this condition is met.
power and temperature are stored in dedicated manufacturer-specific registers. The device also provides warning
functions based on programmable warning thresholds, as
per the PMBus specification. The sample size for warning
flags is also programmable.
The device supports fault and status reporting except for
VBST_UVLO fault at startup. If the VBST_UVLO occurs at
startup the device latches off, FAULT is not reported, and
status registers are not updated.
Maxim Integrated │ 23
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Configuration
Equation 2:
The MAX16545B/C is configured using both analog
programming resistors and PMBus. See Table 5 and
Table 6 for programmable parameters.
Moderate OCP Threshold
The moderate overcurrent protection (OCP) threshold is
externally programmable through a resistor connected
to the ROCP pin. The moderate OCP threshold is programmed as shown in Equation 1 and Equation 2. See
the Electrical Characteristics table for VOCPM and GOCP.
Equation 1:
=
I OCP
VOCPM
× GOCP
R OCP
=
R OCP
VOCPM
× GOCP
I OCP
where:
IOCP = moderate overcurrent protection threshold (A)
VOCPM = overcurrent protection reference voltage shown
in Electrical Characteristics table (V)
GOCP = overcurrent protection gain shown in Electrical
Characteristics table (A/A)
ROCP = Value of overcurrent protection programming
resistor (Ω)
where:
IOCP = moderate overcurrent protection threshold (A)
Design Example
VOCPM = overcurrent protection reference voltage shown
in Electrical Characteristics table (V)
Equation 3:
To set moderate OCP to 68.7A nominal, using Equation 2:
GOCP = overcurrent protection gain shown in Electrical
Characteristics table (A/A)
=
R OCP
(
0.8V
× 8 × 10 6
68.7A
)
= 93.1kΩ
ROCP = Value of overcurrent protection programming
resistor (Ω)
Table 4. PMBus/SMBus Reporting
PARAMETER
VIN
DESCRIPTION
Input voltage (PMBus compliant)
VOUT
Output voltage (PMBus compliant)
IOUT
Output current (PMBus compliant)
PIN
Input power (PMBus compliant)
EIN
Input energy (PMBus compliant)
Temperature
Peak VIN
MAX16545B/C chip temperature (PMBus compliant)
Peak value of input voltage (direct reading)
Peak VOUT
Peak value of output voltage (direct reading)
Peak IOUT
Peak value of output current (direct reading)
Peak PIN
Peak value of input power (direct reading)
Peak Temperature
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Peak value of IC temperature (direct reading)
Maxim Integrated │ 24
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Soft-Start Capacitor CSS
where:
During startup, the pass FET device is operated as a
source follower. The soft-start capacitor, CSS is connected between the MOSFET’s gate and ground and is
charged from a fixed current source. The external CSS
capacitor therefore charges linearly and this produces a
linear monotonic ramp for VOUT. The ramp rate is programmable by selecting the appropriate value for CSS.
The ramp rate for the voltage across CSS and, hence,
VOUT is given by Equation 4.
Equation 4:
dV/dt = voltage ramp rate of VOUT (V/μs)
ISS = MAX16545B/C soft-start current source (mA)
CSS = external CSS capacitor value (nF)
Assuming VIN = 12V, Equation 4 can be used to derive
the soft-start time (Equation 5).
Equation 5:
t SS =
12V × C SS
I SS
where:
dV I SS
=
dt C SS
tSS = ramp duration (μs)
ISS = MAX16545B/C soft-start current (mA)
CSS = external soft-start capacitor value (nF)
Table 5. MAX16545B/C Programmability
PARAMETER
PROGRAMMABILITY TYPE
COMPONENT
I/O
Moderate OCP Threshold
Analog
ROCP
ROCP
Softstart Ramp Rate
Analog
CSS
SS
Input UVLO Threshold
SMBus Address
Moderate OCP Timeout
Analog
Divider
EN/UVLO
Programming Resistor
RSMBus_ID
SMBus_ID
Digital
SMBus
SMB_DATA
Startup OCP Threshold
Digital
SMBus
SMB_DATA
Severe OCP Threshold
Digital
SMBus
SMB_DATA
Startup Delay
Digital
SMBus
SMB_DATA
Input OVP Threshold
Digital
SMBus
SMB_DATA
Output PWRGD Threshold (Sets VOUT_UVLO
and Self-Test Thresholds)
Digital
SMBus
SMB_DATA
Self-Check Threshold
Digital
SMBus
SMB_DATA
Overtemperature Warning and Fault Thresholds
Digital
SMBus
SMB_DATA
Input Overpower Warning Threshold
Digital
SMBus
SMB_DATA
Reporting and Warning Averaging Sample Size
Digital
SMBus
SMB_DATA
VIN Undervoltage Warning
Digital
SMBus
SMB_DATA
VOUT Undervoltage Warning
Digital
SMBus
SMB_DATA
VIN Undervoltage Fault
Digital
SMBus
SMB_DATA
Overcurrent Warning
Digital
SMBus
SMB_DATA
Overcurrent Hysteresis
Digital
SMBus
SMB_DATA
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Maxim Integrated │ 25
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Table 6. MAX16545B/C Reporting External Components
PARAMETER
PROGRAMMABILITY TYPE
COMPONENT
I/O
ILOAD Voltage Gain
Analog
RILOAD
ILOAD
Assuming the load inrush current is due to the output
capacitance only, the load current is given by Equation 6
and Equation 7.
where:
Equation 6:
COUT = load capacitance (mF)
=
I VIN I OUT
= C OUT ×
dV
dt
where:
IOUT = load inrush current(A)
COUT = load capacitance (μF)
IINRUSH = desired maximum inrush current due to CLOAD
(A)
CSS = external soft-start capacitor value (nF)
ISS = MAX16545B/C soft-start current (µA)
The max value of tSS is 30ms to guarantee linear startup
as specified in the Electrical Characteristics table, select
CSS to meet this requirement.
COUT = load capacitance (μF)
Note that unloading transients with di/dt > 2.5A/ms can
be large enough to cause output voltage transients >
~100mV. Under these conditions, an additional capacitor between SS and VOUT is recommended to ensure
the pass FET VGS remains above its UVLO threshold.
This capacitor has no noticeable effect on soft-start ramp
time as the differential voltage from VOUT to SS remains
approximately constant during soft-start.
CSS = external soft-start capacitor value (nF)
Design Example
ISS = MAX16545B/C soft-start current (mA)
Assume a maximum design value for inrush current of
10A, and a load capacitance of 2mF.
Equation 7:
=
I VIN I OUT
=
C OUT × I SS
C SS
where:
IOUT = load inrush current(A)
Therefore, the soft-start capacitor can be selected based
on the design value of inrush current using Equation 8.
Equation 8:
C SS =
www.maximintegrated.com
C OUT × I SS
IINRUSH
C SS =
2mF × 30µA
10A
= 6nF minimum (to meet inrush maximum)
Use Equation 5 to show that corresponding tSS in this
example is 2.4ms.
Maxim Integrated │ 26
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Input UVLO
The input UVLO is set using a resistor-divider, as shown
in Figure 5. The enable threshold, VIN_UVLO is given in
the Electrical Characteristics table. The corresponding
value for the VIN rail is given by Equation 9.
Equation 9:
VIN =
or
Equation 10:
VIN_UVLO
K
ILOAD Reporting
The current reporting voltage is set using an external
resistor connected from ILOAD to ground. The maximum
voltage is shown in the Electrical Characteristics table.
The reporting voltage gain is given by Equation 12.
Assuming a maximum signal voltage of 1.35V, Equation
13 can be used to select a value for RILOAD based on a
desired full-scale current.
Equation 12:
VILOAD= R ILOAD × ILOAD × G ILOAD
K=
where:
Equation 13:
VIN_UVLO
VIN
R ILOAD =
VIN = 12V rail input voltage to enable device (V)
VIN_UVLO = EN/UVLO threshold (V)
K = resistor-divider ratio, R2/(R1 + R2)
To set input UVLO to 10.8V. Using Equation 10.
Equation 11:
= 0.0926
where:
R2 is set to 2.26kΩ
R1 = 20kΩ to guarantee startup at min supply voltage
SMBus Address Programming
The SMBus address is programmed to one of sixteen
values using the external resistor as shown in Table 7.
VIN
R1
EN/UVLO
MAX16545B
SYSTEM
CONTROLLER
Figure 5. Programming Resistors for Input UVLO
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ILOAD = load current IOUT = IVIN (A)
ILOAD_FSD = desired full scale of current reporting (A)
GILOAD = current reporting gain from the Electrical
Characteristics table
1.0V
K=
10.8V
R2
where:
VILOAD = current reporting voltage (V)
RILOAD = external current reporting resistor (Ω)
Design Example
ENABLE
1.35V
ILOAD_FSD × G ILOAD
Table 7. SMBus Address Programming
Resistor Values
RSMBus_ID (kΩ)
SMBus Address
0
1.78
40h
1
2.37
41h
2
3.16
42h
3
4.22
43h
4
5.62
44h
5
7.5
45h
6
9.76
46h
7
13
47h
8
17.4
10h
9
23.2
11h
10
30.9
12h
11
41.2
13h
12
54.9
50h
13
73.2
51h
14
97.6
52h
15
127
53h
Note: RSMBus_ID resistor tolerance should be 1% or better.
Maxim Integrated │ 27
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
For example, to set the full-scale current reported to 67.5A.
R ILOAD =
1.35V
(
67.5A × 5 × 10 −6
)
= 4KΩ
Note: RILOAD tolerance should be 0.1% or better.
PMBus Reporting and Warning Settings
The MAX16545B/C provides single sample, averaged
and peak values for voltage, current and power reporting,
and single reading or averaged readings for warnings.
The limits for these parameters and warnings should be
set through PMBus prior to operation if a value other than
the default is required.
Averaging for voltage, power, and current uses an accumulate and dump technique, whereas temperature uses
a shifting window/rolling average. Power is calculated for
every voltage and current sample (as opposed to using
averaged voltage and current), and the result is accumulated in a dedicated register for averaging.
Two independently programmable averaging sample
sizes are used for reporting and warning/status register
use for voltage, current, and power.
• Reporting: 2N samples, with N = 0 to 16 (1 sample to
32K samples)
Sample size is set using Reg_DDh
(CONFIG_2, manufacturer-specific register)
• Warning: 2M samples, with M = 0 to 3 (1 sample to 8
samples)
Sample size is set using Reg D0h (CONFIG,
manufacturer-specific register)
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Setting SMBus Programmable Parameters
See Table 8 for parameters that are programmed through
the SMBus. If a setting other than the default shown
below is required, it must be programmed through
SMBus. Note that some parameters have an enable bit
as well as value bits.
Table 8. Parameters Programmed
Through SMBus and Default Values
PARAMETER
DEFAULT VALUE
Overtemperature Protection
Threshold
135°C
VOUT PWRGD/Self Check
Thresholds
11V/9V
Moderate OCP Timeout
100µs
Startup Delay
Severe OCP Threshold
Input OVP Threshold
Overtemperature Warning
Threshold
0µs
130%
16V (disabled by default)
220°C (disabled by default)
Input Power Warning Threshold
(Disabled by default)
Overcurrent Warning
(Disabled by default)
VIN Undervoltage Warning
(Disabled by default)
VOUT Undervoltage Warning
(Disabled by default)
Current Hysteresis
(Disabled by default)
Startup OCP
MAX16545B = 16A
MAX16545C = 24A
Maxim Integrated │ 28
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Table 9. PMBus/SMBus Registers (Note 1)
ADDRESS
(HEX)
NAME
TYPE
BYTES
DEFAULT
(HEX)
ADDRESS
(HEX)
NAME
TYPE
BYTES
DEFAULT
(HEX)
1
OPERATION
RW
1
80
86
READ_EIN
RO
2
0
3
CLEAR_FAULTS
WO
0
0
88
READ_VIN
RO
2
0
19
CAPABILITY
RO
1
B0
89
READ_IIN
RO
2
0
1B
SMBALERT_
MASK
8B
READ_VOUT
RO
2
0
8C
READ_IOUT
RO
2
0
43
VOUT_UV_
WARN_LIMIT
RW
2
0000
8D
RO
2
0
4A
IOUT_OC_
WARN_LIMIT
READ_
TEMPERATURE
RW
2
03FF
97
READ_PIN
RO
2
0
4F
OT_FAULT_LIMIT
RW
2
0358
98
RO
1
22
51
OT_WARN_LIMIT
RW
2
03FF
PMBUS_
REVISION
99
MFR_ID
BLK
5
VLTR
58
VIN_UV_
WARN_LIMIT
RW
2
0000
9A
MFR_MODEL
BLK
6
VT505
MFR_REVISION
BLK
2
3
59
VIN_UV_
FAULT_LIMIT
9B
RW
2
0000
6B
PIN_OP_
WARN_LIMIT
RW
2
7FFF
78
STATUS_BYTE
RO
1
0
79
STATUS_WORD
RO
2
0
7A
STATUS_VOUT
RO
1
0
7B
STATUS_IOUT
RO
1
7C
STATUS_INPUT
RO
7D
STATUS_
TEMPERATURE
7E
80
(Note 2)
2
0000
D0
CONFIG
RW
2
0
D1
PEAK_VIN
RO
2
0
D2
PEAK_IOUT
RO
2
0
D3
PEAK_PIN
RO
2
0
D4
PEAK_TEMP
RO
2
0
D5
CLEAR_PEAKS
WO
0
0
0
DD
CONFIG2
RW
1
0
1
0
F2
MFR_SPEC_
HYSTL
RW
2
03FF
RO
1
0
STATUS_CML
F3
RW
2
03FF
RO
1
0
MFR_SPEC_
HYSTH
STATUS_MFR_
SPECIFIC
RO
1
0
F4
MFR_SPEC_
HYST_STAT
RO
1
0
Note 1: Registers shown in bold (1h–9Dh) comply with PMBus Power Management Management Protocol Specifications. Refer to
the PMBus specification and Table 15 for more details.
Note 2: SMBALERT_MASK is written to a write_word command and read with a read from a write_block_read_process_call with a
num_bytes field of 1.
www.maximintegrated.com
Maxim Integrated │ 29
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
SMBUS_ALERT Behavior
Any of the STATUS bits (with some exception) asserts the
alert line (SMBUS_ALERT) low.
Alert line can be configured to mask any of the STATUS
bits using the SMBALERT_MASK register.
The only ways to release the alert line are:
Exceptions are:
• CLEAR_FAULTS command
• Bit off of STATUS_BYTE/STATUS_WORD
• ARA (see SMBUS spec v2.0)
• Bit POWERGOOD# of STATUS_WORD
Table 10. Register 80h (STATUS_MFR_SPECIFIC) Interpretation
BIT #
BIT NAME
DESCRIPTION
READING
INDICATION
0
Pass
1
Fail
0
Pass
1
Fail
0
Pass
1
Fail
0
No Fault Input
1
Fault Input
0
No Fault
[7]
SELFCHECK_FAULT
Pass FET and soft-start
self-check
[6]
ROCP_FAULT
ROCP check
[5]
R_SMBUSID_FAULT
SMBus_ID programming
resistor check
[4]
FOLLOWER_FAULT
Fault input
[3]
GATE_UVLO_FAULT
VGS_UVLO fault
[2]
BST_UVLO_FAULT
VBST_UVLO fault
[1]
—
Not used
[0]
—
Always read as 0
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1
Fault
0
No Fault
1
Fault
0
—
1
—
0
—
Maxim Integrated │ 30
1
3
25
27
67
74
79
81
87
88
89
107
120
121
122
123
124
125
126
128
134
136
137
01
03
19
1B
43
4A
4F
51
47
58
59
6B
78
79
7A
7B
7C
7D
7E
80
86
88
89
ADDRESS DEC
www.maximintegrated.com
RW
RW
VOUT_UV_
WARN_LIMIT
IOUT_OC_
WARN_LIMIT
RW
PIN_OP_WARN_
LIMIT
READ_IIN
READ_VIN
RO
RO
BLK
RO
STATUS_MFR_
SPECIFIC
READ_EIN
RO
RO
STATUS_
TEMPERATURE
STATUS_CML
RO
RO
RO
STATUS_INPUT
STATUS_IOUT
STATUS_VOUT
RO
RW
VIN_UV_FAULT_
LIMIT
STATUS_
WORD
RW
VIN_UV_WARN_
LIMIT
RO
RW
VIN_OV_WARN_
LIMIT
STATUS_BYTE
RW
OT_WARN_ LIMIT
RW
**
OT_FAULT_ LIMIT
CN
CAPABILITY
WO
CLEAR_
FAULTS
SMBALERT_
MASK
RW
2
2
7
1
1
1
1
1
1
2
1
2
2
2
2
2
2
2
2
2
1
0
1
0
0
0
0
0
0
0
0
26
0
0
FFFF
0
0
03FF
03FF
0358
03FF
0
0000
B0
0
80
TYPE WIDTH DEFAULT
OPERATION
NAME
enrgy_
cnt[7:0]
vadc_
ave[6]
iadc_
ave[6]
vadc_
ave[7]
iadc_
ave[7]
ROCP_
FA ULT
SELFCHE
CK_FAULT
8’h06
invalid/
unsupported
data
invalid/
unsupported
cmd
0
VIN_OV_
FAULT
OT_
WARNING
0
IOUT_OC_
FAULT
OT_FAULT
0
OFF
OFF
op_warn_t
h[6]
vin_uv_
fault_th[6]
uv_warn_t
h[6]
ov_warn_t
h[6]
0
0
0
op_warn_t
h[7]
vin_uv_
fault_th[7]
uv_warn_t
h[7]
ov_warn_t
h[7]
0
0
0
iadc_
ave[5]
vadc_
ave[5]
enrgy_
cnt[15:8]
iadc_
ave[4]
vadc_
ave[4]
roll_
cnt[7:0]
0
0
TEMPERATURE
TEMPERATURE
op_warn_t
h[2]
vin_uv_
fault_th[2]
uv_warn_t
h[2]
ov_warn_t
h[2]
ovt_fault_t
h[2]
0
0
CML
CML
op_warn_t
h[1]
vin_uv_
fault_th[1]
uv_warn_t
h[1]
ov_warn_t
h[1]
ovt_fault_t
h[1]
0
0
NOA
NOA
op_warn_t
h[0]
vin_uv_
fault_th[0]
uv_warn_t
h[0]
ov_warn_t
h[0]
0
0
iadc_
ave[3]
vadc_
ave[3]
samp_
cnt[7:0]
iadc_
ave[2]
vadc_
ave[2]
samp_
cnt[15:8]
BST_UVL
O_FAULT
0
0
iadc_
ave[1]
vadc_
ave[1]
samp_
cnt[23:16]
0
Other communication
fault
0
iadc_
ave[0]
vadc_
ave[0]
0
0
0
Unit off for IIN_OC_FA IIN_OC_W PIN_OP_
low in V
ULT
ARNING WARNING
0
0
GATE_
R_SMBUS FOLLOWE
UVL_
_ID_FAULT R_FAULT
FAULT
PEC Failed
0
VIN_UV_ VIN_UV_F
WARNING
AULT
IOUT_OC_
WARNING
0
VOUT_
UV_
WARNING
VIN_UV_
FAULT
VIN_UV_
FAULT
IOUT_OC_
FAULT
IOUT_OC_
FAULT
op_warn_t
h[3]
vin_uv_
fault_th[3]
uv_warn_t
h[3]
ov_warn_t
h[3]
ovt_fault_t
h[3]
op_warn_t
h[4]
vin_uv_
fault_th[4]
uv_warn_t
h[4]
ov_warn_t
h[4]
ovt_fault_t
h[4]
0
0
op_warn_t
h[5]
vin_uv_
fault_th[5]
uv_warn_t
h[5]
ov_warn_t
h[5]
ovt_fault_t
h[5]
0
0
0
0
0
0
0
b14
0
0
0
0
0
0
0
b13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b11
HIGH BYTE
b12
0
0
0
0
0
0
0
b10
b8
vin_uv_
fault_th[9]
vin_uv_
fault_th[8]
uv_warn_t uv_warn_t
h[9]
h[8]
ov_warn_t ov_warn_t
h[9]
h[8]
ovt_warn_t ovt_warn_t
h[9]
h[8]
ovt_fault_t ovt_fault_t
h[9]
h[8]
ocp_warn_ ocp_warn_
th[9]
th[8]
vout_uv_w vout_uv_w
arn_th[9]
arn_th[8]
b9
0
0
VOUT
0
0
IOUT/
POUT
0
0
INPUT
0
0
MFR_
SPE
CIFIC
0
0
POWERGOOD#
0
0
0
iadc_
ave[9]
vadc_
ave[9]
0
iadc_
ave[8]
vadc_
ave[8]
BAD_
FET_
HEALTH
op_warn_t op_warn_t op_warn_t op_warn_t op_warn_t op_warn_t op_warn_t op_warn_t
h[15]
h[14]
h[13]
h[12]
h[11]
h[10]
h[9]
h[8]
0
0
0
0
ovt_fault_t
h[6]
ovt_warn_t ovt_warn_t ovt_warn_t ovt_warn_t ovt_warn_t ovt_warn_t ovt_warn_t ovt_warn_t
h[7]
h[6]
h[5]
h[4]
h[3]
h[2]
h[1]
h[0]
0
0
b15
0
vout_uv_w
arn_th[1]
0
0
b0
ovt_fault_t
h[0]
vout_uv_w
arn_th[2]
0
0
b1
ovt_fault_t
h[7]
vout_uv_w
arn_th[3]
0
0
b2
0
vout_uv_w
arn_th[4]
1
0
b3
LOW BYTE
b4
ocp_warn_ ocp_warn_ ocp_warn_ ocp_warn_ ocp_warn_ ocp_warn_ ocp_warn_ ocp_warn_
th[7]
th[6]
th[5]
th[4]
th[3]
th[2]
th[1]
th[0]
vout_uv_w
arn_th[5]
1
0
b5
0
vout_uv_w
arn_th[6]
0
0
b6
vout_uv_w
arn_th[0]
vout_uv_w
arn_th[7]
1
enable
b7
Table 11. MAX16545B/C PMBus Register Map
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Maxim Integrated │ 31
www.maximintegrated.com
154
155
208
209
210
211
212
213
221
242
243
244
253
9B
D0
D1
D2
D3
D4
D5
DD
F2
F3
F4
FD
RW
RO
MFR_SPECIFIC_
HYST H
MFR_SPECIFIC_
HYST _STATUS
RO
RW
MFR_SPECIFIC_
HYST L
PEAK_VOUT
RW
WO
RO
RO
RO
RO
RW
BLK
CONFIG_2
CLEAR_PEAKS
PEAK_TEMP
PEAK_PIN
PEAK_IOUT
PEAK_VIN
CONFIG
MFR_REVISION
BLK
BLK
MFR_ID
153
99
9A
MFR_MODEL
RO
98
PMBUS_
REVISION
151
97
RO
READ_
TEMPERATURE_1
152
141
8D
RO
READ_IOUT
RO
2
1
2
2
2
0
2
2
2
2
2
2
6
5
1
2
2
2
2
0
0
03FF
03FF
0
0
0
0
0
0
0
“1”
“VT505”
“VLTR”
03
0
0
0
0
TYPE WIDTH DEFAULT
RO
140
8C
READ_VOUT
NAME
READ_PIN
139
8B
ADDRESS DEC
iadc_
peak[6]
pwr_
peak[6]
tadc_
peak[6]
iadc_
peak[7]
pwr_
peak[7]
tadc_
peak[7]
0
vout_
peak[6]
vout_
peak[7]
hysth[6]
hystl[6]
0
hysth[7]
hystl[7]
0
vadc_
peak[6]
vadc_
peak[7]
0
mocp_
cfg[1]
“1”
“V”
“V”
0
ocp_cfg
8’h01
8’h05
8’h04
0
pwr_
calc[6]
pwr_
calc[7]
iadc_
ave[6]
iadc_
ave[7]
tadc_
ave[6]
vadc_
ave[6]
vadc_
ave[7]
tadc_
ave[7]
b6
b7
vout_
peak[5]
0
hysth[5]
hystl[5]
ocp_su_cfg
[1]
tadc_
peak[5]
pwr_
peak[5]
iadc_
peak[5]
vadc_
peak[5]
mocp_
cfg[0]
“T”
“L”
1
pwr_
calc[5]
tadc_
ave[5]
iadc_
ave[5]
vadc_
ave[5]
b5
vout_
peak[4]
0
hysth[4]
hystl[4]
ocp_su_
cfg [0]
tadc_
peak[4]
pwr_
peak[4]
iadc_
peak[4]
vadc_
peak[4]
“5”
“T”
0
pwr_
calc[4]
tadc_
ave[4]
iadc_
ave[4]
vadc_
ave[4]
b4
tadc_
peak[2]
pwr_
peak[2]
iadc_
peak[2]
vadc_
peak[2]
ovp_th[0]
“5”
0
pwr_
calc[2]
tadc_
ave[2]
iadc_
ave[2]
vadc_
ave[2]
b2
0
pwr_
calc[0]
tadc_
ave[0]
iadc_
ave[0]
vadc_
ave[0]
b0
tadc_
peak[1]
pwr_
peak[1]
iadc_
peak[1]
vadc_
peak[1]
tadc_
peak[0]
pwr_
peak[0]
iadc_
peak[0]
vadc_
peak[0]
num_aves_ num_aves_
alert[1]
alert[0]
1
pwr_
calc[1]
tadc_
ave[1]
iadc_
ave[1]
vadc_
ave[1]
b1
vout_
peak[2]
HYST pin
status
vout_
peak[3]
hysth[2]
Iout >
oc_warn_
limit
hystl[2]
hysth[3]
hystl[3]
vout_
peak[1]
HYST >
reg_F3
hysth[1]
hystl[1]
vout_
peak[0]
HYST <
reg_F2
hysth[0]
hystl[0]
num_aves_ num_aves_ num_aves_ num_aves_
reporting[3] reporting[2] reporting[1] reporting[0]
tadc_
peak[3]
pwr_
peak[3]
iadc_
peak[3]
vadc_
peak[3]
ovp_th[1]
“0”
“R”
0
pwr_
calc[3]
tadc_
ave[3]
iadc_
ave[3]
vadc_
ave[3]
b3
LOW BYTE
Table 11: MAX16545B/C PMBus Register Map (continued)
0
0
pwr_
peak[15]
0
0
0
0
0
0
b15
0
0
pwr_
peak[14]
0
0
pwr_
calc[14]
0
0
0
b14
0
0
0
pwr_
peak[12]
pwr_
peak[13]
0
0
0
ss_cfg[1]
pwr_
calc[12]
0
0
0
0
0
pwr_
peak[11]
0
0
ss_cfg[0]
pwr_
calc[11]
0
0
0
b11
HIGH BYTE
b12
0
0
disable_
iadc
pwr_
calc[13]
0
0
0
b13
0
0
pwr_
peak[10]
0
0
otp_cfg
pwr_
calc[10]
0
0
0
b10
b9
vout_
peak[9]
hysth[9]
hystl[9]
tadc_
peak[9]
pwr_
peak[9]
iadc_
peak[9]
vadc_
peak[9]
pwrgd_
cfg[1]
pwr_
calc[9]
tadc_
ave[9]
iadc_
ave[9]
vadc_
ave[9]
b8
vout_
peak[8]
hysth[8]
hystl[8]
tadc_
peak[8]
pwr_
peak[8]
iadc_
peak[8]
vadc_
peak[8]
pwrgd_
cfg[0]
pwr_
calc[8]
tadc_
ave[8]
iadc_
ave[8]
vadc_
ave[8]
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Maxim Integrated │ 32
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
CONFIG Register (D0h)
This is a 2-byte register used to configure the MAX16545B/C. The default value is 0000h. The meaning of the bits of this
register is shown in Table 12.
CONFIG_2 Register (DDh)
This single-byte register allows the selection of the number of samples to average for voltage, current and power reporting. It also sets the threshold for startup OCP. Only bits 5:0 are used; bits 7:6 have no effect and should be left as 00b.
The meaning of the bits of this register is shown in Table 13
Table 12. Register D0h
BIT #
BIT NAME
[13]
I-ADC
disable
[12:11]
SETTINGS
(BINARY)
ss_cfg[1:0]
0
I-ADC enabled (default
value)
1
I-ADC dsabled
00
Soft-start delay = 0ms
(default value)
01
Soft-start delay = 10ms
10
Soft-start delay = 20ms
11
Not used
[10]
[9:8]
[7]
DESCRIPTION
BIT #
[6:5]
BIT NAME
mocp_
cfg[1:0]
Not Used
00
Power good threshold =
11V, self-check threshold
= 9V
01
Power good threshold =
10V, self-check threshold
= 8V
10
11
pwrgd_
th[1:0]
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DESCRIPTION
00
Moderate OCP timeout =
100µs (default value)
01
Moderate OCP timeout =
250ms
10
Moderate OCP timeout =
100ms
11
Moderate OCP timeout =
10µs
00
Set VIN_OVP threshold =
16V (default value)
01
Set VIN_OVP threshold
= 14V
10
Set VIN_OVP threshold
= 17V
11
Set VIN_OVP threshold
= 18V
Power good threshold =
9V, self-check threshold
= 7V
00
Sets averaging for PMBus
warning levels to one
sample (default value)
Power good threshold =
8V, self-check threshold
= 6V
01
Sets averaging for PMBus
warning levels to two
samples
10
Sets averaging for PMBus
warning levels to four
samples
11
Sets averaging for PMBus
warning levels to eight
samples
0
Severe OCP = 130% of
Moderate OCP
(default value)
1
Severe OCP = 150% of
moderate OCP
ocp_cfg
SETTINGS
(BINARY)
[3:2]
[1:0]
ovp_th[1:0]
num_aves_
alert[1:0]
Maxim Integrated │ 33
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Peak Voltage, Current, Power, and
Temperature Reporting
The two-byte registers shown in Table 14 provide readings
of the peak values for input/output voltage, output current,
input power and temperature in 10 bits direct format.
These registers can be reset with the CLEAR_PEAKS
command (send byte D5h) or power cycling the part.
BITS #
BIT
NAME
SETTING
(BINARY)
STARTUP OCP
SETTING/AVERAGING
SAMPLE SIZE
[5:4]
su_ocp_
cfg
00
01
10
11
16A
24A
8A
Not Used
0
1 sample
1
2 samples
10
4 samples
[3:0]
11
8 samples
100
16 samples
101
32 samples
110
64 samples
111
128 samples
1000
256 samples
1001
512 samples
1010
1024 samples
1011
2048 samples
1100
4096 samples
1101
8192 samples
1110
16384 samples
1111
32768 samples
Note: One sample for voltage/power/energy reporting is 2ms
and 1ms for current reporting.
Table 14. Manufacturer-Specific Direct
Reporting Registers
REGISTER
ADDRESS
REGISTER
NAME
PARAMETER
D1h
PEAK_VIN
Peak Input Voltage
D2h
PEAK_IOUT
Peak Output Current
D3h
PEAK_PIN
Peak Input Power
D4h
PEAK_TEMP
Peak Temperature
FDh
PEAK_VOUT
Peak Output Voltage
www.maximintegrated.com
The MAX16545B/C uses the PMBus DIRECT number
format; the actual readings in their respective units
correlate with the numerical values read from registers, as
shown in Equation 14.
• Current/Voltage/Temperature: 10-bit resolution
• Power: 16-bit two’s complement representation
Equation 14:
Table 13. Register DDh
num_
aves_
reporting
PMBus Reporting Format
)
(
1
X = Y × 10 −R − b
m
where:
X = the calculated, real-world value in the appropriate
units (A, V, °C, etc.);
m = the slope coefficient, is a two byte, two’s complement
integer;
Y = is a two byte two’s complement integer received from
the PMBus device;
b = the offset is a two byte, two’s complement integer
R = the exponent is a one byte, two’s complement integer.
The values used in the MAX16545B/C for the parameters
above are shown in Table 15. Note that current and power
readings depend on the value of RLOAD, the external current reporting resistor connected between ILOAD and GND.
Table 15. PMBus Equation Parameters
PMBUS
REGISTER
FORMAT
DATA
BYTES
READ_IOUT (8Ch)*,
READ_IIN (89h)*
Direct
2
READ_VOUT (8Bh),
READ_VIN (88h)
Direct
2
7578
READ_
TEMPERATURE_1
(8Dh)
Direct
2
205
READ_PIN (97h)
Direct
READ_EIN (86h)**
Direct
m
b
R UNITS
3.824 x
-4300 -3
RLOAD
A
-2
V
-2
°C
2
0.895 x
-9100 -2
RLOAD
W
2
3.505 x
RLOAD
**
0
6545
0
-5
*Digital current reporting is available even if the FET is OFF.
**Refer to the PMBus specifications for more details on
definition and calculation.
Maxim Integrated │ 34
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Input Capicitance (CIN) Selection
Use of input capacitors is highly recommended to guarantee the input voltage is stable and noise free. For
applications requiring no input capacitors before the
MAX16545B/C, the input-voltage ripple should be less
than 300mV peak-to-peak.
Output Capacitance (COUT) selection
Input TVS Diode Selection
The use of a transient voltage suppression (TVS) diode at
input is necessary to clamp input-voltage transient within
rating of VIN pin of MAX16545B/C (see the Absolute
Maximum Ratings section).
A general guide to select the proper TVS diode is listed
below:
The maximum output capacitance can be calculated as
shown in Equation 15.
●● Choose TVS diode reverse-standoff voltage (VRWM)
≥ operating voltage of MAX16545B/C, 12V (typ).
Equation 15:
●● Choose TVS diode peak-pulse current (IPPM)
≥ maximumt transient peak-pulse current of the
MAX16545B/C, 60A (typ).
× C SS )
(I
C OUT = INRUSH
I SS
where:
CSS = Soft-start programming capacitance.
ISS = Soft-start current, 30µA (typ).
COUT = Maximum load capacitance that can be used at
soft-start with a purely capacitive load.
IINRUSH = Desired maximum inrush current during startup.
Select IINRUSH lower than startup OCP (IOCP(STARTUP))
and within startup SOA, refer to Figure 2.
Design Example
Assume a design value for maximum inrush current of
10A, and a soft-start capacitance of 25nF.
Assume 12V application and 30µA (typ) soft-start current;
soft-start time in this case is 0.01ms. The maximum safe
operating output current is 22A at 0.01ms (refer to the
Startup SOA in Figure 2) and the default Startup OCP
level is 16A (refer to Table 8).
The designed maximum inrush current of 10A is lower
than 16A startup OCP and within startup SOA. The
designed value is valid. Hence, the maximum load
capacitance is calculated as shown in Equation 16.
Equation 16:
=
C OUT
10A × 25nF)
(=
30µA
8.33mF
Additionally, the recommended output capacitance should
be less than 10mF to prevent false triggering of self-check
during startup into precharged output.
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●● Choose TVS clamping voltage (VC) ≤ maximum voltage handling capability of the MAX16545B/C, 22V
(typ) for 150µs.
Recommend SMCJ13A based on selection criteria above.
Output Schottky diode selection
The use of a Schottky diode at output is necessary to
clamp the negative output-voltage spike within the rating of VOUT pin of the MAX16545B/C (see the Absolute
Maximum Ratings section). Select the proper Schottky
diode with low forward-voltage drop (VF) and peak
forward-surge current (IFSM) higher than the expected
inductive current.
Reverse Current is Not Allowed
During Output “Hot-Plug”
The MAX16545B/C devices must not be used in applications where a removable load assembly can be connected while there is stored energy on the input of the
removable load. This is because stored energy in a load
device can force current backwards through the pass-FET
body diode, and the MAX16545B/C was not designed for
this condition.
However, output load cards and devices (such as disk
drives) may be removed and replaced while the system
is powered, provided that the system design guarantees
that the load device cannot be reconnected while there is
still electrical charge on the input capacitance of the load
device.
Maxim Integrated │ 35
CIN
VIN
3.3V
www.maximintegrated.com
2.26kΩ
20kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
0.1µF
18
1.78kΩ
20
SS
21
2
5-8
4
3
RILOAD
4.42kΩ
ILOAD
VOUT
VBST
ILOAD_IN
10kΩ
13
ROCP SMBUS_ID GND
EN/UVLO
VIN
VDD
22
MAX16545B
SMBUS_DATA
SMBUS_CLK
SMBUS_ALERT
FAULT
PWRGD
ROCP
93.1kΩ
14
9-12
19
1
15
16
17
0.1µF
1µF
10000pF
0.22µF
0.1µF
VOUT
COUT
47000pF
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Figure 6. Reference Schematic
Maxim Integrated │ 36
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
MAX16545B Layout Recommendations
Please request Maxim Application Note 6848, Optimal
Application Circuit and Layout Guidelines for the
MAX16545 and MAX16543, for detailed information
on circuit board layout. Important layout details are
summarized here.
VIN and VOUT
●● Minimize input and output trace inductance by using
wide and multiple VIN and VOUT planes for optimal
thermal performance.
●● Use multiple vias to connect interlaying power
planes.
●● Place input capacitors (where applicable) as close to
the IC as possible.
VBST and SS
Place the VBST and SS capacitors on the top layer as
close to the pins as possible.
VDD
Add a VDD plane on the top layer to decouple the VDD
caps close to the IC to form a tighter loop to ground.
ROCP and ILOAD
The ROCP and ILOAD resistors should be placed as
close to the IC as possible.
ILOAD_IN
Connect a 10k resistor to ground.
●● Place output capacitors as close to the IC as possible.
Example
The EV kit layout in Figure 7 shows use of large, wide
power planes for VIN and VOUT on the top layer. CIN and
COUT are close to the IC. The other VIN and VOUT power
layers are connected with multiple vias between the pins.
Ground
●● Use a trace approximately 0.1mm wide by 0.7mm
long from the ground pin (pin 13) on the top layer to
the second-layer AGND island.
Figure 7. Top Layer (Power)
www.maximintegrated.com
Maxim Integrated │ 37
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Ordering Information
PART
NUMBER
MAX16545BGPF+
MAX16545BGPF+T
MAX16545CGPF+*
MAX16545CGPF+T*
DESCRIPTION
PACKAGE
DRAWING
NUMBER
SHIPPING
METHOD
Startup OCP = 16A
MAX16545B
22 FCQFN
Startup OCP = 24A
PACKAGE
MARKING
ES AP-3236
2.5kµ Tape & Reel
MAX16545C
+Denotes a lead(Pb)-free/RoHS-compliant part.
T = Tape and reel.
*Future product—Contact factory for availability.
www.maximintegrated.com
Maxim Integrated │ 38
MAX16545B
MAX16545C
Integrated Protection IC on 12V Bus with an Integrated
MOSFET, Lossless Current Sensing, and PMBus Interface
Revision History
REVISION
NUMBER
REVISION
DATE
0
6/17
PAGES
CHANGED
DESCRIPTION
Initial release
—
1
12/18
Add new MAX16545C version, Improved Figure 2, Startup SOA
1, 5, 18, 19, 21,
28, 34, 35, 38
2
2/19
Revised application use-case and circuit layout guidelines. Clarified TOC titles and
descriptions.
1, 9, 12-14, 18,
35, 37
3
4/19
Revised title of “Output Hot-Plug” warning in the Detailed Description section
35
4
6/19
Added “future product” note to the Ordering Information table.
38
For information on other Maxim Integrated products, visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2019 Maxim Integrated Products, Inc. │ 39
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