EVALUATION KIT AVAILABLE
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
General Description
The MAX16936/MAX16938 are 2.5A current-mode stepdown converters with integrated high-side and low-side
MOSFETs designed to operate with an external Schottky
diode for better efficiency. The low-side MOSFET enables
fixed-frequency forced-PWM (FPWM) operation under
light-load applications. The devices operate with input
voltages from 3.5V to 36V, while using only 28µA
quiescent current at no load. The switching frequency is
resistor programmable from 220kHz to 2.2MHz and can
be synchronized to an external clock. The devices’ output
voltage is available as 5V/3.3V fixed or adjustable from
1V to 10V. The wide input voltage range along with its
ability to operate at 98% duty cycle during undervoltage
transients make the devices ideal for automotive and
industrial applications.
Under light-load applications, the FSYNC logic input
allows the devices to either operate in skip mode for
reduced current consumption or fixed-frequency FPWM
mode to eliminate frequency variation to minimize EMI.
Fixed-frequency FPWM mode is extremely useful for
power supplies designed for RF transceivers where
tight emission control is necessary. Protection features
include cycle-by-cycle current limit and thermal shutdown
with automatic recovery. Additional features include a
power-good monitor to ease power-supply sequencing
and a 180º out-of-phase clock output relative to the internal oscillator at SYNCOUT to create cascaded power
supplies with multiple devices.
The MAX16936/MAX16938 operate over the -40ºC to
+125ºC automotive temperature range and are available
in 16-pin TSSOP-EP and 5mm x 5mm, 16-pin TQFN-EP
packages.
Applications
●● Point-of-Load Applications
●● Distributed DC Power Systems
●● Navigation and Radio Head Units
Benefits and Features
●● Integration and High-Switching Frequency Saves
Space
• Integrated 2.5A High-Side Switch
• Low-BOM-Count Current-Mode Control
Architecture
• Fixed Output Voltage with ±2% Accuracy (5V/3.3V)
or Externally Resistor Adjustable (1V to 10V)
• 220kHz to 2.2MHz Switching Frequency with
Three Operation Modes (Skip Mode, Forced
Fixed-Frequency Operation, and External
Frequency Synchronization)
• Automatic LX Slew-Rate Adjustment for Optimum
Efficiency Across Operating Frequency Range
●● 180° Out-of-Phase Clock Output at SYNCOUT
Enables Cascaded Power Supplies for Increased
Power Output
●● Spread-Spectrum Frequency Modulation Reduces
EMI Emissions
●● Wide Input Voltage Range Supports Automotive
Applications
• 3.5V to 36V Input Voltage Range
• Enable Input Compatible from 3.3V Logic Level
to 42V
●● Robust Performance Supports Wide Range of
Automotive Applications
• 42V Load-Dump Protection
• -40°C to +125°C Automotive Temperature Range
• Thermal-Shutdown Protection
• AEC-Q100 Qualified
●● Power-Good Output Allows Power-Supply
Sequencing
●● Tight Overvoltage Protection Provides Smaller
Overshoot Voltages (MAX16938)
Ordering Information/Selector Guide and Typical
Application Circuit appear at end of data sheet.
19-6626; Rev 18; 3/18
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Absolute Maximum Ratings
SUP, SUPSW, EN to PGND....................................-0.3V to +42V
LX (Note 1).............................................................-0.3V to +42V
SUP to SUPSW......................................................-0.3V to +0.3V
BIAS to AGND..........................................................-0.3V to +6V
SYNCOUT, FOSC, COMP, FSYNC,
PGOOD, FB to AGND......................... -0.3V to (VBIAS + 0.3V)
OUT to PGND.........................................................-0.3V to +12V
BST to LX (Note 1)...................................................-0.3V to +6V
AGND to PGND....................................................-0.3V to + 0.3V
LX Continuous RMS Current....................................................3A
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70NC)*
TSSOP (derate 26.1mw/NC above +70NC)..............2088.8mW
TQFN (derate 28.6mw/NC above +70NC)................2285.7mW
Operating Temperature Range......................... -40NC to +125NC
Junction Temperature......................................................+150NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
*As per JEDEC51 standard (multilayer board).
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Package Thermal Characteristics (Note 2)
TSSOP
TQFN
Junction-to-Ambient Thermal Resistance (BJA)........38.3NC/W
Junction-to-Case Thermal Resistance (BJC)..................3NC/W
Junction-to-Ambient Thermal Resistance (BJA)........... 35NC/W
Junction-to-Case Thermal Resistance (BJC)...............2.7NC/W
Note 1: Self-protected against transient voltages exceeding these limits for ≤ 50ns under normal operation and loads up to the
maximum rated output current.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2FH, CIN = 4.7FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, RFOSC = 12kI,
TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.)
PARAMETER
Supply Voltage
Load Dump Event Supply
Voltage
Supply Current
SYMBOL
CONDITIONS
VSUP, VSUPSW
VSUP_LD
ISUP_STANDBY
MIN
TYP
3.5
tLD < 1s
MAX
UNITS
36
V
42
V
Standby mode, no load, VOUT = 5V,
VFSYNC = 0V
28
40
Standby mode, no load, VOUT = 3.3V,
VFSYNC = 0V
22
35
5
8
FA
FA
Shutdown Supply Current
ISHDN
VEN = 0V
BIAS Regulator Voltage
VBIAS
VSUP = VSUPSW = 6V to 42V,
IBIAS = 0 to 10mA
4.7
5
5.4
V
VBIAS rising
2.95
3.15
3.40
V
450
650
mV
BIAS Undervoltage Lockout
BIAS Undervoltage-Lockout
Hysteresis
VUVBIAS
Thermal Shutdown Threshold
+175
NC
Thermal Shutdown Threshold
Hysteresis
15
NC
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Maxim Integrated │ 2
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Electrical Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2FH, CIN = 4.7FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, RFOSC = 12kI,
TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
4.9
5
5.1
UNITS
OUTPUT VOLTAGE (OUT)
VOUT_5V
FPWM Mode Output Voltage
(Note 3)
VOUT_3.3V
Skip-Mode Output Voltage
(Note 4)
3.366
5.15
VOUT_3.3V
VFB = VBIAS, 6V < VSUPSW < 36V,
MAX16936/38____B/V+, skip mode
3.234
3.3
3.4
V
VFB = VBIAS, 300mA < ILOAD < 2.5A
0.5
VFB = VBIAS, 6V < VSUPSW < 36V
IBST_ON
High-side MOSFET on, VBST - VLX = 5V
IBST_OFF
High-side MOSFET off, VBST - VLX = 5V,
TA = +25°C
ILX
Peak inductor current
ISKIP_TH
TA = +25°C
Low-Side Switch
Leakage Current
2
mA
5
FA
4.5
A
3.75
MAX16936
150
300
400
MAX16938
200
400
500
4
ns
mA
fOSC Q6%
ILX = 1A, VBIAS = 5V
High-side MOSFET off, VSUP = 36V,
VLX = 0V, TA = +25NC
RON_L
%/V
1.5
3
Spread spectrum enabled
RON_H
%
0.02
1
RFOSC = 12kW
High-Side Switch Leakage
Current
Low-Side Switch
On-Resistance
3.3
5
Spread Spectrum
High-Side Switch
On-Resistance
3.234
4.9
LX Rise Time
Skip-Mode Current Threshold
V
No load, VFB = VBIAS,
MAX16936/38____A/V+, skip mode
Line Regulation
LX Current Limit
VFB = VBIAS, 6V < VSUPSW < 36V,
MAX16936/38____B/V+, fixed-frequency
mode
VOUT_5V
Load Regulation
BST Input Current
VFB = VBIAS, 6V < VSUPSW < 36V,
MAX16936/38/38____A/V+, fixedfrequency mode
ILX = 0.2A, VBIAS = 5V
100
220
mI
1
3
FA
1.5
3
I
1
FA
20
100
nA
1.0
1.015
V
VLX = 36V, TA = +25NC
TRANSCONDUCTANCE AMPLIFIER (COMP)
FB Input Current
IFB
FB Regulation Voltage
VFB
FB Line Regulation
DVLINE
Transconductance
(from FB to COMP)
gm
Minimum On-Time
tON_MIN
Maximum Duty Cycle
DCMAX
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FB connected to an external resistordivider, 6V < VSUPSW < 36V (Note 5)
0.99
6V < VSUPSW < 36V
0.02
%/V
VFB = 1V, VBIAS = 5V
700
FS
(Note 4)
80
ns
98
%
Maxim Integrated │ 3
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Electrical Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2FH, CIN = 4.7FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, RFOSC = 12kI,
TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RFOSC = 73.2kI
340
400
460
kHz
RFOSC = 12kI
2.0
2.2
2.4
MHz
OSCILLATOR FREQUENCY
Oscillator Frequency
EXTERNAL CLOCK INPUT (FSYNC)
External Input Clock
Acquisition Time
tFSYNC
External Input Clock
Frequency
1
RFOSC = 12kI (Note 6)
1.8
1.4
External Input Clock High
Threshold
VFSYNC_HI
VFSYNC rising
External Input Clock Low
Threshold
VFSYNC_LO
VFSYNC falling
Soft-Start Time
tSS
5.6
Enable Input High Threshold
VEN_HI
2.4
Enable Input Low Threshold
VEN_LO
Enable Threshold-Voltage
Hysteresis
VEN_HYS
Cycles
2.6
MHz
V
8
0.4
V
12
ms
ENABLE INPUT (EN)
Enable Input Current
IEN
V
0.6
0.2
TA = +25NC
V
0.1
1
FA
POWER GOOD (PGOOD)
PGOOD Switching Level
VTH_RISING
VFB rising, VPGOOD = high
93
95
97
VTH_FALLING
VFB falling, VPGOOD = low
90
92
94
10
25
50
PGOOD Debounce Time
PGOOD Output Low Voltage
ISINK = 5mA
PGOOD Leakage Current
VOUT in regulation, TA = +25NC
SYNCOUT Low Voltage
%VFB
Fs
0.4
V
1
FA
ISINK = 5mA
0.4
V
SYNCOUT Leakage Current
TA = +25NC
1
FA
FSYNC Leakage Current
TA = +25NC
1
FA
OVERVOLTAGE PROTECTION
Overvoltage-Protection
Threshold
Note
Note
Note
Note
VOUT rising
(monitored at FB pin)
MAX16936
107
MAX16938
105
VOUT falling
(monitored at FB pin)
MAX16936
105
MAX16938
102
%
3: Device not in dropout condition.
4: Guaranteed by design; not production tested.
5: FB regulation voltage is 1%, 1.01V (max), for -40°C < TA < +105°C.
6: Contact the factory for SYNC frequency outside the specified range.
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Maxim Integrated │ 4
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Typical Operating Characteristics
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kI, TA = +25NC, unless otherwise noted.)
5V
40
PWM MODE
3.3V
50
40
4.98
4.96
4.94
10
10
4.92
0
0
0.1
10
0.001
2.26
5.04
2.24
5.00
4.98
toc05
433
2.22
2.20
2.18
430
429
427
426
4.90
2.10
2.0
2.5
425
0
0.5
ILOAD (A)
2.5
2.16
2.12
2.08
VOUT = 3.3V
-40 -25 -10 5 20 35 50 65 80 95 110 125
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0.5
1.0
1.5
2.0
2.5
ILOAD (A)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
50
toc08
2.25
45
2.00
1.75
1.50
1.25
1.00
0.75
0.50
40
35
30
25
20
5V/2.2MHz
SKIP MODE
15
0.25
0
2.00
TEMPERATURE (°C)
0
SUPPLY CURRENT (µA)
VOUT = 5V
2.20
2.04
2.0
SWITCHING FREQUENCY vs. RFOSC
SWITCHING FREQUENCY (MHz)
2.24
1.5
2.50
toc07
VIN = 14V,
PWM MODE
1.0
ILOAD (A)
fSW vs. TEMPERATURE
2.28
VOUT = 3.3V
428
VOUT = 3.3V
2.12
1.5
2.5
431
2.14
1.0
2.0
VOUT = 5V
432
4.92
0.5
1.5
VIN = 14V,
PWM MODE
434
VOUT = 5V
2.16
2.2MHz
0
1.0
fSW vs. LOAD CURRENT
435
FSW (MHz)
FSW (MHz)
400kHz
4.94
0.5
ILOAD (A)
VIN = 14V,
PWM MODE
2.28
5.06
4.96
0
10
fSW vs. LOAD CURRENT
2.30
toc04
VOUT = 5V, VIN = 14V
PWM MODE
5.02
0.1
LOAD CURRENT (A)
VOUT LOAD REGULATION
5.08
2.2MHz
4.90
0
LOAD CURRENT (A)
5.10
toc03
5.00
20
0.001
400kHz
5.02
30
0
VOUT (V)
PWM MODE
20
30
FSW (MHz)
5.04
3.3V
toc06
50
5V
60
toc09
3.3V
5.06
5V
70
VOUT = 5V, VIN = 14V
SKIP MODE
5.08
VOUT (V)
EFFICIENCY (%)
3.3V
5.10
SKIP MODE
80
70
60
fSW = 400kHz, VIN = 14V
90
SKIP MODE
5V
80
EFFICIENCY (%)
toc01
fSW = 2.2MHz, VIN = 14V
90
VOUT LOAD REGULATION
EFFICIENCY vs. LOAD CURRENT
100
toc02
EFFICIENCY vs. LOAD CURRENT
100
12
42
72
RFOSC (kΩ)
102
132
10
6
16
26
36
SUPPLY VOLTAGE (V)
Maxim Integrated │ 5
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kI, TA = +25NC, unless otherwise noted.)
5.04
4
3
5V/2.2MHz
SKIP MODE
6
5.05
12
18
24
30
4.98
4.94
VIN = 14V,
PWM MODE
4.92
4.90
6
-40 -25 -10 5 20 35 50 65 80 95 110 125
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
VOUT vs. VIN
FULL-LOAD STARTUP BEHAVIOR
5V/400kHz
PWM MODE
ILOAD = 0A
5.03
36
5.00
4.96
12
18
24
30
36
42
VIN (V)
SLOW VIN RAMP BEHAVIOR
toc14
toc13
0
4.96
4.95
4.94
4.93
4.92
4.91
4.90
2
1
4.97
VOUT (V)
5
toc12
5.02
4.98
6
5V/2.2MHz
PWM MODE
ILOAD = 0A
5.06
4.99
7
VBIAS (V)
SUPPLY CURRENT (µA)
8
VOUT (V)
ILOAD = 0A
5.01
5.00
5.08
toc11
5.02
toc10
9
VOUT vs. VIN
VBIAS vs. TEMPERATURE
SHDN CURRENT vs. SUPPLY VOLTAGE
10
toc15
10V/div
0V
5V/div
0V
VIN
VOUT
5.01
1A/div
4.99
10V/div
VIN
0V
VOUT
0V
5V/div
5V/div
0A VPGOOD
5V/div
ILOAD
4.97
VPGOOD
0V
2A/div
0V
ILOAD
4.95
6
12
18
24
30
2ms
36
0A
4s
VIN (V)
SLOW VIN RAMP BEHAVIOR
SYNC FUNCTION
toc16
DIPS AND DROPS TEST
toc17
toc18
10V/div
10V/div
VIN
0V
VIN
5V/div
VLX
5V/div
0V VFSYNC
VPGOOD
2V/div
0V
10V/div
VLX
0V
2A/div
ILOAD
5V/div
VPGOOD
0A
4s
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0V
5V/div
VOUT
0V
VOUT
5V/2.2MHz
5V/div
200ns
0V
10ms
Maxim Integrated │ 6
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kI, TA = +25NC, unless otherwise noted.)
COLD CRANK
LOAD DUMP
toc19
toc20
VIN
2V/div
VOUT
2V/div
VPGOOD
10V/div
VIN
0V
VOUT
5V/div
2V/div
0V
0V
400ms
100ms
LOAD TRANSIENT (PWM MODE)
SHORT CIRCUIT IN PWM MODE
toc21
fSW = 2.2MHz
VOUT = 5V
VOUT
(AC-COUPLED)
toc22
2V/div
200mV/div
VOUT
0V
INDUCTOR
CURRENT
0A
2A/div
2A/div
LOAD
CURRENT
0A
5V/div
PGOOD
100µs
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0V
10ms
Maxim Integrated │ 7
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
LX
SUPSW
SUP
EN
16 15 14 13 12 11 10
BST
EN
SUP
SUPSW
LX
LX
PGOOD
TOP VIEW
PGND
Pin Configurations
12
11
10
9
9
LX 13
PGND 14
MAX16936
MAX16938
PGOOD 15
EP
SYNCOUT 16
6
7
8
1
2
3
4
BIAS
AGND
FSYNC
FOSC
OUT
FB
FOSC
5
COMP
FSYNC
4
FB
3
EP
+
OUT
2
SYNCOUT
+
1
MAX16936
MAX16938
8
BST
7
AGND
6
BIAS
5
COMP
TQFN
TSSOP
Pin Descriptions
PIN
NAME
FUNCTION
TSSOP
TQFN
1
16
SYNCOUT
2
1
FSYNC
Synchronization Input. The device synchronizes to an external signal applied to FSYNC.
Connect FSYNC to AGND to enable skip mode operation. Connect to BIAS or to an
external clock to enable fixed-frequency forced PWM mode operation.
3
2
FOSC
Resistor-Programmable Switching Frequency Setting Control Input. Connect a resistor
from FOSC to AGND to set the switching frequency.
4
3
OUT
Switching Regulator Output. OUT also provides power to the internal circuitry when the
output voltage of the converter is set between 3V to 5V during standby mode.
5
4
FB
Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set
the output voltage. Connect to BIAS to set the output voltage to 5V.
6
5
COMP
7
6
BIAS
8
7
AGND
9
8
BST
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Open-Drain Clock Output. SYNCOUT outputs 180N out-of-phase signal relative to the
internal oscillator. Connect to OUT with a resistor between 100I and 1kW for 2MHz
operation. For low frequency operation, use a resistor between 1kW and 10kW.
Error Amplifier Output. Connect an RC network from COMP to AGND for stable
operation. See the Compensation Network section for more information.
Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF
capacitor to ground.
Analog Ground
High-Side Driver Supply. Connect a 0.1FF capacitor between LX and BST for
proper operation.
Maxim Integrated │ 8
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Pin Descriptions (continued)
PIN
NAME
FUNCTION
9
EN
SUP Voltage Compatible Enable Input. Drive EN low to disable the device. Drive EN high
to enable the device.
11
10
SUP
Voltage Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND
with a 4.7FF ceramic capacitor. It is recommended to add a placeholder for an RC filter
to reduce noise on the internal logic supply (see the Typical Application Circuit)
12
11
SUPSW
13, 14
12, 13
LX
15
14
PGND
16
15
PGOOD
Open-Drain, Active-Low Power-Good Output. PGOOD asserts when VOUT is above 95%
regulation point. PGOOD goes low when VOUT is below 92% regulation point.
—
—
EP
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective
power dissipation. Do not use as the only IC ground connection. EP must be connected
to PGND.
TSSOP
TQFN
10
Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch.
Bypass SUPSW to PGND with 0.1FF and 4.7FF ceramic capacitors.
Inductor Switching Node. Connect a Schottky diode between LX and PGND.
Power Ground
Detailed Description
The MAX16936/MAX16938 are 2.5A current-mode
step-down converters with integrated high-side and lowside MOSFETs designed to operate with an external
Schottky diode for better efficiency. The low-side MOSFET
enables fixed-frequency forced-PWM (FPWM) operation
under light-load applications. The devices operate with
input voltages from 3.5V to 36V, while using only 28FA
quiescent current at no load. The switching frequency is
resistor programmable from 220kHz to 2.2MHz and can
be synchronized to an external clock. The output voltage
is available as 5V/3.3V fixed or adjustable from 1V to
10V. The wide input voltage range along with its ability to
operate at 98% duty cycle during undervoltage transients
make the devices ideal for automotive and industrial
applications.
Under light-load applications, the FSYNC logic input allows
the device to either operate in skip mode for reduced
current consumption or fixed-frequency FPWM mode
to eliminate frequency variation to minimize EMI. Fixed
frequency FPWM mode is extremely useful for power
supplies designed for RF transceivers where tight emission control is necessary. Protection features include
cycle-by-cycle current limit, overvoltage protection, and
thermal shutdown with automatic recovery. Additional
features include a power-good monitor to ease powersupply sequencing and a 180N out-of-phase clock output
relative to the internal oscillator at SYNCOUT to create
cascaded power supplies with multiple devices.
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Wide Input Voltage Range
The devices include two separate supply inputs (SUP and
SUPSW) specified for a wide 3.5V to 36V input voltage
range. VSUP provides power to the device and VSUPSW
provides power to the internal switch. When the device
is operating with a 3.5V input supply, conditions such as
cold crank can cause the voltage at SUP and SUPSW to
drop below the programmed output voltage. Under such
conditions, the device operates in a high duty-cycle mode
to facilitate minimum dropout from input to output.
Maximum Duty-Cycle Operation
The devices have a maximum duty cycle of 98% (typ).
The IC monitors the off-time (time for which the lowside FET is on) in both PWM and skip modes every
switching cycle. Once the off-time of 25ns (typ) is
detected continuously for 12μs, the low-side FET is
forced on for 150ns (typ) every 12μs. The input voltage
at which the devices enter dropout changes depending on the input voltage, output-voltage, switching frequency, load current, and the efficiency of the design.
The input voltage at which the devices enter dropout
can be approximated as:
VSUP =
VOUT + (I OUT × R ON_H )
0.98
Note: The equation above does not take into account
the efficiency and switching frequency, but is a good
first-order approximation. Use the RON_H number from
the max column in the Electrical Characteristics table.
Maxim Integrated │ 9
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
OUT
COMP
FB
FBSW
PGOOD
FBOK
EN
SUP
AON
HVLDO
BIAS
SWITCH
OVER
BST
SUPSW
EAMP
LOGIC
PWM
HSD
REF
LX
CS
SOFT
START
BIAS
LSD
MAX16936
MAX16938
PGND
SLOPE
COMP
SYNCOUT
OSC
FSYNC
FOSC
AGND
Figure 1. Internal Block Diagram
Linear Regulator Output (BIAS)
The devices include a 5V linear regulator (BIAS) that
provides power to the internal circuit blocks. Connect a
1FF ceramic capacitor from BIAS to AGND. When the
output voltage is set between 3V and 5.5V, the internal
linear regulator only provides power until the output is in
regulation. The internal linear regulator turns off once the
output is in regulation and allows OUT to provide power
to the device. The internal regulator turns back on once
the external load on the output of the device is higher than
100mA. In addition, the linear regulator turns on anytime
the output voltage is outside the 3V to 5.5V range.
Power-Good Output (PGOOD)
The devices feature an open-drain power-good output,
PGOOD. PGOOD asserts when VOUT rises above 95% of
its regulation voltage. PGOOD deasserts when VOUT drops
below 92% of its regulation voltage. Connect PGOOD to
BIAS with a 10kI resistor.
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Overvoltage Protection (OVP)
If the output voltage reaches the OVP threshold, the highside switch is forced off and the low-side switch is forced
on until negative-current limit is reached. After negativecurrent limit is reached, both the high-side and low-side
switches are turned off. The MAX16938 offers a lower
voltage threshold for applications requiring tighter limits
of protection.
Synchronization Input (FSYNC)
FSYNC is a logic-level input useful for operating mode
selection and frequency control. Connecting FSYNC to
BIAS or to an external clock enables fixed-frequency
FPWM operation. Connecting FSYNC to AGND enables
skip mode operation.
The external clock frequency at FSYNC can be higher or
lower than the internal clock by 20%. Ensure the duty cycle
of the external clock used has a minimum pulse width of
100ns. The device synchronizes to the external clock within
Maxim Integrated │ 10
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
one cycle. When the external clock signal at FSYNC is
absent for more than two clock cycles, the device reverts
back to the internal clock.
optimizes the rise time on LX node externally to minimize
EMI while maintaining good efficiency.
System Enable (EN)
The switching frequency (fSW) is set by a resistor
(RFOSC) connected from FOSC to AGND. See Figure 3
to select the correct RFOSC value for the desired switching frequency. For example, a 400kHz switching frequency is set with RFOSC = 73.2kI. Higher frequencies
allow designs with lower inductor values and less output
capacitance. Consequently, peak currents and I2R losses
are lower at higher switching frequencies, but core losses,
gate charge currents, and switching losses increase.
An enable control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.5V. The high
voltage compatibility allows EN to be connected to SUP,
KEY/KL30, or the inhibit pin (INH) of a CAN transceiver.
EN turns on the internal regulator. Once VBIAS is above
the internal lockout threshold, VUVL = 3.15V (typ), the
controller activates and the output voltage ramps up
within 8ms.
A logic-low at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
Spread-Spectrum Option
The devices have an internal spread-spectrum option to
optimize EMI performance. This is factory set and the
S-version of the device should be ordered. For spreadspectrum-enabled ICs, the operating frequency is
varied ±6% centered on FOSC. The modulation signal is
a triangular wave with a period of 110µs at 2.2MHz.
Therefore, FOSC will ramp down 6% and back to 2.2MHz in
110µs and also ramp up 6% and back to 2.2MHz in 110µs.
The cycle repeats.
For operations at FOSC values other than 2.2MHz, the
modulation signal scales proportionally, e.g., at 400kHz,
the 110µs modulation period increases to 110µs x
2.2MHz/400kHz = 605µs.
The internal spread spectrum is disabled if the device is
synced to an external clock. However, the device does not
filter the input clock and passes any modulation (including
spread-spectrum) present on the driving external clock to the
SYNCOUT pin.
Internal Oscillator (FOSC)
Synchronizing Output (SYNCOUT)
SYNCOUT is an open-drain output that outputs a 180N
out-of-phase signal relative to the internal oscillator.
Overtemperature Protection
Thermal-overload protection limits the total power
dissipation in the devices. When the junction temperature exceeds 175NC (typ), an internal thermal sensor
shuts down the internal bias regulator and the step-down
controller, allowing the device to cool. The thermal
sensor turns on the device again after the junction
temperature cools by 15NC.
Applications Information
Setting the Output Voltage
Connect FB to BIAS for a fixed +5V/+3.3 output voltage.
To set the output to other voltages between 1V and 10V,
connect a resistive divider from output (OUT) to FB to
AGND (Figure 2). Use the following formula to determine
the RFB2 of the resistive divider network:
RFB2 = RTOTAL x VFB/VOUT
where VFB = 1V, RTOTAL = selected total resistance of
RFB1, RFB2 in ω, and VOUT is the desired output in volts.
Automatic Slew-Rate Control on LX
The devices have automatic slew-rate adjustment that
optimizes the rise times on the internal HSFET gate
drive to minimize EMI. The IC detects the internal clock
frequency and adjusts the slew rate accordingly. When
the user selects the external frequency setting resistor
RFOSC such that the frequency is > 1.1MHz, the HSFET
is turned on in 4ns (typ). When the frequency is < 1.1MHz
the HSFET is turned on in 8ns (typ). This slew-rate control
VOUT
RFB1
MAX16936
MAX16938
FB
RFB2
Figure 2. Adjustable Output-Voltage Setting
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Maxim Integrated │ 11
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Calculate RFB1 (OUT to FB resistor) with the following
equation:
V
=
R FB1 R FB2 OUT − 1
V
FB
where VFB = 1V (see the Electrical Characteristics table).
FPWM/Skip Modes
The MAX16936/MAX16938 offer a pin selectable skip mode
or fixed-frequency PWM mode option. The IC has an internal
LS MOSFET that turns on when the FSYNC pin is connected to VBIAS or if there is a clock present on the FSYNC pin.
This enables the fixed-frequency-forced PWM mode operation over the entire load range. This option allows the user to
maintain fixed frequency over the entire load range in applications that require tight control on EMI. Even though the
devices have an internal LS MOSFET for fixed-frequency
operation, an external Schottky diode is still required to support the entire load range. If the FSYNC pin is connected
to GND, the skip mode is enabled on the device.
In skip mode of operation, the converter’s switching
frequency is load dependent. At higher load current, the
switching frequency does not change and the operating
mode is similar to the FPWM mode. Skip mode helps
improve efficiency in light-load applications by allowing
the converters to turn on the high-side switch only when
the output voltage falls below a set threshold. As such,
the converters do not switch MOSFETs on and off as
often as is the case in the FPWM mode. Consequently,
the gate charge and switching losses are much lower in
skip mode.
SWITCHING FREQUENCY vs. RFOSC
MAX16936 toc08
2.50
SWITCHING FREQUENCY (MHz)
2.25
2.00
1.75
1.50
1.25
1.00
Inductor Selection
Three key inductor parameters must be specified
for operation with the devices: inductance value (L),
inductor saturation current (ISAT), and DC resistance
(RDCR). To select inductance value, the ratio of inductor peak-to-peak AC current to DC average current (LIR)
must be selected first. A good compromise between size
and loss is a 30% peak-to-peak ripple current to average
current ratio (LIR = 0.3). The switching frequency, input
voltage, output voltage, and selected LIR then determine
the inductor value as follows:
V
(V
− VOUT )
L = OUT SUP
VSUP fSW IOUT LIR
where VSUP, VOUT, and IOUT are typical values (so that
efficiency is optimum for typical conditions). The switching
frequency is set by RFOSC (see Figure 3).
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
IRMS = ILOAD(MAX)
IRMS has a maximum value when the input voltage equals
twice the output voltage (VSUP = 2VOUT), so IRMS(MAX)
= ILOAD(MAX) /2.
Choose an input capacitor that exhibits less than +10NC
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
The input voltage ripple is composed of DVQ (caused
by the capacitor discharge) and DVESR (caused by the
ESR of the capacitor). Use low-ESR ceramic capacitors
with high ripple current capability at the input. Assume
the contribution from the ESR and capacitor discharge
equal to 50%. Calculate the input capacitance and ESR
required for a specified input voltage ripple using the following equations:
0.75
ESRIN =
0.50
0.25
VOUT (VSUP − VOUT )
VSUP
∆VESR
IOUT +
0
12
42
72
102
∆IL
2
132
RFOSC (kΩ)
Figure 3. Switching Frequency vs. RFOSC
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Maxim Integrated │ 12
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
where:
− VOUT ) × VOUT
(V
∆IL = SUP
VSUP × fSW × L
VOUT
R1
and:
IOUT × D(1 − D)
VOUT
=
=
CIN
and D
∆VQ × fSW
VSUPSW
VREF
where IOUT is the maximum output current and D is the
duty cycle.
Output Capacitor
The output filter capacitor must have low enough ESR
to meet output ripple and load transient requirements.
The output capacitance must be high enough to absorb
the inductor energy while transitioning from full-load
to no-load conditions without tripping the overvoltage
fault protection. When using high-capacitance, low-ESR
capacitors, the filter capacitor’s ESR dominates the output
voltage ripple. So the size of the output capacitor depends
on the maximum ESR required to meet the output-voltage
ripple (VRIPPLE(P-P)) specifications:
VRIPPLE (P −P ) =
ESR × ILOAD (MAX ) × LIR
The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the
chemistry of the capacitor technology. Thus, the capacitor
is usually selected by ESR and voltage rating rather than
by capacitance value.
When using low-capacity filter capacitors, such as ceramic
capacitors, size is usually determined by the capacity needed to prevent voltage droop and voltage rise from causing
problems during load transients. Generally, once enough
capacitance is added to meet the overshoot requirement,
undershoot at the rising load edge is no longer a problem.
However, low capacity filter capacitors typically have high
ESR zeros that can affect the overall stability.
Rectifier Selection
The devices require an external Schottky diode rectifier
as a freewheeling diode when they are is configured for
skip-mode operation. Connect this rectifier close to the
device using short leads and short PCB traces. In FPWM
mode, the Schottky diode helps minimize efficiency losses by diverting the inductor current that would otherwise
flow through the low-side MOSFET. Choose a rectifier
with a voltage rating greater than the maximum expected
input voltage, VSUPSW. Use a low forward-voltage-drop
Schottky rectifier to limit the negative voltage at LX. Avoid
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COMP
gm
R2
RC
CF
CC
Figure 4. Compensation Network
higher than necessary reverse-voltage Schottky rectifiers
that have higher forward-voltage drops.
Compensation Network
The devices use an internal transconductance error amplifier with its inverting input and its output available to the
user for external frequency compensation. The output
capacitor and compensation network determine the loop
stability. The inductor and the output capacitor are chosen
based on performance, size, and cost. Additionally, the
compensation network optimizes the control-loop stability.
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required
current through the external inductor. The devices use
the voltage drop across the high-side MOSFET to sense
inductor current. Current-mode control eliminates the
double pole in the feedback loop caused by the inductor
and output capacitor, resulting in a smaller phase shift and
requiring less elaborate error-amplifier compensation than
voltage-mode control. Only a simple single-series resistor
(RC) and capacitor (CC) are required to have a stable,
high-bandwidth loop in applications where ceramic capacitors are used for output filtering (Figure 4). For other types
of capacitors, due to the higher capacitance and ESR, the
frequency of the zero created by the capacitance and ESR
is lower than the desired closed-loop crossover frequency.
To stabilize a nonceramic output capacitor loop, add
another compensation capacitor (CF) from COMP to GND
to cancel this ESR zero.
The basic regulator loop is modeled as a power
modulator, output feedback divider, and an error
amplifier. The power modulator has a DC gain set by
gm O RLOAD, with a pole and zero pair set by RLOAD,
the output capacitor (COUT), and its ESR. The following equations allow to approximate the value for the
gain of the power modulator (GAINMOD(dc)), neglecting
the effect of the ramp stabilization. Ramp stabilization is
Maxim Integrated │ 13
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
necessary when the duty cycle is above 50% and is
internally done for the device.
GAINMOD ( dc
=
) g m × R LOAD
where RLOAD = VOUT /ILOUT(MAX) in I and gm = 3S.
In a current-mode step-down converter, the output capacitor, its ESR, and the load resistance introduce a pole at
the following frequency:
fpMOD
= 1 (2 π × C OUT × R LOAD)
The output capacitor and its ESR also introduce a zero at:
1
fzMOD =
2 π × ESR × C OUT
When COUT is composed of “n” identical capacitors in
parallel, the resulting COUT = n O COUT(EACH), and
ESR = ESR(EACH)/n. Note that the capacitor zero for a
parallel combination of alike capacitors is the same as for
an individual capacitor.
The feedback voltage-divider has a gain of GAINFB =
VFB /VOUT, where VFB is 1V (typ). The transconductance error amplifier has a DC gain of GAINEA(dc) =
gm,EA O ROUT,EA, where gm,EA is the error amplifier
transconductance, which is 700FS (typ), and ROUT,EA is
the output resistance of the error amplifier 50MI.
A dominant pole (fdpEA) is set by the compensation
capacitor (CC) and the amplifier output resistance
(ROUT,EA). A zero (fzEA) is set by the compensation
resistor (RC) and the compensation capacitor (CC).
There is an optional pole (fpEA) set by CF and RC to
cancel the output capacitor ESR zero if it occurs near
the cross over frequency (fC, where the loop gain equals
1 (0dB)). Thus:
fdpEA =
1
2 π × C C × (R OUT,EA + R C )
1
fzEA =
2π × C C × R C
fpEA =
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1
2π × CF × R C
The loop-gain crossover frequency (fC) should be set
below 1/5th of the switching frequency and much higher
than the power-modulator pole (fpMOD):
f
fpMOD
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