EVALUATION KIT AVAILABLE
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
General Description
The MAX16955 is a current-mode, synchronous PWM
step-down controller designed to operate with input voltages from 3.5V to 36V while using only 50μA of quiescent current at no load. The switching frequency is
adjustable from 220kHz to 1MHz by an external resistor
and can be synchronized to an external clock up to
1.1MHz. The MAX16955 output voltage is pin programmable to be either 5V fixed, or adjustable from 1V to
10V. The wide input voltage range, along with its ability
to operate in dropout during undervoltage transients,
makes it ideal for automotive and industrial applications.
The MAX16955 operates in fixed-frequency PWM mode
and low quiescent current skip mode. It features an
enable logic input, which is compatible up to 42V to
disable the device and reduce its shutdown current to
10μA. Protection features include overcurrent limit,
overvoltage, undervoltage, and thermal shutdown with
automatic recovery. The device also features a powergood monitor to ease power-supply sequencing.
The MAX16955 is available in a thermally enhanced 16pin TSSOP package with exposed pad and is specified
for operation over the -40°C to +125°C automotive temperature range.
Features
o
o
o
o
o
o
o
o
o
o
o
o
o
Wide 3.5V to 36V Input Voltage Range
42V Input Transient Tolerance
High Duty Cycle During Undervoltage Transients
220kHz to 1MHz Adjustable Switching Frequency
Current-Mode Control Architecture
Adjustable (1V to 10V) Output Voltage with ±2%
Accuracy
Three Operating Modes
50µA Ultra-Low Quiescent Current Skip Mode
Forced Fixed-Frequency Mode
External Frequency Synchronization
Lowest BOM Count, Current-Mode Control
Architecture
Power-Good Output
Enable Input Compatible from 3.3V Logic Level to
42V
Current-Limit, Thermal Shutdown, and
Overvoltage Protection
-40°C to +125°C Automotive Temperature Range
Automotive Qualified
Typical Operating Circuit
Applications
VBAT
Automotive
CIN
NH
Industrial
SUP
Military
Point of Load
RCOMP
Ordering Information
PART
MAX16955AUE+
MAX16955AUE/V+
BST
MAX16955
CCOMP1
PIN-PACKAGE
-40°C to +125°C
16 TSSOP-EP*
EN
16 TSSOP-EP*
FSYNC
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
NL
DL
PGOOD
RSENSE
PGND
CS
VOUT
5V
OUT
FOSC
RFOSC
L
LX
CCOMP2
TEMP RANGE
-40°C to +125°C
CBST
DH
COMP
SGND
FB
BIAS
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
COUT
CL
19-5791; Rev 4; 7/14
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
ABSOLUTE MAXIMUM RATINGS
SUP and EN to SGND ............................................-0.3V to +42V
LX to PGND ..............................................................-1V to +42V
BST to LX .................................................................-0.3V to +6V
BIAS, FB, PGOOD, FSYNC to SGND .......................-0.3V to +6V
DH to LX ...................................................................-0.3V to +6V
DL to PGND .............................................-0.3V to (VBIAS + 0.3V)
FOSC to SGND ........................................-0.3V to (VBIAS + 0.3V)
CS and OUT to SGND ............................................-0.3V to +11V
PGND to SGND .....................................................-0.3V to +0.3V
Continuous Power Dissipation (TA = +70°C)
TSSOP (derate 26.1mW/°C above +70°C) .............2088.8mW*
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
*As per JEDEC51 standard (multilayer board).
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (θJA) .........38.3°C/W
Junction-to-Case Thermal Resistance (θJC) ...................3°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 76.8kΩ, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SUP Input Voltage Range
SUP Operating Supply Current
Skip Mode Supply Current
SUP Shutdown Supply Current
BIAS Voltage
BIAS Undervoltage Lockout
SYMBOL
MIN
TYP
UNITS
36
V
(Note 3)
I SUP
Fixed 5V output, fixed-frequency, PWM
mode, VFB = VBIAS, no external FETs
connected
1
I SKIP
No load, fixed 5V output
50
90
μA
VEN = 0V
10
20
μA
VSUP = 3.5V, IBIAS = 45mA
6V < VSUP < 36V
3.0
I SHDN,SUP
VBIAS
VUVBIAS
IBIAS(MIN)
3.5
MAX
VSUP
BIAS Undervoltage Lockout
Hysteresis
BIAS Minimum Load
CONDITIONS
4.7
mA
V
5.0
5.3
VBIAS rising
3.1
3.4
VBIAS falling
200
mV
VSUP - VBIAS > 200mV
45
mA
V
OUTPUT VOLTAGE (OUT)
Output Voltage Adjustable
Range
OUT Pulldown Resistance
Output Voltage (5V Fixed Mode)
1.0
RPULL_D
VOUT
VEN = 0V or fault condition active
VSUP = 6V to 36V, VFB = VBIAS, fixedfrequency mode (Note 4)
FB Feedback Voltage
(Adjustable Mode)
VFB
VSUP = 6V to 36V, 0V < (VCS - VOUT)
< 80mV, fixed-frequency mode
FB Current
IFB
VFB = 1.0V
2
10
V
30
4.925
5.0
5.075
V
0.99
1.0
1.01
V
0.02
μA
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
ELECTRICAL CHARACTERISTICS (continued)
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 76.8kΩ, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
FB Line Regulation
CONDITIONS
MIN
TYP
MAX
UNITS
0.02
%/V
gm,EA
1200
μS
Error-Amplifier Output
Impedance
R OUT,EA
30
M
Operating Frequency
f SW
Transconductance (from FB to
COMP)
Minimum On-Time
VEN = V SUP, 6V < VSUP < 36V (Note 4)
RFOSC = 76.8k
360
RFOSC = 30.1k
400
440
1000
kHz
t ON(MIN)
80
ns
Maximum FSYNC Frequency
fFSYNC(MAX)
1100
kHz
Minimum FSYNC Frequency
fFSYNC(MIN)
242
kHz
FSYNC Switching Threshold
High
VFSYNC,HI
FSYNC Switching Threshold Low
VFSYNC,LO
fFSYNC > 110% of internal frequency (20%
duty cycle), f SW = 220kHz
1.4
V
0.4
FSYNC Internal Pulldown
Resistance
1
V
M
CURRENT LIMIT
CS Input Current
Output Input Current
CS Current-Limit Voltage
Threshold
ICS
I OUT
VCS = V OUT = 0V or VBIAS (Note 4)
-1
+1
During normal operation
22
VFB = VBIAS
32
μA
μA
VLIMIT
VCS - VOUT, VBIAS = 5V, VOUT 2.5V
68
80
92
mV
VFB,OV
VOUT = VFB, rising edge
108
113
118
%VFB
FAULT DETECTION
Output Overvoltage Trip
Threshold
Output Overvoltage Trip
Hysteresis
2.5
Output Overvoltage Fault
Propagation Delay
t OVP
Output Undervoltage Trip
Threshold
VFB,UV
Rising edge
25
Falling edge
25
VOUT = VFB; with respect to slewed FB
threshold, falling edge
Output Undervoltage Trip
Hysteresis
PGOOD Leakage Current
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Maxim Integrated
88
μs
93
2.5
Output Undervoltage
Propagation Delay
PGOOD Output Low Voltage
83
%
VPGOOD,L
Falling edge
25
Rising edge (excluding startup)
25
I SINK = 3mA
I PGOOD
TSHDN
%VFB
%
μs
0.4
V
1
μA
(Note 5)
+175
°C
(Note 5)
15
°C
3
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
ELECTRICAL CHARACTERISTICS (continued)
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 76.8kΩ, TA = TJ = -40°C to +125°C, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GATE DRIVE
DH Gate-Driver On-Resistance
RDH
DL Gate-Driver On-Resistance
RDL
DH/DL Dead Time (Note 4)
BST Input Current
tDEAD
IBST
BST On-Resistance
DH = high state
10
DH = low state
2
DL = high state
3.5
DL = low state
2
DL rising (Note 5)
60
DH rising (Note 5)
60
VLX = 0V, VBST = 5V,
VDH - VLX = VDL - VPGND = 0V
1
(Note 5)
5
ns
μA
15
1.2
V
ENABLE INPUT
EN Input Threshold Low
VEN,LO
EN Input Threshold High
VEN,HI
EN Threshold Voltage
Hysteresis
EN Input Current
2.2
V
0.2
V
I EN
0.5
μA
t SS
5
ms
SOFT-START
Soft-Start Ramp Time
Note 2:
Note 3:
Note 4:
Note 5:
4
Devices tested at TA = +25°C. Limits over temperature are guaranteed by design.
For 3.5V operation, the n-channel MOSFET’s threshold voltage should be compatible to (lower than) this input voltage.
Device not in dropout condition.
Guaranteed by design; not production tested.
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Typical Operating Characteristics
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS,
VOUT = 5V, TA = +25°C, unless otherwise noted.)
VOUT = 3.3V STARTUP RESPONSE
(SKIP MODE)
VOUT = 5V STARTUP RESPONSE
(SKIP MODE)
MAX16955 toc01
MAX16955 toc02
10V/div
10V/div
VOUT
2V/div
VOUT
2V/div
IOUT
2A/div
IOUT
2A/div
5V/div
VPGOOD
5V/div
VPGOOD
2ms
SUPPLY CURRENT vs. SUPPLY VOLTAGE
80
25
20
15
70
90
80
EFFICIENCY (%)
SUPPLY CURRENT (µA)
60
50
40
50
40
30
20
20
5
10
10
0
0
6
12
18
24
30
12
18
24
MAX16955 toc06
90
FREQUENCY (kHz)
EFFICIENCY (%)
VOUT = 3.3V
VOUT = 5V
60
50
40
30
20
10
SKIP MODE
0
0.0001
0.001
0.01
0.1
LOAD CURRENT (A)
Maxim Integrated
36
0
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
LOAD CURRENT (A)
SWITCHING FREQUENCY vs. RFOSC
EFFICIENCY vs. LOAD CURRENT
100
70
30
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
80
FIXED-FREQUENCY MODE
0
6
36
VOUT = 3.3V
60
30
10
VOUT = 5V
70
10
1200
1150
1100
1050
1000
950
900
850
800
750
700
650
600
550
500
450
400
350
300
250
200
MAX16955 toc07
SUPPLY CURRENT (mA)
30
SKIP MODE
90
100
MAX16955 toc04
FIXED-FREQUENCY MODE
35
EFFICIENCY vs. LOAD CURRENT
SUPPLY CURRENT vs. SUPPLY VOLTAGE
100
MAX16955 toc03
40
MAX16955 toc05
2ms
25 35 45 55 65 75 85 95 105 115 125 135 145
RFOSC (kI)
5
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Typical Operating Characteristics (continued)
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS,
VOUT = 5V, TA = +25°C, unless otherwise noted.)
0 TO 4A LOAD-TRANSIENT RESPONSE,
VOUT = 5V, PWM MODE
0 TO 4A LOAD-TRANSIENT RESPONSE,
VOUT = 3.3V, PWM MODE
MAX16955 toc08
SYNCHRONIZATION WITH EXTERNAL CLOCK
fFSYNC = 1MHz
MAX16955 toc09
IOUT
2A/div
MAX16955 toc10
VFSYNC
2V/div
IOUT
2A/div
VOUT
200mV/div
VLX
5V/div
VOUT
200mV/div
100µs
1µs
100µs
COLD CRANK (PWM MODE)
LOAD DUMP RESPONSE (SKIP MODE)
MAX16955 toc11
LOAD DUMP RESPONSE (PWM MODE)
MAX16955 toc12
36V
VSUP
5V/div
MAX16955 toc13
VSUP
20V/div
VSUP
20V/div
VOUT
5V/div
VOUT
5V/div
VOUT
5V/div
IL
5A/div
ILX
5A/div
ILX
5A/div
VPGOOD
5V/div
VPGOOD
5V/div
VPGOOD
5V/div
8V
10ms
100ms
SLOW INPUT RESPONSE (PWM MODE)
SLOW INPUT RESPONSE (SKIP MODE)
MAX16955 toc14
14V
10s
6
100ms
MAX16955 toc15
VSUP
10V/div
VSUP
10V/div
VLX
10V/div
VLX
10V/div
VOUT
5V/div
VOUT
5V/div
VPGOOD
5V/div
VPGOOD
5V/div
10s
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Typical Operating Characteristics (continued)
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS,
VOUT = 5V, TA = +25°C, unless otherwise noted.)
SHORT-CIRCUIT RESPONSE, VOUT = 3.3V
SHORT-CIRCUIT RESPONSE, VOUT = 5V
MAX16955 toc17
MAX16955 toc16
5V
3.3V
VOUT
5V/div
VOUT
2V/div
0V
IOUT
5A/div
IOUT
5A/div
VPGOOD
5V/div
VPGOOD
5V/div
400µs
400µs
LOAD REGULATION
2
TA = -40°C
1
0
-1
-2
TA = +125°C
-3
TA = -40°C
0
-1
0
-1
-2
-2
-3
-3
TA = +125°C
-4
-4
-5
-5
-5
4
3
0
1
OUTPUT VOLTAGE (V)
FIXED-FREQUENCY MODE
TA = +25°C
TA = -40°C
TA = +125°C
6
12
18
24
SUPPLY VOLTAGE (V)
Maxim Integrated
-40 -25 -10 5 20 35 50 65 80 95 110 125
4
3
TEMPERATURE (°C)
BIAS VOLTAGE vs. BIAS CURRENT
LINE REGULATION
MAX16955 toc21
LINE REGULATION
3.0
2.5
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
2
FIXED-FREQUENCY MODE
LOAD CURRENT (A)
30
36
3.0
2.5
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
SKIP MODE
TA = +25°C
TA = -40°C
TA = +125°C
5
4
BIAS VOLTAGE ERROR (%)
2
LOAD CURRENT (A)
MAX16955 toc22
1
SKIP MODE
1
-4
0
OUTPUT VOLTAGE (V)
3
2
TA = +25°C
1
MAX16955 toc20
3
MAX16955 toc23
TA = +25°C
ERROR (%)
ERROR (%)
2
4
ERROR (%)
3
SKIP MODE
4
5
MAX16955 toc19
FIXED-FREQUENCY MODE
4
5
MAX16955 toc18
5
OUTPUT-VOLTAGE ERROR
vs. TEMPERATURE
LOAD REGULATION
3
TA = -40°C
2
1
0
-1
-2
TA = +25°C
-3
TA = +125°C
-4
-5
6
12
18
24
SUPPLY VOLTAGE (V)
30
36
0
20
40
60
80
100
BIAS CURRENT (mA)
7
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Typical Operating Characteristics (continued)
(VSUP = VEN = 14V, CIN = 10μF, COUT = 94μF, CBIAS = 2.2μF, CBST = 0.1μF, RFOSC = 66.5kΩ, fOSC = 468kHz, VFB = VBIAS,
VOUT = 5V, TA = +25°C, unless otherwise noted.)
14
12
10
8
6
4
1.0
10.50
10.45
10.40
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
10.35
-0.8
2
-1.0
10.30
0
3
6
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
9 12 15 18 21 24 27 30 33 36
1
DIPS AND DROPS TEST,
PWM MODE, VOUT = 5V
MAX16955 toc27
4
MAX16955 toc28
14V
VSUP
10V/div
VSUP
10V/div
0V
VOUT
2V/div
VOUT
2V/div
VLX
10V/div
VLX
10V/div
VPGOOD
5V/div
VPGOOD
5V/div
10ms
10ms
DIPS AND DROPS TEST,
PWM MODE, VOUT = 3.3V
DIPS AND DROPS TEST,
SKIP MODE, VOUT = 3.3V
MAX16955 toc29
10ms
3
DIPS AND DROPS TEST,
SKIP MODE, VOUT = 5V
14V
0V
2
LOAD CURRENT (A)
TEMPERATURE (°C )
VSUP (V)
8
MAX16955 toc26
10.55
VSUP = 14V
VEN = 0V
FREQUENCY (kHz)
16
10.60
MAX16955 toc25
SHUTDOWN CURRENT (µA)
18
SHUTDOWN CURRENT (µA)
MAX16955 toc24
20
SWITCHING FREQUENCY
vs. LOAD CURRENT
SHUTDOWN CURRENT vs. TEMPERATURE
SHUTDOWN CURRENT vs. VSUP
MAX16955 toc30
VSUP
10V/div
VSUP
10V/div
VOUT
2V/div
VOUT
2V/div
VLX
10V/div
VLX
10V/div
VPGOOD
5V/div
VPGOOD
5V/div
10ms
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Pin Configuration
TOP VIEW
SUP
1
EN
2
FOSC
3
+
16
BST
15
DH
14
LX
MAX16955
FSYNC
4
13
BIAS
SGND
5
12
DL
COMP
6
11
PGND
FB
7
10
PGOOD
9
OUT
EP
CS
8
TSSOP
Pin Description
PIN
NAME
FUNCTION
1
SUP
Input Supply Voltage. SUP is the input voltage to the internal linear regulator. Bypass SUP to PGND with
a 1μF minimum value ceramic capacitor. Connect BIAS and SUP to a 5V rail, if available.
2
EN
Active-High Enable Input. EN is compatible with 5V and 3.3V logic levels. Drive EN logic-high to enable
the output or drive EN logic-low to put the controller in low-power shutdown mode. Connect EN to SUP
for always-on operation. Do not leave EN unconnected.
3
FOSC
Oscillator-Timing Resistor Input. Connect a resistor from FOSC to SGND to set the oscillator frequency
from 220kHz to 1MHz. See the Setting the Switching Frequency section.
4
FSYNC
Synchronization and Mode Selection Input. Connect FSYNC to BIAS to select fixed-frequency PWM
mode and disable skip mode. Connect FSYNC to SGND to select skip mode. Connect FSYNC to an
external clock for synchronization. FSYNC is internally pulled down to ground with a 1M resistor.
5
SGND
Signal Ground. Connect SGND directly to the local ground plane. Connect SGND to PGND at a single
point, typically near the output capacitor return terminal.
6
COMP
Error Amplifier Output. Connect COMP to the compensation feedback network. See the Compensation
Design section.
7
FB
Feedback Regulation Point. Connect FB to BIAS for a fixed 5V output voltage. In adjustable mode,
connect to the center tap of a resistive divider from the output (VOUT) to SGND to set the output voltage.
The FB voltage regulates to 1V (typ).
8
CS
Positive Current-Sense Input. Connect CS to the positive terminal of the current-sense element. Figure
4 shows two different current-sensing options: 1) accurate sense with a sense resistor or 2) lossless
inductor DCR sensing.
Maxim Integrated
9
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Pin Description (continued)
10
PIN
NAME
FUNCTION
9
OUT
10
PGOOD
11
PGND
12
DL
13
BIAS
14
LX
External Inductor Connection. Connect LX to the switched side of the inductor. LX serves as the lower
supply rail for the DH high-side gate driver.
15
DH
High-Side Gate-Driver Output. DH swings from LX to BST. If a resistor is needed between DH and the gate
of the MOSFET, proper resistance value could be provided based on application circuit review result.
16
BST
Boost Flying Capacitor Connection. Connect a ceramic capacitor between BST and LX. See the BoostFlying Capacitor Selection section for details.
—
EP
Exposed Pad. Internally connected to ground. Connect EP to a large contiguous copper plane at SGND
potential to improve thermal dissipation. Do not use as the main ground connection.
Output Sense and Negative Current-Sense Input. When using the internal preset 5V feedback divider
(FB = BIAS), the controller uses OUT to sense the output voltage. Connect OUT to the negative
terminal of the current-sense element.
Open-Drain Power-Good Output. A logic-high voltage on PGOOD indicates that the output voltage is in
regulation. PGOOD is pulled low when the output voltage is out of regulation. Connect a 10k pullup
resistor from PGOOD to the digital interface voltage.
Power Ground. Connect the input and output filter capacitors’ negative terminals to PGND. Connect
PGND externally to SGND at a single point, typically at the output capacitor return terminal.
Low-Side Gate-Driver Output. DL swings from VBIAS to PGND. If a resistor is needed between DL and the
gate of the MOSFET, proper resistance value could be provided based on application circuit review result.
Internal 5V Linear Regulator Output. BIAS provides power for bias and gate drive. Connect a 1μF to
10μF ceramic capacitor from BIAS to PGND. Connect BIAS and SUP to a 5V rail, if available.
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Functional Diagram
SUP
EN
BST
EN
LDO
BST
SWITCH
MAX16955
UG
DH
SGND
LX
BIAS
BUCK
CONTROLLER
PGOOD
REF
BIAS
FB
LG
DL
PWM
EAFB
COMP
EA
REF
PGND
ILIM
OSC
FOSC
CLK
CS
ZX
FSYNC
MODE
SYNC
CS
MODE
OUT
FBI
SGND
Maxim Integrated
11
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Detailed Description
The MAX16955 is a current-mode, synchronous PWM
buck controller designed to drive logic-level MOSFETs.
The device tolerates a wide 3.5V to 42V input voltage
range and generates an adjustable 1V to 10V or fixed
5V output voltage. This device can operate in dropout
mode, making it ideal for automotive and industrial
applications with undervoltage transients.
The internal switching frequency is adjustable from
220kHz to 1MHz with an external resistor and can be
synchronized to an external clock. The high switching
frequency reduces output ripple and allows the use of
small external components. The device operates in
both fixed-frequency PWM mode and a low quiescent
current skip mode. While working in skip mode, the
operating current is as low as 50μA.
The device features an enable logic input to disable the
device and reduce its shutdown current to 10μA.
Protection features include cycle-by-cycle current limit,
overvoltage detection, and thermal shutdown. The
device also features integrated soft-start and a powergood monitor to help with power sequencing.
Supply Voltage Range (SUP)
The supply voltage range (VSUP) of the MAX16955 is compatible to the typical automotive battery voltage range
from 3.5V to 36V and can tolerate up to 42V transients.
If an external 5V rail is available, use this rail to power
the MAX16955 to increase efficiency by bypassing the
internal LDO. Connect both BIAS and SUP to this rail,
while connecting the half-bridge rectifier to the battery.
Slow Ramp-Up of the Input Voltage
If the input voltage (VSUP) ramps up slowly, the device
operates in dropout mode until VSUP is greater than the
regulated output voltage. The dropout mode is detected by monitoring high-side FET on for eight clock
cycles. Once dropout mode is detected, the controller
issues a forced low-side pulse at the rising edge of
switching clock to refresh BST capacitor. This maintains
the proper BST voltage to turn on the high-side MOSFET when the device is in dropout mode.
System Enable (EN) and Soft-Start
An enable control input (EN) activates the MAX16955
from its low-power shutdown mode. EN is compatible
with inputs from automotive battery level down to 3.5V.
The high-voltage compatibility allows EN to be connected to SUP, KEY/KL30, or the inhibit pin (INH) of a CAN
transceiver.
12
A logic-high at EN turns on the internal regulator. Once
VBIAS is above the internal lockout level, VUVL = 3.1V
(max), the controller starts up with a 5ms fixed soft-start
time. Once regulation is reached, PGOOD goes high
impedance.
A logic-low at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces
the quiescent current to 10μA (typ).
To protect the low-side MOSFET during shutdown, the
step-down regulator cannot be enabled until the output
voltage drops below 1.25V. An internal 30Ω pulldown
switch helps discharge the output. If the EN pin is toggled low then high, the switching regulator shuts down
and remains off until the output voltage decays to
1.25V. At this point, the MAX16955 turns on using the
soft-start sequence.
Fixed 5V Linear Regulator (BIAS)
The MAX16955 has an internal 5V linear regulator to
provide its own 5V bias from a high-voltage input supply at SUP. This bias supply powers the gate drivers for
the external n-channel MOSFETs and provides the
power required for the analog controller, reference, and
logic blocks. The bias rail needs to be stabilized by a
1μF or greater capacitance at BIAS, and can provide
up to 50mA (typ) total current.
Oscillator Frequency and External
Synchronization
The MAX16955 provides an internal oscillator
adjustable from 220kHz to 1MHz. To set the switching
frequency, connect a resistor from FOSC to SGND. See
the Setting the Switching Frequency section.
The MAX16955 can also be synchronized to an external
clock by connecting the external clock signal to
FSYNC. For proper frequency synchronization,
FSYNC’s input frequency must be at least 10% higher
than the programmed internal oscillator frequency. A
rising clock edge on FSYNC is interpreted as a synchronization input. If the FSYNC signal is lost, the internal oscillator takes control of the switching rate,
returning to the switching frequency set by the resistor
connected to FOSC. This maintains output regulation
even with intermittent FSYNC signals. The maximum
synchronizable frequency is 1.1MHz.
When FSYNC is connected to SGND, the device operates in skip mode. When FSYNC is connected to BIAS
or driven by an external clock, the MAX16955 operates
in skip mode during soft-start and transitions to fixedfrequency PWM mode after soft-start is over.
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Error Detection and Fault Behavior
Several error-detection mechanisms prevent damage to
the MAX16955 and the application circuit:
•
•
•
•
•
Overcurrent protection
Output overvoltage protection
Undervoltage lockout at BIAS
Power-good detection of the output voltage
Overtemperature protection of the IC
Overcurrent Protection
The MAX16955 provides cycle-by-cycle current limiting
as long as the FB voltage is greater than 0.7V (i.e., 70%
of the regulated output voltage). If the output voltage
drops below 70% of the regulation point due to overcurrent event, 16 consecutive current-limit events initiate
restart. If the overcurrent is still present during restart,
the MAX16955 shuts down and initiates restart. This
automatic restart continues until the overcurrent condition disappears. If the overcurrent condition disappears
at any restart attempt, the device enters the normal
soft-start routine.
Output Overvoltage Protection
The MAX16955 features an internal output overvoltage
protection. If VOUT increases by 13% (typ) of the intended
regulation voltage, the high-side MOSFET turns off and
the low-side MOSFET turns on. The low-side MOSFET
stays on until VOUT goes back into regulation. Once VOUT
is in regulation, the normal switching cycles continue.
Undervoltage Lockout (UVLO)
The BIAS input undervoltage lockout (UVLO) circuitry
inhibits switching if the 5V bias supply (BIAS) is below
its UVLO threshold, 3.1V (typ). If the BIAS voltage
drops below the UVLO threshold, the controller stops
switching and turns off both high-side and low-side
gate drivers until the BIAS voltage recovers.
Power-Good Detection (PGOOD)
The MAX16955 includes a power-good comparator with
added hysteresis to monitor the step-down controller’s
output voltage and detect the power-good threshold.
The PGOOD output is open drain and should be pulled
up with an external resistor to the supply voltage of the
logic input it drives. This voltage should not exceed 6V.
Pullup resistor should not be less than 1kΩ such that
pulldown voltage is less than 400mV with a 5V supply.
PGOOD can sink up to 4mA of current while low.
PGOOD asserts low during the following conditions:
• Standby mode
• Undervoltage with VOUT below 90% (typ) its set
value
Maxim Integrated
•
Overvoltage with VOUT above 111% (typ) its set
value
The power-good levels are measured at FB if a feedback divider is used. If the MAX16955 is used in 5V
mode with FB connected to BIAS, OUT is used as a
feedback path for voltage regulation and power-good
determination.
Overtemperature Protection
Thermal-overload protection limits total power dissipation in the MAX16955. When the junction temperature
exceeds +175°C (typ), an internal thermal sensor shuts
down the step-down controller, allowing the IC to cool.
The thermal sensor turns on the IC again after the junction temperature cools by 15°C and the output voltage
has dropped below 1.25V (typ).
A continuous overtemperature condition can cause
on-/off-cycling of the device.
Fixed-Frequency, Current-Mode
PWM Controller
The MAX16955’s step-down controller uses a PWM,
current-mode control scheme. An internal transconductance amplifier establishes an integrated error voltage.
The heart of the PWM controller is an open-loop comparator that compares the integrated voltage-feedback
signal against the amplified current-sense signal plus
the slope compensation ramp, which are summed into
the main PWM comparator to preserve inner-loop stability and eliminate inductor stair casing. At each falling
edge of the internal clock, the high-side MOSFET turns
on until the PWM comparator trips, the maximum duty
cycle is reached, or the peak current limit is reached.
During this on-time, current ramps up through the
inductor, storing energy in its magnetic field and sourcing current to the output. The current-mode feedback
system regulates the peak inductor current as a function of the output-voltage error signal. The circuit acts
as a switch-mode transconductance amplifier and eliminates the influence of the output LC filter double pole.
During the second half of the cycle, the high-side
MOSFET turns off and the low-side MOSFET turns on.
The inductor releases the stored energy as the current
ramps down, providing current to the output. The output capacitor stores charge when the inductor current
exceeds the required load current and discharges
when the inductor current is lower, smoothing the voltage across the load. Under soft-overload conditions,
when the peak inductor current exceeds the selected
current limit, the high-side MOSFET is turned off immediately. The low-side MOSFET is turned on and
remains on to let the inductor current ramp down until
the next clock cycle.
13
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Forced Fixed-Frequency PWM Mode
The low-noise forced fixed-frequency PWM mode
(FSYNC connected to BIAS or an external clock) disables the zero-crossing comparator, which controls the
low-side switch on-time. This forces the low-side gatedriver waveform to constantly be the complement of the
high-side gate-drive waveform. The inductor current
reverses at light loads while DH maintains a duty factor
of VOUT/VSUP.
The benefit of forced fixed-frequency PWM mode is to
keep the switching frequency fairly constant. However,
forced fixed-frequency PWM operation comes at a cost:
the no-load 5V supply current can be up to 45mA,
depending on the external MOSFETs and switching frequency. Forced fixed-frequency PWM mode is most
useful for avoiding audio frequency noises and improving load-transient response.
Light-Load Low-Quiescent Operating
(Skip) Mode
The MAX16955 includes a light-load operating mode
control input (FSYNC = SGND) used to enable or disable the zero-crossing comparator. When the zerocrossing comparator is enabled, the regulator forces
DL low when the current-sense inputs detect zero
inductor current. This keeps the inductor from discharging the output capacitor and forces the regulator to skip
pulses under light-load conditions to avoid overcharging the output.
The lowest operating currents can be achieved in skip
mode. When the MAX16955 operates in skip mode with
no external load current, the overall current consumption can be as low as 50μA. A disadvantage of skip
mode is that the operating frequency is not fixed.
Skip-Mode Current-Sense Threshold
When skip mode is enabled, the on-time of the stepdown controller terminates when the output voltage
exceeds the feedback threshold and when the currentsense voltage exceeds the idle-mode current-sense
threshold (VCS,IDLE). See Figure 1. Under light-load
conditions, the on-time duration depends solely on the
skip-mode current-sense threshold, which is 25mV
(typ). This forces the controller to source a minimum
amount of power with each cycle. To avoid overcharging the output, another on-time cannot begin until the
output voltage drops below the feedback threshold.
Because the zero-crossing comparator prevents the
switching regulator from sinking current, the controller
must skip pulses. Therefore, the controller regulates the
valley of the output ripple under light-load conditions.
14
Automatic Pulse-Skipping Crossover
In skip mode, an inherent automatic switchover to pulse
frequency modulation (PFM) takes place at light loads.
This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current’s zero crossing. The zero-crossing comparator
senses the inductor current across CS to OUT. Once
(VCS - VOUT) drops below the 6mV zero-crossing, current-sense threshold, the comparator forces DL low.
This mechanism causes the threshold between pulseskipping PFM and nonskipping PWM operation to coincide with the boundary between continuous and
discontinuous inductor-current operation (also known
as the critical conduction point). The load-current level
at which PFM/PWM crossover occurs, ILOAD(SKIP), is
given by:
ILOAD (SKIP) [ A ] =
(VSUP − VOUT ) VOUT
2 × VSUP × fSW [MHz ] × L [μH]
The switching waveforms can appear noisy and asynchronous when light-loading causes pulse-skipping
operation. This is a normal operating condition that
results in high light-load efficiency. Trade-offs in PFM
noise vs. light-load efficiency is made by varying the
inductor value. Generally, low inductor values produce
a higher efficiency under light load, while higher values
result in higher full-load efficiency (assuming that the
coil resistance remains constant) and less output-voltage ripple. Drawbacks of using higher inductor values
include larger physical size and degraded load-transient response (especially at low input-voltage levels).
MOSFET Gate Drivers (DH and DL)
The DH and DL drivers are optimized for driving logiclevel n-channel power MOSFETs. The DH high-side
n-channel MOSFET driver is powered by charge pumping at BST, while the DL synchronous rectifier drivers
are powered directly by the 5V linear regulator (BIAS).
An adaptive dead-time circuit monitors the DH and DL
outputs and prevents the opposite-side MOSFET from
turning on until the other MOSFET is fully off. Thus, the
circuit allows the high-side driver to turn on only when
the DL gate driver has been turned off. Similarly, it prevents the low-side (DL) from turning on until the DH
gate driver has been turned off.
The adaptive driver dead-time allows operation without
shoot-through with a wide range of MOSFETs, minimizing delays and maintaining efficiency. To minimize stray
impedance, use very short, wide traces (50 mils to 100
mils wide if the MOSFET is 1in from the controller).
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
tON(SKIP) =
VOUT
VSUPfSW
INDUCTOR CURRENT
IPK
IL
ILOAD = IPK/2
0
ON-TIME
TIME
Figure 1. Pulse-Skipping/Discontinuous Crossover Point
Synchronous rectification reduces conduction losses in
the rectifier by replacing the normal low-side Schottky
catch diode with a low-resistance MOSFET switch. The
internal pulldown transistor that drives DL low is
robust, with a 1.6Ω (typ) on-resistance. This low onresistance helps prevent DL from being pulled up during the fast rise time of the LX node, due to capacitive
coupling from the drain to the gate of the low-side synchronous rectifier MOSFET. Applications with high
input voltages and long-inductive driver traces can
require additional gate-to-source capacitance. This
ensures that fast-rising LX edges do not pull up the
low-side MOSFET’s gate, causing shoot-through currents. The capacitive coupling between LX and DL created by the MOSFET’s gate-to-drain capacitance (CGD
= CRSS), gate-to-source capacitance (CGS = CISS C GD ), and additional board parasitic should not
exceed the following minimum threshold:
⎞
⎛C
VGS(TH) > VSUP ⎜ RSS ⎟
⎝ CISS ⎠
Although a low resistive path from DH and DL to the
MOSFET gates is encouraged, there are cases where
series resistors can be added. For instance, a series resistor can be added to the DL path. However, in this case,
should have at least as much resistance in series with the
BST capacitor to help prevent shoot-through current.
High-Side Gate-Drive Supply (BST)
The high-side MOSFET is turned on by closing an internal switch between BST and DH. This provides the
necessary gate-to-source voltage to turn on the highside MOSFET, an action that boosts the gate-drive signal
Maxim Integrated
above VSUP. The boost capacitor connected between
BST and LX holds up the voltage across the flying gate
driver during the high-side MOSFET on-time.
The charge lost by the boost capacitor for delivering
the gate charge is refreshed when the high-side
MOSFET is turned off and the LX node swings down
to ground. When the LX node is low, an internal highvoltage switch connected between BIAS and BST
recharges the boost capacitor to the BIAS voltage.
See the Boost-Flying Capacitor Selection section to
choose the right size of the boost capacitor.
Dropout Behavior During Undervoltage Transients
The controller generates a low-side pulse every four
clock cycles to refresh the BST capacitor during lowdropout operation. This guarantees that the MAX16955
operates in dropout mode during undervoltage transients like cold crank.
Current Limiting and Current-Sense Inputs
(CS and OUT)
The current-limit circuit uses differential current-sense
inputs (CS and OUT) to limit the peak inductor current.
If the magnitude of the current-sense signal exceeds
the current-limit threshold, the PWM controller turns off
the high-side MOSFET. The actual maximum load current is less than the peak current-limit threshold by an
amount equal to half the inductor ripple current.
Therefore, the maximum load capability is a function of
the current-sense resistance, inductor value, switching
frequency, and duty cycle (V OUT /V SUP ). See the
Current Sensing section.
Design Procedure
Effective Input Voltage Range
Although the MAX16955 controller can operate from
input supplies up to 42V and regulate down to 1V, the
minimum voltage conversion ratio (VOUT/VSUP) might
be limited by the minimum controllable on-time. For
proper fixed-frequency PWM operation, the voltage
conversion ratio should obey the following condition:
VOUT
> tON(MIN) × fSW
VSUP
where tON(MIN) is 80ns and fSW is the switching frequency in Hz. If the desired voltage conversion does
not meet the above condition, then pulse skipping
occurs to decrease the effective duty cycle. To avoid
this, decrease the switching frequency or lower the
input voltage (VSUP).
15
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Setting the Output Voltage
Connect FB to BIAS to enable the fixed step-down controller output voltage (5V), set by a preset, internal
resistive voltage-divider connected between the output
(OUT) and SGND.
To achieve other output voltages between 1V to 10V,
connect a resistive divider from OUT to FB to SGND
(Figure 2). Select RFB2 (FB to SGND resistor) less than
or equal to 100kΩ. Calculate RFB1 (OUT to FB resistor)
with the following equation:
OUT
RFB1
FB
RFB2
⎡⎛ V
⎞ ⎤
RFB1 = RFB2 ⎢⎜ OUT ⎟ − 1⎥
⎢⎣⎝ VFB ⎠ ⎥⎦
MAX16955
where VFB = 1V (typ) (see the Electrical Characteristics
table) and VOUT can range from 1V to 10V.
Setting the Switching Frequency
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX16955: inductance value (L),
inductor saturation current (ISAT), and DC resistance
(RDCR). To select inductance value, the ratio of inductor
peak-to-peak AC current to DC average current (LIR)
must be selected first. A good compromise between
size and loss is a 30% peak-to-peak ripple current to
average-current ratio (LIR = 0.3). The switching frequency, input voltage, output voltage, and selected LIR
then determine the inductor value as follows:
L=
(
VOUT VSUP(MIN) − VOUT
)
VSUP(MIN) × fSW × IOUT(MAX) × LIR
where VSUP(MIN) is the minimum supply voltage, VOUT is
the typical output voltage, and IOUT(MAX) is the maximum
load current. The switching frequency is set by RFOSC
(see the Setting the Switching Frequency section).
Figure 2. Adjustable Output Voltage
SWITCHING FREQUENCY vs. RFOSC
FREQUENCY (kHz)
1200
1150
1100
1050
1000
950
900
850
800
750
700
650
600
550
500
450
400
350
300
250
200
MAX16955 toc07
The switching frequency, f SW , is set by a resistor
(RFOSC) connected from FOSC to SGND. See Figure 3
to select the correct R FOSC value for the desired
switching frequency.
For example, a 400kHz switching frequency is set with
RFOSC = 76.8kΩ. Higher frequencies allow designs with
lower inductor values and less output capacitance.
Consequently, peak currents and I2R losses are lower
at higher switching frequencies, but core losses, gatecharge currents, and switching losses increase.
25 35 45 55 65 75 85 95 105 115 125 135 145
RFOSC (kI)
Figure 3. Switching Frequency vs. RFOSC
The MAX16955 uses internal frequency independent
slope compensation to ensure stable operation at duty
cycles above 50%. The maximum slope compensation
ramp voltage over a full clock period is 200mV. Use the
equation below to select the inductor value:
VOUT [V]
= 1 ±25%
L[μH] × fSW [MHz]
However, if it is necessary, higher inductor values can
be selected.
16
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
Table 1. Inductor Size Comparison
INDUCTOR SIZE
SMALLER
LARGER
Lower price
Smaller ripple
Smaller form factor
Higher efficiency
Faster load response
Larger fixed-frequency range
in skip mode
The exact inductor value is not critical and can be
adjusted to make trade-offs among size, cost, efficiency,
and transient response requirements. Table 1 shows a
comparison between small and large inductor sizes.
The minimum practical inductor value is one that causes
the circuit to operate at the edge of critical conduction
(where the inductor current just touches zero with every
cycle at maximum load). Inductor values lower than this
grant no further size-reduction benefit. The optimum
operating point is usually found between 25% and 45%
ripple current. When pulse skipping (FSYNC low and
light loads), the inductor value also determines the loadcurrent value at which PFM/PWM switchover occurs.
For the selected inductance value, the actual peak-topeak inductor ripple current (ΔIINDUCTOR) is defined by:
ΔIINDUCTOR =
VOUT ( VSUP − VOUT )
VSUP × fSW × L
where ΔIINDUCTOR is in mA, L is in μH, and fSW is in kHz.
The core must be large enough not to saturate at the
peak inductor current (IPEAK):
IPEAK = ILOAD(MAX) +
ΔIINDUCTOR
2
Transient Response
The inductor ripple current also impacts transient
response performance, especially at low VSUP - VOUT
differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from
the output filter capacitors by a sudden load step. The
total output voltage sag is the sum of the voltage sag
while the inductor is ramping up and the voltage sag
before the next pulse can occur:
VSAG =
(
)
2
L ΔILOAD(MAX)
ΔILOAD(MAX) ( t − Δt )
+
COUT
2COUT (( VSUP × DMAX ) − VOUT )
where DMAX is the maximum duty factor, L is the inductor value in μH, COUT is the output capacitor value in
Maxim Integrated
μF, t is the switching period (1/fSW) in μs, and Δt equals
(VOUT/VSUP) × t when in fixed-frequency PWM mode, or
L × 0.2 × IMAX/(VSUP - VOUT) when in skip mode. The
amount of overshoot (VSOAR) during a full-load to noload transient due to stored inductor energy can be calculated as:
(ΔILOAD(MAX) )
≈
2
VSOAR
L
2COUT VOUT
Current Sensing
For the most accurate current sensing, use a currentsense resistor (RSENSE) between the inductor and the
output capacitor. Connect CS to the inductor side of
R SENSE, and OUT to the capacitor side. Dimension
RSENSE so its maximum current (IOC) induces a voltage
of VLIMIT (72mV minimum) across RSENSE.
If a higher voltage drop across RSENSE must be tolerated, divide the voltage across the sense resistor with a
voltage-divider between CS and OUT to reach VLIMIT
(72mV minimum).
The current-sense method (Figure 4) and magnitude
determine the achievable current-limit accuracy and
power loss. Typically, higher current-sense limits
provide tighter accuracy, but also dissipate more
power. For the best current-sense accuracy and overcurrent protection, use a ±1% tolerance current-sense
resistor with low parasitic inductance between the
inductor and output as shown in Figure 4a.
Alternatively, high-power applications that do not
require highly accurate current-limit protection can
reduce the overall power dissipation by connecting a
series RC circuit across the inductor (Figure 4b) with an
equivalent time constant:
⎛ R2 ⎞
RCSHL = ⎜
R
⎝ R1 + R2 ⎟⎠ DCR
and:
RDCR =
L ⎛ 1
1⎞
⎜ +
⎟
CEQ ⎝ R1 R2 ⎠
where RCSHL is the required current-sense resistor and
RDCR is the inductor’s series DC resistance. Use the
typical inductance and RDCR values provided by the
inductor manufacturer.
Carefully observe the PCB layout guidelines to ensure the
noise and DC errors do not corrupt the differential current-sense signals seen by CS and OUT. Place the sense
resistor close to the IC with short, direct traces, making a
Kelvin-sense connection to the current-sense resistor.
17
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
INPUT (VIN)
CIN
MAX16955
DH
NH
L
RSENSE
LX
DL
NL
COUT
DL
GND
CS
OUT
a) OUTPUT SERIES RESISTOR SENSING
INPUT (VIN)
CIN
MAX16955
DH
NH
INDUCTOR
L
RDCR
LX
DL
NL
DL
R1
COUT
R2
RCSHL =
GND
RDCR =
CEQ
CS
(
)
R2
RDCR
R1 + R2
L
CEQ
[
1
1
+
R1 R2
]
OUT
b) LOSSLESS INDUCTOR SENSING
Figure 4. Current-Sense Configurations
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
IRMS = ILOAD(MAX)
VOUT ( VSUP − VOUT )
VSUP
I RMS has a maximum value when the input voltage
equals twice the output voltage (VSUP = 2VOUT), so
IRMS(MAX) = ILOAD(MAX)/2.
18
Choose an input capacitor that exhibits less than +10°C
self-heating temperature rise at the RMS input current
for optimal long-term reliability.
The input-voltage ripple comprises ΔVQ (caused by the
capacitor discharge) and ΔVESR (caused by the ESR of
the capacitor). Use low-ESR ceramic capacitors with
high-ripple-current capability at the input. Assume the
contribution from the ESR and capacitor discharge is
equal to 50%. Calculate the input capacitance and ESR
required for a specified input voltage ripple using the
following equations:
ESRIN =
ΔVESR
ΔI
IOUT + L
2
Maxim Integrated
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
where:
ΔIL =
( VSUP − VOUT ) × VOUT
VSUP × fSW × L
longer a problem (see the VSAG and VSOAR equations
in the Transient Response section). However, low-value
filter capacitors typically have high-ESR zeros that can
affect the overall stability.
Compensation Design
and:
I
× D (1 − D)
CIN = OUT
ΔVQ × fSW
where:
V
D = OUT
VSUP
Output Capacitor
The output filter capacitor must have low enough ESR
to meet output ripple and load-transient requirements,
yet have high enough ESR to satisfy stability requirements. The output capacitance must be high enough to
absorb the inductor energy while transitioning from fullload to no-load conditions without tripping the overvoltage fault protection. When using high-capacitance,
low-ESR capacitors, the filter capacitor’s ESR dominates
the output-voltage ripple. The size of the output capacitor depends on the maximum ESR required to meet the
output-voltage ripple (VRIPPLE(P-P)) specifications:
VRIPPLE(P −P) = ESR × ILOAD(MAX) × LIR
In skip mode, the inductor current becomes discontinuous, with the peak current set by the skip-mode current-sense threshold (forced-peak IL). In skip mode, the
no-load output ripple can be determined as follows:
V
× ESR
VRIPPLE(P −P) = SKIP
RSENSE
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
When using low-value filter capacitors, such as ceramic
capacitors, size is usually determined by the capacity
needed to prevent V SAG and V SOAR from causing
problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising load edge is no
Maxim Integrated
The MAX16955 uses an internal transconductance error
amplifier with its inverting input and its output available
to the user for external frequency compensation. The
output capacitor and compensation network determine
the loop stability. The inductor and the output capacitor
are chosen based on performance, size, and cost.
Additionally, the compensation network optimizes the
control-loop stability.
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required
current through the external inductor. The MAX16955
uses the voltage drop across the DC resistance of the
inductor or the alternate series current-sense resistor to
measure the inductor current. Current-mode control
eliminates the double pole in the feedback loop caused
by the inductor and output capacitor, resulting in a
smaller phase shift and requiring less elaborate erroramplifier compensation than voltage-mode control. A
simple single-series resistor (RC) and capacitor (CC)
are required to have a stable, high-bandwidth loop in
applications where ceramic capacitors are used for
output filtering (Figure 5). For other types of capacitors,
due to the higher capacitance and ESR, the frequency
of the zero created by the capacitance and ESR is
lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop,
add another compensation capacitor (CF) from COMP
to SGND to cancel this ESR zero.
VOUT
R1
COMP
gm
R2
VREF
RC
CC
CF
Figure 5. Compensation Network
19
MAX16955
36V, 1MHz Step-Down Controller
with Low Operating Current
The basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier.
The power modulator has a DC gain set by g mc ×
RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. The following equations determine the approximate value for the gain of
the power modulator (GAINMOD(dc)), neglecting the
effect of the ramp stabilization. Ramp stabilization is
necessary when the duty cycle is above 50% and is
internally and automatically done for the MAX16955:
Thus:
fdpEA =
GAINMOD(dc) ≅ gmc × RLOAD
where RLOAD = VOUT/IOUT(MAX) in Ω, fSW is the switching frequency in MHz, L is the output inductance in μH,
and gmc = 1/(AV_CS × RDC) in S. AV_CS is the voltage
gain of the current-sense amplifier and is typically
11V/V (see the Electrical Characteristics table). RDC is
the DC-resistance of the inductor or the current-sense
resistor in Ω.
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
fpMOD =
1
2 π × CC × (ROUT,EA + RC )
fzEA =
1
2 π × CC × RC
fpEA =
1
2π × CF × RC
The loop-gain crossover frequency (fC) should be set
below 1/5 the switching frequency and much higher
than the power-modulator pole (fpMOD):
f
fpMOD