EVALUATION KIT AVAILABLE
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MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
General Description
Benefits and Features
The MAX17506 uses peak current-mode control. The
device can be operated in the pulse-width modulation
(PWM), pulse-frequency modulation (PFM), and
discontinuous conduction mode (DCM) control schemes.
●● Reduce Number of DC-DC Regulators to Stock
• Wide 4.5V to 60V Input
• Adjustable Output-Voltage Range from 0.9V up to
90% of VIN
• 100kHz to 2.2MHz Adjustable Switching Frequency
with External Synchronization
The MAX17506 high-efficiency, high-voltage, synchronous
step-down DC-DC converter with integrated high-side
MOSFET operates over a 4.5V to 60V input. The
converter can deliver up to 5A and generates output
voltages from 0.9V up to 0.9 x VIN. The feedback (FB)
voltage is accurate to within ±1.4% over -40°C to 125°C.
●● Reduces External Components and Total Cost
• No Schottky-Synchronous Operation
• Internal Compensation for Any Output Voltage
• Built-In Soft-Start
• All-Ceramic Capacitors, Compact Layout
The device is available in a 20-pin (5mm x 5mm) Thin
QFN (TQFN) package. Simulation models are available.
●● Reduces Power Dissipation
• Peak Efficiency > 95%
• PFM/DCM Modes Enables Enhanced Light-Load
Efficiency
• Auxiliary Bootstrap LDO for Improved Efficiency
• 3.5µA Shutdown Current
Applications
●●
●●
●●
●●
●●
●●
Industrial Power Supplies
Distributed Supply Regulation
Base Station Power Supplies
Wall Transformer Regulation
High-Voltage Single-Board Systems
General-Purpose Point-of-Load
●● Operates Reliably in Adverse Industrial Environments
• Hiccup or Latchoff Mode Overload Protection
• DL to LX Short Detection Feature
• Built-In Output Voltage Monitoring with RESET
• Programmable EN/UVLO Threshold
• Monotonic Startup into Prebiased Load
• Overtemperature Protection
• High Industrial -40°C to +125°C Ambient Operating
Temperature / -40°C to +150°C Junction Temperature Range
Ordering Information appears at end of data sheet.
Typical Application Circuit for 5V Output
VIN
C1
2.2μF
RT
EN/UVLO
VIN
VIN
VIN
VIN
BST
MODE/SYNC
VCC
C6
2.2μF
SGND
LX
MAX17506
DL
4.7μH
R1
4.7Ω
PGND
EXTVCC
C7
22000pF
fSW = 450kHz
L1 = XAL8080-472
N1 = SIS468DN
C6 = 2.2µF/10V/X7R/0603(MURATA GRM188R71A225K)
C8 = C9 = C10 = 22µF/10V/X7R/1210(MURATA GRM32ER71A226K)
C13 = 0.1µF/50V/X7R/0402(TDK C1005X7R1H104K050BB)
MODE/SYNC: 1. CONNECT TO SGND FOR PWM MODE
2. CONNECT TO VCC FOR DCM MODE
3. LEAVE OPEN FOR PFM MODE
VOUT
L1
LX
RESET
FB
N1
VOUT
C8
22μF
C9
22μF
5V, 5A
C10
22μF
R3
158kΩ
R8
C13
0.1μF
19-7453; Rev 3; 7/18
C11
0.1μF
LX
CF
SS
C2
2.2μF
6.5V TO 60V
4.7Ω
VOUT
R4
34.8kΩ
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Absolute Maximum Ratings
VIN to PGND..........................................................-0.3V to +65V
EN/UVLO, SS to SGND.........................................-0.3V to +65V
LX to PGND................................................-0.3V to (VIN + 0.3V)
BST to PGND.........................................................-0.3V to +70V
BST to LX..............................................................-0.3V to +6.5V
BST to VCC............................................................-0.3V to +65V
FB, CF, RESET, MODE/SYNC, RT to SGND.......-0.3V to +6.5V
DL, VCC to PGND.................................................-0.3V to +6.5V
SGND to PGND.....................................................-0.3V to +0.3V
EXTVCC to PGND.................................................-0.3V to +26V
LX Total RMS Current.........................................................±9.9A
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70°C) (multilayer board)
TQFN (derate 33.3mW/°C above TA = +70°C).......2666.7mW
Operating Temperature Range (Note 1)............ -40NC to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65NC to +160°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 20 TQFN
Package Code
T2055+4
Outline Number
21-0140
Land Pattern Number
90-0009
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA) (Note 2)
23°C/W
Junction to Case (θJC)
2°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Note 1: Junction temperature greater than +125°C degrades operating lifetimes.
Note 2: Applicable only to the Evaluation Kit in free space with no airflow.
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Maxim Integrated │ 2
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics
(VIN = VEN/UVLO = 24V, RRT = OPEN (450kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE/SYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
60
V
INPUT SUPPLY (VIN)
Input Voltage Range
Input Shutdown Current
Input Quiescent Current
VIN
IIN-SH
IQ_PFM
IQ_DCM
4.5
VEN/UVLO = 0V (shutdown mode)
3.5
VFB = 1V, MODE = RT= open
128
5.5
VFB = 1V, MODE = open, RRT = 40.2k
168
DCM mode, VLX = 0.1V
1.27
2
µA
mA
ENABLE/UVLO (EN/UVLO)
EN/UVLO Threshold
EN/UVLO Input Leakage Current
VENR
VEN/UVLO rising
1.19
1.215
1.24
VENF
VEN/UVLO falling
1.068
1.09
1.112
-50
0
+50
nA
4.75
5
5.25
V
VCC = 4.3V, VIN = 6V
50
90
140
mA
VIN = 4.5V, IVCC = 45mA
4.1
VCC_UVR
VCC rising
4.1
4.2
4.3
VCC_UVF
VCC falling
3.7
3.8
3.9
24
V
4.56
4.7
4.84
V
0.205
0.232
0.255
V
0.4
V
85
140
mA
45
90
mΩ
1
+4
µA
1.9
2.9
Ω
1
1.65
Ω
5
5.3
µA
IEN
VEN/UVLO = 1.245V, TA = +25ºC
V
LDO
VCC Output Voltage Range
VCC Current Limit
VCC Dropout
VCC UVLO
VCC
IVCC-MAX
VCC-DO
6V < VIN < 60V, IVCC = 1mA
1mA ≤ IVCC ≤ 45mA
V
V
EXT LDO
EXT VCC Operating Voltage Range
4.84
EXT VCC Switchover Voltage
EXT VCC rising
EXT VCC Switchover Voltage
Hysteresis
EXT VCC Dropout
EXT VCC Current Limit
EXT VCC-DO
EXT IVCC-MAX
EXT VCC = 4.75V, IEXT VCC = 45mA
VCC = 4.3V, EXT VCC = 5V
45
POWER MOSFET AND LOW-SIDE DRIVER
High-Side nMOS On-Resistance
RDS-ONH
ILX = 1.0A
LX Leakage Current
ILX_LKG
VLX = VIN - 1V, VLX = VPGND + 1V,
TA = +25ºC
Pullup Resistance
ISOURCE = 100mA
Pulldown Resistance
ISINK = 100mA
-4
SOFT-START (SS)
Charging Current
www.maximintegrated.com
ISS
VSS = 0V
4.7
Maxim Integrated │ 3
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT = OPEN (450kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE/SYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MODE = SGND or MODE = VCC
0.887
0.9
0.912
MODE = open
0.887
0.915
0.936
UNITS
FEEDBACK (FB)
FB Regulation Voltage
VFB_REG
FB Input Bias Current
IFB
0 < VFB < 1V, TA = +25ºC
-75
+75
V
nA
MODE/SYNC
MODE Threshold
VM-DCM
MODE = VCC (DCM mode)
VM-PFM
MODE = open (PFM mode)
VM-PWM
MODE = GND (PWM mode)
SYNC Frequency Capture Range
fSW set bt RRT
SYNC Pulse Width
SYNC Threshold
VCC 0.6
V
VCC/2
0.6
1.1 x
fSW
1.4 x
fSW
50
VIH
kHz
ns
2.0
VIL
0.8
V
CURRENT LIMIT
Peak Current-Limit Threshold
Runaway Current-Limit Threshold
IPEAK-LIMIT
IRUNAWAY-LIMIT
6.5
7.8
9.1
A
RDL = 61.9k or RDL = 26.1k
5.85
7
8.15
A
RDL = open or RDL = 174kΩ
7.33
8.8
10.4
A
RDL = 61.9k or RDL = 26.1k
6.7
8.05
9.4
A
42
50
MODE = open or MODE = VCC
Negative Current Limit Comparator
Voltage Reference
PFM Current-Limit Threshold
RDL = open or RDL = 174kΩ
MODE = GND
IPFM
0
MODE = open
58
2
mV
A
RT
Switching Frequency
VFB Undervoltage Trip Level to
Cause Hiccup
fSW
RRT = 196kΩ
90
100
110
RRT = 93.1kΩ
180
200
220
RRT = open
420
450
480
RRT = 6.98kΩ
1950
2200
2450
0.56
0.58
0.61
VFB-HICF
HICCUP Timeout
(Note 4)
Minimum On-Time
tON-MIN
Minimum Off-Time
tOFF-MIN
32768
95
140
kHz
V
Cycles
160
ns
160
ns
LX Dead Time
22
ns
www.maximintegrated.com
Maxim Integrated │ 4
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT = OPEN (450kHz), CVCC = 2.2µF, VPGND = VSGND = VMODE/SYNC = 0V, LX = SS = RESET = open,
VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.) (Note 3)
RESET
PARAMETER
SYMBOL
CONDITIONS
MIN
RESET Output Level Low
IRESET = 10mA
RESET Output Leakage Current
TA = TJ = +25ºC, VRESET = 5.5V
-0.1
TYP
MAX
UNITS
0.200
V
+0.1
µA
VOUT Threshold for RESET
Assertion
VFB-OKF
VFB falling
90.4
92.5
94.6
%
VOUT Threshold for RESET
Deassertion
VFB-OKR
VFB rising
93.4
95.5
97.7
%
RESET Deassertion Delay After FB
Reaches 95% Regulation
1024
Cycles
165
ºC
10
ºC
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
Temperature rising
Note 3: All Electrical Specifications are 100% production tested at TA = +25°C. Specifications over the operating temperature range
are guaranteed by design and characterization.
Note 4: See the Overcurrent Protection/HICCUP Mode section for more details.
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Maxim Integrated │ 5
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 22,000pF, RT = MODE/SYNC
= open, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless
otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT
TOC01
100
100
70
VIN = 48V
VIN = 36V
VIN = 12V
60
95
EFFICIENCY (%)
VIN = 24V
EFFICIENCY (%)
EFFICIENCY (%)
80
80
70
VIN = 24V
60
VIN = 36V VIN = 48V
90
85
VIN = 24V
1
2
3
75
40
4
5
0
1
2
3
4
5
EFFICIENCY vs. LOAD CURRENT
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT
TOC04
100
85
80
75
70
VIN = 48V
EFFICIENCY (%)
EFFICIENCY (%)
90
MODE = OPEN
1
10
VIN = 36V
100
1000
60
5000
MODE = VCC
1
10
OUTPUT VOLTAGE (V)
EFFICIENCY (%)
5.03
VIN = 24V
VIN = 12V
50
40
10
100
1000
LOAD CURRENT (mA)
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5.02
VIN = 48V
VIN = 24V
5.01
5.00
4.99
4.98
4.97
VIN = 12V
VIN = 36V
4.96
MODE = VCC
1
5000
5.04
60
30
1000
LOAD AND LINE REGULATION
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT
TOC07
5.05
VIN = 36V
70
100
LOAD CURRENT (mA)
VIN = 48V
80
VIN = 48V
VIN = 12V
70
30
EFFICIENCY vs. LOAD CURRENT
3.3V OUTPUT, DCM MODE,
FIGURE 4 CIRCUIT
TOC06
90
5000
VIN = 24V
80
LOAD CURRENT (mA)
100
1000
40
VIN = 12V
55
100
50
VIN = 24V V = 36V
IN
60
10
EFFICIENCY vs. LOAD CURRENT
5V OUTPUT, DCM MODE,
FIGURE 3 CIRCUIT
TOC05
90
65
1
MODE = OPEN
LOAD CURRENT (mA)
95
50
70
LOAD CURRENT (A)
LOAD CURRENT (A)
100
VIN = 12V
MODE = SGND
MODE = SGND
0
VIN = 36V VIN = 48V
80
VIN = 12V
50
50
EFFICIENCY vs. LOAD CURRENT
5V OUTPUT, PFM MODE,
FIGURE 3 CIRCUIT
TOC03
100
90
90
40
EFFICIENCY vs. LOAD CURRENT
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT
TOC02
4.95
5000
MODE = SGND
0
1
2
3
4
5
LOAD CURRENT (A)
Maxim Integrated │ 6
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 22,000pF, RT = MODE/SYNC
= open, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless
otherwise noted.)
5.25
3.50
5.20
3.45
5.15
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3.55
3.40
VIN = 48V
VIN = 24V
3.35
3.30
3.25
3.20
VIN = 12V
3.15
VIN = 36V
3.10
3.05
1
2
3
5.10
5.05
5.00
4.95
VIN = 24V
4.85
4
4.75
5
SWITCHING FREQUENCY (kHz)
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
0
50
100
150
1000
2000
3000
4000
5000
LOAD CURRENT (mA)
TOC11
3.3
3.2
3.1
3.0
VIN = 24V
VIN = 36V
MODE = OPEN
0
1000
2000
3000
4000
5000
LOAD CURRENT (mA)
SOFT-START/SHUTDOWN FROM EN/UVLO,
5V OUTPUT, 5A LOAD CURRENT,
FIGURE 3 CIRCUIT
TOC12
VEN/UVLO
2V/div
VOUT
2V/div
IOUT
2A/div
VRESET
5V/div
200
RRT (kΩ)
2ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
SOFT-START/SHUTDOWN FROM EN/UVLO,
3.3V OUTPUT, 5A LOAD CURRENT,
FIGURE 4 CIRCUIT
TOC13
VEN/UVLO
2V/div
VOUT
2V/div
IOUT
2A/div
VRESET
5V/div
2ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
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VIN = 36V
VIN = 12V
3.4
MODE = OPEN
0
LOAD CURRENT (A)
SWITCHING FREQUENCY
vs. RT RESISTANCE
VIN = 48V
3.5
VIN = 12V
4.90
LOAD AND LINE REGULATION
3.3V OUTPUT, PFM MODE,
FIGURE 4 CIRCUIT
TOC10
3.6
VIN = 48V
4.80
MODE = SGND
0
LOAD AND LINE REGULATION
5V OUTPUT, PFM MODE,
FIGURE 3 CIRCUIT
TOC09
OUTPUT VOLTAGE (V)
LOAD AND LINE REGULATION
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT
TOC08
SOFT-START/SHUTDOWN FROM EN/UVLO,
5V OUTPUT, PFM MODE, 5mA LOAD CURRENT,
FIGURE 3 CIRCUIT
TOC14
VEN/UVLO
2V/div
VOUT
1V/div
VRESET
5V/div
4ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
Maxim Integrated │ 7
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 22,000pF, RT = MODE/SYNC
= open, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless
otherwise noted.)
SOFT-START WITH 2.5V PREBIAS,
5V OUTPUT, PWM MODE,
FIGURE 3 CIRCUIT
SOFT-START/SHUTDOWN FROM EN/UVLO,
3.3V OUTPUT, PFM MODE, 50mA LOAD CURRENT,
FIGURE 4 CIRCUIT
TOC15
2V/div
VEN/UVLO
SOFT-START WITH 2.5V PREBIAS,
3.3V OUTPUT, PWM MODE,
FIGURE 4 CIRCUIT
TOC16
TOC17
2V/div
VEN/UVLO
2V/div
VEN/UVLO
1V/div
2V/div
VOUT
1V/div
VOUT
VRESET
5V/div
VRESET
VOUT
5V/div
VRESET
5V/div
2ms/div
4ms/div
2ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, 5A LOAD CURRENT,
FIGURE 3 CIRCUIT
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, NO LOAD CURRENT,
FIGURE 3 CIRCUIT
TOC19
TOC18
VOUT
(AC)
50mV/div
VLX
10V/div
ILX
5A/div
VOUT
(AC)
20mV/div
VLX
10V/div
ILX
2A/div
1μs/div
1μs/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, PFM MODE, 25mA LOAD CURRENT,
FIGURE 3 CIRCUIT
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, DCM MODE, 25mA LOAD CURRENT,
FIGURE 3 CIRCUIT
TOC21
TOC20
VOUT
(AC)
50mV/div
VOUT
(AC)
10mV/div
VLX
10V/div
VLX
10V/div
ILX
1A/div
10μs/div
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0.5A/div
ILX
1μs/div
Maxim Integrated │ 8
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 22,000pF, RT = MODE/SYNC
= open, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless
otherwise noted.)
LOAD CURRENT STEPPED FROM 2.5A TO 5A
5V OUTPUT, PWM MODE, FIGURE 3 CIRCUIT
LOAD CURRENT STEPPED FROM 2.5A TO 5A
3.3V OUTPUT, PWM MODE, FIGURE 4 CIRCUIT
TOC22
VOUT
(AC)
100mV/div
2A/div
ILX
TOC23
VOUT
(AC)
100mV/div
ILX
40μs/div
2A/div
40μs/div
LOAD CURRENT STEPPED FROM NO LOAD TO 2.5A
5V OUTPUT, PWM MODE, FIGURE 3 CIRCUIT
LOAD CURRENT STEPPED FROM NO LOAD TO 2.5A
3.3V OUTPUT, PWM MODE, FIGURE 4 CIRCUIT
TOC25
TOC24
VOUT
(AC)
100mV/div
2A/div
ILX
VOUT
(AC)
40μs/div
LOAD CURRENT STEPPED FROM 5mA TO 2.5A
5V OUTPUT, PFM MODE, FIGURE 3 CIRCUIT
TOC26
1A/div
2ms/div
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LOAD CURRENT STEPPED FROM 50mA TO 2.5A
3.3V OUTPUT, PFM MODE, FIGURE 4 CIRCUIT
TOC27
100mV/div
ILX
1A/div
ILX
40μs/div
VOUT
(AC)
100mV/div
VOUT
(AC)
100mV/div
1A/div
ILX
2ms/div
Maxim Integrated │ 9
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS = 22,000pF, RT = MODE/SYNC
= open, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless
otherwise noted.)
LOAD CURRENT STEPPED FROM 50mA TO 2.5A
3.3V OUTPUT, DCM MODE, FIGURE 4 CIRCUIT
LOAD CURRENT STEPPED FROM 50mA TO 2.5A
5V OUTPUT, DCM MODE, FIGURE 3 CIRCUIT
TOC29
TOC28
VOUT
(AC)
100mV/div
IOUT
1A/div
VOUT
(AC)
100mV/div
1A/div
IOUT
200μs/div
200μs/div
OVERLOAD PROTECTION
5V OUTPUT, FIGURE 3 CIRCUIT
APPLICATION OF EXTERNAL CLOCK AT 600kHz
5V OUTPUT, FIGURE 3 CIRCUIT
TOC30
VOUT
TOC31
2V/div
10V/div
VLX
2A/div
IOUT
20ms/div
2μs/div
BODE PLOT,
3.3V OUTPUT, 5A LOAD CURRENT, FIGURE 4 CIRCUIT
50
40
PHASE
GAIN (dB)
100
50
80
40
60
30
20
10
GAIN
0
-10
-30
60
40
20
-20
120
CROSSOVER FREQUENCY = 46kHz,
PHASE MARGIN = 58.6°
-40
103
104
FREQUENCY (Hz)
www.maximintegrated.com
0
120
100
PHASE
80
60
40
20
10
GAIN
0
0
-20
-10
-20
-40
-20 CROSSOVER FREQUENCY = 51kHz,
PHASE MARGIN = 60.5°
-30
-40
-60
105
toc33
20
GAIN (dB)
60
PHASE (°)
toc32
-80
-40
103
104
PHASE (°)
BODE PLOT,
5V OUTPUT, 5A LOAD CURRENT, FIGURE 3 CIRCUIT
30
2V/div
VSYNC
-60
105
-80
FREQUENCY (Hz)
Maxim Integrated │ 10
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
VIN
EN/UVLO
SS
EXTVCC
TOP VIEW
VIN
Pin Configuration
15
14
13
12
11
BST 16
LX
17
MAX17506
LX 18
LX 19
EP
2
3
4
PGND
VCC
FB
9
CF
8
SGND
7
RT
6
RESET
5
TQFN
5mm x 5mm
MODE/SYNC
1
VIN
+
VIN
DL 20
10
Pin Description
PIN
NAME
FUNCTION
1, 2, 14,15
VIN
Power-Supply Input. 4.5V to 60V input supply range. Connect the VIN pins together. Decouple to PGND
with two 2.2µF capacitors; place the capacitors close to the VIN and PGND pins. Refer to the MAX17506
Evaluation Kit datasheet for a layout example.
3
PGND
4
VCC
Power Ground. Connect the PGND pins externally to the power ground plane. Connect the SGND and
PGND pins together at the ground return path of the VCC bypass capacitor. Refer to the MAX17506
Evaluation Kit datasheet for a layout example.
5V LDO Output. Bypass VCC with a 2.2µF ceramic capacitance to SGND.
5
MODE/
SYNC
MODE/SYNC configures the MAX17506 to operate in PWM, PFM or DCM modes of operation. Leave
MODE/SYNC unconnected for PFM operation (pulse skipping at light loads). Connect MODE/SYNC
to SGND for constant-frequency PWM operation at all loads. Connect MODE/SYNC to VCC for DCM
operation. The device can be synchronized to an external clock using this pin. See the MODE Selection
section ant the External Frequency Synchronization section for more details.
6
RESET
Open-Drain RESET Output. The RESET output is driven low if FB drops below 92.2% of its set value.
RESET goes high 1024 clock cycles after FB rises above 95.6% of its set value.
7
RT
Programmable Switching Frequency Input. Connect a resistor from RT to SGND to set the regulator’s
switching frequency. Leave RT open for the default 450kHz frequency. See the Setting the Switching
Frequency (RT) section for more details.
8
SGND
9
CF
At switching frequencies lower than 450kHz, connect a capacitor from CF to FB. Leave CF open if the
switching frequency is equal to or more than 450kHz. See the Loop Compensation section for more details.
10
FB
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to SGND to
set the output voltage. See the Adjusting Output Voltage section for more details.
EXTVCC
External Power Supply Input for the Bootstrap Internal LDO. Applying a voltage between 4.84V and 24V at the
EXTVCC pin draws power for the control circuits and driver from the output, by bypassing the VCC internal LDO
and improves efficiency. Connect EXTVCC to the Buck regulator output capacitor using an R-C filter (4.7Ω, 0.1μF).
Bypass the EXTVCC pin to SGND (Figure 3). Connect the EXTVCC pin to SGND when the pin is not being used.
11
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Analog Ground
Maxim Integrated │ 11
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Pin Description (continued)
PIN
NAME
FUNCTION
12
SS
13
EN/UVLO
16
BST
17, 18, 19
LX
Switching Node. Connect LX pins to the switching side of the inductor.
20
DL
Use DL pin to drive the gate of the low-side external n-MOSFET. A resistor connected between the DL
pin and SGND selects the overload protection method and the peak and runaway current limits. See the
Overcurrent Protection/HICCUP Mode section for more details.
—
EP
Exposed pad. Always connect EP to the SGND pin of the IC. Also, connect EP to a large SGND plane
with several thermal vias for best thermal performance. Refer to the MAX17506 EV kit data sheet for an
example of the correct method for EP connection and thermal vias.
Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.
Enable/Undervoltage Lockout. Drive EN/UVLO high to enable the output voltage. Connect to the center
of the resistor-divider between VIN and SGND to set the input voltage at which the MAX17506 turns on.
Pull up to VIN for always on operation.
Boost Flying Capacitor. Connect a 0.1µF ceramic capacitor between BST and LX.
Block Diagram
MAX17506
LDO
SELECT
VCC
BST
VIN
EXTVCC
CURRENT-SENSE
LOGIC
1.215V
EN/UVLO
LX
PWM/
PFM/
HICCUP LOGIC
HICCUP
RT
VCC
DL
OSCILLATOR
PGND
CF
FB
MODE SELECTION
LOGIC
ERROR AMPLIFIER/
LOOP COMPENSATION
SWITCHOVER LOGIC
SLOPE COMPENSATION
VBG = 0.9V
RESET
FB
VCC
EN/UVLO
SS
MODE/SYNC
RESET LOGIC
5μA
HICCUP
SGND
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Maxim Integrated │ 12
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Detailed Description
The MAX17506 high-efficiency, high-voltage, synchronously
rectified step-down converter with integrated high-side
MOSFET operates over a 4.5V to 60V input. It delivers
up to 5A and 0.9V up to 90% VIN output voltage. Built-in
compensation across the output voltage range eliminates
the need for external components. The feedback (FB)
regulation accuracy over -40°C to +125°C is ±1.4%.
The device features a peak-current-mode control
architecture. An internal transconductance error amplifier
produces an integrated error voltage at an internal node
that sets the duty cycle using a PWM comparator, a highside current-sense amplifier, and a slope-compensation
generator. At each rising edge of the clock, the highside MOSFET turns on and remains on until either
the appropriate or maximum duty cycle is reached, or
the peak current limit is detected. During the high-side
MOSFET’s on-time, the inductor current ramps up. During
the second-half of the switching cycle, the high-side
MOSFET turns off and the low-side MOSFET turns on.
The inductor releases the stored energy as its current
ramps down and provides current to the output.
The device features a MODE/SYNC pin that can be used
to operate the device in PWM, PFM, or DCM control
schemes and to synchronize the switching freqeuncy to
an external clock. The device also features adjustableinput undervoltage lockout, adjustable soft-start, opendrain RESET, auxiliary bootstrap LDO and DL to LX
short detection features.
Mode Selection (MODE)
The logic state of the MODE/SYNC pin is latched when
VCC and EN/UVLO voltages exceed the respective UVLO
rising thresholds and all internal voltages are ready to
allow LX switching. If the MODE/SYNC pin is open at
power-up, the device operates in PFM mode at light
loads. If the MODE/SYNC pin is grounded at power-up,
the device operates in constant-frequency PWM mode
at all loads. Finally, if the MODE/SYNC pin is connected
to VCC at power-up, the device operates in constantfrequency DCM mode at light loads. State changes on the
MODE/SYNC pin are ignored during normal operation.
PWM Mode Operation
In PWM mode, the inductor current is allowed to go negative. PWM operation provides constant frequency operation at all loads, and is useful in applications sensitive to
switching frequency. However, the PWM mode of operation gives lower efficiency at light loads compared to PFM
and DCM modes of operation.
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PFM Mode Operation
PFM mode of operation disables negative inductor current
and additionally skips pulses at light loads for high
efficiency. In PFM mode, the inductor current is forced
to a fixed peak of 2A every clock cycle until the output
rises to 102.3% of the nominal voltage. Once the output
reaches 102.3% of the nominal voltage, both the high-side
and low-side FETs are turned off and the device enters
hibernate operation until the load discharges the output to
101.1% of the nominal voltage. Most of the internal blocks
are turned off in hibernate operation to save quiescent
current. After the output falls below 101.1% of the nominal
voltage, the device comes out of hibernate operation,
turns on all internal blocks, and again commences the
process of delivering pulses of energy to the output until it
reaches 102.3% of the nominal output voltage.
The advantage of the PFM mode is higher efficiency at
light loads because of lower quiescent current drawn from
supply. The disadvantage is that the output-voltage ripple
is higher compared to PWM or DCM modes of operation
and switching frequency is not constant at light loads.
DCM Mode Operation
DCM mode of operation features constant frequency
operation down to lighter loads than PFM mode, by not
skipping pulses but only disabling negative inductor
current at light loads. DCM operation offers efficiency
performance that lies between PWM and PFM modes.
Linear Regulator (VCC and EXTVCC)
The MAX17506 has two internal LDO (Low Drop-Out)
regulators which powers VCC. One LDO is powered
from VIN (INLDO) and the other LDO is powered from
EXTVCC (EXTVCC LDO). Only one of the two LDOs is
in operation at a time, depending on the voltage levels
present at EXTVCC. If EXTVCC voltage is greater than
4.7V (typ), VCC is powered from EXTVCC. If EXTVCC is
lower than 4.7V (typ), VCC is powered from VIN. Powering
VCC from EXTVCC increases efficiency at higher input
voltages. EXTVCC voltage should not exceed 24V
Typical VCC output voltage is 5V. Bypass VCC to SGND
with a 2.2μF low ESR ceramic capacitor. VCC powers
the internal blocks and the low-side MOSFET driver and
re-charges the external bootstrap capacitor. Both INLDO
and EXTVCC LDO can source up to 45mA for bias
requirements. The MAX17506 employs an under-voltage
lockout circuit that forces the converter off when VCC
falls below 3.8V (typ). The converter is enabled again
when VCC > 4.2V. The 400mV UVLO hysteresis prevents
chattering on power-up/power-down.
Maxim Integrated │ 13
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Add a local bypassing capacitor of 0.1μF on the EXTVCC
pin to SGND. Also, add a 4.7Ω resistor from the buck
converter output node to the EXTVCC pin to limit VCC
bypass capacitor discharge current and to protect the
EXTVCC pin from reaching its absolute maximum rating
(-0.3V) during output short-circuit conditions. In applications where the buck converter output is connected to
EXTVCC pin, if the output is shorted to ground then the
transfer from EXTVCCLDO to INLDO happens seamlessly without any impact on the normal functionality. Connect
the EXTVCC pin to SGND when the pin is not being used.
Table 1. Switching Frequency vs. RT
Resistor
Setting the Switching Frequency (RT)
The internal oscillator of the MAX17506 can be synchronized to an external clock signal on the MODE/SYNC pin.
The external synchronization clock frequency must be
between 1.1 x fSW and 1.4 x fSW, where fSW is the frequency programmed by the RT resistor. When an external
clock is applied to MODE/SYNC pin, the internal oscillator frequency changes to external clock frequency (from
original frequency based on RT setting) after detecting 16
external clock edges. The converter will operate in PWM
mode during synchronization operation. When MODE/
SYNC is unconnected for PFM mode, internal 300kΩ
pulldown resistor on this pin pulls the node below VIL of
the SYNC threshold and maintains the part in PFM mode.
When the external clock is applied on-fly then the mode
of operation will change to PWM from the initial state of
PFM/DCM/PWM. When the external clock is removed
on-fly then the internal oscillator frequency changes to
the RT set frequency and the converter will still continue
to operate in PWM mode. The minimum external clock
pulse-width high should be greater than 22ns. See the
MODE/SYNC section in the Electrical Characteristics
table for details.
The switching frequency of the MAX17506 can be
programmed from 100kHz to 2.2MHz by using a resistor
connected from RT to SGND. The switching frequency
(fSW) is related to the resistor connected at the RT pin
(RRT) by the following equation:
R RT ≅
19 × 10 3
f SW
−
1.7
where RRT is in kΩ and fSW is in kHz. Leaving the RT pin
open causes the device to operate at the default switching
frequency of 450kHz. See Table 1 for RT resistor values
for a few common switching frequencies.
Operating Input Voltage Range
The minimum and maximum operating input voltages for
a given output voltage should be calculated as follows:
VIN(MIN) =
(
(
VOUT + I OUT(MAX) × R DCR(MAX) + R DS−ONL(MAX)
(
(
1 − f SW (MAX) × t OFF−MIN(MAX)
)
+ I OUT(MAX) × (R DS−ONH(MAX) − R DS−ONL(MAX)
VIN(MAX) =
))
)
VOUT
f SW(MAX) × t ON−MIN(MAX)
where:
VOUT = Steady-state output voltage
IOUT(MAX) = Maximum load current
RDCR(MAX) = Worst-case DC resistance of the inductor
fSW(MAX) = Maximum switching frequency
tOFF-MIN(MAX) = Worst-case minimum switch off-time (160ns)
tON-MIN(MAX) = Worst-case minimum switch on-time (160ns)
RDS-ONH = Worst-case on-state resistances and high-side
internal MOSFET
RDS-ONL = Worst-case on-state resistances and low-side
external MOSFET
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SWITCHING FREQUENCY (kHz)
RT RESISTOR (kΩ)
100
196
200
93.1
450
OPEN
2200
6.98
External Frequency Synchronization
DL to LX Short Detection
In MAX17506, DL and LX pins are adjacent to each
other. To prevent damage to the low side external FET
in case DL pin is shorted to the LX pins, DL to LX
short detection feature has been implemented. If the
MAX17506 detects that the DL pin is shorted to the LX
pins before startup, the startup sequence will not be
initiated and output voltage will not be soft-started.
Overcurrent Protection/HICCUP Mode
The MAX17506 is provided with a robust over-current
protection scheme that protects the device under overload and output short-circuit conditions. A cycle-by-cycle
peak current limit turns off the high-side MOSFET whenever the high-side switch current exceeds an internal
limit. A runaway current limit on the high-side switch
current protects the device under high input voltage, short
Maxim Integrated │ 14
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
circuit conditions when there is insufficient output voltage
available to restore the Inductor current that was built
up during the on period of the step-down converter. One
occurrence of the runaway current limit triggers a hiccup
mode. In addition, if due to a fault condition, output voltage drops to 68% (typ) of its nominal value any time after
soft-start is complete, hiccup mode is triggered.
The MAX17506 has two modes of operation under overRESISTANCE
(kΩ)
PEAK
CURRENT
LIMIT (A)
RUNAWAY
CURRENT
LIMIT
(A)
FAULT
OPERATING
MODE
Open
7.8
8.8
Hiccup
174
7.8
8.8
Latchoff
61.9
7.2
8.2
Hiccup
26.1
7.2
8.2
Latchoff
load conditions – the hiccup mode and the latchoff mode.
In hiccup mode, the converter is protected by suspending switching for a hiccup timeout period of 32768 clock
cycles. Once the hiccup timeout period expires, soft-start
is attempted again. In latchoff mode, the converter does
not attempt to soft-start the output after a timeout period.
The power supply to the MAX17506 needs to be cycled
to turn-on the part again in latchoff mode of operation. A
resistor connected from DL to SGND sets the peak and
runaway current limits and the operating mode during
overload condition.
RESET Output
The MAX17506 includes a RESET comparator to monitor
the status of the output voltage. The open-drain RESET
output requires an external pullup resistor. RESET goes
high (high-impedance) 1024 switching cycles after the
regulator output increases above 95.6% of the designed
nominal regulated voltage. RESET goes low when the
regulator output voltage drops to below 92.2% of the set
nominal output voltage. RESET also goes low during
thermal shutdown.
Prebiased Output
When the MAX17506 starts into a prebiased output, both
the high-side and the low-side switches are turned off so
that the converter does not sink current from the output.
High-side and low-side switches do not start switching
until the PWM comparator commands the first PWM
pulse, at which point switching commences. The output
voltage is then smoothly ramped up to the target value in
alignment with the internal reference.
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Thermal Shutdown Protection
Thermal shutdown protection limits total power dissipation
in the MAX17506. When the junction temperature of
the device exceeds +165°C, an on-chip thermal sensor
shuts down the device, allowing the device to cool. The
MAX17506 turns ON with soft-start after the junction
temperature reduces by 10°C. Carefully evaluate the total
power dissipation (see the Power Dissipation section)
to avoid unwanted triggering of the thermal shutdown in
normal operation.
Applications Information
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
=
IRMS I OUT(MAX) ×
VOUT × (VIN - VOUT )
VIN
where, IOUT(MAX) is the maximum load current. IRMS has
a maximum value when the input voltage equals twice
the output voltage (VIN = 2 x VOUT), so IRMS(MAX) =
IOUT(MAX)/2.
Choose an input capacitor that exhibits less than +10°C
temperature rise at the RMS input current for optimal
long-term reliability. Use low-ESR ceramic capacitors with
high ripple current capability at the input. X7R capacitors
are recommended in industrial applications for their
temperature stability. Calculate the input capacitance
using the following equation:
I OUT(MAX) × D × (1- D)
C IN =
η × f SW × ∆VIN
where D = VOUT/VIN is the duty ratio of the converter,
fSW is the switching frequency, ΔVIN is the allowable input
voltage ripple, and E is the efficiency.
In applications where the source is located distant from
the MAX17506 input, an electrolytic capacitor should
be added in parallel to the ceramic capacitor to provide
necessary damping for potential oscillations caused by
the inductance of the longer input power path and input
ceramic capacitor.
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX17506: inductance value (L),
inductor saturation current (ISAT), and DC resistance
Maxim Integrated │ 15
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
(RDCR). The switching frequency and output voltage
determine the inductor value as follows:
VOUT
L=
2.2 × fSW
where VOUT and fSW are nominal values.
Select a low-loss inductor closest to the calculated
value with acceptable dimensions and having the lowest
possible DC resistance. The saturation current rating
(ISAT) of the inductor must be high enough to ensure that
saturation can occur only above the peak current-limit
value.
Output Capacitor Selection
X7R ceramic output capacitors are preferred due to their
stability over temperature in industrial applications. The
output capacitors are usually sized to support a step load
of 50% of the maximum output current in the application,
so the output voltage deviation is contained to 3% of the
output voltage change. The minimum required output
capacitance can be calculated as follows:
C OUT=
1 I STEP × t RESPONSE
×
2
∆VOUT
t RESPONSE ≅ (
0.33
1
)
+
fC
f sw
where ISTEP is the load current step, tRESPONSE is the
response time of the controller, DVOUT is the allowable
output voltage deviation, fC is the target closed-loop
crossover frequency, and fSW is the switching frequency.
Select fC to be 1/9th of fSW if the switching frequency is
less than or equal to 450kHz. If the switching frequency is
more than 450kHz, select fC to be 50kHz.
Soft-Start Capacitor Selection
The MAX17506 implements adjustable soft-start operation
to reduce inrush current. A capacitor connected from
the SS pin to SGND programs the soft-start time. The
selected output capacitance (CSEL) and the output
voltage (VOUT) determine the minimum required soft-start
capacitor as follows:
CSS ≥ 28 x 10-6 x CSEL x VOUT
The soft-start time (tSS) is related to the capacitor
connected at SS (CSS) by the following equation:
tSS = CSS/(5.55 x 10-6)
For example, to program a 4ms soft-start time, a 22nF
capacitor should be connected from the SS pin to SGND.
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VIN
R1
EN/UVLO
R2
SGND
Figure 1. Setting the Input Undervoltage Lockout
Setting the Input Undervoltage Lockout Level
The MAX17506 offers an adjustable input undervoltage
lockout level. Set the voltage at which MAX17506 turns
on, with a resistive voltage-divider connected from VIN
to SGND (see Figure 1). Connect the center node of the
divider to EN/UVLO.
Choose R1 to be 3.3MI and then calculate R2 as follows:
R2 =
R1× 1.215
(VINU - 1.215)
where VINU is the voltage at which the MAX17506 is
required to turn on. Ensure that VINU is higher than 0.8
x VOUT.
Loop Compensation
The MAX17506 is internally loop compensated. However,
if the switching frequency is less than 450kHz, connect a
0402 capacitor (C12) between the CF pin and the FB pin.
Use Table 2 to select the value of C12.
Adjusting Output Voltage
Set the output voltage with a resistive voltage-divider
connected from the positive terminal of the output
capacitor (VOUT) to SGND (see Figure 2). Connect the
center node of the divider to the FB pin. Use the following
procedure to choose the resistive voltage-divider values:
Calculate resistor R3 from the output to FB as follows:
R3 =
451 × 10 3
f C × C OUT_SEL
where R3 is in kI, crossover frequency fC is in kHz, and
COUT_SEL is actual derated capacitance of the selected
output capicitor at DC-bias voltage in µF. Choose fC to
be 1/9th of the switching frequency, fSW, if the switching
frequency is less than or equal to 450kHz. If the switching
frequency is more than 450kHz, select fC to be 50kHz.
Calculate resistor R4 from FB to SGND as follows:
Maxim Integrated │ 16
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Table 2. C12 Capacitor Value at Various
Switching Frequencies
SWITCHING FREQUENCY RANGE (kHz)
C12 (pF)
200 to 300
2.2
300 to 450
1.2
VOUT
R3
The junction temperature of the MAX17506 can be
estimated at any given maximum ambient temperature
(TA_MAX) from the equation below:
TJ_MAX
= T A _MAX + (θ JA × PLOSS )
If the application has a thermal management system
that ensures that the exposed pad of the MAX17506 is
maintained at a given temperature (TEP_MAX) by using
proper heat sinks, then the junction temperature of the
MAX17506 can be estimated at any given maximum
ambient temperature from the equation below:
T=
J_MAX TEP_MAX + (θ JC × PLOSS )
FB
Junction temperature greater than = +125°C degrades
operating lifetimes
R4
PCB Layout Guidelines
SGND
Figure 2. Setting the Output Voltage
R4 =
R3 × 0.9
(VOUT - 0.9)
Power Dissipation
At a particular operating condition, the power losses that
lead to temperature rise of the part are estimated as
follows:
(
1
PLOSS = (POUT × ( - 1)) - I OUT 2 × R DCR
η
) - (IOUT 2 × (1- D) × R LS )
P=
OUT VOUT × I OUT
where, POUT is the total output power, η is the efficiency
of the converter, RDCR is the DC resistances of the
inductor, RLS is the on-resistance of the low-side external MOSFET and D = VOUT/VIN is the duty ratio of the
converter. (See the typical operating characteristics
curves for more information on efficiency at typical
operating conditions).
For the MAX17506 EV kit, the thermal performance
metrics for the package are given below:
JA = 23°C/W
θ JC =2°C W
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to
the high di/dt of the currents. Since inductance of a current
carrying loop is proportional to the area enclosed by the
loop, if the loop area is made very small, inductance is
reduced. Additionally, small current loop areas reduce
radiated EMI.
A ceramic input filter capacitor should be placed close to the
VIN pins of the IC. This eliminates as much trace inductance
effects as possible and give the IC a cleaner voltage supply.
A bypass capacitor for the VCC pin also should be placed
close to the pin to reduce effects of trace impedance.
When routing the circuitry around the IC, the analog
small-signal ground and the power ground for switching
currents must be kept separate. They should be connected
together at a point where switching activity is at a
minimum, typically the return terminal of the VCC bypass
capacitor. This helps keep the analog ground quiet.
The ground plane should be kept continuous/unbroken
as far as possible. No trace carrying high switching
current should be placed directly over any ground plane
discontinuity.
PCB layout also affects the thermal performance of the
design. A number of thermal vias that connect to a large
ground plane should be provided under the exposed pad
of the part, for efficient heat dissipation.
For a sample layout that ensures first pass success,
refer to the MAX17506 evaluation kit layout available at
www.maximintegrated.com.
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Maxim Integrated │ 17
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
VIN
6.5V TO 60V
C1
2.2µF
EN/UVLO
RT
VIN
VIN
VIN
C2
2.2µF
VIN
BST
MODE/SYNC
VCC
C6
2.2µF
fSW = 450kHz
L1 = XAL8080-472
N1 = SIS468DN
C6 = 2.2µF/10V/X7R/0603(MURATA GRM188R71A225K)
C8 = C9 = C10 = 22µF/10V/X7R/1210(MURATA GRM32ER71A226K)
C13 = 0.1µF/50V/X7R/0402(TDK C1005X7R1H104K050BB)
MODE/SYNC: 1.CONNECT TO SGND FOR PWM MODE
2.CONNECT TO VCC FOR DCM MODE
3.LEAVE OPEN FOR PFM MODE
C11
0.1µF
LX
MAX17506
SGND
LX
4.7µH
LX
CF
R1
DL
RESET
4.7Ω
SS
PGND
EXTVCC
C7
22000pF
VOUT
L1
FB
VOUT
C8
22µF
C9
22µF
5V, 5A
C10
22µF
R3
158kΩ
N1
R8
VOUT
4.7Ω
C13
R4
34.8kΩ
0.1µF
Figure 3. Typical Application Circuit for 5V Output
C1
2.2μF
RT
EN/UVLO
VIN
VIN
VIN
VIN
BST
MODE/SYNC
VCC
C6
2.2μF
SGND
LX
MAX17506
C11
0.1μF
L1
LX
3.3μH
LX
CF
DL
RESET
SS
C2
2.2μF
R1
4.7Ω
PGND
EXTVCC
FB
VIN
fSW = 450kHz
4.5V TO 60V L1
= XAL7070-332ME
N1 = SIS468DN
C6 = 2.2µF/10V/X7R/0603(MURATA GRM188R71A225K)
C8 = C9 = 47µF/10V/X7R/1210(MURATA GRM32ER71A476KE15)
C10 = 22µF/10V/X7R/1210(MURATA GRM32ER71A226K)
N1
VOUT
C8
47μF
C9
47μF
3.3V, 5A
C10
22μF
R3
121kΩ
C7
22000pF
R4
45.3kΩ
Figure 4. Typical Application Circuit for 3.3V Output
www.maximintegrated.com
Maxim Integrated │ 18
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Ordering Information
PART
MAX17506ATP+
PIN-PACKAGE
20 TQFN EP* (5mm x 5mm)
Note: All devices operate over the temperature range of -40ºC
to +125ºC, unless otherwise noted.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
www.maximintegrated.com
Maxim Integrated │ 19
MAX17506
4.5V–60V, 5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Revision History
REVISION
NUMBER
REVISION
DATE
0
11/14
1
5/15
1.1
2
3
PAGES
CHANGED
DESCRIPTION
Initial release
—
Updated Typical Application Circuits, Absolute Maximum Ratings and Electrical
Characteristics table
Corrected typos in TOCs
3/18
Updated the Benefits and Features, Absolute Maximum Ratings, Electrical Characteristics, Typical Operating Characteristics (global conditions, TOC12 and TOC32–33), Pin
Description, Detailed Description, Lindear Regulator (VCC and EXTVCC), Operating
Input Voltage Range, External Frequency Synchronization, DL to LX Short Detection,
RESET Output, Thermal Shutdown Protection, Input Capacitor Selection, Setting
the Input Undervoltage Lockout Level, Loop Compensation, Adjusting Output Voltage, Power Dissipation, PCB Layout Guidelines sections. Updated Tables 1 and 2 and
replaced Typical Application Circuit for 5V Output, Block Diagram, and Figures 3 and 4.
7/18
Updated all Typical Application Circuits, Package Information table, Electrical
Characteristics note numbering, Pin Description table, and Linear Regulator (VCC
and EXTVCC), Operating Input Voltage Range, and Thermal Shutdown Protection
sections; corrected typos in TOC01, TOC02 and TOC07, and updated TOC12–
TOC17.
1–5, 17–18
5–9
1–19
1–8, 11,
14–15, 18
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim
reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2018 Maxim Integrated Products, Inc. │ 20
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