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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
General Description
Benefits and Features
The MAX17575 high-efficiency, high-voltage, synchronous
step-down DC-DC converter with integrated MOSFETs
operates over a 4.5V to 60V input. The converter can
deliver up to 1.5A and generates output voltages from
0.9V up to 0.9 x VIN. The feedback (FB) voltage is accurate to within ±1.2% over -40°C to +125°C. Built-in compensation across the output-voltage range eliminates the
need for external components. The MAX17575 features
peak-current-mode control architecture and operates
in fixed frequency forced PWM mode. The MAX17575
offers a low minimum on-time that allows high switching
frequencies and a smaller solution size.
● Reduces External Components and Total Cost
• No Schottky-Synchronous Operation
• Internal Compensation for Any Output Voltage
• All-Ceramic Capacitors, Compact Layout
● Reduces Number of DC-DC Regulators to Stock
• Wide 4.5V to 60V Input
• Adjustable 0.9V to 0.9 × VIN Output
• Continuous 1.5A Current Over Temperature
• 400kHz to 2.2MHz Adjustable Switching Frequency
with External Synchronization
● Reduces Power Dissipation
• Peak Efficiency of 94%
• Auxiliary Bootstrap LDO for Improved Efficiency
• 4.65µA Shutdown Current
The device is available in a 12-pin (3mm × 3mm) TDFN
package. Simulation models are available.
● Operates Reliably in Adverse Industrial Environments
• Hiccup Mode Overload Protection
• Adjustable Soft-Start
• Built-In Output-Voltage Monitoring with RESET
• Programmable EN/UVLO Threshold
• Monotonic Startup into Prebiased Load
• Overtemperature Protection
• High Industrial -40°C to +125°C Ambient Operating
Temperature Range/-40°C to +150°C Junction
Temperature Range
Applications
●
●
●
●
●
●
Industrial Control Power Supplies
General-Purpose Point-of-Load
Distributed Supply Regulation
Base Station Power Supplies
Wall Transformer Regulation
High-Voltage, Single-Board Systems
Ordering Information appears at end of data sheet.
5V Output: Typical Application Circuit and Efficiency vs. Load Current
VIN
C1
2.2µF
VIN
PGND
EN/UVLO
MAX17575
SGND
LX
RT/SYNC
FB
SS
C3
5.6nF
VCC
C2
2.2µF
19-8785; Rev 3; 12/19
BST
RESET
EP
EXTVCC
fSW = 500kHz
C4
L1
0.1µF 15µH
FB
R3
4.7Ω
C6
0.1µF
VOUT
5V, 1.5A
C5
22µF
R1
75kΩ
FB
R2
16.2kΩ
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Absolute Maximum Ratings (Note 1)
VIN to PGND..........................................................-0.3V to +65V
EN/UVLO to GND......................................... -0.3V to VIN + 0.3V
EXTVCC to GND....................................................-0.3V to +26V
BST to PGND.........................................................-0.3V to +70V
LX to PGND................................................-0.3V to (VIN + 0.3V)
BST to LX..............................................................-0.3V to +6.5V
BST to VCC............................................................-0.3V to +65V
RESET, SS, RT/SYNC to GND.............................-0.3V to +6.5V
PGND to GND.......................................................-0.3V to +0.3V
FB to GND.............................................................-0.3V to +1.5V
VCC to GND..........................................................-0.3V to +6.5V
LX Total RMS Current.........................................................±1.6A
Continuous Power Dissipation (TA = +70°C)
(Derate 24.4mW/°C above +70°C) (Multilayer board)..1951mW
Output Short-Circuit Duration.....................................Continuous
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65°C to +160°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 1: Junction temperature greater than +125°C degrades operating lifetimes.
Package Information
PACKAGE TYPE: 12 TDFN
Package Code
TD1233+1C
Outline Number
21-0664
Land Pattern Number
90-0397
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
41°C/W
Junction to Case (θJC)
8.5°C/W
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
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Maxim Integrated │ 2
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Electrical Characteristics
(VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2k, CVCC = 2.2µF, VPGND = VGND = EXTVCC = 0, LX = SS = RESET = OPEN, VBST to VLX
= 5V, VFB = 1V, TA = -40°C to 125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to GND,
unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
60
V
7.25
µA
INPUT SUPPLY (VIN)
Input Voltage Range
VIN
Input Shutdown Current
IIN-SH
Input Quiescent Current
IQ_PWM
4.5
VEN/UVLO = 0V (shutdown mode)
4.65
Normal switching mode, fSW = 500kHz,
VFB = 0.8V, EXTVCC = GND
5.2
mA
ENABLE/UVLO (EN)
EN/UVLO Threshold
EN/UVLO Input Leakage
Current
VENR
VEN/UVLO rising
1.19
1.215
1.26
VENF
VEN/UVLO falling
1.068
1.09
1.131
VEN/UVLO = 1.25V, TA = 25°C
-50
+50
1mA ≤ IVCC ≤ 15mA
4.75
5
5.25
6V ≤ VIN ≤ 60V; IVCC = 1mA
4.75
5
5.25
25
54
100
IENLKG
V
nA
VCC LDO
VCC Output-Voltage Range
VCC Current Limit
VCC Dropout
VCC UVLO
VCC
IVCC-MAX
VCC = 4.3V, VIN = 6.5V
VCC-DO
VIN = 4.5V , IVCC = 15mA
4.15
VCC-UVR
Rising
4.05
4.2
4.3
VCC-UVF
Falling
3.65
3.8
3.9
EXTVCC rising
4.56
4.7
4.84
EXTVCC falling
4.3
4.45
4.6
V
mA
V
V
EXT LDO
EXTVCC Switchover Voltage
EXTVCC Dropout
EXTVCCDO
EXTVCC = 4.75V , IEXTVCC = 15mA
EXTVCC Current Limit
EXTVCCILIM
VCC = 4.5V, EXTVCC = 7V
V
0.3
V
26.5
60
100
mA
HIGH-SIDE MOSFET AND LOW-SIDE MOSFET DRIVER
High-Side nMOS On-Resistance
RDS-ONH
ILX = 0.3A
330
620
mΩ
Low-Side nMOS On-Resistance
RDS-ONL
ILX = 0.3A
170
320
mΩ
VLX = VIN-1V; VLX = VPGND +1V; TA =
25°C
-2
+2
µA
VSS = 0.5 V
4.7
5
5.3
µA
0.889
0.9
0.911
V
-50
+50
nA
LX Leakage Current
(LX to PGND_)
ILXLKG
SOFT-START
Soft-Start Current
ISS
FEEDBACK (FB)
FB Regulation Voltage
VFB_REG
FB Input Bias Current
IFB
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0 ≤ VFB ≤ 1V, TA = 25°C
Maxim Integrated │ 3
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2k, CVCC = 2.2µF, VPGND = VGND = EXTVCC = 0, LX = SS = RESET = OPEN, VBST to VLX
= 5V, VFB = 1V, TA = -40°C to 125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are referenced to GND,
unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CURRENT LIMIT
Peak Current-Limit Threshold
IPEAK-LIMIT
2.1
2.45
2.8
A
Runaway Current-Limit
Threshold
IRUNAWAY-
2.3
2.75
3.1
A
LIMIT
Negative Current-Limit Threshold
1
A
RT/SYNC AND TIMINGS
Switching Frequency
VFB Undervoltage Trip Level to
Cause HICCUP
fSW
VFB-HICF
HICCUP Timeout
RRT/SYNC = OPEN
430
490
550
RRT/SYNC = 51.1kΩ
370
400
430
RRT/SYNC = 40.2kΩ
475
500
525
RRT/SYNC = 8.06kΩ
1950
2200
2450
0.56
0.58
0.65
V
kHz
32768
Cycles
Minimum On-Time
tON_MIN
60
80
ns
Minimum Off-Time
tOFF_MIN
140
150
160
ns
LX Dead Time
SYNC Frequency Capture
Range
fSW set by RRT/SYNC
RESET
ns
1.4 x
fSW
50
VIH
2.1
VIL
0.8
SYNC Pulse Width
SYNC Threshold
5
1.1 x
fSW
RESET Output Level Low
IRESET = 10mA
RESET Output Leakage Current
TA = TJ = 25°C, VRESET = 5.5V
-100
ns
V
400
mV
+100
nA
VOUT Threshold for RESET
Assertion
VOUT-OKF
VFB falling
90.5
92
94.6
%
VOUT Threshold for RESET
Deassertion
VOUT-OKR
VFB rising
93.8
95
97.8
%
RESET Delay After FB Reaches
95% Regulation
1024
Cycles
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
TSHDNR
Temp rising
165
°C
Thermal-Shutdown Hysteresis
TSHDNHY
10
°C
Note 2: All limits are 100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range
are guaranteed by design and characterization
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Maxim Integrated │ 4
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Operating Characteristics
(VIN = VEN/UVLO = 24V, VGND = VPGND = 0V, CVCC = 2.2μF, unless otherwise noted. Typical values are at TA = +25°C. All voltages
are referenced to GND.)
5V OUTPUT
EFFICIENCY vs. LOAD CURRENT
FIGURE 4 CIRCUIT
100
toc01
100
80
70
VIN = 24V
60
VIN = 36V
VIN = 48V
EFFICIENCY (%)
EFFICIENCY (%)
80
VIN = 12V
50
70
VIN = 36V
60
VIN = 24V
50
VIN = 48V
VIN = 12V
40
40
30
20
0
500
1000
0
1500
500
5V OUTPUT
LOAD AND LINE REGULATION
FIGURE 4 CIRCUIT
toc03
5.10
1500
3.3V OUTPUT
LOAD AND LINE REGULATION
FIGURE 5 CIRCUIT
3.40
5.08
toc04
3.36
OUTPUT VOLTAGE (V)
VIN = 48V
5.07
VIN = 24V
5.05
5.03
VIN = 36V
VIN = 12V
5.02
5.00
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
toc02
90
90
30
3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
FIGURE 5 CIRCUIT
VIN = 24V
3.28
VIN = 12V
500
1000
1500
SOFT-START/SHUTDOWN THROUGH EN/UVLO,
5V OUTPUT, 3.3Ω RESISTIVE LOAD,
FIGURE 4 CIRCUIT
toc05
VOUT
IOUT
VRESET
5V/div
500
1000
1500
SOFT-START/SHUTDOWN THROUGH EN/UVLO,
3.3V OUTPUT, 2.2Ω RESISTIVE LOAD,
FIGURE 5 CIRCUIT
toc06
VEN/UVLO
5V/div
VOUT
2V/div
2V/div
0.5A/div
5V/div
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
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0
LOAD CURRENT (mA)
LOAD CURRENT (mA)
VEN/UVLO
VIN = 36V
3.24
3.20
0
VIN = 48V
3.32
IOUT
VRESET
0.5A/div
5V/div
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
Maxim Integrated │ 5
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Operating Characteristics (continued)
(VIN = VEN/UVLO = 24V, VGND = VPGND = 0V, CVCC = 2.2μF, unless otherwise noted. Typical values are at TA = +25°C. All voltages
are referenced to GND.)
SOFT-START WITH 2.5V PREBIAS,
5V OUTPUT
FIGURE 4 CIRCUIT
SOFT-START WITH 1.5V PREBIAS,
3.3V OUTPUT
FIGURE 5 CIRCUIT
toc07
5V/div
VEN/UVLO
1V/div
toc08
5V/div
VEN/UVLO
1V/div
VOUT
VOUT
5V/div
VRESET
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
VRESET
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, 1.5A LOAD CURRENT,
FIGURE 4 CIRCUIT
toc09
VOUT
(AC)
50mV/div
VLX
10V/div
ILX
2A/div
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, NO LOAD CURRENT,
toc10
FIGURE 4 CIRCUIT
VOUT
(AC)
10V/div
500mA/div
ILX
2µs/div
5V OUTPUT
(LOAD CURRENT STEPPED FROM 0.75A TO 1.5A)
FIGURE 4 CIRCUIT
toc11
VOUT
AC
100mV/div
ILOAD
1A/div
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50mV/div
VLX
2µs/div
100μs/div
5V/div
3.3V OUTPUT
(LOAD CURRENT STEPPED FROM 0.75A TO 1.5A)
FIGURE 5 CIRCUIT
toc12
VOUT
AC
50mV/div
ILOAD
1A/div
100μs/div
Maxim Integrated │ 6
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Operating Characteristics (continued)
(VIN = VEN/UVLO = 24V, VGND = VPGND = 0V, CVCC = 2.2μF, unless otherwise noted. Typical values are at TA = +25°C. All voltages
are referenced to GND.)
VOUT
AC
ILOAD
3.3V OUTPUT
(LOAD CURRENT STEPPED FROM NO LOAD TO 0.75A)
FIGURE 5 CIRCUIT
toc14
100mV/div
VOUT
AC
50mV/div
500mA/div
ILOAD
500mA/div
100μs/div
VLX
toc17
20V/div
100
30
80
1A/div
60
GAIN
GAIN
40
GAIN (dB)
PHASE
PHASE
80
60
GAIN
0
-10
-10
100
PHASE
10
20
CROSSOVER
FREQUENCY =
GAIN
CROSSOVER
50kHz,
FREQUENCY
= 50kHz,
PHASEMARGIN
MARGIN==64.46°
64.4°
PHASE
-20
40
20
GAIN CROSSOVER
FREQUENCY = 52.6kHz,
PHASE MARGIN = 61.73°
0
0
-20
-30
10µs/div
CONDITIONS: 5V OUTPUT, 1.5A LOAD CURRENT,
fSW = 500kHz, EXTERNAL CLOCK FREQUENCY = 700kHz
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-20
103
104
FREQUENCY (Hz)
5
10
-20
103
140
120
30
20
20
10
toc18
40
120
40
0
IOUT
BODE PLOT, 3.3V OUTPUT,
2.2Ω RESISTIVE LOAD, FIGURE 5 CIRCUIT
PHASE (°)
50mV/div
GAIN (dB)
VOUT(AC)
1A/div
20ms/div
50
5V/div
200mV/div
ILX
BODE PLOT, 5V OUTPUT,
3.3Ω RESISTIVE LOAD, FIGURE 4 CIRCUIT
toc16
toc15
VOUT
100μs/div
EXTERNAL CLOCK SYNCHRONIZATION
FIGURE 4 CIRCUIT
VRT/SYNC
OVERLOAD PROTECTION
5V OUTPUT, FIGURE 4 CIRCUIT
PHASE (°)
5V OUTPUT
(LOAD CURRENT STEPPED FROM NO LOAD TO 0.75A)
toc13
FIGURE 4 CIRCUIT
104
FREQUENCY (Hz)
105
Maxim Integrated │ 7
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Pin Configuration
TOP VIEW
1
EN/UVLO
2
RESET
3
SS
4
VCC
5
RT/SYNC
6
12 PGND
+
VIN
11 LX
10 BST
MAX17575
EP
9
EXTVCC
8
GND
7
FB
TDFN-EP
3mm x 3mm
Pin Description
PIN
NAME
1
VIN
2
EN/UVLO
3
RESET
4
SS
5
VCC
FUNCTION
Power Supply Input. The input supply range is from 4.5V to 60V.
Enable/Undervoltage Lockout Input. Drive EN/UVLO high to enable the output voltage. Connect to the
centre of the resistive divider between VIN and GND to set the input voltage (undervoltage threshold)
at which the device turns on. Pull up to VIN for always-on.
Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set value.
RESET goes high 1024 clock cycles after FB rises above 95% of its set value. RESET is valid when
the device is enabled and VIN is above 4.5V.
Soft-Start Input. Connect a capacitor from SS to GND to set the soft-start time.
5V LDO Output. Bypass VCC with 2.2μF/10V/X7R/0603(MURATA GRM188R71A225KE15) or
4.7μF/10V/X7R/0805(TDK C2012X7R1A475K085AC) ceramic capacitor to GND.
6
RT/SYNC
Oscillator Timing Resistor Input. Connect a resistor from RT/SYNC to GND to program the switching
frequency from 400kHz to 2.2MHz. An external pulse can be applied to RT/SYNC through a coupling
capacitor to synchronize the internal clock to the external pulse frequency. See the Switching
Frequency Selection and External Frequency Synchronization section for details.
7
FB
Feedback Input. Connect FB to the center of the resistive divider between output voltage and GND.
8
GND
9
EXTVCC
10
BST
11
LX
12
PGND
Power Ground. Connect PGND externally to the power ground plane. Connect GND and PGND pins
together at the ground return path of the VCC bypass capacitor.
—
EP
Exposed Pad. Always connect EP to the GND pin of the IC. Also, connect EP to a large GND plane
with several thermal vias for best thermal performance. Refer to the MAX17575 EV kit data sheet for
an example of the correct method for EP connection and thermal vias.
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Analog Ground.
External Power-Supply Input for the Internal LDO. Applying a voltage between 4.84V and 24V at the
EXTVCC pin bypasses the internal LDO and improve efficiency.
Boost Strap Capacitor Node. Connect a 0.1μF ceramic capacitor between BST and LX.
Switching Node. Connect LX to the switching side of the inductor. LX is high impedance when the
device is in shutdown mode.
Maxim Integrated │ 8
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Functional (or Block) Diagram
VIN
MAX17575
EXTVCC
VCC
INTERNAL LDO
REGULATOR
POK
BST
VCC_INT
EN/UVLO
PEAK-LIMIT
CHIPEN
THERMAL
SHUTDOWN
CLK
OSCILLATOR
CURRENT
SENSE
AMPLIFIER
HIGH-SIDE
DRIVER
DH
LX
PFM/PWM
CONTROL LOGIC
RT/SYNC
CS
CURRENT
SENSE LOGIC
1.215V
LOW-SIDE
DRIVER
DL
PGND
SLOPE
CS
FB
SS
EXTERNAL
SOFT START
CONTROL
ERROR
AMPLIFIER
PWM
SINK LIMIT
COMP
VOUT-OKR
CLK
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ZX/ILIMIN
FB
NEGATIVE
CURRENT
REF
RESET
LOGIC
RESET
GND
Maxim Integrated │ 9
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Detailed Description
The MAX17575 high-efficiency, high-voltage, synchronous
step-down DC-DC converter with integrated MOSFETs
operates over a 4.5V to 60V input. The converter can
deliver up to 1.5A and generates output voltages from
0.9V up to 0.9 x VIN. The feedback (FB) voltage is accurate
to within ±1.2% over -40°C to +125°C.
The device features a peak-current-mode control architecture and operates in fixed frequency forced PWM mode.
An internal transconductance error amplifier produces an
integrated error voltage at an internal node that sets the duty
cycle using a PWM comparator, a high-side current-sense
amplifier, and a slope-compensation generator. At each rising edge of the clock, the high-side MOSFET turns on and
remains on until either the appropriate or maximum duty
cycle is reached, or the peak current limit is detected. During
the high-side MOSFET’s on-time, the inductor current ramps
up. During the second-half of the switching cycle, the highside MOSFET turns off and the low-side MOSFET turns on.
The inductor releases the stored energy as its current ramps
down and provides current to the output.
The device features a RT/SYNC pin to program the
switching frequency and to synchronize to an external
clock. The device also features adjustable-input, undervoltage-lockout, adjustable soft-start, open-drain RESET,
and auxiliary bootstrap LDO.
Linear Regulator (VCC)
The device has two internal (low-dropout) regulators
(LDOs) which powers VCC. One LDO is powered from
VIN and the other LDO is powered from EXTVCC
(EXTVCC LDO). Only one of the two LDOs is in operation
at a time, depending on the voltage levels present at
EXTVCC. If EXTVCC voltage is greater than 4.7V (typ),
VCC is powered from EXTVCC. If EXTVCC is lower than
4.7V (typ), VCC is powered from VIN. Powering VCC from
EXTVCC increases efficiency at higher input voltages.
EXTVCC voltage should not exceed 24V.
Typical VCC output voltage is 5V. Bypass VCC to
GND
with
either
2.2μF/10V/X7R/0603(MURATA
GRM188R71A225KE15) or 4.7μF/10V/X7R/0805(TDK
C2012X7R1A475K085AC) ceramic capacitor. VCC powers
the internal blocks and the low-side MOSFET driver and
recharges the external bootstrap capacitor. Both LDO can
source up to 60mA (typ). The MAX17575 employs an undervoltage-lockout circuit that forces the converter off when
VCC falls below 3.8V (typ). The converter is enabled again
when VCC is higher than 4.2V. The 400mV UVLO hysteresis
prevents chattering on power-up/power-down.
In applications where the buck converter output is connected
to the EXTVCC pin, if the output is shorted to ground, then
transfer from EXTVCC LDO to the internal LDO happens
seamlessly without any impact on the normal functionality.
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Switching Frequency Selection and External
Frequency Synchronization
The switching frequency of the MAX17575 can be
programmed from 400kHz to 2.2MHz by using a resistor connected from the RT/SYNC pin to GND. When no resistor is
used, the frequency is programmed to 490kHz. The switching
frequency (fSW) is related to the resistor connected at the RT/
SYNC pin (RRT/SYNC) by the following equation:
=
R RT/SYNC
21× 10 3
− 1.7
f SW
where RRT/SYNC is in kΩ and fSW is in kHz. See Table 1
for RT/SYNC resistor values for a few common switching
frequencies.
The RT/SYNC pin can be used to synchronize the device’s
internal oscillator to an external system clock. A resistor must
be connected from the RT/SYNC pin to GND to be able to
synchronize the MAX17575 to an external clock. The external clock should be coupled to the RT/SYNC pin through a
network, as shown in Figure 1. When an external clock is
applied to RT/SYNC pin, the internal oscillator frequency
changes to external clock frequency (from original frequency
based on RT/SYNC setting) after detecting 16 external clock
edges. The external clock logic-high level should be higher
than 2.1V, logic-low level lower than 0.8V and the pulse
width of the external clock should be more than 50ns. The
RT/SYNC resistor should be selected to set the switching
frequency at 10% lower than the external clock frequency.
Table 1. Switching Frequency vs.
RT/SYNC Resistor
400
RT/SYNC RESISTOR
(kΩ)
51.1
SWITCHING FREQUENCY (kHz)
500
OPEN
1000
19.1
2200
8.06
MAX17575
C1
C8
RT/SYNC
100pF
CLOCK
SOURCE
47pF
R8
1K
R7
40.2K
V LOGIC -HIGH
V LOGIC -LOW
DUTY
Figure 1. External Clock Synchronization
Maxim Integrated │ 10
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Operating Input-Voltage Range
The minimum and maximum operating input voltages for
a given output voltage should be calculated as follows:
VIN(MIN) =
(
(
(
VOUT + I OUT(MAX) × R DCR(MAX) +R DS_ONL(MAX)
(
1 − f SW(MAX) × t OFF_MIN(MAX)
(
)
+ I OUT(MAX) × R DS_ONH(MAX) − R DS_ONL(MAX)
VIN(MAX) =
))
))
VOUT
f SW(MAX) × t ON_MIN(MAX)
where:
VOUT = Steady-state output voltage
IOUT(MAX) = Maximum load current
RDCR(MAX) = Worst-case DC resistance of the inductor
fSW(MAX) = Maximum switching frequency
tOFF_MIN(MAX) = Worst-case minimum switch off-time (160ns)
tON_MIN(MAX) = Worst-case minimum switch on-time (80ns)
RDS_ONH(MAX) = Worst-case on-state resistances and
high-side internal MOSFET,
RDS_ONL(MAX) = Worst-case on-state resistances and
low-side external MOSFET
Overcurrent Protection
The device is provided with a robust overcurrent protection scheme that protects the device under overload and
output short-circuit conditions. A cycle-by-cycle peak current limit turns off the high-side MOSFET whenever the
high-side switch current exceeds an internal limit of 2.45A
(typ). A runaway current limit on the high-side switch current at 2.75A (typ) protects the device under high input
voltage, short-circuit conditions when there is insufficient
output voltage available to restore the inductor current that
was built up during the on period of the step-down converter. One occurrence of runaway current limit triggers
a hiccup mode. In addition, due to any fault, if the feedback voltage drops below 0.58V any time after soft-start
is completed, then hiccup mode is activated. In hiccup
mode, the converter is protected by suspending switching
for a hiccup timeout period of 32,768 clock cycles of half
the switching frequency. Once the hiccup timeout period
expires, soft-start is attempted again. Note that when softstart is attempted under overload conditions, if feedback
voltage does not exceed 0.58V, the device continues to
switch at half the programmed switching frequency for
the time duration of the programmed soft-start time and
1024 clock cycles. Hiccup mode of operation ensures low
power dissipation under output short-circuit conditions.
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RESET Output
The device includes a RESET comparator to monitor the
status of the output voltage. The open-drain RESET output requires an external pullup resistor. RESET goes high
(high impedance) 1024 switching cycles after the regulator output increases above 95% of the designed nominal
regulated voltage. RESET goes low when the regulator
output voltage drops to below 92% of the set nominal
output voltage. RESET also goes low during thermal
shutdown or when the EN/UVLO pin goes below VENF.
Prebiased Output
When the device starts into a prebiased output, both the
high-side and low-side switches are turned off so that the
converter does not sink current from the output. Highside and low-side switches do not start switching until the
PWM comparator commands the first PWM pulse. The
output voltage is then smoothly ramped up to the target
value in alignment with the internal reference.
Thermal Shutdown Protection
Thermal shutdown protection limits total power dissipation in
the device. When the junction temperature of the device
exceeds +165°C, an on-chip thermal sensor shuts down
the device, allowing the device to cool. The device turns
on with soft-start after the junction temperature reduces
by 10°C. Carefully evaluate the total power dissipation
(see the Power Dissipation section) to avoid unwanted
triggering of the thermal shutdown protection in normal
operation.
Applications Information
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching. The
input capacitor RMS current (IRMS) is defined by the
following equation:
=
IRMS I OUT(MAX) ×
VOUT × (VIN − VOUT )
VIN
where, IOUT(MAX) is the maximum load current.
IRMS has a maximum value when the input voltage
equals twice the output voltage (VIN = 2 x VOUT), so
IRMS(MAX) = IOUT(MAX)/2.
Choose an input capacitor that exhibits less than +10°C
temperature rise at the RMS input current for optimal
long-term reliability. Use low-ESR ceramic capacitors with
high-ripple-current capability at the input. X7R capacitors
Maxim Integrated │ 11
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
are recommended in industrial applications for their temperature stability. Calculate the input capacitance using
the following equation:
C IN =
pin to GND programs the soft-start time. The selected output
capacitance (CSEL) and the output voltage (VOUT) determine the minimum required soft-start capacitor as follows:
I OUT(MAX) × D × (1 − D)
η × f SW × ∆VIN
where:
D = VOUT/VIN and is the duty ratio of the converter,
fSW = Switching frequency,
C SS ≥ 56 × 10 −6 × C SEL × VOUT
The soft-start time (tSS) is related to the capacitor connected
at SS (CSS) by the following equation:
t SS =
C SS
In applications where the source is located distant from
the device input, an electrolytic capacitor should be added
in parallel to the ceramic capacitor to provide necessary
damping for potential oscillations caused by the inductance
of the longer input power path and input ceramic capacitor.
5.55 × 10 −6
For example, to program a 2ms soft-start time, a 12nF
capacitor should be connected from the SS pin to GND.
Note that during start-up, the device operates at half the
programmed switching frequency until the output voltage
reaches 66.7% of the set output nominal voltage.
Inductor Selection
Adjusting Output Voltage
∆VIN = Allowable input voltage ripple, and η is the efficiency.
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
saturation current (ISAT) and DC resistance (RDCR). The
switching frequency and output voltage determine the
inductor value as follows:
2 × VOUT
L=
f SW
Where VOUT and fSW are nominal values and fSW is in
Hz. Select an inductor whose value is nearest to the value
calculated by the previous formula.
Select a low-loss inductor closest to the calculated value
with acceptable dimensions and having the lowest possible
DC resistance. The saturation current rating (ISAT) of the
inductor must be high enough to ensure that saturation
can occur only above the peak current-limit value.
Output Capacitor Selection
X7R ceramic output capacitors are preferred due to their
stability over temperature in industrial applications. The
output capacitors are usually sized to support a step load
of 50% of the maximum output current in the application,
so the output voltage deviation is contained to 3% of the
output voltage change. The minimum required output
capacitance can be calculated as follows:
60
C OUT =
VOUT
Where COUT is in µF. Derating of ceramic capacitors with
DC-voltage must be considered while selecting the output
capacitor. Derating curves are available from all major
ceramic capacitor vendors.
Soft-Start Capacitor Selection
The device implements adjustable soft-start operation to
reduce inrush current. A capacitor connected from the SS
www.maximintegrated.com
Set the output voltage with a resistive voltage-divider connected from the positive terminal of the output capacitor
(VOUT) to GND (see Figure 2). Connect the center node
of the divider to the FB pin. Use the following procedure
to choose the resistive voltage-divider values:
Calculate resistor R4 from the output to the FB pin as follows:
R4 =
1850
C OUT_SEL
Where COUT_SEL (in µF) is the actual derated value of
the output capacitance used and R4 is in kΩ. The minimum
allowable value of R4 is (5.6 x VOUT), where R4 is in kΩ.
If the value of R4 calculated using the above equation
is less than (5.6 x VOUT), increase the value of R4 to at
least (5.6 x VOUT).
R4 × 0.9
R5 =
(VOUT − 0.9)
R5 is in kΩ.
VOUT
R4
FB
R5
GND
Figure 2. Adjusting Output Voltage
Maxim Integrated │ 12
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Setting the Undervoltage Lockout Level
The device offers an adjustable input undervoltage-lockout
level. Set the voltage at which the device turns on with a resistive voltage-divider connected from VIN to GND (Figure 3).
Connect the center node of the divider to EN/UVLO. Choose
R1 to be 3.3MΩ and then calculate R2 as follows:
R2 =
where VINU is the voltage at which the device is required
to turn on. Ensure that VINU is higher than 0.8 x VOUT. To
avoid hiccup during slow power-up (slower than soft-start)
or power-down.
If the EN/UVLO pin is driven from an external signal source,
a series resistance of minimum 1kΩ is recommended to be
placed between the signal source output and the EN/UVLO
pin, to reduce voltage ringing on the line.
Power Dissipation
At a particular operating condition, the power losses that
lead to temperature rise of the part are estimated as follows:
1
PLOSS
= (POUT × ( − 1)) − I OUT 2 × R DCR
η
P=
OUT VOUT × I OUT
)
where:
POUT = Output power,
η = Efficiency of the converter,
RDCR = DC resistance of the inductor (see the Typical
Operating Characteristics for more information on efficiency
at typical operating conditions).
For a typical multilayer board, the thermal performance
metrics for the package are given below:
θ JA = 41°C / W
θ JC = 8.5°C / W
The junction temperature of the device can be estimated
at any given maximum ambient temperature (TA(MAX))
from the following equation:
TJ(MAX)
= T A(MAX) + (θ JA × PLOSS )
If the application has a thermal-management system that
ensures that the exposed pad of the device is maintained
at a given temperature (TEP(MAX)) by using proper heat
sinks, the junction temperature of the device can be
estimated at any given maximum ambient temperature as:
T=
J(MAX) TEP(MAX) + (θ JC × PLOSS )
Junction temperatures greater than +125°C degrades
operating lifetimes.
www.maximintegrated.com
R1
EN/UVLO
1.215 × R1
(VINU − 1.215)
(
VIN
R2
GND
Figure 3. Setting the Input Undervoltage Lockout
PCB Layout Guidelines
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due
to the high di/dt of the currents. Since inductance of a current
carrying loop is proportional to the area enclosed by the
loop, if the loop area is made very small, inductance is
reduced. Additionally, small-current loop areas reduce
radiated EMI.
A ceramic input filter capacitor should be placed close
to the VIN pins of the IC. This eliminates as much trace
inductance effects as possible and gives the IC a cleaner
voltage supply. A bypass capacitor for the VCC pin also
should be placed close to the pin to reduce effects of trace
impedance.
When routing the circuitry around the IC, the analog smallsignal ground and the power ground for switching currents
must be kept separate. They should be connected together
at a point where switching activity is at a minimum, typically
the return terminal of the VCC bypass capacitor. This helps
keep the analog ground quiet. The ground plane should
be kept continuous/unbroken as far as possible. No trace
carrying high switching current should be placed directly
over any ground plane discontinuity.
PCB layout also affects the thermal performance of the
design. A number of thermal vias that connect to a large
ground plane should be provided under the exposed pad
of the part, for efficient heat dissipation.
For a sample layout that ensures first pass success,
refer to the MAX17575 evaluation kit layout available at
www.maximintegrated.com.
Maxim Integrated │ 13
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Application Circuit
BST
VIN
VIN
C5
0.1µF
C1
2.2µF
PGND
LX
EN/UVLO
PGND
MAX17575
L1
15µH
R3
4.7Ω
EXTVCC
R1
75kΩ
C6
0.1µF
VCC
C3
VOUT
5V/1.5A
C2
22µF
FB
RT/SYNC
RESET
C4
5600pF
R2
16.2kΩ
GND
R4
40.2KΩ
SS
EP
fSW = 500kHz
L1 = 15µH COILCRAFT XAL6060-153 (6mm × 6mm)
C2 = 22µF/10V/X7R/1210 MURATA GRM32ER71A226K
C3 = 4.7µF/10V/X7R/0805 TDK 2012X7R1A475K085AC (or)
2.2µF/10V/X7R/0603 MURATA GRM188R71A225KE15
Figure 4. Typical Application Circuit for 5V Output
BST
VIN
VIN
C5
0.1µF
C1
2.2µF
PGND
LX
EN/UVLO
PGND
MAX17575
L1
15µH
VOUT
3.3V/1.5A
C2
22µF
EXTVCC
R1
69.5kΩ
VCC
C3
FB
RT/SYNC
GND
R4
40.2KΩ
RESET
C4
5600pF
SS
EP
R2
26kΩ
fSW = 500kHz
L1 = 15µH COILCRAFT XAL6060-153 (6mm × 6mm)
C2 = 22µF/10V/X7R/1210 MURATA GRM32ER71A226K
C3 = 4.7µF/10V/X7R/0805 TDK 2012X7R1A475K085AC (or)
2.2µF/10V/X7R/0603 MURATA GRM188R71A225KE15
Figure 5. Typical Application Circuit for 3.3V Output
www.maximintegrated.com
Maxim Integrated │ 14
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Ordering Information
MAX17575ATC+
12-TDFN EP*
PACKAGESIZE
3mm x 3mm
MAX17575ATC+T
12-TDFN EP*
3mm x 3mm
PART
PIN-PACKAGE
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
www.maximintegrated.com
Maxim Integrated │ 15
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Revision History
REVISION
NUMBER
REVISION
DATE
0
2/17
Initial release
6/17
Updated global conditions for the Electrical Characteristics table, Typical Operating
Characteristics, Pin Description table 5V LDO Output (VCC pin) Function, and the
Linear Regulator (VCC) section. Updated Equation in the Operating Input-Voltage
Range section, limits in the Overcurrent Protection section, and Typical Application
Circuits.
5/18
Updated the Absolute Maximum Ratings, Detailed Description, Linear Regulator,
Operating Input-Voltage Range, RESET Output, Thermal Shutdown Protection,
Applications Information, and Power Dissipation sections. Updated the Electrical
Characteristics and Typical Operating Characteristics global characteristics,
TOC05–TOC08, and the Pin Description table.
1
2
PAGES
CHANGED
DESCRIPTION
—
1–8,
10–11, 14
2–11,
13–14
2.1
Corrected the Pin Description table.
2.2
Corrected typos in the Absolute Maximum Ratings, Linear Regulator (VCC),
Input Capacitor Selection, and Setting the Undervoltage Lockout Level sections;
Updated the Electrical Characteristics table, Typical Operating Characteristics, Pin
Configuration, Pin Description table, and Functional Diagram.
2–12,
13, 16
3
Updated the General Description, Benefits and Features, Electrical Characteristics,
Typical Operating Characteristics (Conditions and TOC01–TOC08, TOC11–
TOC14, TOC16–TOC18), Pin Configuration, Pin Description, Functional Diagram,
Detailed Description, Switching Frequency Selection and External Frequency
Synchronization, Overcurrent Protection, RESET Output, Thermal Shutdown
Protection, Soft-Start Capacitor Selection, and Setting the Undervoltage Lockout
Level sections, and Table 1 and Figure 3; added Circuit on page 1, and TOC19 and
TOC20; added MAX17575ATC+T to the Ordering Information table
1, 3–13, 15
3.1
12/19
Corrected typos
8
8, 12–13
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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