19-1811; Rev 2; 4/09
KIT
ATION
EVALU
E
L
B
AVAILA
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
The MAX1775 dual, step-down DC-DC converter generates both the main (+3.3V at over 2A) and core
(+1.8V at up to 1.5A) supplies for a complete power
solution for PDAs, subnotebooks, and other hand-held
devices. The main output is adjustable from +1.25V to
+5.5V. The core output is adjustable from 1V to 5V.
Both switching converters operate at up to 1.25MHz for
small external components and use synchronous rectifiers to achieve efficiencies up to 95%. Operation with
up to 100% duty cycle provides the lowest possible
dropout voltage to extend useful battery life.
The MAX1775 accepts inputs from +2.7V up to +28V,
allowing use with many popular battery configurations as
well as AC-DC wall adapters. Digital soft-start reduces
battery current surges at power-up. Both the main and
core converters have separate shutdown inputs. The
MAX1775 comes in a small 16-pin QSOP package.
The MAX1775 evaluation kit is available to help reduce
design time.
Features
♦ Dual, High-Efficiency, Synchronous Rectified
Step-Down Converter
♦ Main Power
Adjustable from +1.25V to +5.5V
Over 2A Load Current
Up to 95% Efficiency
♦ Core Power
Adjustable from 1V to 5V
Internal Switches
Up to 1.5A Load Current
Up to 92% Efficiency
♦ 100% (max) Duty Cycle
♦ Up to 1.25MHz Switching Frequency
♦ Input Voltage Range from +2.7V to +28V
♦ 170μA Quiescent Current
♦ 5μA Shutdown Current
♦ Digital Soft-Start
♦ Independent Shutdown Inputs
Ordering Information
________________________Applications
Hand-Held Computers
PDAs
PART
TEMP RANGE
PIN-PACKAGE
MAX1775EEE
-40°C to +85°C
16 QSOP
Internet Access Tablets
Typical Operating Circuit
POS Terminals
Subnotebooks
IN 2.7V TO 5.5V (28V IN CASCADE)
IN
Pin Configuration
ON
ON
TOP VIEW
OFF
SHDNM
OFF
SHDNC
PDRV
MAIN
3.3V
OVER 2A
NDRV
16 LXC
SHDNM 1
CVH
INC
CVL
SHDNC 2
15 INC
PGND 3
14 GND
NDRV 4
MAX1775
12 CS-
IN 6
11 CS+
PDRV 7
10 FBM
9
CSFBM
13 FBC
CVL 5
CVH 8
MAX1775 CS+
REF
PGND
GND
LXC
CORE
1.8V
1.5A
FBC
REF
16 QSOP
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim's website at www.maxim-ic.com.
1
MAX1775
General Description
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
ABSOLUTE MAXIMUM RATINGS
IN, SHDNM, CVH to GND.......................................-0.3V to +30V
IN to CVH, PDRV ......................................................-0.3V to +6V
PDRV to GND..................................(VCVH - 0.3V) to (VIN + 0.3V)
PGND to GND .......................................................-0.3V to +0.3V
All Other Pins to GND...............................................-0.3V to +6V
Core Output Short Circuit...........................................Continuous
Continuous Power Dissipation
16-Pin QSOP (derate 7.1mW/°C above +70°C)..........571mW
Operating Temperature .......................................-40°C to +85°C
Storage Temperature.........................................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MAX
UNITS
28
V
15
30
µA
VFBM = +1.5V, VFBC = +1.5V,
V SHDNM = V SHDNC = +3.3V
110
220
µA
VFBM = +1.5V, VFBC = +1.5V,
V SHDNM = V SHDNC = +3.3V
60
120
µA
SHDNM = SHDNC = GND
5
30
µA
5.5
V
Input Voltage
VIN
Input Quiescent Supply Current
IIN
VFBM = +1.5V, VFBC = +1.5V,
V SHDNM = V SHDNC = +3.3V
CS- Quiescent Supply Current
ICS-
Core Regulator Quiescent
Supply Current
IINC
IN Shutdown Supply Current
MIN
TYP
2.7
MAIN REGULATOR
Main Output Voltage Adjust
Range
FBM Regulation Threshold
VFBM
V(CS+ - CS-) = 0 to +60mV, VIN = +2.7V to +28V
1.21
FBM Input Current
IFBM
VFBM = +1.3V
-0.1
Current-Limit Threshold
VCLM
VCS+ - VCS-
60
Minimum Current-Limit
Threshold
VMIN
VCS+ - VCS-
VVALLEY
VZERO
Valley Current Threshold
Zero Current Threshold
1.25
1.29
V
0.1
µA
80
100
mV
6
15
24
mV
VCS+ - VCS-
40
50
60
mV
VCS+ - VCS-
0
15
mV
2
4.4
Ω
4.5
8
PDRV, NDRV Gate Drive
Resistance
VCS- = +3.3V, ILOAD = 50mA
CS- to CVL Switch Resistance
ICVL = 50mA
PDRV, NDRV Dead Time
2
1.25
50
Ω
ns
Maximum Duty Cycle
100
%
Minimum On-Time
200
400
650
ns
Minimum Off-Time
200
400
650
ns
_______________________________________________________________________________________
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Maximum Duty Cycle
100
%
Minimum On-Time
200
650
ns
Minimum Off-Time
200
650
ns
V
CORE REGULATOR
Input Voltage Range
VINC
INC Undervoltage Lockout
2.6
5.5
VINC rising
2.39
2.55
VINC falling
2.29
2.45
1.0
5.0
Core Output Voltage Adjust
Range
Maximum Core Load Current
(Note 1)
1
V
V
A
FBC Regulation Threshold
VFBC
VINC = +2.5V to +5.5V, IOUTC = 0 to 200mA
0.97
1.03
V
FBC Input Current
IFBC
VFBC = +1.3V
-0.1
0.1
µA
Dropout Voltage (INC to LXC)
LXC Leakage Current
IOUTC = 400mA
ILXC
VINC = +5.5V, VLXC = 0 to +5.5V
-10
LXC P-Channel, N-Channel
On-Resistance
0.2
V
10
µA
0.5
Ω
LXC P-Channel Current Limit
1200
3050
mA
LXC P-Channel Minimum
Current
100
400
mA
LXC N-Channel Valley Current
880
2450
mA
LXC N-Channel Zero-Crossing
Current
35
175
mA
Maximum Duty Cycle
100
Minimum On-Time
150
670
ns
Minimum Off-Time
150
670
ns
1.22
1.27
V
%
REFERENCE
Reference Voltage
VREF
Reference Load Regulation
IREF = 0 to 50µA
10
mV
Reference Line Regulation
VCS- = +2.5V to +5.5V,
IREF = 50µA
5
mV
Reference Sink Current
IREF
10
µA
CVL, CVH REGULATORS
CVL Output Voltage
VCVL
CVH Output Voltage
VCVH
CVL Undervoltage Lockout
ICVL = 50mA, VIN = +2.7V, VCS- = 0V
2.6
3.1
VIN = +4V, ICVH = 25mA
VIN - 2.8
VIN = +12V, ICVH = 50mA
VIN - 3.7
VCVL rising
2.40
2.55
VCVL falling
2.30
2.45
V
V
V
_______________________________________________________________________________________
3
MAX1775
ELECTRICAL CHARACTERISTICS (continued)
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.4
V
LOGIC INPUTS
SHDNM, SHDNC Input Low
Voltage
SHDNM, SHDNC Input High
Voltage
2.0
SHDNM, SHDNC Input Low
Current
SHDNM = SHDNC = GND
SHDNC Input High Current
V SHDNC = +5.5V
SHDNM Input High Current
V
-1
V SHDNM = +5V
2
V SHDNM = +28V
15
1
µA
5
µA
30
µA
ELECTRICAL CHARACTERISTICS
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA -40°C to +85°C, unless otherwise noted.)
(Note 2)
PARAMETER
Input Voltage
SYMBOL
CONDITIONS
VIN
MIN
MAX
UNITS
2.7
28
V
30
µA
Input Quiescent Supply Current
IIN
VFBM = +1.5V, VFBC = +1.5V,
V SHDNM = V SHDNC = +3.3V
CS- Quiescent Supply Current
ICS-
VFBM = +1.5V, VFBC = +1.5V,
V SHDNM = V SHDNC = +3.3V
220
µA
Core Regulator Quiescent
Supply Current
IINC
VFBM = +1.5V, VFBC = +1.5V,
V SHDNM = V SHDNC = +3.3V
120
µA
SHDNM = SHDNC = GND
30
µA
1.25
5.5
V
IN Shutdown Supply Current
MAIN REGULATOR
Main Output Voltage Adjust
Range
4
FBM Regulation Threshold
VFBM
V(CS+ - CS-) = 0 to +60mV, VIN = +2.7V to +28V
1.21
1.29
V
FBM Input Current
IFBM
VFBM = +1.3V
-0.1
0.1
µA
Current-Limit Threshold
VCL
VCS+ - VCS-
60
100
mV
Minimum Current-Limit Threshold
VCS+ - VCS-
6
24
mV
Valley Current Threshold
VCS+ - VCS-
40
60
mV
Zero Current Threshold
VCS+ - VCS-
0
15
mV
PDRV, NDRV Gate Drive
Resistance
VCS- = +3.3V
4.4
Ω
CS- to CVL Switch Resistance
ICVL = 50mA
8
Ω
_______________________________________________________________________________________
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA -40°C to +85°C, unless otherwise noted.)
(Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Maximum Duty Cycle
100
%
Minimum On-Time
200
650
ns
Minimum Off-Time
200
650
ns
V
CORE REGULATOR
Input Voltage Range
VINC
INC Undervoltage Lockout
2.6
5.5
VINC rising
2.39
2.55
VINC falling
2.29
2.45
1.0
5.0
Core Output Voltage Adjust
Range
Maximum Core Load Current
(Note 1)
1
V
V
A
FBC Regulation Threshold
VFBC
VINC = +2.5V to +5.5V, IOUTC = 0 to 200mA
0.97
1.03
V
FBC Input Current
IFBC
VFBC = +1.3V
-0.1
0.1
µA
0.2
V
10
µA
0.5
Ω
Dropout Voltage (INC to LXC)
LXC Leakage Current
IOUTC = 400mA
ILXC
VINC = +5.5V, VLXC = 0 to +5.5V
-10
LXC P-Channel, N-Channel
On-Resistance
LXC P-Channel Current Limit
1200
3050
mA
LXC P-Channel Minimum
Current
100
400
mA
LXC N-Channel Valley Current
880
2450
mA
LXC N-Channel Zero-Crossing
Current
35
175
mA
Maximum Duty Cycle
100
Minimum On-Time
150
670
ns
Minimum Off-Time
150
670
ns
1.22
1.27
V
%
REFERENCE
Reference Voltage
VREF
Reference Load Regulation
IREF = 0 to 50µA
10
mV
Reference Line Regulation
VCS- = +2.5V to +5.5V,
IREF = 50µA
5
mV
Reference Sink Current
IREF
10
µA
CVL, CVH REGULATORS
CVL Output Voltage
VCVL
CVH Output Voltage
VCVH
CVL Undervoltage Lockout
ICVL = 50mA, VIN = +2.7V, VCS- = 0V
2.6
3.1
VIN = +4V, ICVH = 25mA
VIN - 2.8
VIN = +12V, ICVH = 50mA
VIN - 3.7
VCVL rising
2.40
2.55
VCVL falling
2.30
2.45
V
V
V
_______________________________________________________________________________________
5
MAX1775
ELECTRICAL CHARACTERISTICS (continued)
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA -40°C to +85°C, unless otherwise noted.)
(Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
0.4
V
LOGIC INPUTS
SHDNM, SHDNC Input Low
Voltage
SHDNM, SHDNC Input High
Voltage
2.0
SHDNM, SHDNC Input Low
Current
SHDNM = SHDNC = GND
SHDNC Input High Current
SHDNM Input High Current
V
-1
1
µA
V SHDNC = +5.5V
5
µA
V SHDNM = +28V
30
µA
Note 1: This parameter is guaranteed based on the LXC P-channel current limit and the LXC N-channel valley current.
Note 2: Specifications to -40°C are guaranteed by design and not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, VMAIN = +3.3V, VCORE = +1.8V, TA = +25°C, unless otherwise noted.)
CORE OUTPUT EFFICIENCY vs. LOAD
60
50
40
VREF ACCURACY vs. TEMPERATURE
VINC = +3.3V
60
VINC = +5V
50
40
30
20
20
10
10
10
100
LOAD (mA)
1000
10,000
MAX1775 toc03
1.5
0.5
0
-0.5
-1.0
-1.5
-2.0
0
1
2.0
1.0
70
30
0
6
90
80
EFFICIENCY (%)
V = +15V VIN = +18V
VIN = +12V IN
VIN = +5V
70
VINC = +2.7V
VREF ACCURACY (%)
MAX1775 toc01
VIN = +3.3V
90
80
100
MAX1775 toc02
MAIN OUTPUT EFFICIENCY vs. LOAD
100
EFFICIENCY (%)
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
1
10
100
LOAD (mA)
1000
-40
-15
10
35
TEMPERATURE (°C)
_______________________________________________________________________________________
60
85
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
MAIN SWITCHING WAVEFORMS,
LIGHT LOAD (100mA)
REFERENCE LOAD REGULATION
MAX1775 toc05
MAX1775 toc04
0
-0.2
VREF ACCURACY (%)
-0.4
LX
5V/div
-0.6
-0.8
-1.0
-1.2
ILM
500mA/div
-1.4
-1.6
VMAIN
(AC-COUPLED)
20mV/div
-1.8
-2.0
0
10
20
30
40
50
60
70
1µs/div
80
IREF (µA)
MAIN SWITCHING WAVEFORMS,
HEAVY LOAD (1A)
CORE SWITCHING WAVEFORMS,
LIGHT LOAD (50mA)
MAX1775 toc06
MAX1775 toc07
LX
5V/div
LX
5V/div
1000mA
500mA
ILM
500mA/div
0
200mA I
LC
200mA/div
0
VMAIN
(AC-COUPLED)
20mV/div
VCORE
(AC-COUPLED)
20mV/div
1µs/div
1µs/div
MAIN LINE-TRANSIENT RESPONSE
(5V TO 12V)
CORE SWITCHING WAVEFORMS,
HEAVY LOAD (500mA)
MAX1775 toc08
MAX1775 toc09
4V
LXC
2V/div
12V
0
VIN
5V
VCORE
(AC-COUPLED)
20mV/div
0
500mA
ILC
250mA/div
VMAIN
50mV/div
0
2µs/div
100µs/div
_______________________________________________________________________________________
7
MAX1775
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VMAIN = +3.3V, VCORE = +1.8V, TA = +25°C, unless otherwise noted.)
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VMAIN = +3.3V, VCORE = +1.8V, TA = +25°C, unless otherwise noted.)
MAIN LOAD TRANSIENT
(LOAD FROM 100mA to 1A, VIN = 5V)
CORE LINE-TRANSIENT RESPONSE
(3.3V TO 5V)
MAX1775 toc11
MAX1775 toc10
1A
5V
VINC
1V/div
IMAIN
3.3V
100mA
0
VMAIN
50mV/div
VCORE
50mV/div
100µs/div
200µs/div
MAIN LOAD TRANSIENT (IN DROPOUT
LOAD FROM 50mA TO 500mA)
TURN-ON RESPONSE
(CIRCUIT OF FIGURE 4), NO LOAD
MAX1775 toc13
MAX1775 toc12
5V
400mA
0
IMAIN
200mA
3V
0
2V
SHDNM
VMAIN
1V
VCORE
0
VMAIN
50mV/div
400mA
IIN
200mA
0mA
200µs/div
8
100µs/div
_______________________________________________________________________________________
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
PIN
NAME
FUNCTION
1
SHDNM
Shutdown for Main Regulator. A low voltage on SHDNM shuts off the main output. For normal
operation, connect SHDNM to IN.
2
SHDNC
Shutdown for Core Regulator. A low voltage on SHDNC shuts off the core output. For normal operation,
connect SHDNC to CVL.
3
PGND
Power Ground. Ground for NDRV and core output synchronous rectifier. Connect all grounds together
close to the IC.
4
NDRV
N-Channel Drive Output. Drives the main output synchronous rectifier MOSFET. NDRV swings between
CVL and PGND.
Low-Side Regulator Bypass. CVL is the output of an internal LDO regulator. This is the internal power
supply for the device control circuitry as well as the N-channel driver. Bypass CVL with a 1.0µF or
greater capacitor to GND. When CS- is above the CVL switchover threshold (2.47V), CVL is powered
from the main output.
5
CVL
6
IN
7
PDRV
P-Channel Drive Output. Drives the main output high-side MOSFET switch. PDRV swings between IN
and CVH. The voltage at CVH is regulated at VIN - 4.3V unless the input voltage is less than 5.5V.
8
CVH
High-Side Drive Bypass. CVH is the output of an internal LDO regulator with respect to VIN. This is the
low-side of the P-channel driver output. Bypass with a 1.0µF capacitor or greater to IN. When the input
voltage is less than +5.5V, CVH is switched to PGND.
9
REF
Reference Voltage Output. Bypass REF to GND with a 0.22µF or greater capacitor.
10
FBM
Main Output Feedback. Connect FBM to a resistive voltage-divider to set main output voltage between
+1.25V to +5.5V.
11
CS+
Main Regulator High-Side Current-Sense Input. Connect the sense resistor between CS+ and CS-.
This voltage is used to set the current limit and to turn off the synchronous rectifier when the inductor
current approaches zero.
12
CS-
Main Regulator Low-Side Current-Sense Input. Connect CS- to the main output.
13
FBC
Core Output Feedback. Connect FBC to a resistive voltage-divider to set core output between +1.0V to
+5.0V.
14
GND
Analog Ground
15
INC
Core Supply Input
16
LXC
Core Converter Switching Node
Power Supply Input
_______________________________________________________________________________________
9
MAX1775
Pin Description
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
IN
2.7V TO 5.5V
6
8
IN
ON
ON
OFF
OFF
1
2
C1
1µF
CVH
INC
15
PDRV
7
LM
5µH
SHDNC
NDRV
C2
1µF
MAIN
3.3V
2A
R1
33mΩ
4
5 CVL
R2
C4
47µF
M2
MAX1775 CS+ 11
9
C3
0.22µF
C6
10µF
M1
SHDNM
REF
CSFBM
3
PGND
14
GND
LXC
12
10
16
LC
5.4µH
R4
FBC
CORE
C5 1.8V
22µF 1.5A
R3
13
R5
Figure 1. Typical Application Circuit (Low Input Voltage)
Detailed Description
The MAX1775 dual step-down DC-DC converter is
designed to power PDA, palmtop, and subnotebook
computers. Normally, these devices need two separate
power supplies—one for the processor and another
higher voltage supply for the peripheral circuitry. The
MAX1775 provides an adjustable +1.25V to +5.5V main
output designed to power the peripheral circuitry of
PDAs and similar devices. The main output delivers
over 2A output current. The lower voltage core converter has an adjustable +1.0V to +5.0V output, providing
up to 1.5A output current. Both regulators utilize a proprietary regulation scheme, allowing PWM operation at
medium to heavy loads, and automatically switch to
pulse skipping at light loads for improved efficiency.
Figure 1 is the typical application circuit.
Operating Modes for the
Step-Down Converters
When delivering low output currents, the MAX1775
operates in discontinuous conduction mode. Current
through the inductor starts at zero, rises above the minimum current limit, then ramps down to zero during
each cycle (see Typical Operating Characteristics).
The switch waveform may exhibit ringing, which occurs
at the resonant frequency of the inductor and stray
10
capacitance, due to the residual energy trapped in the
core when the rectifier MOSFET turns off. This does not
degrade the circuit performance.
When delivering medium-to-high output currents, the
MAX1775 operates in PWM continuous-conduction
mode. In this mode, current always flows through the
inductor and never ramps to zero. The control circuit
adjusts the switch duty cycle to maintain regulation
without exceeding the peak switching current set by
the current-sense resistor.
100% Duty Cycle and Dropout
The MAX1775 operates with a duty cycle up to 100%.
This feature extends the input voltage range by turning
the MOSFET on continuously when the supply voltage
approaches the output voltage. This services the load
when conventional switching regulators with less than
100% duty cycle would fail. Dropout voltage is defined
as the difference between the input and output voltages when the input is low enough for the output to
drop out of regulation. Dropout depends on the MOSFET drain-to-source on-resistance, current-sense resistor, and inductor series resistance, and is proportional
to the load current:
Dropout voltage =
IOUT [RDS(ON) + RSENSE + RINDUCTOR]
______________________________________________________________________________________
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
MAX1775
TOFFMIN
VMIN
TONMIN
CS+
CS-
PON
VVALLEY
S
FB
PON
VIN
Q
PSW
VREF
R
VCLM
S
VO
Q
NON
NSW
R
VZERO
NONOVERLAP
PROTECTION
Figure 2. Simplified Control System Block Diagram
Regulation Control Scheme
The MAX1775 has a unique operating scheme that
allows PWM operation at medium and high current, with
automatic switching to pulse-skipping mode at lower
currents to improve light-load efficiency. Figure 2
shows a simplified block diagram.
Under medium- and heavy-load operation, the inductor
current is continuous and the part operates in PWM
mode. In this mode, the switching frequency is set by
either the minimum on-time or the minimum off-time,
depending on the duty cycle. The duty cycle is approximately the output voltage divided by the input voltage.
If the duty cycle is less than 50%, the minimum on-time
controls the frequency; and the frequency is approximately f ≈ 2.5MHz D, where D is the duty cycle. If the
duty cycle is greater than 50%, the minimum off-time
sets the frequency; and the frequency is approximately
f ≈ 2.5MHz (1 - D).
In both cases, the voltage is regulated by the error
comparator. For low duty cycles (50%), the P-channel MOSFET
remains off for the minimum off-time, causing fixed offtime operation. In this case, the P-channel MOSFET
remains on until the output voltage rises to the regulation threshold. Then the P-channel MOSFET turns off for
the minimum off-time, initiating another cycle.
By switching between fixed on-time and fixed off-time
operation, the MAX1775 can operate at high input-output ratios, yet still operate up to 100% duty cycle for
low dropout. Note that when operating in fixed on-time,
the minimum output voltage is regulated; but in fixed
off-time operation, the maximum output voltage is regulated. Thus, as the input voltage drops below approximately twice the output voltage, a decrease in line
regulation can be expected. The drop in voltage is
approximately VDROP ≈ VRIPPLE. At light output loads,
the inductor current is discontinuous, causing the
MAX1775 to operate at lower frequencies, reducing the
MOSFET gate drive and switching losses. In discontinuous mode, under most circumstances, the on-time will
be a fixed minimum of 400ns.
The MAX1775 features four separate current-limit
threshold detectors and a watchdog timer for each of
its step-down converters. In addition to the more common peak current detector and zero crossing detector,
each converter also provides a valley current detector
(IVALLEY) and a minimum current detector (IMIN). IVALLEY
is used to force the inductor current to drop to a lower
level after hitting peak current before allowing the Pchannel MOSFET to turn on. This is a safeguard against
inductor current significantly overshooting above the
peak current when the inductor discharges too slowly
when VOUT/L is small. IMIN is useful in ensuring that a
minimum current is built up in the inductor before turning off the P-channel MOSFET. This helps the inductor
to charge the output near dropout when dI/dt is small
(because (VIN - VOUT) / L is small) to avoid multiple
______________________________________________________________________________________
11
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
MAIN
CSOUT
CS+
MAX1775
CVH
CS- CS+
IN
CVL
PDRV
REF
REF
CVL
MAIN
BUCK
FB
SOFTSTART
CVH
NDRV
ON
PGND
SHDNM
SHDNC
ON
INC
CORE
BUCK
LXC
FB
PGNDC
GND
FBM
FBC
Figure 3. Simplified Block Diagram
pulses and low efficiency. This feature, however, is disabled during dropout and light-load conditions where
the inductor current may take too long to reach the IMIN
value. A watchdog timer overrides IMIN after the Pchannel MOSFET has been on for longer than about
10µs.
Main Step-Down Converter
The main step-down converter features adjustable
+1.25V to +5.5V output, delivering over 2A from a
+2.7V to +28V input (see Setting the Output Voltages).
The use of external MOSFETs and a current-sense
resistor maximizes design flexibility. The MAX1775
offers a synchronous rectifier MOSFET driver that
improves efficiency by eliminating losses through a
diode. The two MOSFET drive outputs, PDRV and
NDRV, control these external MOSFETs. The output
swing of these outputs is limited to reduce power con12
sumption by limiting the amount of injected gate charge
(see Internal Linear Regulators). The main current limit
is sensed through a small sense resistor at the converter output (see Setting the Current Limit). Driving SHDNM
low puts the main converter in a low-power shutdown
mode. The core regulator is still functional when the
main converter is in shutdown.
Core Step-Down Converter
The core step-down converter produces a +1.0V to
+5.0V output from a +2.6V to +5.5V input. The low-voltage input allows the use of internal power MOSFETs, taking advantage of their low RDS(ON), improving efficiency
and reducing board space. Like the main converter, the
core regulator makes use of an N-channel MOSFET synchronous rectifier, improving efficiency and eliminating
the need for an external Schottky diode. Current sensing
is internal to the device, eliminating the need for an
external sense resistor. The maximum and minimum current limits are sensed through the P-channel MOSFET,
while the valley current and zero crossing current are
sensed through the N-channel MOSFET. The core output
voltage is measured at FBC through a resistive voltagedivider. This divider can be adjusted to set the output
voltage level (see Setting the Output Voltages). The core
input can be supplied from the main regulator or an
external supply that does not exceed +5.5V (see HighVoltage Configuration and Low-Voltage Configuration).
The core converter can be shut down independent of the
main converter by driving SHDNC low. If the main converter output is supplying power to the core and is shut
down, SHDNM controls both outputs. Figure 3 is a simplified block diagram.
Internal Linear Regulators
There are two linear regulators internal to the MAX1775. A
high-voltage linear regulator accepts inputs up to +28V,
reducing it to +2.8V at CVL to provide power to the
MAX1775. Once the voltage at CS- reaches +2.47V, CVL
is switched to CS, allowing it to be driven from the main
converter, improving efficiency. CVL supplies the internal
bias to the IC and power for the NDRV gate driver.
The CVH regulator provides the low-side voltage for the
main regulator’s PDRV output. The voltage at CVH is regulated at 4.3V below VIN to limit the voltage swing on
PDRV, reducing gate charge and improving efficiency
(Figure 3).
Reference
The MAX1775 has an accurate internally trimmed
+1.25V reference at REF. REF can source no more than
50µA. Bypass REF to GND with a 0.22µF capacitor.
______________________________________________________________________________________
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
MAX1775
IN 2.7V TO 28V
8
6
IN
ON
ON
OFF
OFF
1
2
SHDNM
C1
1µF
CVH
PDRV
SHDNC
NDRV
C2
1µF
5 CVL
9
C3
0.22µF
3
PGND
14
GND
7
MAIN
3.3V
2A
R1
21mΩ
LM
10µH
4
C4
47µF
R2
M2
MAX1775
REF
C6
10µF
M1
11
CS+
12
CS15
INC
10
FBM
LC
5.4µH
LXC 16
R4
FBC
R3
CORE
C5 1.8V
22µF 1.5A
13
R5
Figure 4. High Input Voltage Cascaded Configuration
Design Procedure
Low-Voltage Configuration
To improve efficiency and conserve board space, the
core regulator operates from low input voltages, taking
advantage of internal low-voltage, low-on-resistance
MOSFETs. When the input voltage remains below 5.5V,
run the core converter directly from the input by connecting INC to IN (Figure 1). This configuration takes
advantage of the core’s low-voltage design and
improves efficiency.
High-Voltage Configuration
For input voltages greater than 5.5V, cascade the main
and core converters by connecting INC to the main output voltage. In this configuration (Figure 4), the core
converter is powered from the main output. Ensure that
the main output can simultaneously supply its load and
the core input current. In this configuration, the main
output voltage must be set above the 2.6V minimum
input voltage of the core converter.
Setting the Output Voltages
The main output voltage may be set from +1.25V and
+5.5V with two external resistors connected as a volt-
age-divider to FBM (Figure 1). Resistor values can be
calculated by the following equation:
R2 = R3 [(VOUTM / VFBM) - 1]
where VFBM = +1.25V. Choose R3 to be 40kΩ or less.
The core regulator output is adjustable from +1.0V to
+5.0V through two external resistors connected as a
voltage-divider to FBC (Figure 1). Resistor values can
be calculated through the following equation:
R4 = R5 [(VOUTC / VFBC) - 1]
where VFBC = +1.0V. Choose R5 to be 30kΩ or less.
Setting the Current Limit
The main regulator current limit is set externally through
a small current-sense resistor, R1 (Figure 1). The value
of R1 can be calculated by the following equation:
VCLM
R1 =
1.3 IOUT
(
)
where VCLM = 80mV is the current-sense threshold,
and IOUT is the current delivered to the output. The
core converter current limit is set internally and cannot
be modified.
______________________________________________________________________________________
13
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
Careful layout of the current-sense signal traces is
imperative. Place R1 as close to the MAX1775 as possible. The two traces should have matching length and
width, be as far as possible from noisy switching signals, and be close together to improve noise rejection.
These traces should be used for current-sense signal
routing only and should not carry any load current.
Refer to the MAX1775 Evaluation Kit for layout examples.
Inductor Selection
The essential parameters for inductor selection are
inductance and current rating. The MAX1775 operates
with a wide range of inductance values.
Calculate the inductance value for either core or main,
LMIN:
LMIN = (VIN - VOUT) TONMIN / IRIPPLE
where TONMIN is typically 400ns, and IRIPPLE is the
continuous conduction ripple current. In continuous
conduction, IRIPPLE should be chosen to be 30% of the
maximum load current. With high inductor values, the
MAX1775 begins continuous-conduction operation at a
lower fraction of full load (see Detailed Description).
The inductor’s saturation current must be greater than
the peak switching current to prevent core saturation.
Saturation occurs when the inductor’s magnetic flux
density reaches the maximum level the core can support, and inductance starts to fall. The inductor heating
current rating must be greater than the maximum load
current to prevent overheating. For optimum efficiency,
the inductor series resistance should be less than the
current-sense resistance.
Capacitor Selection
Choose output filter capacitors to service the output ripple current with acceptable voltage ripple. ESR in the
output capacitor is a major contributor to output ripple.
For the main converter, low-ESR capacitors such as
polymer, ceramic, or even tantalum are recommended.
For the core converter, choosing a low-ESR tantalum
capacitor with enough ESR to generate about 1% ripple
voltage across the output is helpful in ensuring stability.
Voltage ripple is the sum of contributions from ESR and
the capacitor value:
For ceramic capacitors, the ripple is mostly due to the
capacitance. The ripple due to the capacitance is
approximately:
VRIPPLE,C ≈ L IRIPPLE2 / 2COUTVOUT
where VOUT is the average output voltage. From this
equation, estimate the output capacitor values for given
voltage ripple as follows:
COUT = 1/2 L IRIPPLE2 / (VRIPPLE,COUT VOUT)
This equation is suitable for initial capacitor selection.
Final values should be set by testing a prototype or evaluation kit. When using tantalum capacitors, use good soldering practices to prevent excessive heat from
damaging the devices and increasing their ESR. Also,
ensure that the tantalum capacitors’ surge-current ratings
exceed the startup inrush and peak switching currents.
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple at IN, caused by the circuit’s switching. Use a
low-ESR capacitor. Two smaller-value low-ESR capacitors can be connected in parallel if necessary. Choose
input capacitors with working voltage ratings higher
than the maximum input voltage. Typically 4µF of input
capacitance for every 1A of load current is sufficient.
More capacitance may improve battery life and noise
immunity.
Place a surface-mount ceramic capacitor at IN very close
to the source of the high-side P-channel MOSFET. This
capacitor bypasses the MAX1775, minimizing the effects
of spikes and ringing on the MAX1775’s operation.
Bypass REF with 0.22µF or greater. Place this capacitor
within 0.2in (5mm) of the IC, next to REF, with a direct
trace to GND.
MOSFET Selection
The MAX1775 drives an external enhancement-mode
P-channel MOSFET and a synchronous-rectifier Nchannel MOSFET. When selecting the MOSFETs,
important parameters to consider are on-resistance
(R DS(ON) ), maximum drain-to-source voltage
(V DS(MAX) ), maximum gate-to-source voltage
(VGS(MAX)), and minimum threshold voltage (VTH(MIN)).
VRIPPLE ≈ VRIPPLE,ESR + VRIPPLE,C
For tantalum capacitors, the ripple is determined mostly
by the ESR. Voltage ripple due to ESR is:
VRIPPLE,ESR ≈ RESR IRIPPLE
14
______________________________________________________________________________________
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
16 QSOP
E16-5
21-0055
______________________________________________________________________________________
15
MAX1775
Chip Information
Revision History
REVISION
NUMBER
REVISION
DATE
2
4/09
DESCRIPTION
Corrected R1 resistor value in Figure 4 and other style errors
PAGES
CHANGED
1, 3, 5, 13, 14
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX1775
MAX1775
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
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