19-0349; Rev 1; 3/95
MAX194 Evaluation System/Evaluation Kit
The MAX194 Evaluation System (MAX194EVC16-DIP)
includes the MAX194 evaluation kit and Maxim’s
68HC16 module. Evaluation software supplied with the
kit demonstrates the use of the MAX194 (or the
MAX195) with Motorola’s high-speed QSPI serial interface. Complete source code is included. The EV system requires an IBM PC with a serial port and a 5 1/4"
disk drive.
The stand-alone MAX194 Evaluation Kit (MAX194
EVKIT-DIP) is an assembled and tested PC board that
embodies the standard application circuit. Separate
power, digital, and analog ground planes minimize
noise. Jumpers allow several operating modes. The
board generates its own interface timing signals, or can
be connected to a user-provided serial interface.
____________________________Features
♦ Proven PC Board Layout
♦ Complete Source Code Provided
♦ Shutdown-Mode Evaluation
♦ High-Speed Serial Interface
♦ Convenient Test Points Provided On-Board
♦ Operates from a Single 9V to 15V DC Power
Supply
♦ Evaluates Both the 14-Bit MAX194 and the 16-Bit
MAX195
______________Ordering Information
PART
MAX194EVC16-DIP
MAX194EVKIT-DIP
68HC16MODULE
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
BOARD TYPE
Through-Hole
Through-Hole
Through-Hole
68HC16 MODULE
{
{
___________________________________________________________________EV System
MAX194/MAX195 EV BOARD
Note: PC board labeled MAX195 for both MAX194 EV kit and MAX195 EV kit.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
Evaluates: MAX194/MAX195
_______________General Description
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
________EV System Component List
QUANTITY
DESCRIPTION
1
MAX194 Evaluation Kit (MAX194EVKIT-DIP)
1
68HC16 C Module (68HC16MODULE)
___MAX194 EV System Quick Start
This section applies only to the use of the MAX194 EV
kit with the 68HC16 module.
1) Copy the files from the distribution disk to your hard
disk. Store the MAX194 EV kit software in its own
directory.
2) Carefully align the 40-pin header of the MAX194 EV
kit with the 40-pin connector of the µC module.
Gently press them together. The two boards should
be flush against each other. Note: The MAX194 EV
kit is not supported by the 80C32 module.
3) Make sure the jumpers are configured in accordance with Table 1.
4) Connect a 9V to 15V DC power source to the µC
module, using a small screwdriver. The terminal
block is located next to the on/off switch, in the
upper right corner of the µC module. Plus and
minus are marked on the board.
available serial port uses a 25-pin connector, use a
standard 25-pin to 9-pin adapter.
6) To start up the MAX194 software on the IBM PC, set
the current directory to match the directory where
the Maxim software is stored, and then type the program name “MAX194”.
7) The program will ask which serial port is connected
to the µC module. Press the space bar until the correct port is highlighted, then press ENTER. The
MAX194 program will switch to terminal-emulation
mode.
8) At this point, apply power to the 68HC16 module.
The LED should light, and within 5 seconds the program will display a logon banner. Note that the LED
is a status indicator, not a power light. It flashes to
indicate module readiness.
9) To download and run the RAM resident code on the
µC module, press ALT+L (that is, hold down the
ALT key as you strike the L key). The program
prompts for the file name. Press the ENTER key to
download and run the file KIT194.S19 on the
68HC16 module.
The KIT194.S19 RAM resident program offers a menu
of commands listed in Table 2.
To evaluate the MAX195, replace U1 with the MAX195.
5) Connect a cable from the computer’s serial port to
the µC module. If using a 9-pin serial port, use a
straight-through 9-pin female-to-male cable. If the
Table 1. Jumper Configuration when Used
with 68HC16 Module
JUMPER
STATE
JU1
Closed
JU3
JU4
JU5
JU6
JU7
2
FUNCTION
Table 2. List of Commands Available in
KIT194.S19
COMMAND
FUNCTION
Ground the SCLK pin
?
List available commands.
QSPI
Conversion clock comes from QSPI clock
R
Read the MAX194.
QSPI
Chip-select is driven by QSPI PCS0
—
Perform continuous conversions.
QSPI
Conversion start is driven by QSPI PCS0
Open = Normal Operation.
Closed = Reset; do not close this jumper
when using the µC module, because the
µC drives the reset pin.
68HC16 module selects bipolar/
unipolar/shutdown modes
O
Oscilloscope demonstration—observe system
timing relationships by operating the MAX194
at full speed without processing data.
Open
AUTO
!
Reset the MAX194.
B
Select bipolar mode.
U
Select unipolar mode.
H
Select hexadecimal output.
D
Select decimal output.
L
Toggle low-power mode on/off.
T
Set power-up delay and sleep time.
S
Collect a fixed number of samples.
_______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
DESCRIPTION
Stand-Alone MAX194
_________________EV Kit Quick Start
This section applies only to the use of the MAX194 EV
kit by itself, without the µC module.
DESIGNATION
QTY
C1, C2, C4, C5, C19,
C20, C23–C26, C29
11
0.1µF ceramic capacitors
C3
1
1µF ceramic capacitor
C6, C7
2
15µF, 20V low-ESR capacitors
Sanyo OS-CON 20SA14
C8–C11, C13–C16, C21
9
10µF, 25V tantalum capacitors
C12, C18, C27
3
100µF, 25V electrolytic
capacitors
C17, C171
2
0.01µF ceramic capacitors
C22
1
47µF low-ESR capacitor
Sanyo OS-CON 6SA47M
D1, D2
2
1N5819 Schottky diodes
J1
1
2x20 female data connector
J2
1
10-pin header
JU1, JU6
2
2-pin headers
JU3, JU7
2
3-way headers
JU4, JU5
2
3-pin headers
R1, R2
2
10Ω, 5% resistors
R3, R8
2
680Ω, 5% resistors
R4, R41
2
22Ω, 5% resistors
Table 3. Jumper Configuration for StandAlone MAX194 EV Kit
1) Make sure the jumpers are configured in accordance with Table 3.
2) Connect the oscilloscope’s channel A probe to the
EOC test point on header J2, and the channel B
probe to the DOUT test point. Ground the scope
probes to the DGND test point or to the GND power
pad. Trigger on the positive edge of channel A.
Set the time base to 2µs per division, and set the
vertical gain to 2V per division.
3) Apply +12V DC to the terminals labeled +12V and
GROUND. The board draws less than 30mA of
supply current.
4) Momentarily close JU6 to reset the MAX194 EV kit.
Leave JU6 open for normal operation.
5) Apply a 0V to 4V signal source between the terminals labeled INPUT+ and INPUT-. The conversion
codes may be observed on the oscilloscope’s
channel A. See the appropriate data sheet for
timing information.
R5, R51
2
47kΩ, 5% resistors
JUMPER
STATE
R6, R10, R11, R13, R61
5
1kΩ, 5% resistors
JU1
Closed
R7
1
10kΩ, 5% resistor
R9
1
10MΩ, 5% resistor
JU3
OSC
Conversion clock comes from crystal
oscillator module
U1
1
Maxim MAX194
JU4
GND
U2
1
Maxim MAX874
Tie CS to GND, enabling data output on
DOUT
U3
1
79L05 negative linear
regulator
JU5
CONT
Tie CONV to EOC, continuous-conversion mode
U4
1
Optional crystal oscillator
JU6
Open
U5, U8
2
Maxim MAX400
Open = Normal Operation
Closed = Reset
UNI
1
78L05 positive linear
regulator
JU7
U6
U7
1
ICL7662 inverter
FUNCTION
Ground the SCLK pin
Select unipolar mode
_______________________________________________________________________________________
3
Evaluates: MAX194/MAX195
Stand-Alone EV Kit
____________________Component List
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
__Detailed Description of Software
EPROM Resident Program
A small bootstrap program is stored in the EPROM located on the 68HC16 board. The EPROM resident program
initializes the 68HC16, tests the static RAM, configures
the chip-select logic, establishes serial communications
with the host, and downloads program KIT194 into RAM.
It starts operating on power-up or whenever the RESET
button is pressed. After RESET, it tests the RAM, then
waits to receive a serial character on its serial port before
transmitting its identification banner.
RAM Resident Program
KIT194.S19 is a 68HC16 RAM-resident program that is
transferred from disk to the static RAM on the 68HC16
module. When the KIT194 program is running, it offers
the commands listed in Table 2.
Personal Computer Program
MAX194.EXE, which runs on an IBM-compatible computer, is a terminal program that establishes communication with the 68HC16 module and allows the user to
download and run the Maxim-provided RAM resident
program. The serial communication baud rate is initiated at 1200 baud (default setting) to ensure proper
operation with basic systems.
The MAX194.EXE program provides several commands
that are associated with the host computer. These commands are listed in Table 4.
The MAX194.EXE program can store the text of a terminal session in a log file. To begin recording the terminal
session, press ALT+O [the letter O]. The program will
ask for a file name. Press ENTER to accept the default
file name, or type in a different name. If a file with that
Table 4. Commands Available in
MAX194.EXE Terminal Program
KEY
4
COMMAND
ALT+L
Load and run resident code on 68HC16.
ALT+X
Exit to DOS.
ALT+P
Change port (COM1, COM2).
ALT+R
Send RESET command to 68HC16.
ALT+O
Open a log file.
ALT+C
Close the log file.
ALT+B
Display baud rate menu.
ALT+1
1200 baud
ALT+4
4800 baud
ALT+9
9600 baud
ALT+2
19200 baud
name already exists, the old file will be erased. To close
the file, press ALT+C. The log file will contain the complete text of the terminal session from the time the file is
opened until it is closed.
Using the QSPI to Read the MAX194
The 68HC16 module uses its Queued Serial Peripheral
Interface (QSPI) in master mode to read the MAX194.
The MAX194 EV kit software uses the algorithm
described below. Refer to the example program of
Listing 1, which assigns QSPI entries 0 and 1 and programmable chip-select PCS0 to the MAX194. Note:
This interface scheme requires that the QSPI clock be
active during the MAX194 reset (see Reset and
Calibration Procedure section).
1) Initialize the QSPI parameters as follows:
PARAMETER
VALUE
SPBR
5
1.68MHz serial clock
EXPLANATION
CPOL
0
Serial clock is low when idle
CPHA
1
CPOL ≠ CPHA, data valid on
falling clock edge
BITS
$0A
DSCKL
2
Delay 119ns between CS and first
clock in the first QSPI transfer to
satisfy MAX194 tDA.
COMD.0
$D0
Control RAM for first QSPI transfer: CONT = 1, BITSE = 1, DTL =
0, DSCK = 1, PSC0 = 0
COMD.1
$40
Control RAM for second QSPI
transfer: CONT = 0, BITSE = 1,
DTL = 0, DSCK = 0, PSC0 = 0
NEWQP
0
Index of first queue entry to
execute
ENDQP
1
Index of last valid queue entry
Ten bits per QSPI transfer. Use
two consecutive QSPI transfers
to read the MAX194.
2) Verify that EOC is low before starting the conversion.
3) Start the QSPI transfer.
4) Wait until QSPI transfer is complete. The CPU may
perform other tasks while waiting.
5) Extract the significant bits from QSPI RAM. Bits
B13–B06 are located in QSPI receive RAM entry
RR0 bits 7–0, and bits B05–B00 are located in entry
RR1 bits 9–4. RR1 bits 3–2 are the sub-LSB bits of
the MAX194 (see Table 5).
_______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
_______________________________________________________________________________________
Evaluates: MAX194/MAX195
Listing 1. Sample Code for 68HC16 Interface
5
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
Using Bit-Pushing to Read the MAX194
_Detailed Description of Hardware
The MAX194 may be interfaced using a bit-pushing
algorithm, such as the following:
Jumper Options
1) Verify that EOC is low before starting the conversion.
2) Assert CONV low to begin conversion.
3) Wait until EOC becomes high. Conversion has
begun.
Several jumper blocks allow different configurations of
the MAX194. Jumper functions are listed in Table 6.
See the Voltage Reference and Measuring Supply
Current sections.
4) Set CONV high.
5) Wait until EOC becomes low. Conversion is complete.
6) Assert SCLK low.
Table 6. Jumper Settings
JUMPER
POSITION
Closed
JU1
7) Assert CS low.
Open
8) Clear the 16-bit result register.
9) Repeat 16 times:
9-1. Set SCLK high.
9-2. Rotate the 16-bit result register left.
9-3. Read DOUT into least significant bit of the
result register.
9-4. Assert SCLK low.
10) Set CS high.
“OSC”
JU3
“EXT”
“QSPI”
“QSPI”
JU4
Reset and Calibration Procedure
When the MAX194 is installed in an environment with an
unregulated temperature, thermal variation can cause
DC offset errors. Transients on the power supply or reference during the power-on calibration are also a
source of DC offset error. These errors can be eliminated by performing re-calibration, as outlined below:
1) Assert the MAX194 RESET pin low.
“QSPI”
Connects CONV to QSPI chip-select
PCS0.
“CONT”
Connects CONV to EOC for continuous conversion mode.
Closed
“SHDN”
JU7
Allows the SCLK pin to be driven by
the user.
Conversion clock is driven by crystal
oscillator U4.
Conversion clock is driven by the
EXTCLK input pad.
Conversion clock is driven by the
QSPI serial clock.
Connects CS to QSPI chip-select
PCS0.
Connects CS to ground; data output
is always enabled.
Open
JU6
Ground the SCLK pin.
“GND”
JU5
2) Run the conversion clock until EOC becomes high.
3) Set the MAX194 RESET pin high.
4) Run the conversion clock until EOC becomes low.
For best accuracy, a typical application circuit should
allow time for the power supply and ambient temperature to settle before re-calibrating the MAX194. Refer to
the Calibration section of the MAX194 data sheet.
FUNCTION
Normal operating mode.
Momentary closure resets and
re-calibrates the MAX194. Do not
close this jumper if the µC module is
connected.
Select shutdown mode.
“AUTO”
Lets 68HC16 drive the BP/UP/SHDN
pin. If no µC is connected, bipolar
input mode is selected.
“UNI”
Select unipolar mode.
Open
Select bipolar mode.
Data Connector Interface
The 68HC16 module and MAX194 communicate
through the QSPI port on the 40-pin data connector.
Table 7 lists the function of each pin.
Table 5. QSPI Receive Format for MAX194
ADDR
15
14
13
12
11
10
RR0
x
x
x
x
x
x
RR1
x
x
x
x
x
x
6
9
8
7
6
5
4
x
x
B13
B12
B11
B10
B5
B4
B3
B2
B1
B0
3
2
1
0
B9
B8
B7
B6
sub
sub
x
x
_______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
Voltage Reference
The voltage reference U2 provides a 4.096V reference,
which is buffered by U5. The buffer isolates the reference from the MAX194’s capacitive switching load. To
eliminate the buffer circuit, cut traces JU8 and JU9 and
connect a wire from JU9 pin 1 to the VREF pad.
Reference Buffer
The reference input to the MAX194 may be buffered by
U5. The MAX400 op amp is used because of its low
V OS drift. By using a bipolar (instead of CMOS) op
amp, the substrate can be connected to the quiet analog ground, reducing the noise coupled through the
power supplies. The feedback circuit consists of four
passive components: R4, R6, C17, and R5. R4 isolates
the op-amp’s output from the heavy capacitive load
that bypasses the VREF pin. R6 makes the network
accurate at the reference input (without R6, the reference voltage would appear at the output of the op
amp). C17 compensates the high-frequency response
by making R5 dominate at high frequencies.
The reference buffer U5 draws its power through the
lowpass filter formed by R3 and C18. The filter provides
the necessary power-supply rejection. U5 is powered
by the unregulated input supply to ensure enough
headroom to buffer the 4.096V reference.
Layout, Power Supplies, and Grounding
Good PC board layout necessary to achieve specified
performance, and an analog ground plane is essential
for optimum performance. The PC board layout artist
must be provided with explicit instructions, preferably a
pencil sketch of the placement of sensitive analog components and the routing of ground connections. See
the EV kit PC board layout for an example. Use the following guidelines:
1) At the schematic level, keep the analog power supplies and grounds separate from all other power
supplies and grounds. Digital power may be connected to analog power through a 10Ω series resistor to attenuate digital noise.
2) Cluster the MAX194, the voltage reference, and any
input or reference buffers near the site where the
analog signal enters the board. Place 0.1µF ceramic
decoupling capacitors within 10mm of the MAX194’s
power-supply and voltage-reference pins.
3) Keep the analog-input signal ground return separate from the analog ground plane, connecting to
analog ground only at the AGND pin of the
MAX194. The analog input and its signal groundreturn traces should both follow the same route to
help reject common-mode noise.
Table 7. Data-Interface Connections
PIN NO.
1–4
5, 6
7, 8
9–26
27
28, 29, 30
31
32
33, 34
35
36
37
38
39, 40
68HC16 SIGNAL
GND
+12V
+5V
Reserved
IC1
Reserved
OC2
OC3
Reserved
MISO
Reserved
SCK
PCS0
Reserved
MAX194 SIGNAL
GND
+12V
VDDD
Reserved
EOC
Reserved
RESET
BP/UP/SHDN
Reserved
DOUT
Reserved
CLK
CS
Reserved
FUNCTION
Ground
Unregulated 12V DC Supply
Regulated +5V DC from 68HC16 Module
Reserved
End-of-Conversion Output from MAX194
Reserved
Active-Low RESET to MAX194
Shutdown/Bipolar/Unipolar Input to MAX194
Reserved
QSPI Master Input; Serial Data Output from MAX194
Reserved
QSPI Serial Clock from 68HC16
QSPI Chip-Select from 68HC16
Reserved
_______________________________________________________________________________________
7
Evaluates: MAX194/MAX195
Analog Input Buffer
The analog input to the MAX194 may be buffered by
U8. A MAX400 is used because of its low VOS drift. The
feedback circuit consists of four passive components:
R41, R61, C171, and R51. R41 isolates the op-amp’s
output from the dynamic capacitive load at the AIN
input. R61 makes the network accurate at the reference
input (without R61, the reference voltage would appear
at the output of the op amp). C171 compensates the
high-frequency response by making R51 dominate at
high frequencies.
Input offset may be improved by adding a 1000pF to
0.01µF ceramic capacitor at site C28.
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
The MAX194 evaluation board generates its own highquality power supplies from a single DC input (8V to
20V), such as a plug-in wall transformer. When the
MAX194 evaluation board is connected to the 68HC16
µC module, the µC module uses the unregulated input
supply to generate its own separate +5V digital supply.
U6 converts the unfiltered input down to +5V to provide
the VDDA analog supply. Current spikes from the digital supply VDDD are attenuated by R1. Schottky diode
D1 protects the device substrate. U7 inverts the +12V
to -12V, and U3 regulates the -12V to -5V, providing the
VSSA analog supply.
Measuring Supply Current
To measure the supply current drawn by the MAX194,
turn off the power and prepare the board by carefully
cutting the traces at IS1, IS2, IS3, and IS4, and
installing 2-pin headers and shunts (see Table 8).
8
Table 8. Current-Sense Jumpers
JUMPER
POWER SUPPLY
DESCRIPTION
IS1
VDDA
Analog +5V
IS2
VSSA
Analog -5V
IS3
VSSD
Digital -5V
IS4
VDDD
Digital +5V
Each supply may be measured by replacing the corresponding shunt with a current-meter connection. For
example, to measure the current drawn by the +5V digital supply, replace the shunt at IS4 with a current
meter. The direction of current flow is marked with
arrows on the silkscreen. Do not connect or disconnect
the current meter while the power is on.
After observing supply current in operating and shutdown modes, the board may be restored by installing
shunts at IS1–IS4.
_______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
= DIGITAL
GROUND
R51, 47k
IS4
D2
1N5819
IS1
R12, 20k
R61
1k
7
C7
15µF
8
6
AIN
R41
22Ω
C29
0.1µF
2
1
JU2
C6
15µF
= ANALOG
GROUND
+9V / FILTERED
C171
0.01µF
VDDD
3
U8 5
MAX400CPA
4
R9
10M
C26
0.1µF
C5
0.1µF
C1
0.1µF
4
DIRECT INPUT
VDDA
C28
(OPTIONAL)
1000pF
13
to 0.01µF
MAX194
CONV
CS
DOUT
SCLK
EOC
BP / UP/ SHDN
10
AIN
RESET
9
CONV
8
CS
5
DOUT
3
SCLK
7
EOC
1
BP / UP/ SHDN
2
CLK
C9
10µF
11
1
12
4.096V
C22
47µF
LOW-ESR
SANYO
6SA47M
C3
1µF
+9V / FILTERED
R6
1k
7
1
JU8
6
VREF
C2
0.1µF
3
5
U5
MAX400CPA
-9V / FILTERED
2
8
4
C8
10µF
IS2
VSSD
5
R5, 47k
C17
0.01µF
R4
22Ω
IS3
TRIM
6
REFERENCE BUFFER
15
C4
0.1µF
GND
VOUT
R17
R16
R15
4M (OPTIONAL) 1M (OPTIONAL) 2M (OPTIONAL)
REF
14
MAX874
TEMP
4
8
7
VIN
3
C23
0.1µF
COMP
U2
2
CONVCLK
DGND VSSD AGND VSSA
6
C19
0.1µF
+12V / UNREGULATED
C30
(OPTIONAL)
15µF
20V
U1
RESET
-9V / FILTERED
16
VDDD
BUFFERED
INPUT
1
2
C24
0.1µF
JU9
C21
10µF
C20
0.1µF
3
JU10
VSSA
Figure 1. MAX194 EV Kit Schematic
_______________________________________________________________________________________
9
Evaluates: MAX194/MAX195
INPUT BUFFER (OPTIONAL)
VDDA
VDDD
P1.0 / IC1
J1-27
P1.1 / IC2
J1-28
P1.2 / IC3
J1-29
P1.3 / OC1
J1-30
P1.4 / OC2
J1-31
P1.5 / OC3
J1-32
P1.6 / OC4
J1-33
P1.7 / IC4
J1-34
= DIGITAL
GROUND
RESET
EOC
JU6
= ANALOG
GROUND
R7, 10k
R10, 1k
"AUTO"
3
"SHDN"
CS
VDDD
R11, 1k
2
JU7
2
4
"UNI"
1
1
QSPI_PCSO
3
"QSPI" JU4
"GND"
Chip Select
BP / UP/ SHDN
2x20 HEADER
MISO
J1-35
MOSI
J1-36
SCK
J1-37
PCSO / SS
J1-38
CLKOUT
J1-39
PWMA
J1-40
DOUT
CONV
R13, 1k
EOC
"CONT"
1
QSPI_PCSO
2
"QSPI"
3
JU5
CONV Select
QSPI_PCSO
VDDD
14
11
8
U4
C25
0.1µF
"OSC"
2
3 "QSPI"
"EXT"
JU3
4
SCLK
JU1
EXTCLK1
1
XTAL
OSC.
CONVCLK
7
VDDD
J2-10
J2-9
J2-8
J2-7
J2-6
J2-5
J2-4
J2-3
J2-2
J2-1
TEST POINTS
EOC
J3-2 (FSR)
DOUT
R18
270Ω
(OPTIONAL)
J3-4 (DR)
CONCLK
VDDD
CONVCLK
BP / UP/ SHDN
RESET
EOC
DOUT
CONV
CS
SCLK
(CLKR) J3-9
DGND
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
(XF1) J3-8
CONV
J3-1
J3-10
Figure 1. MAX194 EV Kit Schematic (continued)
10
______________________________________________________________________________________
R19
270Ω
(OPTIONAL)
MAX194 Evaluation System/Evaluation Kit
GND
J1-1
GND
J1-2
GND
J1-3
GND
J1-4
= ANALOG
GROUND
= POWER
GROUND
R3
600Ω
GND
Evaluates: MAX194/MAX195
+12V / UNREG
+9V / FILTERED
C18
100µF
2x20 HEADER
UNREG +12VDC
J1-5
UNREG +12VDC
J1-6
C27
100µF
+12V / UNREG
-9V / FILTERED
R8
600Ω
POS12
-12V / UNREG
POS5
U6
3
+12V / UNREG
IN
OUT
1
VDDA
78LO5
C16
10µF
D1
1N5819
JU11
HC16 +5V
2x20 HEADER
R1
10Ω
C15
10µF
GND
2
VDDD
J1-7
J1-8
X3
AGND
PGND
+12V / UNREG
C10
10µF
U7
ICL7662
1
2
C11
10µF
3
4
NC
CAP+
V+
OSC
GND
LV
CAP-
VOUT
8
7
6
C12
100µF
2
C14
10µF
GND
U3
79LO5
5
-12V/UNREG
VSSD
1
C13
10µF
IN
NEG12
OUT
3
R2
10Ω
VSSA
NEG5
Figure 1. MAX194 EV Kit Schematic (continued)
______________________________________________________________________________________
11
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
Figure 2. MAX194 EV Kit Component Placement Guide—Component Side
12
______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
Evaluates: MAX194/MAX195
Figure 3. MAX194 EV Kit PC Board Layout—Component Side
______________________________________________________________________________________
13
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
Figure 4. MAX194 EV Kit PC Board Layout—Solder Side
14
______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
DESIGNATION
C1, C2, C3
QTY
3
C4, C5
2
C6, C7
C8
C9
C10–C14
D1
J1
J2
2
1
0
5
1
1
1
J3
1
J4
JU1
JU2
JU3
JU4
JU5
L1
L2
LED1
R1
0
0
0
0
0
0
0
0
1
1
DESCRIPTION
1µF ceramic capacitors
22µF, 25V radial-lead electrolytic
capacitors
22pF capacitors
0.01µF capacitor
Reference designator, not used
0.1µF capacitors
1N4001 diode
40-pin right-angle male connector
2-circuit terminal block
Right-angle printed circuit board
mount, DB9 female socket
Empty
Empty
Reference designator, not used
Empty
Empty
Empty
Empty
Empty
Light-emitting diode
10MΩ, 5% resistor
68HC16 Module
________________General Description
The 68HC16 module is an assembled and tested printed-circuit board intended for use with Maxim’s highspeed serial-interface evaluation kits (EV kits). The
module uses an inexpensive 8-bit implementation of
Motorola’s MC68HC16Z1 microcontroller (µC) to collect
data samples at high speed using the QSPI™ interface.
It requires an IBM-compatible personal computer and
an external DC power supply, typically 12V DC or as
specified in EV kit manual.
Maxim’s 68HC16 module is provided to allow customers to evaluate selected Maxim products. It is not
intended to be used as a microprocessor development
platform, and such use is not supported by Maxim.
DESIGNATION
C1, C2, C3
QTY
3
C4, C5
2
C6, C7
C8
C9
C10–C14
D1
J1
J2
2
1
0
5
1
1
1
J3
1
J4
JU1
JU2
JU3
JU4
JU5
L1
L2
LED1
R1
0
0
0
0
0
0
0
0
1
1
DESCRIPTION
1µF ceramic capacitors
22µF, 25V radial-lead electrolytic
capacitors
22pF capacitors
0.01µF capacitor
Reference designator, not used
0.1µF capacitors
1N4001 diode
40-pin right-angle male connector
2-circuit terminal block
Right-angle printed circuit board
mount, DB9 female socket
Empty
Empty
Reference designator, not used
Empty
Empty
Empty
Empty
Empty
Light-emitting diode
10MΩ, 5% resistor
68HC16 Module
________________Detailed Description
Power Input Connector J2
The 68HC16 module draws its power from a user-supplied power source connected to terminal block J2. Be
sure to note the positive and negative markings on the
board. A three-terminal 5V regulator allows input voltages between 8V and an absolute maximum of 20V.
The 68HC16 module typically requires 200mA of input
current.
68HC16 Microcontroller
U1 is Motorola’s 68HC16Z1 µC. Contact Motorola for
µC information, development, and support. Maxim EV
kits use the high-speed queued serial peripheral interface (QSPI) and the internal chip-select generation.
A MAX707 on the module monitors the 5V logic supply,
generates the power-on reset, and produces a reset
pulse whenever the reset button is pressed.
™ QSPI is a trademark of Motorola Corp.
______________________________________________________________________________________
15
Evaluates: MAX194/MAX195
_____________________________________________68HC16 Module Component List
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
The 68HC16 uses a phase-locked loop (PLL) to set its
bus speed. Crystal Y1 is a 32.768kHz frequency reference. The internal oscillator runs 256 times faster than
the external crystal. When the 68HC16 is reset, it waits
for the PLL to lock before it executes any software. After
the PLL locks onto the reference frequency, the software doubles the clock speed by writing to the clock
synthesizer control register, selecting a bus speed of
16.78MHz.
U5, the user RAM area, is a 32kbyte CMOS static RAM.
The 74HCT245 octal buffer lets the 68HC16 module
access an 8-bit port on the 40-pin interface connector.
This memory-mapped port consists of separate read
and write strobes, four chip selects, four address LSBs,
and eight data bits.
Table 9. Serial Communications Port J3
PIN
NAME
FUNCTION
1
DCD
Handshake; hard-wired to DTR and DSR
2
RXD
RS-232-compatible data output from
68HC16 module
3
TXD
RS-232-compatible data input to
68HC16 module
4
DTR
Handshake; hard-wired to DCD and DSR
5
GND
Signal ground connection
6
DSR
Handshake; hard-wired to DCD and DTR
7
RTS
Handshake; hard-wired to CTS
8
CTS
Handshake; hard-wired to RTS
9
None
Unused
Serial Communications
J3 is an RS-232 serial port, designed to be compatible
with the IBM PC 9-pin serial port. Use a straight-through
DB9 male-to-female cable to connect J3 to this port. If
the only available serial port has a 25-pin connector,
you may use a standard 25-pin to 9-pin adapter. Table
9 shows the pinout of J3.
The MAX233 is an RS-232 interface voltage level shifter
with two transmitters and two receivers. It includes a
built-in charge pump with internal capacitors that generates the output voltages necessary to drive RS-232
lines.
40-Pin Data Connector J1
The 20 x 2 pin header connects the 68HC16 module to
a Maxim EV kit. Table 10 lists the function of each pin.
Note that 68HC16 object code is not compatible with
68HC11 object code. Use the 68HC16 module only
with those modules that are designed to support it, and
only download code that is targeted for the 68HC16
module. Downloading incorrect object code into the
68HC16 module will have unpredictable results.
Address Ranges
The 68HC16 µC generates various enable signals for
different address ranges. The ROM and RAM enable
signals are fed directly to the respective chips. Several
additional signals (J1.11–J1.14) are available on the
data connector to be used by Maxim EV kits. Table 11
outlines the address ranges for each of the elements
found on the 68HC16 module, and Table 12 is a truth
table that describes the logic for each of the 68HC16’s
chip-select outputs. Because the addresses are not
completely decoded, the boot ROM and user RAM
have shadows.
16
Table 10. 40-Pin Data-Connector Signals
PIN
1–4
5, 6
7, 8
9
10
11
12
13
14
15
16
17
18
19
20–26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
NAME
GND
VPREREG
VCC
RD
WR
7E000
7E800
7F000
7F800
A00
A01
A02
A03
EXTD0
EXTD1–7
IC1
IC2
IC3
OC1
OC2
OC3
OC4
IC4
MISO
MOSI
SCK
PCS0/SS
CLKOUT
PWMA
FUNCTION
Ground
Unregulated input voltage
+5V from on-board regulator
Read strobe
Write strobe
Chip select for 7E000–7E7FF
Chip select for 7E800–7EFFF
Chip select for 7F000–7F7FF
Chip select for 7F800–7FFFF
Address bit 0 (LSB)
Address bit 1
Address bit 2
Address bit 3
Buffered data bus 0 (LSB)
Buffered data bus bits 1–7
General I/O port bit 0 (LSB)
General I/O port bit 1
General I/O port bit 2
General I/O port bit 3
General I/O port bit 4
General I/O port bit 5
General I/O port bit 6
General I/O port bit 7
QSPI master-in, slave-out
QSPI master-out, slave-in
QSPI serial clock
QSPI chip-select output
System clock output
Pulse-width-modulator output
______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
PIN
FUNCTION
00000–07FFF
Boot ROM (U3, strobed by CSBOOT)
08000–0FFFF
Shadow of boot ROM
10000–17FFF
User RAM (U5, strobed by CS0 and CS2)
18000–1FFFF
Shadow of user RAM
Boot ROM
The boot ROM, U3, is configured as an 8-bit memory
device. Resistor R4 pulls data bit 0 low during system
reset, forcing the µC to fetch instructions using only the
upper eight data bits. The boot ROM checks the system and waits for commands from the host. Refer to the
EV kit manual for specific start-up procedures.
Software
20000–203FF
Internal standby RAM; 1kbyte
20400–7DFFF
Unused
7E000–7E7FF
External chip select (J1 pin 11) (CS7)
All software is supplied on a disk with the EV kit.
Instructions for operating the software are included in
the EV kit manual. Refer to the EV kit manual for more
information.
7E800–7EFFF
External chip select (J1 pin 12) (CS8)
_______68HC16 Module Self Check
7F000–7F7FF
External chip select (J1 pin 13) (CS9)
7F800–7FFFF
External chip select (J1 pin 14) (CS10)
80000–F7FFF
Not accessed by the 68HC16
F8000–FF6FF
Unused
FF700–FF73F
68HC16’s built-in ADC (not used)
FF740–FF8FF
Unused
FF900–FF93F
General-purpose timer module (GPT)
To test the 68HC16 module’s integrity, connect the
power supply to the power terminals (J2). Do not connect anything to J1 or J3. Slide the power switch SW1
to the “ON” position. The LED will light up, and will flash
within 5 seconds.
If the LED flashes with a 50%-on/50%-off duty cycle,
then it passed its self check. Note that this test does
not exercise the RS-232 port or the EV kit 40-pin interface, but it does confirm that the power supply, microprocessor, ROM, and RAM passed the self test.
If the LED flashes with a 10%-on/90%-off duty cycle,
then it failed its self check. Most likely, the RAM chip
(U5) is bad.
If the LED remains on and does not flash, then the
problem is either U3 (the EPROM), U1 (the microprocessor), U4 (the regulator), the MAX707 reset generator, or the power supply. Use a voltmeter to verify
that the power supplies are good. Check the powersupply input and the +5V output from the regulator.
Use an oscilloscope to see if the 32.768kHz reference
oscillator is running.
FF940–FF9FF
Unused
FFA00–FFA7F
System integration module (SIM)
FFA80–FFAFF
Unused
FFB00–FFB07
Internal standby RAM (SRAM)
control registers
FFB08–FFBFF
Unused
FFC00–FFDFF
Queued serial module (QSM)
FFE00–FFFFF
Unused
______________________________________________________________________________________
17
Evaluates: MAX194/MAX195
Table 11. 68HC16 Module Memory Map
(all address values are in 20-bit hex)
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
Table 12. 68HC16 Chip-Select Outputs Truth Table
ADDRESS
RANGE
CSBOOT
CS0
CS1
CS2
CS5
CS6
CS7
CS8
CS9
CS10
0xxxx read
L
H
H
H
H
H
H
H
H
H
1xxxx read
H
H
H
L
H
H
H
H
H
H
1xxxx write
H
L
H
H
H
H
H
H
H
H
7E0xx read
H
H
L
H
H
L
L
H
H
H
7E0xx write
H
H
H
H
L
L
L
H
H
H
7E8xx read
H
H
L
H
H
L
H
L
H
H
7E8xx write
H
H
H
H
L
L
H
L
H
H
7F0xx read
H
H
L
H
H
L
H
H
L
H
7F0xx write
H
H
H
H
L
L
H
H
L
H
7F8xx read
H
H
L
H
H
L
H
H
H
L
7F8xx write
H
H
H
H
L
L
H
H
H
L
VCC
LED1
R5
470Ω
GROUND
PWMB
C13
0.1µF
VCC
UNREGULATED 7V TO 20V
REGULATED +5V
INTEL COMPATIBLE READ/WRITE STROBES
GND
CS6/IOBUFFER
CS1/RDIO
19
1
D08
D09
D10
D11
D12
D13
D14
D15
2
3
4
5
6
7
8
9
CHIP SELECTS
OE
DIR
LOW ADDRESS BITS
U6
74HCT245
B1
B2
B3
B4
B5
B6
B7
B8
A1
A2
A3
A4
A5
A6
A7
A8
18
17
16
15
14
13
12
11
EXTD0
EXTD1
EXTD2
EXTD3
EXTD4
EXTD5
EXTD6
EXTD7
8-BIT BUFFERED BIDIRECTIONAL DATA BUS
8-BIT GENERAL I/O PORT
HIGH-SPEED SERIAL INTERFACE (QSM/QSPI)
VCC
1
2
3
4
R6
10k
SIP
RESISTOR
5
6
7
8
9
10
GND
GND
VPREREG
VCC
CS1/RDIO
CS7/7E000
CS9/7F000
A00
A02
EXTD0
EXTD2
EXTD4
EXTD6
IC1
IC3
OC2
OC4
MISO
SCK
CLKOUT
J1-1
J1-3
J1-5
J1-7
J1-9
J1-11
J1-13
J1-15
J1-17
J1-19
J1-21
J1-23
J1-25
J1-27
J1-29
J1-31
J1-33
J1-35
J1-37
J1-39
J1-2
J1-4
J1-6
J1-8
J1-10
J1-12
J1-14
J1-16
J1-18
J1-20
J1-22
J1-24
J1-26
J1-28
J1-30
J1-32
J1-34
J1-36
J1-38
J1-40
TSTME
BKPT/DSCLK
BKPT/DSCLK
HALT
DS
J4-1
J4-2
BERR
BERR
GND
J4-3
J4-4
BKPT/DSCLK
MODCLK
GND
J4-5
J4-6
FREEZE
DSACK1
RESET
J4-7
J4-8
IPIPE1/DSI
VCC
J4-9
J4-10
IPIPE0/DS0
DSACK0
IRQ7
Figure 5. 68HC16 Module Schematic
18
______________________________________________________________________________________
GND
GND
VPREREG
VCC
CS5/WRIO
CS8/7E800
CS10/7F800
A01
A03
EXTD1
EXTD3
EXTD5
EXTD7
IC2
OC1
OC3
IC4
MOSI
PCSO/SS
PWMA
MAX194 Evaluation System/Evaluation Kit
Evaluates: MAX194/MAX195
VSSE
C14
0.1µF
C8
0.01µF
VCC
RXD
PCS3
PCS2
PCS1
PCS0/SS
SCK
MOSI
MISO
VSSE
VDDE
IC1
IC2
IC3
OC1
OC2
VSSI
VDDI
OC3
OC4
IC4/OC5
PAI
PWMA
PWMB
PCLK
VSSE
VDDE
ADDR23
ADDR22
ADDR21
ADDR20
ADDR19
BGACK
BG
TXD
ADDR1
ADDR2
VDDE
VSSE
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
ADDR8
VSSI
ADDR9
ADDR10
ADDR11
ADDR12
ADDR13
ADDR14
ADDR15
ADDR16
ADDR17
ADDR18
VDDE
VSSE
VDDA
VSSA
ADA0
ADA1
ADA2
ADA3
ADA4
ADA5
VRH
BR
FC2
FC1
VDDE
VSSE
FCO
CSBOOT
DATA0
DATA1
DATA2
DATA3
VSSI
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
VDDE
VSSE
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
ADDRO
DSACK0
DSACK1
AVEC
DS
AS
VDDE
U1
MOTOROLA
MC68HC16Z1CFC16
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
CSO/WRRAM
CS5/WRIO
VCC
VSSE
CSBOOT/RDROM
DOO
VSSI
DO8
DO9
VCC
VSSE
D10
D11
D12
D13
D14
D15
AOO
DSACKO
DSACK1
DS
VCC
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
VSSE
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
VRL
ADA6
ADA7
VSTBY
XTAL
VDDSYN
EXTAL
VSSI
VDDI
XFC
VDDE
VSSE
CLKOUT
FREEZE/QUOT
TSTME/TSC
BKPT/DSCLK
IPIPE0/DS0
IPIPE1/DS1
RESET
HALT
BERR
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
IRQ2
IRQ1
MODCLK
R/W
SIZ1
SIZ0
VSSE
A01
A02
VCC
VSSE
A03
A04
A05
A06
A07
A08
VSSI
A09
A10
A11
A12
A13
A14
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
RXD
TXD
VCC
CS10/7F800
CS9/7F000
CS8/7E800
CS7/7E000
CS6/IOBUFFER
CS2/RDRAM
CS1/RDIO
PWMA
PWMB
VSSE
VCC
IC1
IC2
IC3
OC1
OC2
VSSI
VDDI
OC3
OC4
IC4
MISO
MOSI
SCK
PCSO/SS
L2
10µH
OPTIONAL
C3
1µF
20V
C10
0.1µF
VSSE
MODCLK
VCC
VCC
VSSE
CLKOUT
FREEZE
TSTME
BKPT/DSCLK
IPIPEO/DS0
IPIPE1/DSI
RESET
HALT
BERR
IRQ7
XTAL
VSTBY
EXTAL
VSSI
VDDI
JU4
VSSE
VSSI
Figure 5. 68HC16 Module Schematic (continued)
______________________________________________________________________________________
19
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
VCC
R2
330k
XTAL
C7
22pF
VCC
R1
10M
Y1
32.768kHz
J3-7
RTS
T1IN
T1OUT 5
1
T2IN
T2OUT 18
3
R1OUT
R1IN 4
20
R2OUT
R2IN 19
2
TXD
EXTAL
C6
22pF
J3-8
CTS
7
VCC
GND
J3-2
RXD
2
VCC
RXD
U7
MAX707
SW2
RESET
5
PFO
1
6
N.C.
MR
8
RESET
4
7
RESET
PFI
GND
J2
+
–
8
13
C1+
C1-
C2+
15
C2+
U2
MAX233
V17
V14
V+
3
GND
11
12
RESET
J3-3
TXD
J3-4
DTR
10
C216
C2-
GND
GND
9
6
J3-6
DSR
J3-1
DCD
SW1
POWER
J3-5
GND
JU5
D1
1N4001
OUT
C4
22µF
25V
2
A(00:18)
RESET
R3
10k
D09
RESET
C1 OPTIONAL
1µF
20V
VCC
GND
R4
10k
D00
VCC
3
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
GND
CS2/RDRAM
CS0/WRRAM
10
9
8
7
6
5
4
3
25
24
21
23
2
26
1
20
22
27
C2
1µF
20V
VDDI
VSSI
JU3
VSSE
A0
A1 U5
A2 62256
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
11
12
13
15
16
17
18
19
D08
D09
D10
D11
D12
D13
D14
D15
VCC
C12
0.1µF
VCC
CSBOOT/RDROM
CS
OE
WE
2
A14
32k x 8-BIT HIGH-SPEED CMOS STATIC RAM
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
1
3
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
1
22
20
A0
A1
U3
A2 27C256
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
A14
VPP
OE
CE
VCC
32k x 8-BIT CMOS EPROM
Figure 5. 68HC16 Module Schematic (continued)
20
11
12
13
15
16
17
18
19
______________________________________________________________________________________
D08
D09
D10
D11
D12
D13
D14
D15
D(00:15)
IN
A(00:18)
C5
22µF
20V
L1
10µH
U4
78M05
D(00:15)
1
J3-9
RI
VSSE
GND
VPREREG
VCC
C11
0.1µF
MAX194 Evaluation System/Evaluation Kit
Evaluates: MAX194/MAX195
Figure 6. 68HC16 Module Component Placement Guide—Component Side
______________________________________________________________________________________
21
Evaluates: MAX194/MAX195
MAX194 Evaluation System/Evaluation Kit
Figure 7. 68HC16 Module PC Board Layout—Component Side
22
______________________________________________________________________________________
MAX194 Evaluation System/Evaluation Kit
Evaluates: MAX194/MAX195
Figure 8. 68HC16 Module PC Board Layout—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 __________________ 23
© 1995 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products.
工商网监
湘ICP备2023018690号
