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MAX20002/MAX20003
General Description
The MAX20002/MAX20003 are small, synchronous
buck converters with integrated high-side and low-side
MOSFETs. Each device is designed to deliver up to 2A/3A
with input voltages from 3.5V to 36V, while using only
15µA quiescent current at no load. Voltage quality can be
monitored by observing the PGOOD signal. The devices
can operate in dropout by running at 98% duty cycle,
making them ideal for automotive applications.
The devices offer fixed output voltages of 5V/3.3V, along
with the ability to program the output voltage between 1V
to 10V. Frequency can be programmed using a resistor
to ground on the FOSC pin from 220kHz to 2.2MHz. The
devices offer a forced fixed-frequency mode and skip
mode with ultra-low quiescent current of 15µA. They have
a pin that can be programmed to turn on/off the spread
spectrum, further helping systems designers with better
EMC management.
The MAX20002/MAX20003 are available in a small 5mm x
5mm 20-pin TQFN package with exposed pad and use very
few external components.
Applications
● Point-of-Load Applications in Automotive
● Distributed DC Power Systems
● Navigation and Radio Head Units
19-7311; Rev 17; 7/20
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Benefits and Features
● Synchronous DC-DC Converter with Integrated FETs
• MAX20002 = 2A
• MAX20003 = 3A
• 15µA Quiescent Current When in Skip Mode
● Small Solution Size Saves Space
• 220kHz to 2.2MHz Adjustable Frequency
• Programmable 1V to 10V Output for the Buck or
Fixed 5V/3.3V Options Available
• Fixed 8ms Internal Soft-Start
• Fixed Output Voltage with ±2% Output Accuracy
(5V/3.3V) or Externally Resistor Adjustable (1V to
10V) with ±1% FB Accuracy
● PGOOD Output and High-Voltage EN Input Simplify
Power Sequencing
● Protection Features and Operating Range Ideal for
Automotive Applications
• Operating VIN Range of 3.5V to 36V
• 42V Load-Dump Protection
• 99% Duty-Cycle Operation with Low Dropout
• -40°C to +125°C Automotive Temperature Range
• AEC-Q100 Qualified
• Fast and Accurate Overvoltage Protection
Enables Fast Recovery from Automotive Transients
(MAX20002C/E and MAX20003C/E)
Ordering Information appears at end of data sheet.
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Typical Application Circuit/Block Diagram
2.2µH
2 x 22µF
LX
LX
LX
N.C.
FSYNC
0.1µF
VOUT = 3.3V/5V
AT 3A, 2.2MHz
FOSC
BST
OUT
PGND
12kΩ
MAX20002
MAX20003
FB
PGND
SPS
COMP
20.0kΩ
4.7µF
www.maximintegrated.com
SUPSW
SUPSW
EN
EP
AGND
1,000pF
SUP
PGOOD
BIAS
2.2µF
2.2µF
VBAT
Maxim Integrated │ 2
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Absolute Maximum Ratings
SUP, SUPSW, LX, EN to PGND............................-0.3V to +42V
SUP to SUPSW.....................................................-0.3V to +0.3V
BIAS to AGND..........................................................-0.3V to +6V
SPS, FOSC, COMP to AGND.................-0.3V to (VBIAS + 0.3V)
FSYNC, PGOOD, FB to AGND...............-0.3V to (VBIAS + 0.3V)
OUT to PGND........................................................-0.3V to +12V
BST to LX.................................................................-0.3V to +6V
AGND to PGND.....................................................-0.3V to +0.3V
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70°C)
20-Pin TQFN (derate 33.3mW/°C above +70°C) ...2666.7mW
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 20 TQFN
Package Code
T2055+4C
Outline Number
21-0140
Land Pattern Number
90-0009
PACKAGE TYPE: 20 SW TQFN
Package Code
T2055Y+4C
Outline Number
21-100165
Land Pattern Number
90-100065
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
30°C/W
Junction to Case (θJC)
2°C/W
.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 44µF, CBIAS = 2.2µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ =
-40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
Supply Voltage
VSUP,
VSUPSW
Load-Dump Event Supply
Voltage
VSUP_LD
Supply Current
Shutdown Supply Current
BIAS Regulator Voltage
BIAS Undervoltage Lockout
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CONDITIONS
MIN
TYP
3.5
tLD < 1s
MAX
UNITS
36
V
42
V
Skip mode, no load, VOUT = 3.3V,
VFSYNC = 0V
15
30
µA
Skip mode, no load, VOUT = 5V,
VFSYNC = 0V
20
35
µA
ISHDN
VEN = 0V
5
10
µA
VBIAS
VSUP = VSUPSW = 6V to 42V,
IBIAS = 0 to 10mA
4.7
5
5.4
V
VBIAS rising
2.9
3.15
3.4
V
ISUP
VUVBIAS
Maxim Integrated │ 3
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Electrical Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 44µF, CBIAS = 2.2µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.)
TYP
MAX
UNITS
BIAS Undervoltage-Lockout
Hysteresis
PARAMETER
SYMBOL
CONDITIONS
MIN
400
500
mV
Thermal-Shutdown Threshold
175
°C
Thermal-Shutdown Threshold
Hysteresis
15
°C
OUTPUT VOLTAGE
PWM-Mode Output Voltage
(Note 1)
Skip-Mode Output Voltage
(Note 2)
VOUT_5V
VOUT_3.3V
VOUT_
SKIP_5V
VOUT_
VFB = VBIAS, 6V < VSUPSW < 36V,
fixed-frequency mode
4.9
5
5.1
3.23
3.3
3.37
4.9
5
5.15
No load, VFB = VBIAS, skip mode
V
3.23
SKIP_3.3V
V
3.3
3.4
Load Regulation
VFB = VBIAS, 30mA < ILOAD < 3A
0.5
%
Line Regulation
VFB = VBIAS, 6V < VSUPSW < 36V
0.02
%/V
IBST_ON
High-side MOSFET on,
VBST - VLX = 5V
1.5
mA
IBST_OFF
High-side MOSFET off,
VBST - VLX = 5V
1.5
µA
BST Input Current
LX Current Limit
ILX
MAX20003:
MAX20003C/EATPA/V+,
MAX20003C/EATPB/V+,
LX Rise Time
MAX20002, MAX20002C, MAX20002E
MAX20003CATPC/V+,
MAX20003CATPD/V+
VOUT = 5V, 3.3V
Spread Spectrum
Spread spectrum enabled
High-Side Switch OnResistance
RON_H
High-Side Switch Leakage
Current
Low-Side Switch OnResistance
RON_L
Low-Side Switch Leakage
Current
FB Input Current
FB Regulation Voltage
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IFB
VFB
3.75
5
6.25
2.5
3.33
4.16
A
5
4
ns
FOSC
±3%
ILX = 0.5A, VBIAS = 5V
60
140
mΩ
High-side MOSFET off, VSUP = 36V,
VLX = 0V, TA = +25°C
1
5
µA
ILX = 0.5A, VBIAS = 5V
35
70
mΩ
Low-side MOSFET off, VSUP = 36V,
VLX = 36V, TA = +25°C
1
5
µA
TA = +25°C
20
100
nA
1
1.01
FB connected to an external resistive
divider, 6V < VSUPSW < 36V
0.99
FB connected to an external resistive
divider, 6V < VSUPSW < 36V
(MAX20002C/E, MAX20003C/E)
0.985
V
1
1.015
Maxim Integrated │ 4
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Electrical Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 44µF, CBIAS = 2.2µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ =
-40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
FB Line Regulation
Transconductance (from FB to
COMP)
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
∆VLINE
6V < VSUPSW < 36V
0.02
%/V
gM
VFB = 1V, VBIAS = 5V
700
µS
Minimum On-Time
tON_MIN
Maximum Duty Cycle
DCMAX
80
98
RFOSC = 73.2kΩ
Oscillator Frequency
RFOSC = 12kΩ
99
400
2.0
2.2
ns
%
kHz
2.4
MHz
SYNC, EN, AND SPS LOGIC THRESHOLDS
External Input Clock Acquisition
Time
tFSYNC
External Input Clock Frequency
1
RFOSC = 12kΩ (Note 3)
External Input Clock High
Threshold
VFSYNC_HI VFSYNC rising
External Input Clock Low
Threshold
VFSYNC_LO VFSYNC falling
FSYNC Leakage Current
Soft-Start Time
1.8
tSS
5.6
2.4
Enable Input Low Threshold
VEN_LO
IEN
Spread-Spectrum Input High
Threshold
VSPS_HI
Spread-Spectrum Input Low
Threshold
VSPS_LO
Spread-Spectrum Input Current
ISPS
8
0.4
V
1
µA
12
ms
V
0.6
VEN_HYS
0.2
TA = +25°C
0.1
V
V
1
2.0
TA = +25°C
MHz
V
TA = +25°C
VEN_HI
Enable Input Current
2.6
1.4
Enable Input High Threshold
Enable Threshold Voltage
Hysteresis
Cycle
µA
V
0.4
V
0.1
1
µA
POWER-GOOD AND OVERVOLTAGE-PROTECTION THRESOLDS
PGOOD Switching Level
VRISING
VFB rising, VPGOOD = high
93
95
97
VFALLING
VFB falling, VPGOOD = low
90
92.5
95
PGOOD Debounce Time
25
PGOOD Output Low Voltage
ISINK = 5mA
PGOOD Leakage Current
VOUT in regulation, TA = +25°C
Overvoltage-Protection
Threshold
VOUT rising (monitor FB pin)
107
VOUT falling (monitor FB pin)
104
%VFB
µs
0.4
V
1
µA
%
Note 1: Device not in dropout condition.
Note 2: Guaranteed by design; not production tested.
Note 3: Contact the factory for SYNC frequency outside the specified range.
www.maximintegrated.com
Maxim Integrated │ 5
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Typical Operating Characteristics
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.)
80
80
70
3.3V
60
3.3V
50
5V
5V
40
SKIP MODE
30
0
0.0001
COILCRAFT
XAL5030-222MEB
10
0.001
0.01
0.1
1
SKIP MODE
LOAD REGULATION
0.001
SWITCHING FREQUENCY (MHz)
VOUT (V)
5.00
4.95
400kHz
4.90
4.85
4.80
0.0
0.5
1.0
1.5
2.0
2.5
2.26
2.24
0.5
1.0
toc05
VIN = 14V,
FPWM MODE
toc07
2.20
2.18
2.16
2.14
VOUT = 3.3V
2.08
2.04
0.0
0.5
1.0
1.5
2.0
2.5
TEMPERATURE (°C)
www.maximintegrated.com
toc06
410
VOUT = 3.3V
405
400
395
390
385
0.0
0.5
1.0
1.5
2.0
2.5
3.0
ILOAD (A)
SWITCHING FREQUENCY
vs. RFOSC
toc08
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
50
2.25
1.75
1.50
1.25
1.00
0.75
toc09
3.3V/2.2MHz SKIP MODE
45
2.00
40
35
30
25
20
0.50
0.00
3.0
415
375
3.0
15
0.25
-40 -25 -10 5 20 35 50 65 80 95 110 125
2.5
380
2.50
VOUT = 5V
2.0
VIN = 14V,
FPWM MODE
420
SUPPLY CURRENT (µA)
fSW vs. TEMPERATURE
1.5
fSW vs. LOAD CURRENT
425
ILOAD (A)
2.12
2.00
0.0
ILOAD (A)
VOUT = 3.3V
2.22
2.10
3.0
2.20
2.16
4.80
10
2.12
SWITCHING FREQUENCY (MHz)
SWITCHING FREQUENCY (MHz)
2.24
1
VIN = 14V,
FPWM MODE
ILOAD (A)
2.28
0.1
fSW vs. LOAD CURRENT
2.30
5.15
5.05
0.01
LOAD CURRENT (A)
toc04
2.2MHz
400kHz
4.85
2.28
5.10
5.00
4.90
0
0.0001
10
2.2MHz
5.05
4.95
20
LOAD CURRENT (A)
5.20
FPWM
MODE
5V
40
5.10
3.3V
toc03
VOUT = 5V, VIN = 14V,
SKIP MODE
5.15
3.3V
50
30
20
10
60
LOAD REGULATION
5.20
5V
70
FPWM
MODE
toc02
fSW = 400kHz,
VIN =14V
90
EFFICIENCY (%)
EFFICIENCY (%)
100
fSW = 2.2MHz
VIN = 14V
90
EFFICIENCY vs.
LOAD CURRENT
VOUT (V)
100
toc01
SWITCHING FREQUENCY (MHz)
EFFICIENCY vs.
LOAD CURRENT
12
42
72
RFOSC (kΩ)
102
132
10
6
12
18
24
30
36
SUPPLY VOLTAGE (V)
Maxim Integrated │ 6
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.)
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
10
toc10
3.3V/2.2MHz SKIP MODE
9
SUPPLY CURRENT (µA)
SHUTDOWN CURRENT (µA)
7
6
5
4
3
40
35
30
25
20
2
15
1
6
12
18
24
30
10
36
-40 -25 -10 5 20 35 50 65 80 95 110 125
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
SHUTDOWN CURRENT
vs. TEMPERATURE
10
toc12
5.06
7
5.04
6
VBIAS (V)
5.02
5
5.00
4
4.98
3
2
4.96
1
4.94
4.92
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
VOUT vs. VIN
5.20
toc14
VOUT vs. VIN
5.20
5V/2.2MHz, ILOAD = 0A, FPWM MODE
5.15
5.05
VOUT (V)
VOUT (V)
5.10
5.05
5.00
4.95
toc15
5V/2.2MHz
PWM MODE
ILOAD = 0A
5.15
5.10
5.00
4.95
4.90
4.90
4.85
4.85
4.80
toc13
VIN = 14V, ILOAD = 0A, FPWM MODE
5.08
8
SHUTDOWN CURRENT (µA)
BIAS VOLTAGE
vs. TEMPERATURE
5.10
3.3V/2.2MHz SKIP MODE
9
0
toc11
3.3V/2.2MHz SKIP MODE
45
8
0
SUPPLY CURRENT
vs. TEMPERATURE
50
6
12
18
24
VIN (V)
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30
36
4.80
6
12
18
24
30
VIN (V)
36
42
Maxim Integrated │ 7
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.)
FULL-LOAD
STARTUP BEHAVIOR
SLOW VIN
RAMP BEHAVIOR
toc16
10V/div
0
VIN
100V/div
5V/div
VOUT
0
1V/div
1A/div
ILOAD
0
5V/div
VPGOOD
0
VIN
0
5V/div
0
VOUT
1V/div
0
5V/div
2A/div
0
5V/div
0
ILOAD
VPGOOD
COLD CRANK
toc19
10V/div
VFSYNC
0
200ns
5V/2.2MHz
VIN
LOAD DUMP
toc20
toc21
2V/div
0
5V/div
VOUT
0
VLX
10V/div
VIN
VPGOOD
5V/div
2V/div
VPGOOD
400ms
LOAD TRANSIENT
(PWM MODE)
SHORT CIRCUIT
(PWM MODE)
toc22
LOAD TRANSIENT RESPONSE
(MAX20003CATPD)
toc24
toc23
5A
2V/div
500mV/div
(ACCOUPLED)
0
5A/div
ILX
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IOUT
2A
2A
ILX
2A/div
2A/div
20V/div
VLX
0
5V/div
VPGOOD
0
0
100ms
VOUT
100µs
5V/div
0
0
1A/div
VOUT
5V/div
10ms
VOUT
10V/div
0
VOUT
0
IOUT
10V/div
VLX
4s
VIN
toc18
10V/div
100nF
2ms
DIPS AND DROPS
SYNC FUNCTION
toc17
0
20ms
VOUT
ACRIPPLE
100mV/div
1ms
Maxim Integrated │ 8
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
BST
PGND
PGND
SPS
PGOOD
Pin Configuration
15
14
13
12
11
LX 16
LX 17
MAX20002
MAX20003
LX 18
N.C. 19
FSYNC 20
2
3
4
OUT
FB
COMP
SUP
9
SUPSW
8
SUPSW
7
EN
6
AGND
5
BIAS
1
FOSC
EP*
10
TQFN
(5mm x 5mm)
*EP = EXPOSED PAD
Pin Description
PIN
NAME
1
FOSC
Resistor-Programmable Switching-Frequency-Setting Control Input. Connect a resistor from FOSC to
AGND to set the switching frequency.
2
OUT
Switching-Regulator Output. OUT also provides power to the internal circuitry when the output voltage
of the converter is set between 3V to 5V during skip mode at very light load conditions after BIAS is
switched over to buck output.
3
FB
Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set the output
voltage. Connect to BIAS to set the output voltage to 5V or 3.3V.
4
COMP
Error-Amplifier Output. Connect an RC network from COMP to AGND for stable operation. See the
Compensation Network section for more details.
5
BIAS
6
AGND
7
EN
SUP Voltage-Compatible Enable Input. Drive EN low to disable the devices. Drive EN high to enable the
devices.
8, 9
SUPSW
Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. Bypass SUPSW
to PGND with a 0.1µF and 4.7µF ceramic capacitors.
10
SUP
Voltage-Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND with a 2.2µF
ceramic capacitor.
www.maximintegrated.com
FUNCTION
Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a minimum of 2.2µF ceramic
capacitor to ground.
Analog Ground
Maxim Integrated │ 9
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Pin Description (continued)
PIN
NAME
FUNCTION
11
PGOOD
Open-Drain, PGOOD Output. PGOOD asserts when VOUT is above 95% regulation point. PGOOD goes
low when VOUT is below 92% regulation point.
12
SPS
13,14
PGND
15
BST
16–18
LX
19
N.C.
20
FSYNC
—
EP
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Spread-Spectrum Pin. Pull high for spread spectrum on and low for spread spectrum off.
Power Ground
High-Side Driver Supply. Connect a 0.1µF capacitor between LX and BST for proper operation.
Inductor Switching Node
No Connection
Synchronization Input. The devices synchronize to an external signal applied to FSYNC. Connect
FSYNC to AGND to enable skip mode operation. Connect to BIAS or to an external clock to enable
fixed-frequency, forced-PWM mode operation. Do not leave the FSYNC pin unconnected.
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power
dissipation. Do not use as the only IC ground connection. EP must be connected to PGND.
Maxim Integrated │ 10
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
MAX20002
MAX20003
PGOOD
OUT
PGOOD HIGH LEVEL
PGOOD LOW LEVEL
PGOOD
COMPARATOR
BIAS
SUP
INTERNAL BIAS
REGULATOR
SWITCHOVER
LOGIC
FEEDBACK
SELECT
LOGIC
FB
EN
PV
SUPSW
PV
BST
AGND
INTERNAL
SOFT-START
PWM
VREF = 1V
CONTROL
LOGIC
EAMP
LX
PV
COMP
SPS
PGND
CLK
FOSC
SPREAD
SPECTRUM
ON/OFF
FSYNC
FSYNC
SELECT
LOGIC
OSCILLATOR
EXTERNAL
CLOCK
CONNECTED HI
(PWM MODE)
CONNECTED LO
(SKIP MODE)
SLOPE COMP
LOGIC
CURRENT-LIMIT
THRESHOLD
ZEROCROSSING
COMPARATOR
LX
Figure 1. Internal Block Diagram
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Maxim Integrated │ 11
MAX20002/MAX20003
Detailed Description
The MAX20002/MAX20003 are 2A/3A current-mode stepdown converters with integrated high-side and lowside MOSFETs. The low-side MOSFET enables fixedfrequency, forced-PWM operation in light-load applications. The devices operate with input voltages from 3.5V
to 36V while using only 15µA quiescent current at no
load. The switching frequency is resistor programmable
from 220kHz to 2.2MHz and can be synchronized to an
external clock. The devices’ output voltage is available
as 5V/3.3V fixed or adjustable from 1V to 10V. The wide
input voltage range, along with its ability to operate at
99% duty cycle during undervoltage transients, makes the
devices ideal for automotive applications.
In light-load applications, a logic input (FSYNC) allows
the devices to operate either in skip mode for reduced
current consumption, or fixed-frequency, forced-PWM
mode to eliminate frequency variation and help minimize
EMI. Protection features include cycle-by-cycle current
limit, and thermal shutdown with automatic recovery. See
Figure 1 for an internal block diagram.
Wide Input Voltage Range
The devices include two separate supply inputs (SUP and
SUPSW) specified for a wide 3.5V to 36V input voltage
range. VSUP provides power to the device and VSUPSW
provides power to the internal switch. When the device
is operating with a 3.5V input supply, conditions such as
cold crank can cause the voltage at the SUP and SUPSW
pins to drop below the programmed output voltage. Under
such conditions, the devices operate in a high duty-cycle
mode to facilitate minimum dropout from input to output.
The MAX20002E/MAX20003E provide additional filtering
on the input inside the IC and are more robust against
poor PCB layout; however, to get the best performance
out of any version of the MAX20002/MAX20003, proper
layout guidelines must be followed.
Maximum Duty-Cycle Operation
The devices have a maximum duty cycle of 98% (typ).
The IC monitors the off-time (time for which the low-side
FET is on) in both PWM and skip modes every switching cycle. Once the off time of 100ns (typ) is detected
continuously for 12µs, the low-side FET is forced on for
150ns (typ) every 12µs. The input voltage at which the
devices enter dropout changes depending on the input
voltage, output voltage, switching frequency, load current,
and the efficiency of the design.
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36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
The input voltage at which the devices enter dropout can
be approximated as:
VSUP =
VOUT + (I OUT × R ON_H )
0.98
Note: The previous equation does not take into account
the efficiency and switching frequency but is a good firstorder approximation. Use the RON_H number from the
maximum column in the Electrical Characteristics table.
Linear Regulator Output (BIAS)
The devices include a 5V linear regulator (VBIAS) that
provides power to the internal circuit blocks. Connect a
2.2µF ceramic capacitor from BIAS to AGND.
Power-Good Output (PGOOD)
The devices feature an open-drain power-good output
(PGOOD). PGOOD asserts when VOUT rises above 95%
of its regulation voltage. PGOOD deasserts when VOUT
drops below 92.5% of its regulation voltage. Connect
PGOOD to BIAS with a 10kΩ resistor.
Synchronization Input (FSYNC)
FSYNC is a logic-level input useful for operating-mode
selection and frequency control. Connecting FSYNC to
BIAS or to an external clock enables fixed-frequency,
forced-PWM operation. Connecting FSYNC to AGND
enables skip-mode operation.
The external clock frequency at FSYNC can be higher
or lower than the internal clock by 20%. If the external
clock frequency is greater than 120% of the internal clock,
contact the factory applications team to verify the design.
The devices synchronize to the external clock in two
cycles. When the external clock signal at FSYNC is
absent for more than two clock cycles, the devices use
the internal clock.
System Enable (EN)
An enable control input (EN) activates the devices from
their low-power shutdown mode. EN is compatible with
inputs from automotive battery level down to 3.5V. The
high-voltage compatibility allows EN to be connected
to SUP, KEY/KL30, or the inhibit pin (INH) of a CAN
transceiver.
EN turns on the internal regulator. Once VBIAS is above
the internal lockout threshold, VUVBIAS = 3.15V (typ),
the converter activates and the output voltage ramps up
within 8ms.
Maxim Integrated │ 12
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
A logic-low at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5µA (typ). Drive EN high to bring the
devices out of shutdown.
automotive conditions. Contact the Maxim Applications
team to determine if the MAX20002C/E or MAX20003C/E
are needed for your application.
Spread-Spectrum Option
Setting the Output Voltage
The spread spectrum can be enabled on the device
using a pin. When the SPS pin is pulled high the spread
spectrum is enabled and the operating frequency is varied
±3% centered on FOSC. The modulation signal is a triangular wave with a period of 110μs at 2.2MHz. Therefore,
FOSC ramps down 3% and back to 2.2MHz in 110μs and
also ramps up 3% and back to 2.2MHz in 110μs. The
cycle repeats.
For operations at FOSC values other than 2.2MHz, the
modulation signal scales proportionally (e.g., at 400kHz,
the 110μs modulation period increases to 110μs x
2.2MHz/0.4MHz = 550μs).
The internal spread spectrum is disabled if the devices
are synchronized to an external clock. However, the
devices do not filter the input clock on the FSYNC pin and
pass any modulation (including spread spectrum) present
on the driving external clock.
Internal Oscillator (FOSC)
The switching frequency (fSW) is set by a resistor (RFOSC)
connected from FOSC to AGND. For example, a 400kHz
switching frequency is set with RFOSC = 73.2kΩ. Higher
frequencies allow designs with lower inductor values and
less output capacitance. Consequently, peak currents and
I2R losses are lower at higher switching frequencies, but
core losses, gate-charge currents, and switching losses
increase.
Applications Information
Connect FB to BIAS for a fixed +5V/3.3V output voltage.
To set the output to other voltages between 1V and 10V,
connect a resistive divider from output (OUT) to FB to
AGND (Figure 2). Select RFB2 (FB to AGND resistor)
less than or equal to 500kΩ. Calculate RFB1 (OUT to FB
resistor) with the following equation:
V
R FB1 = R FB2 OUT - 1
VFB
where VFB = 1V (see the Electrical Characteristics
table).
Forced-PWM and Skip Modes
In PWM mode of operation, the devices switch at
a constant frequency with variable on-time. In skip
mode of operation, the converter’s switching frequency
is load dependent. At higher load current, the switching
frequency does not change and the operating mode is
similar to the PWM mode. Skip mode helps improve
efficiency in light-load applications by allowing the
converters to turn on the high-side switch only when the
output voltage falls below a set threshold. As such, the
converters do not switch MOSFETs on and off as often
as in the PWM mode. Consequently, the gate charge and
switching losses are much lower in skip mode.
VOUT
Overtemperature Protection
Thermal overload protection limits the total power
dissipation in the device. When the junction temperature
exceeds 175°C (typ), an internal thermal sensor shuts
down the internal bias regulator and the step-down
converter, allowing the IC to cool. The thermal sensor
turns on the IC again after the junction temperature cools
by 15°C.
Overvoltage Protection (OVP)
If the output voltage reaches the OVP threshold, the
high-side switch is forced off and the low-side switch is
forced on until the negative-current limit is reached. After
negative-current limit is reached, both the high-side and
low-side switches are turned off. The MAX20002C/E and
MAX20003C/E feature an additional clamp and lower
OVP threshold to limit the output-voltage overshoot for
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RFB1
MAX20002
MAX20003
FB
RFB2
Figure 2. Adjustable Output-Voltage Setting
Maxim Integrated │ 13
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Inductor Selection
Three key inductor parameters must be specified for
operation with the devices: inductance value (L), inductor
saturation current (ISAT), and DC resistance (RDCR). To
select inductor value, the ratio of inductor peak-to-peak
AC current to DC average current (LIR) must be selected
first. A good compromise between size and loss is a 30%
peak-to-peak ripple current to average-current ratio (LIR
= 0.3). The switching frequency, input voltage, output voltage, and selected LIR then determine the inductor value
as follows:
L=
(VSUP − VOUT ) × VOUT
VSUP × f SW × I OUT × LIR
where VSUP, VOUT, and IOUT are typical values (so that
efficiency is optimum for typical conditions). The switching frequency is set by RFOSC (see TOC 8 in the Typical
Operating Characteristics section).
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
=
IRMS ILOAD(MAX) ×
VOUT x(VSUP - VOUT )
VSUP
IRMS has a maximum value when the input voltage
equals twice the output voltage:
VSUP= 2 × VOUT
therefore:
IRMS =
ILOAD(MAX)
2
Choose an input capacitor that exhibits less than +10°C
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
The input-voltage ripple is comprised of ΔVQ (caused
by the capacitor discharge) and ΔVESR (caused by the
ESR of the capacitor). Use low-ESR ceramic capacitors
with high ripple-current capability at the input. Assume
the contribution from the ESR and capacitor discharge
equal to 50%. Calculate the input capacitance and ESR
required for a specified input voltage ripple using the
following equations:
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ESR IN =
∆VESR
∆I
I OUT + L
2
where:
(V
- VOUT ) × VOUT
∆IL = SUP
VSUP × f SW × L
and:
I
× D(1- D)
C IN = OUT
∆VQ × f SW
D=
VOUT
VSUPSW
where: IOUT is the maximum output current and D is the
duty cycle.
Output Capacitor
The output filter capacitor must have low enough equivalent series resistance (ESR) to meet output-ripple and
load-transient requirements. The output capacitance must
be high enough to absorb the inductor energy while
transitioning from full-load to no-load conditions without
tripping the overvoltage-fault protection. When using
high-capacitance, low-ESR capacitors, the filter capacitor’s ESR dominates the output-voltage ripple, so the size
of the output capacitor depends on the maximum ESR
required to meet the output-voltage ripple (VRIPPLE(P-P))
specifications:
VRIPPLE(P-P) =
ESR × ILOAD(MAX) × LIR
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as
to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
When using low-capacity filter capacitors, such as ceramic
capacitors, size is usually determined by the capacity needed to prevent voltage droop and voltage rise from causing
problems during load transients. Generally, once enough
capacitance is added to meet the overshoot requirement,
undershoot at the rising load edge is no longer a problem.
However, low-capacity filter capacitors typically have highESR zeros that can affect the overall stability.
Maxim Integrated │ 14
MAX20002/MAX20003
36V, 220kHz to 2.2MHz, 2A/3A Fully
Integrated Step-Down Converters
with 15μA Operating Current
Compensation Network
The devices use an internal transconductance error
amplifier with its inverting input and its output available to
the user for external frequency compensation. The output
capacitor and compensation network determine the loop
stability. The inductor and the output capacitor are chosen
based on performance, size, and cost. Additionally, the
compensation network optimizes the control-loop stability.
The converter uses a current-mode control scheme that
regulates the output voltage by forcing the required
current through the external inductor. The devices use
the voltage drop across the high-side MOSFET to sense
inductor current. Current-mode control eliminates the
double pole in the feedback loop caused by the inductor
and output capacitor, resulting in a smaller phase shift
and requiring less elaborate error-amplifier compensation
than voltage-mode control. Only a simple single series
resistor (RC) and capacitor (CC) are required to have a
stable, high-bandwidth loop in applications where ceramic
capacitors are used for output filtering (see Figure 3). For
other types of capacitors, due to the higher capacitance and
ESR, the frequency of the zero created by the capacitance
and ESR is lower than the desired closed-loop crossover
frequency. To stabilize a nonceramic output-capacitor loop,
add another compensation capacitor (CF) from COMP to
ground to cancel this ESR zero.
The basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier. The
power modulator has a DC gain set by gm × RLOAD,
with a pole and zero pair set by RLOAD, the output
capacitor (COUT), and its ESR. The following equations
help to approximate the value for the gain of the power
modulator (GAINMOD(dc)), neglecting the effect of the
ramp stabilization. Ramp stabilization is necessary when
the duty cycle is above 50% and is internally done for the
devices:
GAINMOD(dc)
= g mc × R LOAD
where RLOAD = VOUT/IOUT(MAX) in Ω and gmc = 3S.
In a current-mode step-down converter, the output capacitor, its ESR, and the load resistance introduce a pole at
the following frequency:
f pMOD =
1
2π × ESR × C OUT
When COUT is composed of “n” identical capacitors
in parallel, the resulting COUT = n × COUT(EACH), and
ESR = ESR(EACH)/n. Note that the capacitor zero for a
parallel combination of alike capacitors is the same as
for an individual capacitor.
R1
gm
COMP
R2
2π × C OUT × R LOAD
The output capacitor and its ESR also introduce a zero at:
f zMOD =
VOUT
1
REF
RC
CF
The feedback voltage-divider has a gain of GAINFB =
VFB/VOUT, where VFB is 1V (typ).
The transconductance error amplifier has a DC gain
of GAINEA(DC) = gm_EA × ROUT_EA, where gm_EA is
the error amplifier transconductance, which is 700µS
(typ), and ROUT_EA is the output resistance of the error
amplifier (50MΩ).
CC
Figure 3. Compensation Network
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Maxim Integrated │ 15
MAX20002/MAX20003
A dominant pole (fdpEA) is set by the compensation
capacitor (CC) and the amplifier output resistance
(ROUT_EA). A zero (fZEA) is set by the compensation
resistor (RC) and the compensation capacitor (CC). There
is an optional pole (fPEA) set by CF and RC to cancel the
output capacitor ESR zero if it occurs near the crossover
frequency (fC, where the loop gain equals 1 (0dB)). Thus:
f zEA =
f pdEA =
1
2π × C C × R C
1
2π × C C × (R OUT,EA + R C )
1
f pEA =
2π × C F × R C
The loop-gain crossover frequency (fC) should be set
below 1/10 of the switching frequency and much higher
than the power-modulator pole (fpMOD)
f
f pMOD
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