MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
General Description
The MAX2064 high-linearity, dual analog variable-gain
amplifier (VGA) operates in the 50MHz to 1000MHz
frequency range. Each analog attenuator is controlled
using an external voltage, or through the SPI-compatible
interface using an on-chip 8-bit DAC.
Since each of the stages has its own external RF
input and RF output, this component can be configured to either optimize noise figure (NF) (amplifier configured first) or OIP3 (amplifier last). The
device’s performance features include 24dB amplifier gain (amplifier only), 4.4dB NF at maximum gain
(includes attenuator insertion losses), and a high
OIP3 level of +41dBm. Each of these features makes
the device an ideal VGA for multipath receiver and
transmitter applications.
In addition, the device operates from a single +5V
supply with full performance, or a +3.3V supply for an
enhanced power-savings mode with lower performance.
The device is available in a compact 48-pin TQFN
package (7mm x 7mm) with an exposed pad. Electrical
performance is guaranteed over the extended temperature range, from TC = -40NC to +85NC.
Applications
IF and RF Gain Stages
Temperature-Compensation Circuits
WCDMA, TD-SCDMA, and cdma2000M Base
Stations
GSM 850/GSM 900 EDGE Base Stations
Features
S Independently Controlled Dual Paths
S 50MHz to 1000MHz RF Frequency Range
S Pin-Compatible Family Includes
MAX2062 (Analog/Digital VGA)
MAX2063 (Digital-Only VGA)
S 22dB (typ) Maximum Gain
S 0.19dB Gain Flatness Over 100MHz Bandwidth
S 33dB Gain Range
S 49dB Path Isolation (at 200MHz)
S Built-In 8-Bit DACs for Analog Attenuation Control
S Excellent Linearity at 200MHz (Configured with
Amp Last)
+41dBm OIP3
+59dBm OIP2
+19dBm Output 1dB Compression Point
S 4.4dB Typical Noise Figure (at 200MHz)
S Single +5V Supply (or +3.3V Operation)
S Amplifier Power-Down Mode for TDD Applications
Ordering Information
TEMP RANGE
PIN-PACKAGE
MAX2064ETM+
PART
-40NC to +85NC
48 TQFN-EP*
MAX2064ETM+T
-40NC to +85NC
48 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
T = Tape and reel.
WiMAXM, LTE, and TD-LTE Base Stations and
Customer-Premise Equipment
Fixed Broadband Wireless Access
Wireless Local Loop
cdma2000 is a registered certification mark and registered
service mark of the Telecommunications Industry Association.
WiMAX is a registered certification mark and registered service mark of the WiMAX Forum.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5618; Rev 1; 8/15
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
ABSOLUTE MAXIMUM RATINGS
VCC_AMP_1, VCC_AMP_2, VCC_RG to GND...........-0.3V to +5.5V
PD_1, PD_2, AMPSET to GND..............................-0.3V to +3.6V
A_VCTL_1, A_VCTL_2 to GND..............................-0.3V to +3.6V
DAT, CS, CLK, AA_SP to GND.............................-0.3V to +3.6V
AMP_IN_1, AMP_IN_2 to GND...........................+0.95V to +1.2V
AMP_OUT_1, AMP_OUT_2 to GND......................-0.3V to +5.5V
A_ATT_IN_1, A_ATT_IN_2, A_ATT_OUT_1,
A_ATT_OUT_2 to GND.......................................... 0V to +3.6V
REG_OUT to GND.................................................-0.3V to +3.6V
RF Input Power (A_ATT_IN_1, A_ATT_IN_2).................. +20dBm
RF Input Power (AMP_IN_1, AMP_IN_2)........................ +18dBm
qJC (Notes 1, 2).......................................................... +12.3NC/W
qJA (Notes 2, 3)............................................................. +38NC/W
Continuous Power Dissipation (Note 1)...............................5.3W
Operating Case Temperature Range (Note 4)... -40NC to +85NC
Junction Temperature......................................................+150NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Note 1: Based on junction temperature TJ = TC + (qJC x VCC x ICC). This formula can be used when the temperature of the exposed
pad is known while the device is soldered down to a PCB. See the Applications Information section for details. The junction
temperature must not exceed +150NC.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Note 3: Junction temperature TJ = TA + (qJA x VCC x ICC). This formula can be used when the ambient temperature of the PCB is
known. The junction temperature must not exceed +150NC.
Note 4: TC is the temperature on the exposed pad of the package. TA is the ambient temperature of the device and PCB.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
+5V SUPPLY DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +4.75V to +5.25V, AMPSET = 0, PD_1 = PD_2 = 0,
TC = -40NC to +85NC. Typical values are at VCC_ = +5.0V and TC = +25NC, unless otherwise noted.)
PARAMETER
SYMBOL
Supply Voltage
VCC
Supply Current
IDC
Power-Down Current
IDCPD
CONDITIONS
MIN
TYP
MAX
4.75
5
5.25
V
143
210
mA
5.3
8
mA
0.5
V
PD_1 = PD_2 = 1, VIH = 3.3V
UNITS
Input Low Voltage
VIL
Input High Voltage
VIH
1.7
3.465
V
Input Logic Current
IIH, IIL
-1
+1
FA
+3.3V SUPPLY DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +3.135V to +3.465V, AMPSET = 1, PD_1 = PD_2 = 0,
TC = -40NC to +85NC. Typical values are at VCC_ = +3.3V and TC = +25NC, unless otherwise noted.)
PARAMETER
SYMBOL
Supply Voltage
VCC
Supply Current
IDC
Power-Down Current
IDCPD
CONDITIONS
PD_1 = PD_2 = 1, VIH = 3.3V
MIN
TYP
MAX
3.135
3.3
3.465
UNITS
V
84.7
145
mA
4.5
8
mA
Input Low Voltage
VIL
0.5
V
Input High Voltage
VIH
1.7
V
2
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
RECOMMENDED AC OPERATING CONDITIONS
PARAMETER
RF Frequency
SYMBOL
fRF
CONDITIONS
(Note 5)
MIN
TYP
50
MAX
UNITS
1000
MHz
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (each path, unless otherwise noted)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +4.75V to +5.25V, attenuators are set for maximum gain,
RF ports are driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, 100MHz P fRF P 500MHz, TC = -40NC to +85NC. Typical
values are at maximum gain setting, VCC = +5.0V, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.) (Note 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
fRF = 50MHz
22.4
fRF = 100MHz
22.3
fRF = 200MHz
Small-Signal Gain
G
fRF = 350MHz, TC = +25NC
21.7
fRF = 750MHz
21.4
NF
From 100MHz to 200MHz
0.18
Any 100MHz frequency band from 200MHz
to 500MHz
0.19
fRF = 50MHz
4.4
fRF = 100MHz
4.4
fRF = 200MHz
4.4
fRF = 350MHz
4.6
fRF = 450MHz
4.7
fRF = 750MHz
5.3
fRF = 900MHz
Path Isolation
Output Third-Order Intercept Point
Maxim Integrated
OIP3
23.5
dB
dB/NC
dB
dB
5.7
32.9
dB
POUT = 0dBm/tone, Df = 1MHz, f1 + f2
53.7
dBm
RF input 1 amplified power measured at RF
output 2 relative to RF output 1, all unused
ports terminated to 50I
48.7
RF input 2 amplified signal measured at RF
output 1 relative to RF output 2, all unused
ports terminated to 50I
48.6
POUT = 0dBm/tone, Df = 1MHz, fRF = 50MHz
46.3
POUT = 0dBm/tone, Df = 1MHz, fRF = 100MHz
44.2
POUT = 0dBm/tone, Df = 1MHz, fRF = 200MHz
41.1
POUT = 0dBm/tone, Df = 1MHz, fRF = 350MHz
37.1
POUT = 0dBm/tone, Df = 1MHz, fRF = 450MHz
34.9
POUT = 0dBm/tone, Df = 1MHz, fRF = 750MHz
28.2
POUT = 0dBm/tone, Df = 1MHz, fRF = 900MHz
24.6
fRF = 350MHz, TC = +25NC
OIP2
UNITS
20.6
-0.006
Total Attenuation Range
Output Second-Order Intercept
Point
21.9
fRF = 450MHz
Gain vs. Temperature
Gain Flatness vs. Frequency
MAX
22.2
19.5
fRF = 900MHz
Noise Figure
TYP
30
dB
dBm
3
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (each path, unless otherwise noted)
(continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +4.75V to +5.25V, attenuators are set for maximum gain,
RF ports are driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, 100MHz P fRF P 500MHz, TC = -40NC to +85NC. Typical
values are at maximum gain setting, VCC = +5.0V, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.) (Note 6)
PARAMETER
Output -1dB Compression Point
SYMBOL
P1dB
CONDITIONS
fRF = 350MHz, TC = +25NC (Note 7)
MIN
TYP
17
18.7
MAX
UNITS
dBm
Second Harmonic
POUT = +3dBm
-56.7
dBc
Third Harmonic
POUT = +3dBm
-72.4
dBc
Group Delay
Includes EV kit PCB delays
0.9
ns
Amplifier Power-Down Time
PD_1 or PD_2 from 0 to 1, amplifier DC
supply current settles to within 0.1mA
0.5
Fs
Amplifier Power-Up Time
PD_1 or PD_2 from 1 to 0, amplifier DC
supply current settles to within 1%
0.5
Fs
50I source
16.8
dB
50I load
30.7
dB
Input Return Loss
Output Return Loss
RLIN
RLOUT
ANALOG ATTENUATOR (each path, unless otherwise noted)
Insertion Loss
2.2
dB
IIP2
PIN1 = 0dBm, PIN2 = 0dBm (minimum
attenuation), Df = 1MHz, f1 + f2
61.9
dBm
IIP3
PIN1 = 0dBm, PIN2 = 0dBm (minimum
attenuation), Df = 1MHz
37.0
dBm
32.9
dB
Gain Control Slope
Analog control input
-13.3
dB/V
Maximum Gain Control Slope
Over analog control input range
-35.2
dB/V
Insertion Phase Change
Over analog control input range
16.5
Deg/V
Input Second-Order Intercept
Point
Input Third-Order Intercept Point
IL
Attenuation Range
Attenuator Response Time
Group Delay vs. Control Voltage
RF settled to
within Q0.5dB
31dB to 0dB, AA_SP = 0,
from A_VCTL_ step
500
31dB to 0dB, AA_SP = 1,
from CS step
500
0dB to 31dB, AA_SP = 0,
from A_VCTL_ step
500
0dB to 31dB, AA_SP = 1,
from CS step
500
ns
Over analog control input from 0.25V to
2.75V
Analog Control Input Range
-0.26
0.25
Analog Control Input Impedance
ns
2.75
V
19.2
kI
Input Return Loss
50I source
16.0
dB
Output Return Loss
50I load
15.9
dB
4
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (each path, unless otherwise noted)
(continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +4.75V to +5.25V, attenuators are set for maximum gain,
RF ports are driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, 100MHz P fRF P 500MHz, TC = -40NC to +85NC. Typical
values are at maximum gain setting, VCC = +5.0V, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.) (Note 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
D/A CONVERTER
Number of Bits
8
DAC code = 00000000
Output Voltage
DAC code = 11111111
Bits
0.35
2.7
V
SERIAL PERIPHERAL INTERFACE (SPI)
Maximum Clock Speed
20
MHz
Data-to-Clock Setup Time
tCS
2
ns
Data-to-Clock Hold Time
tCH
2.5
ns
Clock-to-CS Setup Time
tES
3
ns
CS Positive Pulse Width
tEW
7
ns
CS Setup Time
Clock Pulse Width
tEWS
3.5
ns
tCW
5
ns
+3.3V SUPPLY AC ELECTRICAL CHARACTERISTICS (each path, unless otherwise noted)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +3.135V to +3.465V, attenuators are set for maximum
gain, RF ports are driven from 50I sources, AMPSET = 1, PD_1 = PD_2 = 0, 100MHz P fRF P 500MHz, TC = -40NC to +85NC. Typical
values are at maximum gain setting, VCC = +3.3V, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.) (Note 6)
PARAMETER
SYMBOL
Small-Signal Gain
Output Third-Order Intercept Point
Noise Figure
G
OIP3
NF
CONDITIONS
POUT = 0dBm/tone
Total Attenuation Range
Path Isolation
Output -1dB Compression Point
P1dB
MIN
TYP
MAX
UNITS
21.8
29.1
4.8
dB
dBm
dB
32.9
dB
RF input 1 amplified power measured at RF
output 2 relative to RF output 1, all unused
ports terminated to 50I
48.1
RF input 2 amplified signal measured at RF
output 1 relative to RF output 2, all unused
ports terminated to 50I
48.2
(Note 7)
13.2
dB
dBm
Note 5: Operation outside this range is possible, but with degraded performance of some parameters. See the Typical Operating
Characteristics.
Note 6: All limits include external component losses. Output measurements are performed at the RF output port of the Typical
Application Circuit.
Note 7: It is advisable not to continuously operate the RF input 1 or RF input 2 above +15dBm.
Maxim Integrated
5
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +5V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
24
MAX2064 toc02
MAX2064 toc01
TC = +25°C
GAIN vs. RF FREQUENCY
NOTCH DUE TO
SELF-RESONANCE OF
BIAS COIL (SEE TABLE 4)
TC = -40°C
23
23
145
VCC = 4.75V, 5.00V, 5.25V
22
21
TC = +85°C
GAIN (dB)
22
GAIN (dB)
SUPPLY CURRENT (mA)
TC = -40°C
155
GAIN vs. RF FREQUENCY
24
MAX2064 toc03
SUPPLY CURRENT vs. SUPPLY VOTAGE
165
TC = +25°C
21
20
20
19
19
135
TC = +85°C
5.125
DAC CODE 32
9
GAIN (dB)
DAC CODE 64
4
DAC CODE 128
-6
-11
-11
450
650
850
200MHz
1050
RF = 350MHz
TC = -40°C, +25°C, +85°C
9
4
-1
1000MHz
-6
-11
-16
-16
1050
850
19
14
4
-6
650
24
350MHz
9
450
GAIN vs. ANALOG ATTENUATOR
SETTING
-1
DAC CODE 255
250
50MHz
14
DAC CODE 0
250
RF FREQUENCY (MHz)
MAX2064 toc05
19
50
1050
24
MAX2064 toc04
0
32
64
96
0
128 160 192 224 256
32
64
96
128 160 192 224 256
RF FREQUENCY (MHz)
ANALOG ATTENUATOR SETTING (DAC CODE)
ANALOG ATTENUATOR SETTING (DAC CODE)
GAIN vs. ANALOG ATTENUATOR
SETTING
INPUT MATCH vs. ANALOG
ATTENUATOR SETTING
OUTPUT MATCH vs. ANALOG
ATTENUATOR SETTING
19
VCC = 4.75V, 5.00V, 5.25V
-5
50MHz
INPUT MATCH (dB)
14
0
9
4
-1
-10
350MHz
1000MHz
-15
-20
-25
-6
200MHz
1000MHz
-5
-10
-15
50MHz
-20
-25
200MHz
-30
-30
-11
0
OUTPUT MATCH (dB)
RF = 350MHz
MAX2064 toc07
24
MAX2064 toc08
GAIN OVER ANALOG
ATTENENUATOR SETTING (dB)
850
GAIN vs. ANALOG ATTENUATOR
SETTING
50
GAIN (dB)
650
GAIN OVER ANALOG ATTENUATOR
SETTING VS. RF FREQUENCY
-16
350MHz
-35
-35
-16
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
6
450
RF FREQUENCY (MHz)
19
-1
250
50
VCC (V)
24
14
18
18
5.250
MAX2064 toc06
5.000
MAX2064 toc09
4.875
GAIN (dB)
125
4.750
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +5V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
BOTH ANALOG
ATTENUATORS = CODE 0
60
70
DAC CODE 255
60
70
80
250
450
650
850
250
NOISE FIGURE vs. RF FREQUENCY
NOISE FIGURE (dB)
4
850
VCC = 4.75V, 5.00V, 5.25V
5
4
1050
50
OUTPUT P1dB vs. RF FREQUENCY
250
TC = +85°C
15
TC = +25°C
650
850
11
1050
50
250
OUTPUT IP3 (dBm)
VCC = 5.00V
13
TC = -40°C
35
30
650
850
1050
OUTPUT IP3 vs. RF FREQUENCY
POUT = 0dBm/TONE
45
40
450
RF FREQUENCY (MHz)
OUTPUT IP3 vs. RF FREQUENCY
VCC = 4.75V
15
450
50
MAX2064 toc16
19
17
17
RF FREQUENCY (MHz)
VCC = 5.25V
MAX2064 toc12
TC = -40°C
13
RF FREQUENCY (MHz)
21
128 160 192 224 256
19
50
POUT = 0dBm/TONE
45
OUTPUT IP3 (dBm)
650
96
OUTPUT P1dB vs. RF FREQUENCY
2
450
64
21
MAX2064 toc14
6
32
ANALOG ATTENUATOR SETTING (DAC CODE)
3
TC = -40°C
250
50MHz
0
1050
MAX2064 toc17
NOISE FIGURE (dB)
850
7
2
OUTPUT P1dB (dBm)
650
TC = +25°C
5
50
200MHz
-20
NOISE FIGURE vs. RF FREQUENCY
6
3
450
8
MAX2064 toc13
7
TC = +85°C
0
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
8
350MHz
1000MHz
20
-60
50
1050
OUTPUT P1dB (dBm)
50
40
-40
90
80
POSITIVE PHASE = ELECTRICALLY
SHORTER
MAX2064 toc15
50
50
REFERENCED TO HIGH GAIN STATE
60
TC = +85°C
VCC = 5.25V
MAX2064 toc18
40
DAC CODE 0
80
S21 PHASE CHANGE (DEGREES)
30
40
MAX2064 toc11
BOTH ANALOG
ATTENUATORS = CODE 255
30
REVERSE ISOLATION OVER
ANALOG ATTENUATOR SETTING
20
MAX2064 toc10
CHANNEL–TO–CHANNEL ISOLATION (dB)
10
S21 PHASE CHANGE vs. ANALOG
ATTENUATOR SETTING
REVERSE ISOLATION OVER ANALOG
ATTENUATOR SETTING vs. RF FREQUENCY
CHANNEL–TO–CHANNEL ISOLATION
vs. RF FREQUENCY
40
VCC = 5.00V
35
30
VCC = 4.75V
25
25
TC = +25°C
11
50
250
450
650
RF FREQUENCY (MHz)
Maxim Integrated
850
1050
20
20
50
250
450
650
RF FREQUENCY (MHz)
850
1050
50
250
450
650
850
1050
RF FREQUENCY (MHz)
7
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +5V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
40
35
TC = +85°C
LSB, USB
30
POUT = 3dBm
TC = +85°C
60
TC = +25°C
50
TC = -40°C
50
VCC = 4.75V
30
30
50
128 160 192 224 256
250
2nd HARMONIC vs. ANALOG
ATTENUATOR SETTING
TC = +25°C
50
1050
TC = +85°C
60
55
90
TC = -40°C
80
TC = +25°C
70
60
50
90
96
TC = +85°C
250
3rd HARMONIC vs. ANALOG
ATTENUATOR SETTING
TC = -40°C
POUT = 0dBm
RF = 350MHz
650
850
60
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
250
TC = +85°C
60
450
650
850
1050
OIP2 vs. RF FREQUENCY
700
VCC = 5.25V
POUT = 0dBm /TONE
60
VCC = 5.00V
TC = +25°C
50
TC = -40°C
40
50
VCC = 4.75V
40
30
20
50
64
50
RF FREQUENCY (MHz)
30
32
VCC = 4.75V
1050
POUT = 0dBm /TONE
OIP2 (dBm)
TC = +85°C
0
70
OIP2 vs. RF FREQUENCY
80
70
450
700
MAX2064 toc25
TC = +25°C
VCC = 5.00V
80
RF FREQUENCY (MHz)
ANALOG ATTENUATOR SETTING (DAC CODE)
90
VCC = 5.25V
50
50
128 160 192 224 256
1050
60
OIP2 (dBm)
64
850
POUT = 3dBm
MAX2064 toc26
32
650
1000
50
45
450
3rd HARMONIC vs. RF FREQUENCY
POUT = 3dBm
TC = -40°C
0
250
RF FREQUENCY (MHz)
3rd HARMONIC vs. RF FREQUENCY
3rd HARMONIC (dBc)
65
850
100
MAX2064 toc22
POUT = 0dBm
RF = 350MHz
650
RF FREQUENCY (MHz)
ANALOG ATTENUATOR SETTING (DAC CODE)
70
450
MAX2064 toc24
96
MAX2064 toc27
64
3rd HARMONIC (dBc)
32
MAX2064 toc23
0
2nd HARMONIC (dBc)
VCC = 5.00V
40
40
20
3rd HARMONIC (dBc)
60
POUT = -3dBm/TONE
RF = 350MHz
25
8
POUT = 3dBm
VCC = 5.25V
2nd HARMONIC (dBc)
TC = +25°C
LSB, USB
70
MAX2064 toc20
TC = -40°C
LSB, USB
2nd HARMONIC (dBc)
OUTPUT IP3 (dBm)
45
2nd HARMONIC vs. RF FREQUENCY
2nd HARMONIC vs. RF FREQUENCY
70
MAX2064 toc19
50
MAX2064 toc21
OUTPUT IP3 vs. ANALOG
ATTENUATOR SETTING
50
250
450
650
RF FREQUENCY (MHz)
850
1050
50
250
450
650
850
1050
RF FREQUENCY (MHz)
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +5V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 0, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
OIP2 vs. ANALOG
ATTENUATOR SETTING
DAC VOLTAGE vs. DAC CODE
MAX2064 toc30
2.5
55
50
2.0
DAC VOLTAGE (V)
OIP2 (dBm)
TC = +25°C
2.5
TC = +85°C
DAC VOLTAGE (V)
60
3.0
MAX2064 toc29
POUT = -3dBm/TONE
RF = 350MHz
DAC VOLTAGE vs. DAC CODE
3.0
MAX2064 toc28
65
2.5
TC = -40°C, +25°C, +85°C
1.0
2.0
1.5
VCC = 4.75V, 5.00V, 5.25V
1.0
TC = -40°C
45
1.5
40
0
32
64
96
0.5
0
128 160 192 224 256
0
32
64
96
ANALOG ATTENUATOR SETTING (DAC CODE)
0.01
0
-0.01
TC CHANGED FROM
+25°C TO +85°C
-0.05
0
MAX2064 toc32
0.0075
VCC CHANGED FROM
5.00V TO 5.25V
0.0050
0.0025
0
-0.0025
VCC CHANGED FROM
5.00V TO 4.75V
-0.0050
32
64
96
128 160 192 224 256
-0.0100
0
32
64
DAC CODE
0
-1
GAIN (dB)
-2
-3
MAX2064 toc34
TC = -40°C
TC = +85°C
128 160 192 224 256
GAIN vs. RF FREQUENCY
(ANALOG ATTENUATOR ONLY)
MAX2064 toc33
0
-1
96
DAC CODE
GAIN vs. RF FREQUENCY
(ANALOG ATTENUATOR ONLY)
GAIN (dB)
128 160 192 224 256
-0.0075
-0.04
-2
-3
VCC = 4.75V, 5.00V, 5.25V
TC = +25°C
-4
-4
-5
-5
50
250
450
650
RF FREQUENCY (MHz)
Maxim Integrated
96
DAC VOLTAGE DRIFT vs. DAC CODE
DAC VOLTAGE DRIFT (V)
DAC VOLTAGE DRIFT (V)
TC CHANGED FROM
+25°C TO -40°C
-0.03
64
0.0100
MAX2064 toc31
0.04
-0.02
32
DAC CODE
DAC VOLTAGE DRIFT vs. DAC CODE
0.02
0
DAC CODE
0.05
0.03
0
128 160 192 224 256
850
1050
50
250
450
650
850
1050
RF FREQUENCY (MHz)
9
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +3.3V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 1, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
GAIN (dB)
21
TC = +85°C
20
60
3.3
250
50
450
VCC (V)
MAX2064 toc38
24
14
DAC CODE 64
-1
DAC CODE 128
-6
-11
DAC CODE 225
-16
250
50
450
650
850
RF = 350MHz
350MHz
9
4
-1
-1
-6
-6
1000MHz
TC = -40°C, +25°C, +85°C
-11
-16
0
32
64
96
128 160 192 224 256
0
32
64
96
128 160 192 224 256
RF FREQUENCY (MHz)
ANALOG ATTENUATOR SETTING (DAC CODE)
ANALOG ATTENUATOR SETTING (DAC CODE)
GAIN vs. ANALOG ATTENUATOR SETTING
INPUT MATCH vs. ANALOG
ATTENUATOR SETTING
OUTPUT MATCH vs. ANALOG
ATTENUATOR SETTING
19
0
-5
INPUT MATCH (dB)
14
9
4
-1
-6
VCC = 3.135V, 3.30V, 3.465V
VCC = 3.3V
1000MHz
-10
350MHz
-15
-20
200MHz
-25
50MHz
-30
-11
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
VCC = 3.3V
1000MHz
-5
-10
-15
350MHz
-20
-25
200MHz
-30
-35
-16
0
OUTPUT MATCH (dB)
RF = 350MHz
MAX2064 toc42
24
1050
VCC = 3.3V
19
-16
1050
850
GAIN vs. ANALOG ATTENUATOR SETTING
24
-11
VCC = 3.3V
650
14
9
4
450
RF FREQUENCY (MHz)
200MHz
14
DAC CODE 0
GAIN (dB)
4
250
50
1050
VCC = 3.3V
50MHz
19
MAX2064 toc41
GAIN OVER ANALOG ATTENUATOR SETTING (dB)
19
9
850
GAIN vs. ANALOG ATTENUATOR SETTING
24
DAC CODE 32
650
RF FREQUENCY (MHz)
GAIN OVER ANALOG ATTENUATOR
SETTING vs. RF FREQUENCY
GAIN (dB)
MAX2064 toc37
18
18
3.5
3.4
GAIN (dB)
3.2
VCC = 3.30V
19
MAX2064 toc39
3.1
VCC = 3.135V
20
19
TC = +85°C
21
MAX2064 toc40
80
70
VCC = 3.465V
22
22
MAX2064 toc43
TC = +25°C
90
10
23
TC = +25°C
GAIN (dB)
SUPPLY CURRENT (mA)
100
VCC = 3.3V
TC = -40°C
23
24
MAX2064 toc36
TC = -40°C
GAIN vs. RF FREQUENCY
GAIN vs. RF FREQUENCY
24
MAX2064 toc35
110
50MHz
-35
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +3.3V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 1, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
NOISE FIGURE vs. RF FREQUENCY
TC = +85°C
7
4
VCC = 3.135V
5
VCC = 3.465V
4
3
4
50
1050
OUTPUT P1dB vs. RF FREQUENCY
250
650
850
1050
50
MAX2064 toc47
12
VCC = 3.30V
VCC = 3.465V
8
POUT = 0dBm/TONE
VCC = 3.3V
TC = -40°C
35
30
25
TC = +25°C
20
4
TC = +85°C
1050
250
RF FREQUENCY (MHz)
TC = -40°C LSB, USB
30
25
TC = +25°C LSB, USB
POUT = 0dBm/TONE
VCC = 3.30V
30
25
20
VCC = 3.135V
650
850
50
1050
250
POUT = 3dBm
VCC = 3.3V
65
45
TC = +85°C
35
650
850
1050
2nd HARMONIC vs. RF FREQUENCY
TC = +25°C
55
450
RF FREQUENCY (MHz)
2nd HARMONIC vs. RF FREQUENCY
2nd HARMONIC (dBc)
35
450
75
MAX2064 toc50
POUT = -3dBm/TONE
VCC = 3.3V
RF = 350MHz
VCC = 3.465V
RF FREQUENCY (MHz)
OUTPUT IP3 vs. ANALOG
ATTENUATOR SETTING
40
1050
10
50
75
TC = -40°C
POUT = 3dBm
65
2nd HARMONIC (dBc)
850
850
15
MAX2064 toc51
650
650
35
10
450
450
OUTPUT IP3 vs. RF FREQUENCY
40
15
250
250
RF FREQUENCY (MHz)
OUTPUT IP3 vs. RF FREQUENCY
6
OUTPUT IP3 (dBm)
450
40
OUTPUT IP3 (dBm)
OUTPUT P1dB (dBm)
14
50
TC = +85°C
RF FREQUENCY (MHz)
VCC = 3.135V
10
8
MAX2064 toc49
850
RF FREQUENCY (MHz)
16
TC = +25°C
VCC = 3.30V
MAX2064 toc52
650
OUTPUT IP3 (dBm)
450
MAX2064 toc48
250
10
6
2
2
50
12
TC = -40°C
TC = +25°C
3
OUTPUT P1dB (dBm)
NOISE FIGURE (dB)
NOISE FIGURE (dB)
5
6
VCC = 3.3V
14
TC = -40°C
VCC = 3.30V
6
16
MAX2064 toc45
MAX2064 toc44
VCC = 3.3V
7
OUTPUT P1dB vs. RF FREQUENCY
8
MAX2064 toc46
NOISE FIGURE vs. RF FREQUENCY
8
55
VCC = 3.465V
45
35
VCC = 3.135V
25
25
TC = +85°C LSB, USB
20
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
Maxim Integrated
15
50
250
450
650
RF FREQUENCY (MHz)
850
1050
15
50
250
450
650
850
1050
RF FREQUENCY (MHz)
11
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = VCC_AMP_1 = VCC_AMP_2 = VCC_RG = +3.3V, attenuators are set for maximum gain, RF ports are
driven from 50I sources, AMPSET = 1, PD_1 = PD_2 = 0, PIN = -20dBm, fRF = 350MHz, and TC = +25NC, unless otherwise noted.)
TC = +25°C
45
40
64
96
50
128 160 192 224 256
VCC = 3.465V
30
30
250
50
450
650
850
250
50
1050
70
MAX2064 toc56
TC = -40°C
650
850
1050
OIP2 vs. RF FREQUENCY
POUT = 0dBm
VCC = 3.3V
RF = 350MHz
450
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
75
POUT = 0dBm/TONE
VCC = 3.3V
60
TC = +25°C
65
OIP2 (dBm)
3rd HARMONIC (dBc)
VCC = 3.135V
40
3rd HARMONIC vs. ANALOG
ATTENUATOR SETTING
TC = +25°C
60
55
50
TC = +85°C
40
30
TC = +85°C
50
TC = -40°C
20
0
32
64
96
128 160 192 224 256
250
50
ANALOG ATTENUATOR SETTING (DAC CODE)
60
MAX2064 toc58
60
650
850
1050
OIP2 vs. ANALOG ATTENUATOR SETTING
POUT = 0dBm/TONE
VCC = 3.465V
450
RF FREQUENCY (MHz)
OIP2 vs. RF FREQUENCY
70
POUT = -3dBm/TONE
VCC = 3.3V
RF = 350MHz
TC = +85°C
VCC = 3.30V
50
50
OIP2 (dBm)
OIP2 (dBm)
50
TC = +85°C
ANALOG ATTENUATOR SETTING (DAC CODE)
70
VCC = 3.30V
60
MAX2064 toc59
32
TC = +25°C
40
TC = -40°C
0
60
70
MAX2064 toc57
50
TC = -40°C
POUT = 3dBm
3rd HARMONIC (dBc)
TC = +85°C
POUT = 3dBm
VCC = 3.3V
70
3rd HARMONIC (dBc)
2nd HARMONIC (dBc)
55
80
MAX2064 toc54
POUT = 0dBm
VCC = 3.3V
RF = 350MHz
3rd HARMONIC vs. RF FREQUENCY
3rd HARMONIC vs. RF FREQUENCY
80
MAX2064 toc53
60
MAX2064 toc55
2nd HARMONIC vs. ANALOG
ATTENUATOR SETTING
40
40
30
TC = +25°C
VCC = 3.135V
TC = -40°C
20
50
250
450
650
RF FREQUENCY (MHz)
12
850
1050
30
0
32
64
96
128 160 192 224 256
ANALOG ATTENUATOR SETTING (DAC CODE)
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
GND
AMP_IN_2
PD_2
GND
AMP_OUT_2
REG_OUT
AMPSET
AMP_OUT_1
GND
PD_1
GND
TOP VIEW
AMP_IN_1
Pin Configuration
36 35 34 33 32 31 30 29 28 27 26 25
VCC_AMP_2
VCC_AMP_1
37
24
A_ATT_OUT_1
38
23
A_ATT_OUT_2
A_VCTL_1
39
22
A_VCTL_2
AA_SP
40
21
GND
A_ATT_IN_1
41
20
A_ATT_IN_2
GND
42
19
GND
18
GND
MAX2064
GND
43
GND
44
17
GND
GND
45
16
GND
46
15
GND
14
GND
13
GND
8
9
10 11 12
GND
7
GND
6
GND
5
GND
4
VCC_RG
3
CS
2
CLK
1
DAT
+
EP
GND
48
GND
47
GND
GND
GND
GND
GND
TQFN
Pin Description
PIN
NAME
1–4, 9–19, 21,
25, 28, 33, 36,
42–48
GND
Ground
5
DAT
SPI Data Digital Input
6
CLK
SPI Clock Digital Input
7
CS
8
VCC_RG
20
A_ATT_IN_2
22
A_VCTL_2
23
A_ATT_OUT_2
24
VCC_AMP_2
26
AMP_IN_2
27
29
Maxim Integrated
PD_2
FUNCTION
SPI Chip-Select Digital Input
Regulator Supply Input. Connect to a 3.3V or 5V external power supply. VCC_RG powers all circuits
except for the driver amplifiers. Bypass with a 10nF capacitor as close as possible to the pin.
Analog Attenuator Input (50I), Path 2. Requires a 1000pF DC-blocking capacitor.
Analog Attenuator Voltage-Control Input, Path 2. Bypass to ground with a 150pF capacitor
if DAC 2 is used (AA_SP = 1).
Analog Attenuator Output (50I), Path 2. Requires a DC-blocking capacitor. Connect to
AMP_IN_2 through a 1000pF capacitor.
Driver Amplifier Supply-Voltage Input, Path 2. Bypass with a 10nF capacitor as close as
possible to the pin.
Driver Amplifier Input (50I), Path 2. Requires a DC-blocking capacitor. Connect to
A_ATT_OUT_2 through a 1000pF capacitor.
Power-Down, Path 2. See Table 2 for operation details.
AMP_OUT_2 Driver Amplifier Output (50I), Path 2. Connect a pullup inductor from AMP_OUT_2 to VCC_.
13
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Pin Description (continued)
PIN
NAME
30
REG_OUT
31
AMPSET
32
FUNCTION
Regulator Output. Bypass with 1FF capacitor.
Driver Amplifier Bias Setting for 3.3V Operation. Set to logic 1 for 3.3V operation on pins
VCC_AMP_1 and VCC_AMP_2. Set to logic 0 for 5V operation.
AMP_OUT_1 Driver Amplifier Output (50I), Path 1. Connect a pullup inductor from AMP_OUT_1 to VCC_.
34
PD_1
Power-Down, Path 1. See Table 2 for operation details.
35
AMP_IN_1
Driver Amplifier Input (50I), Path 1. Requires a DC-blocking capacitor. Connect to
A_ATT_OUT_1 through a 1000pF capacitor.
37
VCC_AMP_1
Driver Amplifier Supply Voltage Input, Path 1. Bypass with a 10nF capacitor as close as
possible to the pin.
38
A_ATT_OUT_1
Analog Attenuator Output (50I), Path 1. Requires a DC-blocking capacitor. Connect to
AMP_IN_1 through a 1000pF capacitor.
39
A_VCTL_1
40
AA_SP
41
A_ATT_IN_1
—
EP
Analog Attenuator Voltage-Control Input, Path 1. Bypass to ground with a 150pF capacitor
if on-chip DAC is used (AA_SP = 1).
DAC Enable/Disable Logic Input for Analog Attenuators. Set AA_SP to logic 1 to enable on-chip
DAC circuit and digital SPI control. Set AA_SP to logic 0 to disable DAC circuit and digital SPI
control. When AA_SP = 0, use analog control lines (A_VCTL_1 and A_VCTL_2).
Analog Attenuator Input (50I), Path 1. Requires a 1000pF DC-blocking capacitor.
Exposed Pad. Internally connected to GND. Connect to a large PCB ground plane for proper RF
performance and enhanced thermal dissipation.
Detailed Description
The MAX2064 high-linearity analog VGA is a general-purpose, high-performance amplifier designed to
interface with 50I systems operating in the 50MHz to
1000MHz frequency range.
Each channel of the device integrates an analog attenuator to provide 33dB of total gain control, as well as a driver
amplifier optimized to provide high gain, high IP3, low NF,
and low power consumption.
Each analog attenuator is controlled using an external
voltage or through the SPI-compatible interface using
an on-chip 8-bit DAC. See the Applications Information
section and Table 3 for attenuator programming details.
Because each of the two stages in the separate signal
paths has its own RF input and RF output, this component can be configured to either optimize NF (amplifier
configured first) or OIP3 (amplifier last). The device’s performance features include 24dB amplifier gain (amplifier
only), 4.4dB NF at maximum gain (includes attenuator
insertion losses), and a high OIP3 level of +41dBm. Each
of these features makes the device an ideal VGA for multipath receiver and transmitter applications.
14
In addition, the device operates from a single +5V
supply with full performance, or a +3.3V supply for an
enhanced power-savings mode with lower performance.
The device is available in a compact 48-pin TQFN package (7mm x 7mm) with an exposed pad. Electrical performance is guaranteed over the extended temperature
range, from TC = -40NC to +85NC.
Analog Attenuator Control
The device integrates two analog attenuators. Each
analog attenuator has a 33dB range and is controlled
using an external voltage, or through the 3-wire SPI interface using an on-chip 8-bit DAC. See the Applications
Information section and Table 3 for attenuator programming details. The attenuators can be used for both static
and dynamic power control.
Note that when the analog attenuators are controlled by the
DACs through the SPI bus, the DAC output voltage shows
on A_VCTL_1 and A_VCTL_2 (pins 39 and 22, respectively). Therefore, in SPI mode, the A_VCTL_1 and A_VCTL_2
pins must only connect to the resistor and capacitor to
ground, as shown in the Typical Application Circuit.
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Table 1. Control Logic
AA_SP
ANALOG ATTENUATOR
D/A CONVERTER
0
Controlled by external control voltage
Disabled
1
Controlled by on-chip DAC
Enabled (DAC output voltage shows on A_VCTL__ pins);
DAC uses on-chip voltage reference
Applications Information
Table 2. Operating Modes
RESULT
VCC (V)
AMP_SET
PD_1
PD_2
5
0
0
0
3.3
1
0
0
All on
AMP1 off
AMP2 on
AMP1 on
AMP2 off
All off
5
0
1
0
3.3
1
1
0
5
0
0
1
3.3
1
0
1
5
0
1
1
3.3
1
1
1
Driver Amplifier
Each path of the device includes a high-performance
driver with a fixed gain of 24dB. The driver amplifier
circuits are optimized for high linearity for the 50MHz to
1000MHz frequency range.
Operating Modes
The device features an optional +3.3V supply voltage operation with reduced linearity performance. The
AMPSET pin needs to be biased accordingly in each
mode, as listed in Table 2. In addition, the driver amplifiers
can be shut down independently to conserve DC power.
See the biasing scheme outlined in Table 2 for details.
SPI Interface and Attenuator Settings
The attenuators can be programmed through the 3-wire
SPI/MICROWIREK-compatible serial interface using
5-bit words. Fifty-six bits of data are shifted in MSB first
and are framed by CS. The first 28 bits set the first attenuator and the following 28 bits set the second attenuator.
When CS is low, the clock is active and data is shifted on
the rising edge of the clock. When CS transitions high,
the data is latched and the attenuator setting changes
(Figure 1). See Table 3 for details on the SPI data format.
MSB
DAT
LSB
DN
D(N-1)
D1
D0
CLK
tCW
tCS
CS
tCH
tES
tEWS
tEW
NOTES: DATA ENTERED ON CLOCK RISING EDGE.
ATTENUATOR REGISTER STATE CHANGE ON CS RISING EDGE.
N = NUMBER OF DATA BITS.
D0 IS AN ADDRESS BIT, D1/DN ARE DATA BITS (WHERE N P 20).
Figure 1. SPI Timing Diagram
MICROWIRE is a trademark of National Semiconductor Corp.
Maxim Integrated
15
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Table 3. SPI Data Format
FUNCTION
BIT
DESCRIPTION
D55 (MSB)
D54
D53
D52
D51
D50
D49
D48
D47
Reserved
D46
D45
Bits D[55:36] are reserved. Set to logic 0.
D44
D43
D42
D41
D40
D39
D38
D37
D36
On-Chip DAC
(Path 2)
16
D35
Bit 7 (MSB) of on-chip DAC used to program the Path 2 analog attenuator
D34
Bit 6 of DAC
D33
Bit 5 of DAC
D32
Bit 4 of DAC
D31
Bit 3 of DAC
D30
Bit 2 of DAC
D29
Bit 1 of DAC
D28
Bit 0 (LSB) of DAC
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Table 3. SPI Data Format (continued)
FUNCTION
BIT
DESCRIPTION
D27
D26
D25
D24
D23
D22
D21
D20
D19
Reserved
D18
D17
Bits D[27:8] are reserved. Set to logic 0.
D16
D15
D14
D13
D12
D11
D10
D9
D8
On-Chip DAC
(Path 1)
D7
Bit 7 (MSB) of on-chip DAC used to program the Path 1 analog attenuator
D6
Bit 6 of DAC
D5
Bit 5 of DAC
D4
Bit 4 of DAC
D3
Bit 3 of DAC
D2
Bit 2 of DAC
D1
Bit 1 of DAC
D0 (LSB)
Maxim Integrated
Bit 0 (LSB) of DAC
17
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Power-Supply Sequencing
The sequence to be used is:
1) Power supply
2) Control lines
Layout Considerations
The pin configuration of the device is optimized to facilitate a very compact physical layout of the device and its
associated discrete components. The exposed pad (EP)
of the device’s 48-pin TQFN-EP package provides a low
thermal-resistance path to the die. It is important that
the PCB on which the device is mounted be designed
to conduct heat from the EP. In addition, provide the EP
with a low inductance path to electrical ground. The EP
MUST be soldered to a ground plane on the PCB, either
directly or through an array of plated via holes. The layout of the PCB should include proper top-layer ground
shielding to isolate the amplifier’s inputs and outputs
from each other. Shielding between the paths (inputs and
outputs) is important for channel-to-channel isolation.
Table 4. Typical Application Circuit Component Values
DESIGNATION
QTY
C1, C5, C6, C8,
C12, C13
6
1000pF ceramic capacitors (0402)
GRM1555C1H102J
Murata Electronics North America, Inc.
C3, C10
2
150pF ceramic capacitors (0402)
GRM1555C1H151J
Murata Electronics North America, Inc.
C4, C7, C11,
C14, C16
5
10nF ceramic capacitors (0402)
GRM155R71E103K
Murata Electronics North America, Inc.
C15
1
1FF ceramic capacitor (0603)
GRM188R71C105K
Murata Electronics North America, Inc.
L1, L2*
2
820nH inductors (1008)
Coilcraft 1008CS-821XJLC
Coilcraft, Inc.
R1, R2
2
47.5kI resistors (0402)
—
1
48 TQFN-EP (7mm x 7mm)
Maxim MAX2064ETM+
Maxim Integrated Products, Inc.
U1
DESCRIPTION
COMPONENT SUPPLIER
*Select the inductors to ensure that self-resonance of the inductors is outside the band of operation.
18
Maxim Integrated
MAX2064
Dual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Typical Application Circuit
RF
OUTPUT 1
C7
C6
RF
OUTPUT 2
C14
VCC
C13
L1
L2
36
C1
GND
GND
GND
GND
GND
AMP_IN_2
PD_2
GND
AMP_OUT_2
REG_OUT
AMPSET
AMP_OUT_1
GND
C11
25
24
ACTIVE
BIAS
38
39
AMP1
ACTIVE
BIAS
AMP2
23
22
21
40
ANALOG
ATTENUATOR
1
41
42
43
DAC
ANALOG
ATTENUATOR
2
DAC
20
19
18
EXPOSED
PAD
44
17
MAX2064
45
16
SPI
46
15
47
14
48
13
1
GND
+
2
3
4
5
6
7
8
9
10
11
C12
VCC_AMP_2
ANALOG
ATTENUATOR
CONTROL 2
A_ATT_OUT_2
A_VCTL_2
GND
R2
A_ATT_IN_2
C10
GND
GND
RF INPUT2
GND
C8
GND
GND
GND
GND
12
GND
GND
26
GND
GND
RF INPUT1
27
GND
GND
28
GND
A_ATT_IN_1
29
VCC
37
CS
R1
30
VCC_RG
C3
31
32
CLK
AA_SP
33
DAT
A_VCTL_1
34
GND
A_ATT_OUT_1
35
GND
VCC_AMP_1
ANALOG
ATTENUATOR
CONTROL 1
PD_1
C4
GND
C5
GND
VCC
AMP_IN_1
C15
VCC
C16
Chip Information
PROCESS: SiGe BiCMOS
Maxim Integrated
Package Information
For the latest package outline information and land patterns, go to
www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains
to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
48 TQFN-EP
T4877+7
21-0144
90-0133
19
MAX2064
ual 50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Revision History
REVISION
NUMBER
REVISION
DATE
0
12/10
Initial release
—
1
8/15
Removed military reference from Applications
1
DESCRIPTION
PAGES
CHANGED
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
20
© 2015
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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