19-2754; Rev 2; 11/05
KIT
ATION
EVALU
E
L
B
A
AVAIL
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
♦ Fully Monolithic Direct-Conversion Receivers
♦ Eliminate External IF SAW + IF AGC + I/Q Demod
♦ Meet all 3GPP Receiver’s Standard Requirements
with at Least 3dB Margin on Eb/No
♦ Operate from a +2.7V to +3.3V Single Supply
♦ Over 90dB of RF+ Baseband Gain-Control Range
♦ Channel Selectivity Over 40dB
♦ Receiver Current Consumption ≈ 32mA
♦ On-Chip DC Offset Cancellation
♦ Compatible with Various CMOS Logic Levels
SDATA
G_MXR
CS
VCC
I+
I-
25
24
23
22
SERIAL
INTERFACE
21 Q-
1
RF+
2
20 Q+
RF-
3
19 AGC
BIAS
4
18 SHDN
VCC
5
TANK
11
12
13
14
VCC
LNA
8
9
10
16 REFIN
INTEGER-N
PLL
CP
7
/2
TUNE
6
17 LD
MAX2390–MAX2393/
MAX2401
VCC
LNA_OUT
TD-SCDMA Handsets
W-CDMA TDD Handsets
W-CDMA Band III (DCS)
Handsets
26
GND
IMT2000 Handsets
UMTS Handsets
W-CDMA Band II (PCS)
Handsets
27
VCC
G_LNA
Applications
28
LNA_IN
The MAX2390 family includes a 3-wire serial bus for configuring the different receiver modes. They also include a
SHDN pin for full device shutdown. The receivers are
fabricated using an advanced high-frequency SiGe
BiCMOS process. The ICs operate from a single +2.7V to
+3.3V supply and are housed in a small 28-pin leadless
QFN-EP and thin QFN-EP packages (5mm x 5mm).
SCLK
Pin Configurations/
Functional Diagrams
GND
The MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
(referred to as the “MAX2390 family”) fully integrated
direct-conversion receiver ICs are designed for W-CDMA
and TD-SCDMA applications.
The MAX2390 family of receiver ICs have over 90dB of
dynamic gain control, and typical noise figure of 2.7dB
referred to LNA input. Each receiver consists of an ultralow-current low-noise amplifier (LNA) with on-chip output
matching and a two-step gain control. The zero-IF
demodulator has a differential circuit topology for minimum LO leakage to receiver’s input. The channel selectivity is done completely in the baseband section of the
receiver with an on-chip lowpass filter. The AGC section
has over 50dB of gain-control range. LO quadrature
generation is done on-chip through a divide-by-2
prescaler. The DC offset cancellation in the I/Q baseband
channels is done fully on-chip using a DC servo loop. To
quickly correct for large DC offset transients in minimal
time, very fast settling time is obtained by optimization of
the DC-offset-cancellation circuit’s time constant.
Features
15 VCC
Pin Configurations continued at end of data sheet.
Ordering Information/Selector Guide
TEMP RANGE
PIN-PACKAGE
APPLICATION
MAX2390ETI
PART
-40°C to +85°C
28 Thin QFN-EP*
W-CDMA Band II
3.84
1930 to 1990
On-Chip
MAX2391ETI
-40°C to +85°C
28 Thin QFN-EP*
IMT2000/UMTS
3.84
2110 to 2170
On-Chip
MAX2391ETI+
-40°C to +85°C
28 Thin QFN-EP*
IMT2000/UMTS
3.84
2110 to 2170
On-Chip
MAX2392ETI
-40°C to +85°C
28 Thin QFN-EP*
TD-SCDMA
1.28
2010 to 2025
On-Chip
MAX2392ETI+
-40°C to +85°C
28 Thin QFN-EP*
TD-SCDMA
1.28
2010 to 2025
On-Chip
MAX2393EGI
-40°C to +85°C
28 QFN-EP*
W-TDD/TD-SCDMA
3.84 or 1.28
1900 to 1920
On-Chip
MAX2396EGI
-40°C to +85°C
28 QFN-EP*
3.84
2110 to 2170
External
MAX2400ETI
-40°C to +85°C
28 Thin QFN-EP*
IMT2000/UMTS
W-CDMA Band II
3.84
1930 to 1990
External
3.84
1805 to 1880
On-Chip
2.84
1805 to 1880
On-Chip
MAX2401ETI
-40°C to +85°C
28 Thin QFN-EP*
W-CDMA Band III
MAX2401ETI+
-40°C to +85°C
28 Thin QFN-EP*
W-CDMA Band III
CHIP RATE (Mcps) RF BAND (MHz) SYNTHESIZER
*EP = Exposed paddle. + Denotes lead-free package.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
General Description
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +3.6V
All Other Pins to GND.................................-0.3V to (VCC + 0.3V)
LNA_IN ...........................................................................+15dBm
Digital Input Current .........................................................±10mA
Digital Output Open-Collector Current .................................1mA
Continuous Power Dissipation (TA = +70°C)
28-Pin QFN (derate 20.8mW/°C above +70°C) ......1666.7mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
CAUTION! ESD SENSITIVE DEVICE
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = 2.7V to 3.3V, VSHDN = VDH (Note 1), G_LNA = G_MXR = VIH, HGML mode (see Table 6), no RF input signals, RF input and
output ports are terminated into 50Ω, baseband I and Q outputs loaded with 10kΩ || 5pF, VAGC = 2.2V, TA = -40°C to +85°C. Typical
values are for VCC = 2.8V, TA = +25°C, unless otherwise noted.)
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
VCC
MAX2391, MAX2392,
MAX2393, MAX2400
MIN
TYP
MAX
UNITS
2.7
V
2.8
3.3
HGML mode
33
39
HGHL mode
34
40
LG mode
IDLE mode
HGML mode
Operating Supply Current
ICC
MAX2396
All versions
Common-Mode Output Voltage
at I and Q Outputs
IAGC
VCM
35
13
31
38
27
34
10.5
12
HGML mode
35
42
HGHL mode
36
43
LG mode
31
37
IDLE mode
12
14
SHDN mode
0.5
IDLE mode
MAX2390, MAX2401
Gain-Control Input Bias Current
LG mode
29
11.5
0.3V ≤ VAGC ≤ 2.4V
-10
VAGC ≤ 0.3V; V SHDN = VDL
VI(CM) = (VI+ + VI-) / 2,
VQ(CM) = (VQ+ + VQ-) / 2
15
+10
3
(VCM = 0 in
OPCTRL register)
1.10
1.20
1.30
(VCM = 1 in
OPCTRL register)
1.30
1.42
1.55
mA
µA
µA
V
Lock Indicator High Leakage
Current
PLL locked, VLD = VCC
(MAX2390–MAX2393, MAX2401)
0.1
µA
Lock Indicator Low Sink
Voltage
Sinking 100µA, PLL unlocked
(MAX2390–MAX2393, MAX2401)
0.4
V
SHDN Input-Logic High
VDH
SHDN Input-Logic Low
VDL
SHDN Input Resistance
2
MAX2390–MAX2393, MAX2401
MAX2396/MAX2400
1.5
VCC - 0.5
0
Resistance to GND
50
_______________________________________________________________________________________
VCC
VCC
0.5
V
V
kΩ
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
(VCC = 2.7V to 3.3V, VSHDN = VDH (Note 1), G_LNA = G_MXR = VIH, HGML mode (see Table 6), no RF input signals, RF input and
output ports are terminated into 50Ω, baseband I and Q outputs loaded with 10kΩ || 5pF, VAGC = 2.2V, TA = -40°C to +85°C. Typical
values are for VCC = 2.8V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
IDLE Input-Logic High
VIH
IDLE Input-Logic Low
VIL
IDLE Input Resistance
Digital Input-Logic High
CONDITIONS
0
VIL
IIH
Input-Logic Low Current
IIL
CS, SDATA, SCLK, G_MXR, G_LNA (Note 1)
MAX
UNITS
VCC
V
0.5
50
V
kΩ
0.7 × VDH or
1.2V, whichever
is greater
VIH
Input-Logic High Current
TYP
VCC - 0.5
MAX2396,
MAX2400 only
Resistance to GND
Digital Input-Logic Low
MIN
VCC
V
0.3 × VDH
0
1
-1
µA
µA
AC ELECTRICAL CHARACTERISTICS
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3VP-P differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); TA = -40°C to +85°C. Typical values are for VCC = 2.8V and TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MAX2391/MAX2396
2110
2140
2170
MAX2392
2010
2017
2025
MAX2393
1900
1910
1920
MAX2390/MAX2400
1930
1960
1990
MAX2401
1805
1842
1880
UNITS
LNA PERFORMANCE
RF Frequency Range (Note 2)
Signal Phase Change
fRF
∆φ
Switching between any of the LNA modes
8
MHz
Degrees
LNA HIGH GAIN (“HGLNA”, G_LNA = VIH)
Power Gain
GLNA
(Note 3)
Noise Figure
NFLNA
(Note 3)
13
16
18
dB
1.5
2.0
dB
Input -1dB Compression Point
IP-1dB
(Note 3)
-20
-16
MAX2391/MAX2396
-4.5
-2.5
3rd-Order Input Intercept Point
(Note 4)
IIP3LNA
MAX2392/MAX2393
-6
-4
MAX2390/MAX2400/MAX2401
-7
-4
dBm
dBm
Input Return Loss
dB[S11]
On EV kit, externally matched to 50Ω
-14
dB
Output Return Loss
dB[S22]
On EV kit, internally matched to 50Ω
-14
dB
Reverse Isolation
dB[S12]
On EV kit
-35
dB
Power Gain
GLNA
(Note 3)
Noise Figure
NFLNA
(Note 3)
Input -1dB Compression Point
IP-1dB
(Note 3)
LNA LOW GAIN (G_LNA = VIL)
-12
-6
-8.0
-5
dB
18
22
dB
-3
dBm
_______________________________________________________________________________________
3
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
DC ELECTRICAL CHARACTERISTICS (continued)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
AC ELECTRICAL CHARACTERISTICS (continued)
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3VP-P differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); TA = -40°C to +85°C. Typical values are for VCC = 2.8V and TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Return Loss
dB[S11]
On EV kit, externally matched to 50Ω
-11
dB
Output Return Loss
dB[S22]
On EV kit, internally matched to 50Ω
-11
dB
Reverse Isolation
dB[S12]
On EV kit
-30
dB
ZERO-IF DEMODULATOR PERFORMANCE (RF+/RF- TO BASEBAND I AND Q OUTPUTS)
Voltage Gain (Note 5)
AV
HGML mode, VAGC = 2.2V
80
86
MG or LG mode, VAGC = 2.2V
68
76
dB
Baseband Gain-Control Range
∆AV
VAGC = 0.3V to 2.4V (Note 3)
53
60
Baseband Gain-Control Slope
dAV/dV
VAGC = 0.3V to 2.4V (Note 3)
25
29
33
MAX2391/MAX2392/
MAX2393/MAX2396
10.5
14
MAX2390/MAX2400/
MAX2401
9.5
13
18.5
25
DSB Noise Figure (Notes 3, 6)
NF
HGML or HGHL
mode, VAGC ≥ 1.8V
MG or LG mode, VAGC ≥ 1.8V
HGML mode, VAGC = 2.2V (Note 7)
3rd-Order Input Intercept Point
IIP3
HGHL mode, VAGC = 2.2V (Note 3, 7)
-1dB Output Compression
Differential Voltage
OV-1dB
All modes
(Note 3)
I/Q Gain Imbalance
4
|∆GI/Q|
VAGC ≥ 1.3V
1.0
1.5
VAGC = 0.5V
0.6
1.0
(MAX2391/MAX2396)
190MHz offset; all modes, VAGC ≥ 0.5V
(Note 9)
+34
(MAX2390/MAX2400)
80MHz offset, all modes, VAGC ≥ 0.5V
(Note 9)
+33
(MAX2401)
95MHz offset, all modes, VAGC ≥ 0.5V
(Note 9)
+33
VAGC = 2.2V, HGML
mode (Note 10)
XLO
0
-23
LG mode, VAGC = 0.5V
LO Leakage
-3.5
-16
IP-1dB
IIP2
-1
MAX2390/MAX2400/MAX2401
HGML or HGHL mode (Note 8)
Input -1dB Compression Point
2nd-Order Input Intercept Point
-5
(MAX2390/MAX2391/
MAX2393/MAX2396/
MAX2400/MAX2401)
15MHz offset
+25
+33
(MAX2392)
4.8MHz offset
+25
+33
At LNA_IN, HGML mode, RX band (Note 3)
All modes, VAGC = 0.5V to 2.2V
dB
dB/V
dB
dBm
dBm
VP-P
dBm
-100
-95
dBm
0.2
1.5
dB
_______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3VP-P differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); TA = -40°C to +85°C. Typical values are for VCC = 2.8V and TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
I/Q Quadrature Phase Imbalance
|∆ΦI/Q|
Error Vector Magnitude (Note 11)
EVM
Differential DC Offset at I/Q
Baseband Output
∆DC
CONDITIONS
MIN
TYP
All modes, VAGC = 0.5V to 2.2V
MAX2391/MAX2392/MAX2393/MAX2396
15
MAX2390/MAX2400/MAX2401
17
Including DC servo loop; VAGC = 2.2V
MAX
UNITS
4
Degrees
%
±25
mV
BASEBAND CHANNEL RESPONSE (W-CDMA); MAX2391/MAX2393/MAX2396
-3dB Lowpass Corner Frequency
f-3dB
Filter Attenuation Relative to
180kHz
AdB
2.4
At 5MHz offset
51
58
At 10MHz offset
59
67
At 15MHz offset
64
75
∆AdB
100kHz to 1.92MHz (Note 3)
BASEBAND CHANNEL RESPONSE (W-CDMA); MAX2390/MAX2400/MAX2401
Passband Gain Flatness
-3dB Lowpass Corner Frequency
f-3dB
MAX2390/MAX2400
2.1
MAX2401
2.2
At 2.7MHz offset, MAX2390/MAX2400
36
56
50
56
At 5MHz offset
57
65
At 15MHz offset
65
At 2.8MHz offset, MAX2401
Filter Attenuation Relative to
180kHz
Passband Gain Flatness
AdB
∆AdB
1.2
At 3.5MHz offset, MAX2390/MAX2400
At 3.6MHz offset, MAX2401
100kHz to 1.92MHz (Note 3)
MHz
dB
1.7
dB
MHz
dB
75
1.9
2.5
dB
BASEBAND CHANNEL RESPONSE (TD-SCDMA); MAX2392/MAX2393
-3dB Lowpass Corner Frequency
Filter Attenuation Relative to
180kHz
Passband Gain Flatness
f-3dB
AdB
∆AdB
0.75
At 1.6MHz offset
51
57
At 3.2MHz offset
56
65
At 6.4MHz offset
64
76
50kHz to 0.64MHz (Note 3)
1.2
MHz
dB
1.7
dB
_______________________________________________________________________________________
5
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
AC ELECTRICAL CHARACTERISTICS (continued)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
AC ELECTRICAL CHARACTERISTICS (continued)
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3VP-P differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); TA = -40°C to +85°C. Typical values are for VCC = 2.8V and TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ON-CHIP VCO
VCO Frequency
(VCO Range is 2x the LO Range)
fOSC
ΦN
Phase Noise
MAX2391/MAX2396
4220
4340
MAX2392
4020
4050
MAX2393
3800
3840
MAX2390/MAX2400
3860
3980
MAX2401
3610
At 10MHz offset; locked (Note 3)
Pulling
From IDLE mode to ON mode (Note 3)
Pushing
VCC stepped 3.3V to 2.7V (Note 3)
MHz
3760
-139
-133
dBc/Hz
1
MHzP-P
13
MHz/V
0.5
VCO INTERFACE TO EXTERNAL SYNTHESIZER (MAX2396/MAX2400)
Referred to the VCO
frequency (2x RFLO)
MAX2396
130
300
MAX2400
100
270
VCO Output Frequency
Output to synthesizer is
fVCO / 3 = 2fRFLO / 3
MAX2396
1406.67 1426.67 1446.67
MAX2400
1286.67 1306.67 1326.67
VCO Output Differential Voltage
(Note 12)
VCO Tuning Gain
VCO Tuning Voltage Range
KVCO
VTUNE
180
MHz/V
MHz
mVP-P
0.4
2.3
V
INTEGER-N RF SYNTHESIZER (MAX2390–MAX2393, MAX2401)
15-bit register (64/65 dual-modulus prescaler),
fCOMP = 200kHz
Main PLL Integer Division Ratio
Reference Frequency Range
fREF
REFDIV Reference-Divider Ratio
Charge-Pump Output Current
(Sink or Source)
Charge-Pump Leakage Current
ICP
4032
10700
32767
10
19.2
40
9-bit register
16
96
511
CONFIG:CP1 = 1, CONFIG:CP0 = 1,
VCPOUT = VCC / 2
2.0
2.5
3.0
mA
10
nA
60
µs
IL_CP
MHz
SYSTEM TIMING
tON
From IDLE mode to ON mode VGA set to
maximum gain with -40dBm signal at
demodulator input (Note 3)
tCS
Per timing diagram
20
ns
Data to Clock Hold Time
tCH
Per timing diagram
10
ns
Clock Pulse-Width High
tCWH
Per timing diagram
20
ns
Clock Pulse-Width Low
tCWL
Per timing diagram
20
ns
tES
Per timing diagram
20
Turn-On Time Including
DC Offset Cancellation
30
3-WIRE SERIAL INTERFACE TIMING
Data to Clock Setup
Clock to Load Enable/Setup Time
Clock Frequency
Note 1: Logic thresholds track VSHDN. This allows the digital interface to operate with logic levels from 1.2V to VCC.
Note 2: All min and max specifications are measured over this frequency range.
Note 3: Guaranteed by design and characterization.
6
_______________________________________________________________________________________
ns
20
MHz
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
(Devices tested on their respective evaluation kits (EV kits); LNA input port is driven with a 50Ω source; LNA output port is terminated
with 50Ω load, mixer differential input port is driven through a 1:4 impedance balun with a 50Ω source; baseband I/Q output differential
load = 10kΩ || 5pF; reference oscillator input: 19.2MHz (MAX2390/MAX2391/MAX2392/MAX2393), 26MHz (MAX2401), 15.36MHz
(MAX2396/MAX2400); AGC is set to result in a 0.3VP-P differential output-voltage swing at the baseband I/Q output; registers set to
power-up defaults (Table 2); TA = -40°C to +85°C. Typical values are for VCC = 2.8V and TA = +25°C, unless otherwise noted.)
Note 4: MAX2391/MAX2396: tones at 2025.0MHz and 1930.0MHz (-28dBm/tone); receiver tuned for input RF of 2120.0MHz.
MAX2392: tones at 2020.6MHz and 2023.8MHz (-35dBm/tone); receiver tuned for input RF of 2017.4MHz.
MAX2393: tones at 1910.0MHz and 1920.0MHz (-35dBm/tone); receiver tuned for input RF of 1900.0MHz.
MAX2390/MAX2400: tones at 1963.5MHz and 1965.9MHz (-35dBm/tone); receiver tuned for input RF of 1960.0MHz.
MAX2401: tones at 1846MHz and 1848.4MHz (-35dBm/tone); receiver tuned for input RF of 1842.4MHz.
Note 5: Voltage gain defined as the differential baseband RMS I or Q output voltage, measured across the 10kΩ load, divided by
the RMS differential input voltage at RF+/RF-.
Note 6: NF is constant or flattens out for AGC voltage ≥1.75V.
Note 7: MAX2391/MAX2396: tones at 2150.0MHz and 2160.18MHz (-35dBm/tone); receiver tuned for input RF of 2140MHz.
MAX2392: tones at 2020.6MHz and 2023.98MHz (-35dBm/tone); receiver tuned for input RF of 2017.4MHz.
MAX2393: tones at 1910.0MHz and 1919.82MHz (-35dBm/tone); receiver tuned for input RF of 1900.0MHz.
MAX2390/MAX2400: tones at 1970.0MHz and 1980.18MHz (-35dBm/tone); receiver tuned for input RF of 1960.0MHz.
MAX2401: tones at 1852.4MHz and 1862.58MHz (-35dBm/tone); receiver tuned for input RF of 1842.4MHz.
Measure IM3 product at 180kHz.
Note 8: MAX2390/MAX2400: tones at 1963.5MHz and 1965.9MHz (-35dBm/tone); receiver tuned for input RF of 1960.0MHz, IM3 at
1.1MHz baseband.
MAX2401: tones at 1846MHz and 1848.4MHz (-35dBm/tone); receiver tuned for input RF of 1842.4MHz. IM3 at 1.2 MHz
baseband.
Note 9: MAX2391/MAX2396: tones at 1950.0MHz and 1950.18MHz (-35dBm/tone); receiver tuned for input RF of 2140MHz.
MAX2390/MAX2400: tones at 1880.0MHz and 1880.18MHz (-35dBm/tone); receiver tuned for input RF of 1960.0MHz.
MAX2401: tones at 1747.4MHz and 1747.58MHz (-35dBm/tone); receive tuned for input RF of 1842.4MHz.
Measure IM2 product at 180kHz.
Note 10: MAX2391/MAX2396: tones at 2155.0MHz and 2155.18MHz (-35dBm/tone); receiver tuned for input RF of 2140MHz.
MAX2392: tones at 2022.2MHz and 2022.38MHz (-35dBm/tone); receiver tuned for input RF of 2017.4MHz.
MAX2393: tones at 1915.0MHz and 1915.18MHz (-35dBm/tone); receiver tuned for input RF of 1900.0MHz.
MAX2390/MAX2400: tones at 1975.0MHz and 1975.18MHz (-35dBm/tone); receiver tuned for input RF of 1960.0MHz.
MAX2401: tones at 1857.4MHz and 1857.58MHz (-35dBm/tone); receiver tuned for input RF of 1842.4MHz.
Measure IM2 product at 180kHz.
Note 11: The receiver is tested using the DL reference measurement channel (12.2kbps) as specified in subclause C.3.1 in the
3GPP 25.101 standard document.
Note 12: I/Q differential output load impedance is 5kΩ minimum (10kΩ typical) in parallel with 5pF.
Timing Diagram
3-WIRE SERIAL INTERFACE TIMING
SDATA
BIT 1
BIT 2
BIT 15
BIT 16
BIT 23
BIT 24
SCLK
tCWH
tCWL
CS
tCS
tCH
tES
NOTE: DATA SHIFTED ON RISING EDGE OF CLOCK DATA IS SHIFTED IN BIT 1 FIRST AS DEFINED IN THE PLL BIT REGISTER.
_______________________________________________________________________________________
7
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
AC ELECTRICAL CHARACTERISTICS (continued)
MAX2390 Typical Operating Characteristics
(MAX2390 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1960MHz, TA = +25°C, unless otherwise noted.)
LNA |S11| AND |S22|
vs. FREQUENCY
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
35.0
30.0
ICC (mA)
TA = -40°C
25.0
TA = +85°C
TA = +25°C
20.0
25.0
TA = -40°C
TA = +25°C
TA = +85°C
20.0
15.0
15.0
10.0
10.0
5.0
-5.0
|S11|, |S22| (dB)
30.0
0
2.8
2.9
3.0
3.1
3.2
3.3
|S11|, HG
-20.0
2.7
2.8
VCC (V)
2.9
3.0
3.1
3.3
3.2
1930
-26
8.0
-28
6.0
-30
4.0
5.0
-34
0
|S12|, HG
-5.0
|S21|, LG
-10.0
1950
1960
1970
1980
IIP3 (dBm)
-32
|S12|, LG
|S12| (dB)
|S21| (dB)
10.0
-36
-2.0
-38
-4.0
-40
-6.0
1990
2.7
15
3.5
NF, +85°C
NF, +25°C
1.5
NF, -45°C
1960
1970
FREQUENCY (MHz)
8
2.0
1980
1.0
1990
fOSC (MHz)
2.5
13
NF (dB)
GAIN (dB)
3.0
GAIN, +85°C
1950
2.9
3.0
3.1
3.2
3.3
MAX2390 toc07
4100
GAIN, +25°C
10
2.8
VCO fOSC AND kVCO vs. VTUNE
4.0
GAIN, -40°C
11
HG
VCC (V)
MAX2390 toc06
12
TA = +25°C
TA = -40°C
0
LNA GAIN AND NF
vs. FREQUENCY HG MODE
16
1980
TA = +85°C
2.0
FREQUENCY (MHz)
1940
1970
LG
|S21|, HG
1930
1960
FREQUENCY (MHz)
MAX2390 toc05
15.0
14
1950
LNA IN-BAND IIP3
vs. SUPPLY VOLTAGE
MAX2390 toc04
20.0
1940
1940
VCC (V)
LNA |S21| AND |S12|
vs. FREQUENCY
1930
|S22|, HG
IDLE
0
2.7
|S11|, LG
-10.0
-15.0
5.0
IDLE
|S22|, LG
300
4050
275
4000
250
3950
225
3900
200
3850
175
3800
150
3750
125
3700
100
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VTUNE (V)
_______________________________________________________________________________________
kVCO (MHz/V)
35.0
0
MAX2390 toc02
40.0
MAX2390 toc01
40.0
MAX2390 toc03
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
ICC (mA)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
1990
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
PLL SETTLING TIME 60MHz STEP
8
6
-80
-90
-100
-110
-6
203µs
2
0
-120
-8
-10
-2
-12
-4
-14
-6
-16
-130
-8
-18
-140
-10
-20
10
100
1000
0
100
fOFFSET (kHz)
DEMODULATOR GAIN AND NF vs. VAGC
MAX2390 toc11
100
TA = +85°C
14
50
12
40
10
30
700
MAX2390 toc12a
TA = -40°C
7
5
60
4
50
3
0
0
20
0
VAGC (V)
VAGC (V)
BASEBAND CHANNEL
GROUP DELAY vs. FREQUENCY
BASEBAND CHANNEL
RESPONSE vs. FREQUENCY
1200
MAX2390 toc13
1100
1000
-20
GROUP DELAY (ns)
RESPONSE, RELATIVE TO 300MHz (dB)
1990
1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
-10
1980
2
CALCULATED
1.4dB LOSS AT POST-LNA FILTER
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
0
1970
8
TA = +85°C
6
30
1960
EVM = 16.5% RMS
9
TA = +25°C
70
6
1950
10
80
10
1940
COMPOSITE EVM
W-CDMA: PCCPCH + SCH
40
10
1930
CASCADED GAIN AND NF vs. VAGC
90
8
20
600
FREQUENCY (MHz)
100
16
60
500
MAX2390 toc14
70
VOLTAGE GAIN (dB)
80
400
HGML
TIME (µs)
110
18
TA = +25°C
300
120
20
TA = -40°C
NOISE FIGURE (dB)
90
200
LG
NOISE FIGURE (dB)
1
VOLTAGE GAIN (dB)
-4
4
|S11| (dB)
-70
-2
MAX2390 toc12b
FREQUENCY OFFSET (kHz)
PHASE NOISE (dBc/Hz)
-60
DEMODULATOR |S11| vs. FREQUENCY
0
MAX2390 toc09
fOSC = 1960MHz, ICP = 2.5mA
-50
10
MAX2390 toc08
-40
MAX2390 toc10
SYNTHESIZER CLOSED-LOOP
PHASE NOISE
-30
-40
-50
-60
900
800
700
600
-70
500
-80
-90
0.001
400
0.01
0.1
1
fOFFSET (MHz)
10
100
0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3
fOFFSET (MHz)
_______________________________________________________________________________________
9
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
MAX2390 Typical Operating Characteristics (continued)
(MAX2390 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1960MHz, TA = +25°C, unless otherwise noted.)
MAX2391 Typical Operating Characteristics
(MAX2391 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 2140MHz, TA = +25°C, unless otherwise noted.)
35
35
-5
30
20
TA = -40°C
TA = +25°C
ICC (mA)
25
TA = +85°C
15
25
20
15
10
|S11|, |S22| (dB)
30
LNA |S11| AND |S22| vs. FREQUENCY
0
MAX2391 toc16
40
MAX2391 toc15
40
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
TA = -40°C
TA = +25°C
TA = +85°C
MAX2391 toc17
SUPPLY CURRENT vs. SUPPLY VOLTAGE
HGML MODE
ICC (mA)
|S11|, HG
|S11|, LG
-10
-15
10
-20
IDLE
5
0
2.8
2.9
3.0
3.1
3.2
-25
2.7
3.3
2.8
VCC (V)
2.9
3.0
3.1
3.2
3.3
2120
|S21|, HG
10
2140
2150
2160
FREQUENCY (MHz)
-26
10
-28
8
-30
6
-32
-34
|S12|, HG
-5
|S12| (dB)
5
IIP3 (dBm)
LG
|S12|, LG
0
2130
LNA IN-BAND IIP3 vs. SUPPLY VOLTAGE
MAX2391 toc18
15
|S21| (dB)
2110
VCC (V)
LNA |S21| AND |S12| vs. FREQUENCY
20
LG
|S11
22|, HG
MAX2391 toc19
2.7
|S22|, HG
IDLE
5
0
4
TA = -40°C
2
-36
0
-38
-2
-40
2170
-4
-10
TA = +25°C TA = +85°C
HG
|S21|, LG
-15
2120
2130
2140
2150
2160
2.7
FREQUENCY (MHz)
LNA GAIN (HG MODE) AND NF vs. FREQUENCY
275
4250
250
4200
225
4150
200
4100
175
4050
150
4000
125
2.0
1.5
12
1.0
11
0.5
TA = +85°C
2150
FREQUENCY (MHz)
10
300
4300
14
10
2160
MAX2391 toc21
325
2.5
13
VCO fOSC vs. VTUNE
4350
15
2140
3.3
3.5
3.0
2130
3.2
4400
16
2120
3.1
4450
0
2170
fOSC (MHz)
17
2110
3.0
4.0
NF (dB)
MAX2391 toc20
TA = +25°C
2.9
VCC (V)
18
TA = -40°C
2.8
3950
350
100
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VTUNE (V)
______________________________________________________________________________________
kVCO (MHz/V)
2110
GAIN (dB)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
2170
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
PLL SETTLING TIME 60MHz STEP
8
6
FREQUENCY OFFSET (kHz)
-70
-80
-90
-100
-2
-4
-6
4
203µs
2
0
-8
-10
-2
-12
-4
-14
-6
-16
-130
-8
-18
-140
-10
-110
-120
1
10
100
HG
-20
0
100
200
300
400
500
600
700
2110
2120
2130
2140
2150
2160
fOFFSET (kHz)
TIME (µs)
FREQUENCY (MHz)
DEMODULATOR GAIN (HGML MODE)
AND NF vs. VAGC
CASCADED GAIN (HGML MODE)
AND NF vs. VAGC
COMPOSITE EVM
W-CDMA: PCCPCH + SCH
TA = -40°C
TA = -40°C
20
110
18
100
70
16
60
14
50
12
40
10
30
8
VOLTAGE GAIN (dB)
TA = +85°C
NOISE FIGURE (dB)
TA = +25°C
80
90
5
80
4
70
3
2
= CALCULATED
WITH 2dB LOSS AT
POST-LNA FILTER
1
0
40
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VAGC (V)
VAGC (V)
BASEBAND CHANNEL
GROUP DELAY vs. FREQUENCY
BASEBAND CHANNEL
FREQUENCY RESPONSE
800
MAX2391 toc28
+10
0
750
700
GROUP DELAY (ns)
-10
-20
LOSS (dB)
EVM = 15% RMS
6
TA = +85°C
50
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
-30
-40
-50
650
600
550
500
-60
450
-70
400
-80
350
-90
0.003 0.01
8
7
TA = +25°C
60
6
20
MAX2391 toc26
120
MAX2391 toc29
90
22
2170
MAX2391 toc27
MAX2391 toc25
100
VOLTAGE GAIN (dB)
1000
LG
NOISE FIGURE (dB)
PHASE NOISE (dBc/Hz)
-60
|S11| (dB)
-50
0
MAX2391 toc23
fOSC = 2140MHz, ICP = 2.5mA
DEMODULATOR |S11| vs. FREQUENCY
10
MAX2391 toc22
-40
MAX2391 toc24
SYNTHESIZER CLOSED-LOOP
PHASE NOISE
300
1
0.1
FREQUENCY (MHz)
10
30
0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3
fOFFSET (MHz)
______________________________________________________________________________________
11
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
MAX2391 Typical Operating Characteristics (continued)
(MAX2391 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 2140MHz, TA = +25°C, unless otherwise noted.)
MAX2392 Typical Operating Characteristics
(MAX2392 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 2017MHz, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
HGML MODE
40
35
30
25
25
TA = +25°C
TA = -40°C
15
ICC (mA)
30
20
TA = +85°C
MAX2392 toc31
35
20
15
10
TA = -40°C
IDLE
5
0
0
2.8
2.9
3.0
3.1
3.2
2.7
3.3
2.8
VCC (V)
LNA |S11| AND |S22| vs. FREQUENCY
-4
-12
MAX2392 toc33
-28
10
-30
5
|S12|, LG
0
|S22|, HG
-5
|S11|, LG
-10
|S12|, HG
|S21|, LG
-38
FREQUENCY (MHz)
LNA GAIN (HG MODE) AND NF
vs. FREQUENCY
LNA IN-BAND IIP3 vs. SUPPLY VOLTAGE
LG
GAIN (dB)
6
4
TA = +25°C TA = +85°C
HG
-2
MAX2392 toc35
18
MAX2392 toc34
10
3.5
16
3.0
15
2.5
14
2.0
13
1.5
12
1.0
0.5
TA = -40°C
-4
2.8
2.9
3.0
VCC (V)
3.1
3.2
3.3
4.0
17
11
2.7
-34
-36
FREQUENCY (MHz)
0
-32
-15
-40
2010.0 2012.5 2015.0 2017.5 2020.0 2022.5 2025.0
-20
2010.0 2012.5 2015.0 2017.5 2020.0 2022.5 2025.0
TA = -40°C
-26
15
-16
2
3.3
|S21|, HG
|S21| (dB)
|S11|, |S22| (dB)
|S22|, LG
-10
8
3.2
LNA |S21| AND |S12| vs. FREQUENCY
-6
-18
3.1
20
MAX2392 toc32
-2
|S11|, HG
3.0
VCC (V)
0
-8
2.9
|S12| (dB)
2.7
12
TA = +85°C
10
IDLE
5
-14
TA = +25°C
TA = +25°C
TA = +85°C
10
0
2010.0 2012.5 2015.0 2017.5 2020.0 2022.5 2025.0
FREQUENCY (MHz)
______________________________________________________________________________________
NF (dB)
ICC (mA)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
MAX2392 toc30
40
IIP3 (dBm)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
SYNTHESIZER CLOSED-LOOP
PHASE NOISE
-50
fOSC = 2017.5MHz, ICP = 2.5mA
200
3950
175
3900
150
3850
125
3800
3750
75
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
-90
-100
-110
1
100
1000
VOLTAGE GAIN (dB)
-18
-20
2010.0 2012.5 2015.0 2017.5 2020.0 2022.5 2025.0
22
TA = -40°C
100
200
300
400
500
600
700
MAX2392 toc41
120
20
110
18
100
TA = +85°C
70
16
60
14
50
12
40
10
30
8
50
20
6
40
TA = -40°C
6
TA = +85°C
90
5
80
4
70
3
60
2
= CALCULATED
1
WITH 2dB LOSS AT
POST-LNA FILTER
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VAGC (V)
VAGC (V)
BASEBAND CHANNEL
FREQUENCY RESPONSE
8
7
TA = +25°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
FREQUENCY (MHz)
BASEBAND CHANNEL GROUP DELAY
vs. FREQUENCY
2400
MAX2392 toc42
+10
0
-10
2200
GROUP DELAY (ns)
-20
LOSS (dB)
0
CASCADED GAIN (HGML MODE)
AND NF vs. VAGC
TA = +25°C
LG
130µs
TIME (µs)
MAX2392 toc40
90
-14
-16
10
100
MAX2392 toc39
HGML
-4
-8
80
-10
0
-2
-10
DEMODULATOR GAIN (HGML MODE)
AND NF vs. VAGC
-8
+2
-130
DEMODULATOR |S11| vs. FREQUENCY
-6
+4
-140
fOFFSET (kHz)
-4
+6
-6
VTUNE (V)
-2
|S11| (dB)
-80
-120
100
0
-12
-70
-30
-40
-50
-60
MAX2392 toc43
4000
+8
FREQUENCY OFFSET (kHz)
225
kVCO (MHz/V)
4050
PHASE NOISE (dBc/Hz)
fOSC (MHz)
-60
2000
1800
1600
1400
-70
1200
-80
-90
0.003 0.01
0.1
FREQUENCY (MHz)
1
3
1000
0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70
fOFFSET (MHz)
______________________________________________________________________________________
13
NOISE FIGURE (dB)
250
PLL SETTLING TIME 15MHz STEP
+10
MAX2392 toc38
-40
VOLTAGE GAIN (dB)
4100
275
NOISE FIGURE (dB)
MAX2392 toc36
4150
MAX2392 toc37
VCO fOSC AND kVCO vs. VTUNE
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
MAX2392 Typical Operating Characteristics (continued)
(MAX2392 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 2017MHz, TA = +25°C, unless otherwise noted.)
MAX2393 Typical Operating Characteristics
(MAX2393 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1910MHz, TA = +25°C, unless otherwise noted.)
35
30
25
25
ICC (mA)
30
20
15
TA = +85°C
TA = +25°C
TA = -40°C
20
TA = -40°C
TA = +25°C
TA = +85°C
15
10
|S11|, HG
-5
|S11|, |S22| (dB)
35
LNA |S11| AND |S22| vs. FREQUENCY
0
MAX2393 toc45
40
MAX2393 toc44
40
SUPPLY CURRENT vs. SUPPLY VOLTAGE
HGML MODE
MAX2393 toc46
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
|S22|, LG
-10
-15
|S22|, HG
10
IDLE
5
0
-20
IDLE
5
0
2.7
2.8
2.9
3.0
3.1
3.2
-25
2.7
3.3
2.8
VCC (V)
2.9
3.0
3.1
3.2
3.3
LNA |S21| AND |S12| vs. FREQUENCY
10
-28
8
-30
6
|S12|, LG
-32
5
-34
|S21|, LG
IIP3 (dBm)
|S21|, HG
10
|S21| (dB)
1905
1910
1915
FREQUENCY (MHz)
LNA IN-BAND IIP3 vs. SUPPLY VOLTAGE
-26
|S12| (dB)
MAX2393 toc47
0
1900
VCC (V)
20
15
|S11|, LG
MAX2393 toc48
ICC (mA)
LG
4
TA = -40°C
2
-5
-36
0
-10
-38
-2
-40
1920
-4
TA = +25°C
TA = +85°C
HG
|S12|, HG
1905
1910
1915
2.7
FREQUENCY (MHz)
2.9
3.0
3.1
3.2
3.3
VCC (V)
LNA GAIN (HG MODE)
AND NF vs. FREQUENCY
MAX2393 toc49
VCO fOSC AND kVCO vs. VTUNE
MAX2393 toc50
17
3.5
3900
250
16
3.0
3850
225
15
2.5
3800
200
14
2.0
3750
175
13
1.5
3700
150
12
1.0
3650
125
0.5
3600
100
11
TA = -40°C
TA = +25°C
1905
1910
FREQUENCY (MHz)
275
TA = +85°C
10
1900
fOSC (MHz)
3950
NF (dB)
4.0
18
14
2.8
1915
0
1920
3550
75
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VTUNE (V)
______________________________________________________________________________________
kVCO (MHz/V)
-15
1900
GAIN (dB)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
1920
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
SYNTHESIZER CLOSED-LOOP
PHASE NOISE
PLL SETTLING TIME 20MHz STEP
-90
-100
-110
-120
2
117µs
0
-2
-130
-8
-10
100
1000
400
500
600
700
1900
1905
100
70
16
60
14
50
12
10
60
30
8
50
6
40
20
MAX2393 toc55
8
TA = -40°C
6
TA = +85°C
5
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
4
X
X
X
X
X
X = CALCULATED WITH
2dB LOSS AT POST-LNA FILTER
EVM = 15% RMS
7
TA = +25°C
80
40
1920
COMPOSITE EVM
W-CDMA: PCCPCH + SCH
90
70
1910
1915
FREQUENCY (MHz)
3
NOISE FIGURE (dB)
18
VOLTAGE GAIN (dB)
110
NOISE FIGURE (dB)
TA = +25°C
20
TA = +85°C
2
X
1
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VAGC (V)
VAGC (V)
BASEBAND CHANNEL
FREQUENCY RESPONSE
BASEBAND CHANNEL GROUP DELAY
vs. FREQUENCY 3.84Mcps
-10
700
GROUP DELAY (ns)
-20
3.84Mcps
-40
-50
-60
600
500
400
-70
2400
2200
GROUP DELAY (ns)
0
BASEBAND CHANNEL GROUP DELAY
vs. FREQUENCY 1.28Mcps
MAX2393 toc59
800
MAX2393 toc57
+10
1.28Mcps
300
120
22
TA = -40°C
-30
200
CASCADED GAIN (HGML MODE)
AND NF vs. VAGC
MAX2393 toc54
80
100
TIME (µs)
DEMODULATOR GAIN (HGML MODE)
AND NF vs. VAGC
90
LG
-25
0
fOFFSET (kHz)
100
HG
-15
-20
MAX2393 toc58
10
-10
-4
-6
1
MAX2393 toc53
4
-140
VOLTAGE GAIN (dB)
-5
MAX2393 toc56
-80
6
|S11| (dB)
FREQUENCY OFFSET (kHz)
8
-70
LOSS (dB)
PHASE NOISE (dBc/Hz)
-60
0
MAX2393 toc52
fOSC = 1910MHz, ICP = 2.5mA
-50
DEMODULATOR |S11| vs. FREQUENCY
10
MAX2393 toc51
-40
2000
1800
1600
1400
-80
-90
0.003 0.01
300
1
0.1
FREQUENCY (MHz)
10
30
1200
0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3
fOFFSET (MHz)
0.3
0.4
0.5
0.6
0.7
0.8
fOFFSET (MHz)
______________________________________________________________________________________
15
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
MAX2393 Typical Operating Characteristics (continued)
(MAX2393 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1910MHz, TA = +25°C, unless otherwise noted.)
MAX2396 Typical Operating Characteristics
(MAX2396 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 2140MHz, TA = +25°C, unless otherwise noted.)
35
25
25
TA = -40°C
TA = +25°C
TA = +85°C
LG
20
TA = -40°C
15
15
10
10
5
6
TA = +25°C
0
3.2
3.3
-4
2.7
2.8
2.9
LNA GAIN AND NF (HG MODE) vs. FREQUENCY
15
2.5
14
2.0
13
1.5
1.0
11
0.5
TA = +25°C
TA = +85°C
10
2150
2160
0
2170
100
325
4350
300
4300
275
4250
4200
TA = -40°C
TA = +85°C
80
4
70
3
60
2
20
TA = +25°C
18
TA = +85°C
60
14
50
12
40
10
8
150
4000
125
30
100
20
6
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VAGC (V)
FREQUENCY RESPONSE
+10
0
-10
-20
-30
-40
-50
-60
-70
1
= CALCULATED
0
40
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VAGC (V)
22
16
4050
6
5
WITH 2dB LOSS AT
POST-LNA FILTER
225
3950
7
3.3
70
175
COMPOSITE EVM
W-CDMA: PCCPCH + SCH
TA = +25°C
3.2
MAX2396 toc65
80
200
EVM = 15% RMS
3.1
TA = -40°C
90
4100
8
3.0
100
4150
CASCADED GAIN AND NF vs. VAGC
MAX2396 toc66
250
TA = +25°C TA = +85°C
VCC (V)
90
50
2.9
DEMODULATOR GAIN AND NF vs. VAGC
350
4400
FREQUENCY (MHz)
TA = -40°C
110
2.8
VCC (V)
LOSS (dB)
12
fOSC (MHz)
3.0
NF (dB)
16
120
2.7
MAX2396 toc64
4450
3.5
2140
3.3
VCO fOSC AND kVCO vs.VTUNE
4.0
NOISE FIGURE (dB)
GAIN (dB)
17
2130
3.2
kVCO (MHz/V)
MAX2396 toc63
2120
3.1
VCC (V)
18
2110
3.0
-80
-90
0.003 0.01
1
0.1
FREQUENCY (MHz)
______________________________________________________________________________________
10
30
NOISE FIGURE (dB)
3.1
VOLTAGE GAIN (dB)
3.0
MAX2396 toc67
2.9
VCC (V)
TA = -40°C
HG
IDLE
0
2.8
TA = +25°C TA = +85°C
-2
5
2.7
TA = -40°C
2
0
IDLE
16
TA = +85°C
4
MAX2396 toc68
20
8
IIP3 (dBm)
30
ICC (mA)
30
LNA IN-BAND IIP3 vs. SUPPLY VOLTAGE
10
MAX2396 toc61
35
ICC (mA)
40
MAX2396 toc60
40
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
MAX2396 toc62
SUPPLY CURRENT vs. SUPPLY VOLTAGE
HGHL MODE
VOLTAGE GAIN (dB)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
35
-5.0
25
TA = -40°C TA = +25°C TA = +85°C
20
15
25
TA = -40°C TA = +25°C TA = +85°C
20
15
10
|S11|, HG
3.0
3.1
3.3
3.2
2.7
2.8
2.9
LNA |S21| AND |S12|
vs. FREQUENCY
6.0
-30
4.0
-32
|S12|, LG
-34
IIP3 (dBm)
|S21|, LG
-10.0
1940
1950
1960
1970
1980
-38
-4.0
-40
-6.0
1990
15
TA = +85°C
14
3.5
2.5
13
NF, +85°C
2.9
3.0
3.1
3.2
3.3
1930
1940
1950
1960
1970
1980
1.0
1990
FREQUENCY (MHz)
DEMODULATOR |S11| vs. FREQUENCY
300
0
4050
275
-2
4000
250
3950
225
3900
200
3850
175
3800
150
3750
125
-18
3700
100
-20
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
1.5
NF, -45°C
10
2.8
2.0
NF, +25°C
11
VCO fOSC AND kVCO vs. VTUNE
VTUNE (V)
3.0
GAIN, +85°C
12
HG
MAX2400 toc75
4.0
GAIN, -40°C
VCC (V)
4100
1990
MAX2400 toc74
16
TA = +25°C
TA = -40°C
2.7
1980
GAIN, +25°C
FREQUENCY (MHz)
fOSC (MHz)
1930
-2.0
1970
MAX2400 toc76
-5.0
-36
1960
LNA GAIN AND NF
vs. FREQUENCY HG MODE
0
|S12|, HG
0
1950
LNA IN-BAND IIP3
vs. SUPPLY VOLTAGE
LG
2.0
1940
FREQUENCY (MHz)
-4
-6
kVCO (MHz/V)
|S21| (dB)
10.0
-28
|S12| (dB)
|S21|, HG
1930
3.3
3.2
8.0
-26
15.0
3.1
MAX2400 toc73
MAX2400 toc72
20.0
3.0
VCC (V)
VCC (V)
GAIN (dB)
2.9
|S11| (dB)
2.8
|S22|, HG
-20.0
0
2.7
|S11|, LG
-10.0
IDLE
5
0
|S22|, LG
-15.0
10
IDLE
5
5.0
|S11|, |S22| (dB)
30
ICC (mA)
ICC (mA)
30
-8
-10
LG
-12
-14
HGML
-16
1930
1940
1950
1960
1970
1980
1990
FREQUENCY (MHz)
______________________________________________________________________________________
17
NF (dB)
35
0
MAX2400 toc70
40
MAX2400 toc69
40
LNA |S11| AND |S22|
vs. FREQUENCY
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
MAX2400 toc71
SUPPLY CURRENT vs. SUPPLY VOLTAGE
HGML MODE
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
MAX2400 Typical Operating Characteristics
(MAX2400 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1960MHz, TA = +25°C, unless otherwise noted.)
MAX2400 Typical Operating Characteristics (continued)
(MAX2400 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1960MHz, TA = +25°C, unless otherwise noted.)
110
18
TA = +85°C
60
14
50
12
40
10
30
8
20
9
TA = +25°C
100
16
10
TA = -40°C
8
TA = +85°C
90
7
80
6
70
5
60
4
50
3
2
40
10
6
30
0
0
20
CALCULATED
1.4dB LOSS AT POST-LNA FILTER
1
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
VAGC (V)
VAGC (V)
COMPOSITE EVM
W-CDMA: PCCPCH + SCH
BASEBAND CHANNEL
RESPONSE vs. FREQUENCY
EVM = 16.5% RMS
10
RESPONSE, RELATIVE TO 300MHz (dB)
MAX2400 toc79
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
MAX2400 toc80
70
TA = -40°C
TA = +25°C
MAX2400 toc78
120
VOLTAGE GAIN (dB)
80
20
NOISE FIGURE (dB)
90
CASCADED GAIN AND NF vs. VAGC
MAX2400 toc77
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
0.001
0.01
0.1
1
10
100
fOFFSET (MHz)
BASEBAND CHANNEL
GROUP DELAY vs. FREQUENCY
MAX2400 toc81
1200
1100
GROUP DELAY (ns)
1000
900
800
700
600
500
400
0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3
fOFFSET (MHz)
18
______________________________________________________________________________________
NOISE FIGURE (dB)
DEMODULATOR GAIN AND NF vs. VAGC
100
VOLTAGE GAIN (dB)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
35
35
-10
30
TA = -40°C
ICC (mA)
TA = +25°C
20
15
|S22|, LG
25
TA = -40°C
20
TA = +25°C
|S11|, |S22| (dB)
TA = +85°C
TA = +85°C
15
10
10
IDLE
5
0
0
2.9
3.0
3.1
3.2
|S11|, HG
|S11|, LG
-14
2.7
3.3
2.8
VCC (V)
2.9
3.0
3.1
3.2
3.3
1805
1820
VCC (V)
1850
1865
1880
LNA IN-BAND IIP3 vs. SUPPLY VOLTAGE
LNA |S21| AND |S12| vs. FREQUENCY
MAX2401 toc85
20
1835
FREQUENCY (MHz)
-34
8
15
MAX2401 toc86
2.8
6
-36
|S21|, HG
LG
|S12|, LG
5
-38
0
-40
-5
IIP3 (dBm)
4
|S12| (dB)
10
|S21| (dB)
2
TA = -40°C
TA = +25°C TA = +85°C
0
HG
-2
|S12|, HG
-42
-10
-4
|S21|, LG
-15
1805
1820
1835
1850
1865
-44
1880
-6
2.7
MAX2401 toc87
GAIN, TA = -40°C
GAIN, TA = +25°C
15
NF, TA = +85°C
NF, TA = +25°C
NF, TA = -45°C
1820
1835
1850
FREQUENCY (MHz)
1865
MAX2401 toc88
210
190
3750
170
3720
150
3690
130
3660
110
2.0
10
1805
3.3
3780
2.5
11
3.2
4.0
3.0
13
12
3.1
3810
3.5
GAIN, TA = +85°C
14
3.0
4.5
fOSC (MHz)
16
2.9
VCO fOSC AND kVCO vs. VTUNE
LNA GAIN AND NF vs. FREQUENCY
17
2.8
VCC (V)
FREQUENCY (MHz)
NF (dB)
2.7
-12
-13
IDLE
5
|S22|, HG
-11
3630
90
1.5
3600
70
1.0
1880
3570
50
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
kVCO (MHz/V)
25
GAIN (dB)
ICC (mA)
30
LNA |S11| AND |S22| vs. FREQUENCY
-9
MAX2401 toc83
40
MAX2401 toc82
40
SUPPLY CURRENT vs. SUPPLY VOLTAGE
LG MODE
MAX2401 toc84
SUPPLY CURRENT vs. SUPPLY VOLTAGE
HGML MODE
VTUNE (V)
______________________________________________________________________________________
19
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
MAX2401 Typical Operating Characteristics
(MAX2401 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1842.4MHz, TA = +25°C, unless otherwise noted.)
MAX2401 Typical Operating Characteristics (continued)
(MAX2401 EV kit, VCC = 2.8V, HGML mode (see Table 6), fRF = 1842.4MHz, TA = +25°C, unless otherwise noted.)
PLL SETTLING TIME 60MHz STEP
8
FREQUENCY OFFSET (kHz)
-70
-80
-90
-100
-110
DEMODULATOR |S11| vs. FREQUENCY
-12
6
HGML
-15
4
203µs
2
|S11| (dB)
fOSC = 1842.4MHz, ICP = 2.5mA
MAX2401 toc90
10
MAX2401 toc89
-60
0
-18
-4
-21
-8
-10
10
100
1000
-24
0
100
200
fOFFSET (kHz)
300
400
500
600
1805
TIME (µs)
MAX2401 toc92
21
TA = -40°C
TA = +85°C
110
17
100
70
15
60
13
50
11
40
30
VOLTAGE GAIN (dB)
80
19
NOISE FIGURE (dB)
TA = +25°C
1865
1880
9
8
TA = +25°C
7
TA = +85°C
6
90
70
CALCULATED
5
WITH 1.4dB LOSS
AT POST-LNA
4
FILTER
60
3
9
50
2
7
1
40
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
80
VAGC (V)
VAGC (V)
COMPOSITE EVM
W-CDMA: PCCPCH + SCH
BASEBAND CHANNEL
RESPONSE vs. FREQUENCY
BASEBAND CHANNEL
GROUP DELAY vs. FREQUENCY
0
-10
1100
1000
GROUP DELAY (ns)
-20
-30
-40
-50
-60
900
800
700
600
-70
500
-80
-90
0.001
1200
MAX2401 toc95
10
RESPONSE, RELATIVE TO 300MHz (dB)
MAX2401 toc94
EVM = 16% RMS
1835
1850
FREQUENCY (MHz)
MAX2401 toc93
120
TA = -40°C
90
1820
CASCADED GAIN AND NF vs. VAGC
DEMODULATOR GAIN AND NF vs. VAGC
100
VOLTAGE GAIN (dB)
700
MAX2401 toc96
1
NOISE FIGURE (dB)
-130
400
0.01
0.1
1
fOFFSET (MHz)
20
LG
-2
-6
-120
MAX2401 toc91
SYNTHESIZER CLOSED-LOOP
PHASE NOISE
PHASE NOISE (dBc/Hz)
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
10
100
0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3
fOFFSET (MHz)
______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
PIN
NAME
1
VCC
2
RF+
Noninverting RF Input to Zero-IF Demodulator (200Ω Differential Nominal Impedance Between RF+ and RF-)
3
RF-
Inverting RF Input to Zero-IF Demodulator (200Ω Differential Nominal Impedance Between RF+ and RF-)
4
BIAS
External Bias Resistor Connection
5
VCC
Supply Pin for LNA. This pin must be bypassed to system ground as close to the pin as possible.
The ground vias for the bypass capacitor should not be shared by any other branch. Use 100pF for RF
bypassing to GND.
6
G_LNA
7
FUNCTION
Supply Pin for I/Q Mixers. This pin must be bypassed to system ground as close to the pin as possible.
The ground vias for the bypass capacitor should not be shared by any other branch. Use 100pF for RF
bypassing to GND.
LNA Gain Mode Logic-Control Pin
LNA_OUT LNA Output. Internally matched to 50Ω.
8
GND
9
LNA_IN
LNA Input. Externally matched to 50Ω. See the Applications Information section for more information.
10
GND
RF VCO Varactor Ground Return. Provide multiple vias to the system ground plane as close to the pin
as possible.
11
VCC
Supply Pin for VCO. This pin must be bypassed to system ground as close to the pin as possible.
The ground vias for the bypass capacitor should not be shared by any other branch. Use 100pF for RF
bypassing to GND.
12
TUNE
13
CP
RF Ground Return for LNA. Provide multiple vias to the system ground plane as close to the pin as possible.
RF VCO Varactor TUNE Input. Connect PLL loop filter between CP and TUNE.
(MAX2390–MAX2393, MAX2401) High-Impedance Output of the RF Charge Pump. The RF PLL’s loop filter is
connected between this pin and TUNE.
LO_OUT+ (MAX2396/MAX2400) VCO Divide-by-3 Noninverting Output to Synthesizer
14
VCC
LO_OUT-
15
VCC
16
REFIN
LD
17
IDLE
(MAX2390–MAX2393, MAX2401) Supply Pin for Synthesizer Charge Pump. Use 100nF for bypassing to GND.
(MAX2396/MAX2400) VCO Divide-by-3 Inverting Output to Synthesizer
Supply Pin for On-Chip Digital Circuitry. Use 100nF for bypassing to GND.
Synthesizer Reference Frequency Input. AC-couple to the reference source through 1nF.
(MAX2390–MAX2393, MAX2401) Open-Drain Output Indicating LOCK Status of the RF PLL. It is open drain to
wire-OR with LD from TX chip.
(MAX2396/MAX2400) Idle Mode Enable. Drive IDLE low to disable all blocks except serial bus, VCO, and
divide-by-3 prescaler to PLL.
18
SHDN
19
AGC
20
Q+
Noninverting Baseband Output for Q Channel
21
Q-
Inverting Baseband Output for Q Channel
22
I-
Inverting Baseband Output for I Channel
23
I+
24
VCC
Shutdown Logic Pin for Entire Receiver (Active Low)
Analog Input Pin Controlling the Baseband VGA Gain
Noninverting Baseband Output for I Channel
Supply Pin for Baseband Circuitry. Use 100nF for bypassing to GND.
25
CS
26
G_MXR
Mixer Gain Mode Logic-Control Pin
27
SDATA
3-Wire Serial Bus Data Input
28
SCLK
3-Wire Serial Bus Clock Input
3-Wire Serial Bus Enable Input (Active Low)
______________________________________________________________________________________
21
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
Pin Description
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
22
SCLK
SDATA
G_MXR
CS
VCC
I+
I-
28
27
26
25
24
23
22
SERIAL
INTERFACE
21 Q-
VCC
1
RF+
2
20 Q+
RF-
3
19 AGC
BIAS
4
18 SHDN
VCC
5
17 IDLE
G_LNA
6
LNA_OUT
7
MAX2396
MAX2400
/2
16 REFIN
TANK
/3
8
9
10
11
12
13
14
GND
VCC
TUNE
LO_OUT+
LO_OUT-
15 VCC
LNA_IN
LNA
GND
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
Pin Configuration/Functional Diagram for MAX2396/MAX2400
______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX5383 (6-PIN SOT)
(OPTIONAL EXTERNAL AGC DAC, DAC
USES 3-WIRE INTERFACE)
DAC CS
RF+
RF-
26
25
I-
VCC
24
23
22
SERIAL
INTERFACE
1
21
2
20
3
19
4
18
5
17
6
MAX2390/MAX2391
MAX2401
/2
LNA
7
16
TANK
INTEGER-N
PLL
12
13
11
VCC
10
GND
9
LNA_IN
GND
8
TUNE
Rx
14
VCC
G_LNA
LNA_OUT
Q+
SHDN
CP
VCC
Q-
AGC
BIAS
+2.8V
BASEBAND/DSP
VCC
27
CS
SDATA
SCLK
28
+2.8V
G_MXR
I+
+2.8V
15
LD
REFIN
VCC
+2.8V
TCXO
19.2MHz (MAX2390/MAX2391)
26MHz (MAX2401)
Tx (FROM PA)
+2.8V
+2.8V
______________________________________________________________________________________
23
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA FDD Receiver Operating Circuit (MAX2390/MAX2391/MAX2401)
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
TD-SCDMA Receiver Operating Circuit (MAX2392)
MAX5383 (6-PIN SOT)
(OPTIONAL EXTERNAL AGC DAC, DAC
USES 3-WIRE INTERFACE)
DAC CS
RF+
RF-
26
25
I-
VCC
24
23
22
SERIAL
INTERFACE
1
21
2
20
3
19
4
18
5
17
MAX2392
6
/2
LNA
7
16
TANK
INTEGER-N
PLL
12
13
Tx TD-SCDMA
11
VCC
10
GND
9
LNA_IN
GND
8
+2.8V
TUNE
Rx TDSCDMA
14
VCC
G_LNA
LNA_OUT
Q+
SHDN
CP
VCC
Q-
AGC
BIAS
+2.8V
BASEBAND/DSP
VCC
27
CS
SDATA
SCLK
28
VCC
G_MXR
I+
+2.8V
15
LD
REFIN
VCC
+2.8V
TCXO
13.0MHz
+2.8V
Tx GSM
Rx GSM
24
______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX5383 (6-PIN SOT)
(OPTIONAL EXTERNAL AGC DAC, DAC
USES 3-WIRE INTERFACE)
DAC CS
RF+
RF-
26
25
I-
VCC
24
23
22
SERIAL
INTERFACE
1
21
2
20
3
19
4
18
5
17
MAX2393
6
/2
LNA
7
16
TANK
INTEGER-N
PLL
12
13
11
VCC
10
GND
9
LNA_IN
GND
8
TUNE
Rx TDD
14
VCC
G_LNA
LNA_OUT
Q+
SHDN
CP
VCC
Q-
AGC
BIAS
+2.8V
BASEBAND/DSP
VCC
27
CS
SDATA
SCLK
28
VCC
G_MXR
I+
+2.8V
15
LD
REFIN
VCC
+2.8V
TCXO
19.2MHz
Tx TDD
+2.8V
+2.8V
______________________________________________________________________________________
25
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-TDD Receiver Operating Circuit (MAX2393)
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA FDD Receiver Operating Circuit (External Synthesizer)
(MAX2396/MAX2400)
MAX5383 (6-PIN SOT)
(OPTIONAL EXTERNAL AGC DAC, DAC
USES 3-WIRE INTERFACE)
RF+
RF-
26
25
I-
VCC
24
23
22
SERIAL
INTERFACE
1
21
2
20
3
19
4
18
VCC
5
17
Q+
SHDN
6
16
/3
TANK
LNA
7
IDLE
/2
MAX2396
MAX2400
G_LNA
LNA_OUT
Q-
AGC
BIAS
+2.8V
BASEBAND/DSP
VCC
27
CS
SDATA
SCLK
28
+2.8V
G_MXR
I+
+2.8V
15
REFIN
VCC
+2.8V
Rx
FROM
EXTERNAL
PLL
Tx (FROM PA)
14
LO_OUT-
13
LO_OUT+
12
TUNE
11
VCC
10
GND
9
LNA_IN
GND
8
TCXO
15.36MHz
TO EXTERNAL PLL
+2.8V
26
______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
With the exception of the analog-input AGC, all functionality of these direct-conversion receivers can be
controlled through the 3-wire serial interface
(SPI™/QSPI™/MICROWIRE™ compatible).
Register Definition
All devices in this family have two programmable 20-bit
registers: the configuration register (CONFIG) and the
control register (OPCNTRL). The MAX2391/MAX2392/
MAX2393/MAX2401 have two additional programmable
20-bit registers: the main PLL divide register (RFM) and
the reference PLL divide register (RFR). The 4 least significant bits of the data sent are the register’s address.
The 16 most significant bits are used for register data.
All registers contain a few don’t care bits. These can be
either 0 or 1 and do not affect operation. Tables 1a and
1b provide a register summary. Data is shifted in MSB
first. When CS is low, data is shifted with the rising
edge of the clock. When CS transitions to high, the shift
register is latched into the register selected by the contents of the address bits. Power-up defaults for the four
registers are shown in Table 2.
The RFM register sets the main-frequency divide ratio
for the RF PLL. The RFR register sets the reference-frequency divide ratio. The RF LO frequency can be
determined by the following:
RF LO frequency = fREFIN x (RFM / RFR)
where fREFIN is the external input reference frequency
MICROWIRE is a trademark of National Semiconductor Corp.
SPI and QSPI are trademarks of Motorola, Inc.
for the MAX2390–MAX2393, MAX2401.
The operation control register (OPCNTRL) and the configuration register (CONFIG) are used to program the
receiver for the appropriate mode of operation. See
Tables 3 and 4 for the function of each bit.
The test register is used to set the receiver in factory
testing mode. It should only be programmed at receiver
turn-on with the word 0370 (hex) for MAX2390–MAX2393,
MAX2401 and 2370 (hex) for MAX2396/MAX2400.
Power Management
Bias control is distributed among several functional sections and can be controlled to accommodate different
power-down modes as shown in Table 5.
The IC has three bias states: SHUTDOWN, IDLE, and
ON. SHUTDOWN can be asserted by either a hardware
control line (SHDN) or by bit 5 of the operation control
register (OPCTRL.SHDN). When the serial interface is
used to shut down the part, an internal linear regulator,
with IQ ≈ 90µA, stays functional to keep the serial interface operational. Use the SHDN logic-control pin to
bring quiescent current below 10µA. Register bit settings maintain their values after a hard shutdown, provided CS remains high. IDLE mode disables the LNA,
I/Q mixers, and baseband circuitry, but keeps the serial
interface and synthesizer operational, dropping quiescent current to 11.5mA. The entire receiver is ON when
SHDN is high and OPCNTRL.SHDN and
OPCNTRL.IDLE bits (MAX2390–MAX2393, MAX2401)
or the IDLE pin (MAX2396/MAX2400) are set to 1; the
typical supply current is 32mA.
Table 1a. Register Defintion (MAX2390–MAX2393, MAX2401)
MSB
DATA 16 BITS
M5
M4
M3
M2
M1
M0
R5
R4
R3
R2
R1
R0
IDLE
GLNA
LMXR
GMXR
VCM
RF_PLL_EN
VCO_EN
CP1
CP0
LNA_EN
1
SHDN
1
DC_CANCEL_EN
1
M6
1
R6
1
RC0
0
1
BW_SEL
1
M7
1
R7
1
0
RC1
1
(RESERVED)
1
M8
0
0
R8
A0
(RESERVED)
A1
(RESERVED)
A2
M9
A3
X
B0
(RESERVED)
B1
(RESERVED)
M10
B2
X
B3
(RESERVED)
B4
(RESERVED)
M11
B5
X
B6
(RESERVED)
B7
(RESERVED)
B8
X
B9
X
M12
ADDRESS 4 BITS
X
M14
M13
X
X
X
X
X
X
X
CONFIG
X
OPCNTRL
X
RFR
X
B15 B14 B13 B12 B11 B10
RFM
LSB
20-BIT REGISTER
REGISTER
NAME
1
______________________________________________________________________________________
27
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
Detailed Description
Table 1b. Register Defintion (MAX2396/MAX2400)
MSB
LSB
20-BIT REGISTER
REGISTER
NAME
DATA 16 BITS
ADDRESS 4 BITS
LMXR
GMXR
VCM
(RESERVED)
(RESERVED)
LNA_EN
1
GLNA
1
VCO_EN
1
(RESERVED)
1
LO_GEN_EN
1
SHDN
0
1
DC_CANCEL_EN
A0
RC0
A1
(RESERVED)
A2
RC1
A3
(RESERVED)
B0
(RESERVED)
B1
(RESERVED)
B2
(RESERVED)
B3
(RESERVED)
B4
(RESERVED)
B5
(RESERVED)
B6
(RESERVED)
B7
(RESERVED)
B8
X
B9
X
X
X
X
CONFIG
X
OPCNTRL
X
B15 B14 B13 B12 B11 B10
X
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
1
Data shifted in MSB first.
X represents a “don’t care.”
Set all (RESERVED) bits to 0.
Table 2. Power-Up Default Register Settings
REGISTER
RFM
ADDRESS
0011b
RFR
0111b
OPCTRL
1011b
CONFIG
1111b
TEST
DEFAULT
FUNCTION
0x29CC (107800DEC)*
MAX2391
0x2768 (10088DEC)*
MAX2392
0x254E (9550DEC)*
MAX2393
0x2648 (9800DEC)*
MAX2390, MAX2401
0x0060 (0096DEC)*
MAX2390/MAX2391/MAX2393/MAX2401
0x0041 (0065DEC)*
MAX2392
0001b
03B hex
07F hex
RF ReferenceDivider Count
Operation control settings
Configuration control settings
0370 hex**
MAX2390–MAX2393, MAX2401
2370 hex**
MAX2396/MAX2400
Data shifted in MSB first.
X represents a “don’t care.”
Set all (RESERVED) bits to 0.
*200kHz comparison frequency.
**Needs to be programmed at receiver turn-on.
28
RF Main-Divider
Count
______________________________________________________________________________________
Disables Test
Mode
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
Table 3. Operation Control Register (OPCNTRL, Address 1011)
BIT
(B0 = LSB)
POWER-UP
STATE
BIT NAME
B11, B10, B9, B8
0000
(RESERVED)
B7, B6
00
RC1, RC0
B5
1
SHDN
IDLE
B4
1
(RESERVED)
FUNCTION
Set to zero for normal operation.
Sets the -3dB corner of the highpass filter used for DC offset removal at
baseband (only possible when the automatic DC-offset-cancellation bit
(CONFIG.B5) is disabled):
0 0 = 8.6kHz highpass corner
0 1 = 17.2kHz highpass corner
1 0 = 100kHz highpass corner
1 1 = 1MHz highpass corner
Zero shuts down everything except serial interface and registers, retaining
their values.
For MAX2390–MAX2393/MAX2401:
Zero shuts down everything except RF PLL, RF VCO, serial interface, and
registers, retaining their values.
For MAX2396/MAX2400:
Set to 1 for normal operation.
B3
1
GLNA
Sets LNA operating mode according to the following:
1 = high gain
0 = low gain
B2
0
LMXR
Sets mixer linearity in high-gain mode:
0 = medium linearity
1 = high linearity
B1
1
GMXR
Sets MIXER operating mode according to the following:
1 = high gain
0 = low gain
B0
1
VCM
Sets output common-mode voltage for baseband I/Q outputs:
0 = 1.2V
1 = 1.42V
______________________________________________________________________________________
29
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
Table 4. Configuration Register (CONFIG, Address 1111)
BIT
POWER-UP
STATE
BIT NAME
B11, B10, B9,
B8, B7
00000
(RESERVED)
B6
1
BW_SEL
(RESERVED)
B5
B4
B3
B2, B1
1
DC_CANCEL_EN
30
Set to 1 for normal operation.
0 = disables the automatic DC-offset-cancellation circuit.
LO_GEN_EN
For MAX2396/MAX2400:
0 = disables the LO generation circuit.
VCO_EN
0 = disables the VCO.
CP1, CP0
For MAX2390–MAX2393/MAX2401:
A 2-bit word sets the RF charge-pump current as follows:
0 0 = 1000µA
0 1 = 1500µA
1 0 = 2000µA
1 1 = 2500µA
11
1
For MAX2393 only:
1 = selects the 3G W-CDMA mode for baseband filters.
0 = selects the TD-SCDMA mode for baseband filters.
For MAX2390–MAX2393/MAX2401:
0 = disables the RF PLL + LO generation circuit.
(RESERVED)
B0
Set to 0 for normal operation.
RF_PLL_EN
1
1
FUNCTION
LNA_EN
For MAX2396/MAX2400:
Set to 11 for normal operation.
0 = disables on-chip LNA. Set to zero for external LNA.
______________________________________________________________________________________
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
SHUTDOWN
SHDN pin is LOW.
All blocks are OFF; registers retain their preshutdown values.
0
X
IDLE
IDLE bit (OPCTRL.B4) is ZERO.
All blocks are OFF except RF PLL, RF VCO, serial bus, and
registers, which retain their values.
1
1
RF VCO + RF PLL + LO
GENERATION
0
LNA + I/Q MIXERS + BB
CIRCUITRY
1
COMMENTS
SERIAL INTERFACE
SHDN BIT
SHDN pin is HIGH, SHDN bit is ZERO.
All blocks are OFF except serial bus and registers, which
retain their values; a LOW on SHDN pin overrides SHDN bit.
POWER-DOWN
MODES
IDLE BIT
SHDN PIN
LOGIC
OFF
OFF
OFF
ON
ON
X
OFF
0
ON
Table 6. Operational Modes
EXTERNAL CONTROL PINS/
OPCTRL REGISTER BITS
MODE*
MIXER
LNA
GMXR
CORRESPONDING LNA
MODE
CORRESPONDING MIXER
MODE
GLNA
LMXR
(BIT)
(PIN)
(BIT)
(PIN)
(BIT)
HGML
0
1
1
1
1
High gain
High gain, medium linearity
HGHL
1
1
1
High gain
High gain, high linearity
1
1
High gain
Low gain
Low gain
Low gain
MG
X
LG
X
1
1
1
0
0
X
1
0
1
0
0
X
0
X
*Definitions:
HGML: high gain, medium linearity
HGHL: high gain, high linearity
MG: medium gain
LG: low gain
______________________________________________________________________________________
31
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
Table 5. Power-Down Modes
MAX2390–MAX2393/MAX2396/MAX2400/MAX2401
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
Applications Information
LNA and RFIN Matching
The LNA requires a simple two-element 50Ω matching
network at the input. Use the layout and matching network provided in the EV kit as a reference. The LNA input
is internally biased, so be sure to use a series 100pF DC
blocking capacitor in front of the matching network.
The LNA offers a 23dB gain step with less than 10
degrees phase change, selectable with either a dedicated logic pin (G_LNA) or bit 3 in the operation control
register (OPCTRL.GLNA).
LNA output matching is provided on-chip, offering better than 2:1 VSWR. The required DC blocking capacitor
is provided on-chip, so the LNA output can be connected directly to the RF SAW filter or balun.
I/Q Mixers
The mixers’ differential input impedance is 200Ω, allowing an easy interface to commercially available differential-output Rx SAW filters or 1:4 baluns. No DC
blocks are required, but a single, small shunt inductor
is required to resonate out the parasitic capacitance
from the SAW filter and IC package.
The mixer offers an 11dB gain step, which is controlled
by either the logic-control pin (G_MXR) or bit 1 of the
operation control register (OPCTRL.GMXR). This offers
the option to switch the mixer into a low-gain state if
required, reducing current consumption by about 3mA.
Use the mixer gain step and AGC before reducing LNA
gain for optimum receiver dynamic range.
Baseband I/Q Filters
All receiver channel selectivity is implemented fully onchip, with greater than 40dB adjacent channel selectivity (ACS). This eliminates the need for any additional
filtering by any subsequent baseband processor.
The group delay of the integrated filters is compensated through on-chip equalizers for optimum EVM.
AGC
The AGC circuitry of the baseband amplifiers offers linear (dB/V) gain control for the receiver. With the AGC
voltage from 0.3V to 2.4V, the VGA section provides
60dB gain-control range, for a total of 95dB including
the LNA and mixer gain steps.
The AGC control line has an input impedance of more
than 100kΩ at DC. Internal capacitance creates a single
32
pole at approximately 2MHz; this provides some highfrequency filtering, thereby reducing AM distortion.
For applications using a baseband processor with digital-only AGC, Maxim offers an 8-bit voltage-output AGC
DAC with an SPI/QSPI/MICROWIRE interface in a tiny
6-pin SOT23 package. Especially designed as a lowcost, all-in-one solution for cellular handset AGC, the
MAX5383 offers the following features: a serial interface
good to 10MHz, guaranteed operation from a 2.7V to
3.6V supply, on-chip 2V reference,
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