EVALUATION KIT AVAILABLE
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
General Description
The MAX2550 is a complete single-chip RF-to-bits and
bits-to-RF radio transceiver. This device is in compliance
with the 3GPP TS25.104 femtocell standard for Band I, V,
and VIII. It is equipped with multiple receive inputs and
transmit outputs for low band, high band, and macro-cell
monitoring (Table 1).
This fully integrated transceiver facilitates compact radio
designs for dongle and standalone femtocell products by
minimizing external component count. Maxim’s MAX-PHY
serial interface is used to drastically reduce IC pin count,
while worldwide field-proven architecture accelerates
time to product deployment.
The device features unparalleled receive blocker performance and the industry’s lowest noise figure for higher
data rates and range. Low-power operational modes are
available to minimize power consumption. The transmitter is designed to deliver EVM far exceeding the standard requirement at 0dBm.
The MAX2550–MAX2553 is a family of pin-compatible
transceivers that cover all major WCDMA and cdma2000®
bands. All parts are controlled by a 4-wire interface.
The MAX2550 is packaged in a compact 7mm x 7mm
TQFN and specified over the -40NC to +85NC extended
temperature range. A complete radio reference design is
available to facilitate custom designs.
Functional Diagrams
Applications
WCDMA Band I, V, and VIII Femtocells
Ordering Information and Simplified Block Diagram appear
at end of data sheet.
For related parts and recommended products to use with this part,
refer to www.maxim-ic.com/MAX2550.related.
Benefits and Features
S Single-Chip Femtocell Radio Transceiver
S WCDMA/HSPA+ Band I, V, and VIII Operation
S TS25.104 Standard Compliant
S Multiple LNA Inputs for WCDMA, PCS, and GSM
Macrocell Monitoring
S High Level of Integration
On-Chip Fractional-N Frequency Synthesizers
for LO Generation
No Tx SAW Filters Required
Integrated PA Drivers for Lower-Cost Power
Amplifier Designs
12-Bit AFC DAC to Control TCXO
On-Chip Temperature Sensor
Three General-Purpose Outputs
Reference Clock with Selectable CMOS and Low
Swing Output
PLL Lock-Detect Output Through GPO3
S Optimized Receiver Performance
Exceptional Receive Sensitivity
High Dynamic Range Sigma-Delta ADCs Allow
Simple AGC Implementation with Switched Gain
States
S Optimized Transmitter Performance
Factory Calibrated for Gain, Carrier Leakage,
and Sideband Suppression
10-Bit Gain Control Resolution for Better Power
Accuracy
60dB Gain Control Range
S Loopback Operating Mode from Tx Baseband
Input to Rx Baseband Output
S MAX-PHY Serial Digital Interface
S SPI Read/Write Functionality
S Operation Controlled by 4-Wire Serial Interface
S Low-Cost, 7mm x 7mm TQFN Package
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
cdma2000 is a registered service mark of
UCSP is a trademark of Maxim Integrated Products, Inc.
Telecommunications Industry Association.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6397; Rev 0; 7/12
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
ABSOLUTE MAXIMUM RATINGS
VCC_ to GND_.......................................................-0.3V to +3.9V
RXIN_, MIXIN_, LNAOUT_ to GND_......................-0.3V to +1.2V
All Pins except VCC_ to GND_.................-0.3V to (VCC_ + 0.3V)
AC Input Signals..........................................................1.0V Peak
Digital Input Current......................................................... Q10mA
Maximum VSWR Without Damage.......................................... 8:1
Continuous Power Dissipation (TA = +70NC)
TQFN Multilayer Board
(derate 40mW/NC above +70NC)......................................3.2W
Junction Temperature......................................................+150NC
Operating Temperature Range........................... -40NC to +85NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (BJA)...........25NC/W
Junction-to-Case Thermal Resistance (BJC)......................1NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
DC ELECTRICAL CHARACTERISTICS
(VCC_ = 3.0V to 3.6V, TA = -40 to +85NC, 50I system, fREFIN = 19.2MHz, typical values are at VCC_ = 3.3V, TA = +25NC, unless
otherwise noted. Register settings as defined in tables following the specification tables.) (Note 2)
SPEC NO.
DC1a
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
VCC_
MIN
MAX
UNITS
V
3.3
3.6
DC19a
Full-duplex high band
298
390
DC19b
Full-duplex low band
300
390
RXIN2 monitor
78
105
RXIN4 monitor
78
105
RXIN5 monitor
72
95
DC23
Tx only
236
315
DC24
Idle Rx
43
DC25
Idle Tx
40
DC20
DC21
DC22
Operating Supply Current
WCDMA
ICC_
3.0
TYP
mA
DC3
Operating Supply Current
AFC-Only Mode
ICC_
AFC DAC and SPI only
175
1000
FA
DC5
Operating Supply Current
Reference Buffer Mode
ICC_
REFOUT = 500Ω || 22pF,
all else = off
5.3
7.5
mA
DC6
Operating Supply Current
Sleep Mode
ICC_
All functions off
14
1000
FA
DC11
Digital Input Logic-High
DC12
Digital Input Logic-Low
0.4
V
DC13
Input Current for Digital
Control Pins
10
|FA|
DC16
GPO Sink Current
VOUT = 0.35V, DOUT_DRV = 01
1.0
1.8
mA
DC17
GPO Source Current
VOUT = VCC_ - 0.3V,
DOUT_DRV = 01
1.0
1.9
mA
Maxim Integrated
1.3
V
2
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band I Duplexer Specifications
(Diplexer between antenna and duplexer loss: 0.3dB (applies to all Rx modes).)
Antenna—Uplink Port (Applies to Uplink WCDMA Rx Mode on RXIN1)
BAND (MHz)
ATTENUATION
(dB)
Uplink
1920 to 1980
1 to 1870
1870 to
1920
1980 to
2020
32
12
12
Attenuation
2
2020 to
2200
2300 to
2500
2500 to
4500
4500 to
12750
12
7
Minimum Attenuation
37
27
Rx SAW FILTER RESPONSE
BAND (MHz)
ATTENUATION
(dB)
Out of band
Required minimum attenuation relative to in-band
25
Band I Uplink WCDMA Rx Mode on RXIN1 (Full Duplex)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
1977.6
MHz
Frequency Band
WCDMA FDD Band I uplink (lowest to highest
channel center frequency)
Sensitivity
3GPP TS25.104
Section 7.2.1
Tx on at -27dBm, LNA gain mid gain, PGA gain
register set to 9, assumed SNDR > -17.5dB at
sensitivity, using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR
at MAX-PHY filter output established with FFT,
LNA linearity set to high
-116
-107
dBm
Wb1fu-1a
Sensitivity with LNA in
High-Gain Mode
Tx on at -27dBm, LNA gain high, PGA gain
register set to 6, assumed SNDR > -17.5dB at
sensitivity, using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR
at MAX-PHY filter output established with FFT,
LNA linearity set to high
-119
-107
dBm
Wb1fu-3
High-Level EVM WCDMA
PIN = -20dBm, LNA gain low, PGA gain register
set to 1
Wb1fu-0
Wb1fu-1
Maxim Integrated
1922.4
4.5
%
3
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band I Uplink WCDMA Rx Mode on RXIN1 (Full Duplex) (continued)
SPEC NO.
Wb1fu-4
Wb1fu-5
Wb1fu-6
PARAMETER
TYP
MAX
UNITS
Sensitivity with
Adjacent Channel
Interference
3GPPP TS25.104 Section
7.4.1
Tx on -27dBm, LNA gain high, PGA gain
register set to 3, assumed SNDR > -17.5dB at
sensitivity, inferring signals at front-end input
-28dBm, at 5MHz offset and -5MHz offset and
modulated as in 3GPP. Using UL reference
measurement channel (12.2kbps) as specified
in A.2 3GPP 25.104. Production tested by
measurement if SNDR at output on CW input
signal at -90dBm. SNDR at MAX-PHY filter
output established with FFT.
-109
-101
dBm
Sensitivity with
In-Band Blocking
Interference
3GPPP TS25.104 Section
7.5.1
Tx on -27dBm, LNA gain high, PGA gain
register set to 6, assumed SNDR > -17.5dB at
sensitivity, inferring signals at front-end input
-30dBm, at 10MHz offset and -5MHz offset and
modulated as in 3GPPP. Using UL reference
measurement channel (12.2kbps) as specified
in A.2 3GPP 25.104. Production tested by
measurement if SNDR at output on CW input
signal at -90dBm test only worst case in
production. SNDR at MAX-PHY filter output
established with FFT.
-117
-101
dBm
Sensitivity with
Out-of-Band Blocking
Interference
3GPP TS25.104 Section
7.5.1
Front-end assumed response as above, Tx on
at -27dBm, LNA high gain, PGA gain register
set to 6, assumed SNDR > -17.5dB at
sensitivity, interfering signal at front-end input
-15dBm CW, 1MHz to 1900MHz and 2000MHz
to 12750MHz using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR
at MAX-PHY filter output established with FFT
(Note 3)
-112
-101
dBm
Maxim Integrated
CONDITIONS
MIN
4
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band I Uplink WCDMA Rx Mode on RXIN1 (Full Duplex) (continued)
SPEC NO.
PARAMETER
CONDITIONS
Wb1fu-8
Sensitivity with
Intermodulation Interference
3GPP TS25.104 Section
7.6.1
Wb1fu-10
Spurious Emissions
Out-of-Band
3GPP TS25.104
Section 7.7.1
Wb1fu-11
Wb1fu-12
Wb1fu-13
Wb1fu-14
TYP
MAX
UNITS
Tx on at -27dBm; LNA gain high; PGA gain
register set to 6; assumed SNDR > -17.5dB at
sensitivity; interfering signals at front-end input
-38dBm, at 10MHz offset (CW) and 20MHz
offset (modulated) as in 3GPP; using UL
reference measurement channel (12.2kbps) as
specified in A.2 3GPP 25.104; tested by
measurement of SNDR at output on CW input
signal at -90dBm; SNDR at MAX-PHY filter
output established with FFT (Note 3)
-118
-101
dBm
30MHz to 1GHz, measured in 100kHz BW
-100
-60
1GHz to 12.75GHz, measured in 1MHz BW,
with the exception of frequencies between
12.5MHz below the first carrier frequency and
12.5MHz above the last carrier frequency used
by the BS (Note 3)
-75
-50
Spurious Emissions
in Receive Bands
3GPP TS25.104
Section 7.9.2
Front-end assumed response as above,
1920MHz to 1980MHz (Note 3)
-95
-80
dBm
Conversion Gain
High LNA Gain
LNA high gain; PGA gain register set to 6;
tested on CW input signal at -90dBm;
calculated by subtracting the FE input signal
in dBm from the ADC output signal in dBFS at
digital filter outputs, includes digital gain to the
16-bit output
21
30
36
dB
Conversion Gain
Mid LNA Gain
LNA mid gain; PGA gain register set to 9;
tested on CW input signal at -90dBm;
calculated by subtracting the FE input signal
in dBm from the ADC output signal in dBFS at
digital filter outputs, includes digital gain to the
16-bit output
21
30
36
dB
Conversion Gain
Low LNA Gain
LNA gain low; PGA gain register set to 1;
tested on CW input signal at -20dBm;
calculated by subtracting the FE input signal
in dBm from the ADC output signal in dBFS at
digital filter outputs, includes digital gain to the
16-bit output
-13
-7
-3.5
dB
Maxim Integrated
MIN
dBm
5
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Antenna—Downlink Port (Applies to Downlink WCDMA Rx Mode on RXIN5)
BAND (MHz)
ATTENTUATION
(dB)
Downlink
2110 to 2170
1 to 2025
2025 to
2050
2050 to
2095
Attenuation
2
2185 to
2230
2230 to
2255
2255 to
12750
10
15
Minimum Attenuation
15
10
0
0
Band I Downlink WCDMA Rx Mode on RXIN5 (Monitor)
SPEC NO.
Wb1fd-0
Wb1fd-1
Wb1fd-4
Wb1fd-4a
PARAMETER
CONDITIONS
Frequency Band
MIN
TYP
2112.4
MAX
UNITS
2167.6
MHz
Sensitivity
3GPP TS25.101
Section 7.3.1
LNA gain high, PGA gain register set to 11,
assumed SNDR > -7dB at sensitivity, using UL
reference measurement channel, (12.2kbps) as
specified in C.3.1 3GPP 25.101, tested by
measurement of SNDR at output on CW input
signal at -90dBm, SNDR at MAX-PHY filter
output established with FFT, LNA linearity set to
high
-110
dBm
Sensitivity with Adjacent
Channel Interference
3GPP TS25.101
Section 7.5.1
LNA gain high; PGA gain register set to 11;
assumed SNDR > -7dB at sensitivity; interfering
signals at front-end input -52dBm, at 5MHz
offset and -5MHz offset and modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in C.3.1 3GPP 25.101;
production tested by measurement of SNDR at
output on CW input signal at -90dBm; SNDR at
MAX-PHY filter output established with FFT
-110
dBm
Sensitivity with Adjacent
Channel Interference
3GPP TS25.101
Section 7.5.1
CASE 2
LNA gain medium, PGA gain register set to 6;
tested SNDR at output; interfering signals at
front-end input -25dBm, at 5MHz offset and
-5MHz offset and modulated as in 3GPP; using
UL reference measurement channel (12.2kbps)
as specified in C.3.1 3GPP 25.101; production
tested by measurement of SNDR at output on
CW input signal at -69dBm; SNDR at MAX-PHY
filter output established with FFT
-94
dBm
Maxim Integrated
6
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band I Downlink WCDMA Rx Mode on RXIN5 (Monitor) (continued)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Wb1fd-8
Sensitivity with
Intermodulation
Interference
3GPP TS25.101
Section 7.8.1
LNA gain high, PGA gain register set to 11;
assumed SNDR > -7dB at sensitivity; interfering
signals at front-end input -46dBm, at 10MHz
offset (CW) and 20MHz offset (modulated ) as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in C.3.1 3GPP 25.101;
production tested by measurement of SNDR at
output on CW input signal at -90dBm; SNDR at
MAX-PHY filter output established with FFT
-110
Wb1fd-10
Spurious Emissions
Out-of-Band
3GPP TS25.101
Section 7.9.1
30MHz to 12750MHz in 100kHz bandwidth
(Note 3)
-80
-60
dBm
Wb1fd-11
Spurious Emissions
in Receive Bands
3GPP TS25.101
section 7.9.2
Front-end assumed response as above,
1920MHz to 1980MHz and 2110MHz to
2170MHz (Note 3)
-95
-80
dBm
Conversion Gain
High LNA Gain
LNA gain high; PGA gain register set to 11;
tested on CW input signal at -90dBm; calculated
by subtracting the FE input signal in dBm from
the ADC output signal in dBFS at digital filter
outputs, includes digital gain to the 16-bit output
33
44
49
dB
Conversion Gain
Low LNA Gain
LNA gain low; PGA gain register set to 0; tested
on CW input signal at -20dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter
outputs, includes digital gain to the 16-bit output
-22
-13
-7.5
dB
Wb1fd-12
Wb1fd-13
Maxim Integrated
dBm
7
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
DCS Band Rx Mode on RXIN2
Assumed External Front-End Filtering Characteristics Between Antenna and LNA
In-Band
1805 to 1880
BAND (MHz)
Out of Band (a)
0.1 to 1705
Out of Band (b)
1705 to 1785
27.5
15.5
Attenuation
ATTENUATION
(dB)
Out of Band (c)
1920 to 1980
Out of Band (d)
1980 to 4000
Minimum Attenuation
3.5
15.5
27.5
DCS Band Rx Mode on RXIN2
SPEC NO.
dcs -0
dcs-1
dcs-2
PARAMETER
CONDITIONS
MIN
RF Frequency
At pin RXIN2, 200KHz channel raster, lowest to
highest channel center frequency
Sensitivity
3GPP TS100.910
Section 6.2
LNA gain high, PGA gain register set to 12;
assumed SNDR > 7dB at sensitivity; using static
E-TCH/F as specified in 3GPP TS 100.910;
production tested by measurement of SNDR at
output on CW input signal at -102dBm; SNDR at
MAX-PHY filter output established with FFT
Conversion Gain
High LNA Gain
LNA gain high, PGA gain register set to 12;
production tested on CW input signal at
-102dBm; calculated by subtracting the FE input
signal in dBm from the output signal in dBFS
at digital filter outputs, includes digital gain to
the16-bit output
TYP
1805.2
MAX
UNITS
1879.8
MHz
-108
dBm
46
dB
40
EGSM/WCDMA Band Rx Mode on RXIN4
External Front-End Filtering Characteristics EGSM
BAND (MHz)
ATTENUATION
(dB)
In-Band
925 to 960
905 to 915
Out of Band
(a) 0.1 to 905
19.5
24.5
Attenuation
Out of Band
(b) N/A
Out of Band
(c) N/A
Out of Band (d)
980 to 12750
N/A
24.5
Minimum Attenuation
3.5
N/A
Assumed External Front-End Filtering Characteristics Between Antenna and LNA:
(WCDMA on RXIN4)
BAND (MHz)
ATTENUATION (dB)
Maxim Integrated
Downlink
869 to 894
1 to
804
824 to 849
37
51
Attenuation
3
914 to 3000
3000 to 6000
Minimum Attenuation
35
20
8
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
EGSM/WCDMA Band Rx Mode on RXIN4
SPEC NO.
G900 -0
G900-1
G900-2
PARAMETER
CONDITIONS
MIN
RF Frequency
At pin RXIN4, 200KHz channel raster, EGSM
lowest to highest channel center frequency
Sensitivity
3GPP TS100.910
Section 6.2
LNA gain high, PGA gain register set to 12;
assumed SNDR > 7dB at sensitivity; using static
E-TCH/F as specified in 3GPP TS 100.910;
production tested by measurement of SNDR at
output on CW input signal at -102dBm; SNDR at
MAX-PHY filter output established with FFT
Conversion Gain
High LNA Gain
LNA gain high, PGA gain register set to 12;
production tested on CW input signal at
-102dBm; calculated by subtracting the FE input
signal in dBm from the output signal in dBFS
at digital filter outputs, includes digital gain to
the16-bit output
TYP
925.2
43
MAX
UNITS
959.8
MHz
-110
dBm
50
dB
Band V Duplexer Specifications
Antenna—Uplink Port (Applies to Uplink WCDMA Rx Mode on RXIN3)
Uplink
824 to 849
BAND (MHz)
1 to 804
869 to 894
894 to 2500
Attenuation
ATTENUATION (dB)
2
32
2500 to 3000
3000 to 6000
Minimum Attenuation
43
32
22
15
Rx SAW FILTER RESPONSE
BAND (MHz)
ATTENUATION (dB)
Maxim Integrated
Out-of-Band
Required minimum attenuation relative to in-band
25
9
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band V Uplink WCDMA Rx Mode on RXIN3 (Full Duplex)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
846.6
MHz
Frequency Band
WCDMA FDD Band V uplink (lowest to highest
channel center frequency)
Sensitivity
3GPP TS25.104
Section 7.2.1
Tx on at -27dBm, LNA gain mid gain, PGA gain
register set to 9, assumed SNDR > -17.5dB at
sensitivity, using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR at
MAX-PHY filter output established with FFT, LNA
linearity set to high
-116
-107
dBm
Wb5fu-2
Sensitivity with LNA in
High-Gain Mode
Tx on at -27dBm, LNA gain high, PGA gain
register set to 6, assumed SNDR > -17.5dB at
sensitivity, using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR at
MAX-PHY filter output established with FFT, LNA
linearity set to high
-119
-107
dBm
Wb5fu-3
High-Level EVM WCDMA
PIN = -20 dBm, LNA gain low, PGA gain register
set to 1
4.0
%
Sensitivity with Adjacent
Channel Interference
3GPP TS25.104 Section
7.4.1
Tx on at -27dBm; LNA gain high; PGA gain register
set to 3; assumed SNDR > -17.5dB at sensitivity;
interfering signals at front-end input -28dBm, at
5MHz offset and -5MHz offset and modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in A.2 3GPP 25.104; tested
by measurement of SNDR at output on CW input
signal at -90dBm; SNDR at MAX-PHY filter output
established with FFT
-108
dBm
Tx on at -27dBm; LNA gain high; PGA gain
register set to 6; assumed SNDR > -17.5dB at
sensitivity; interfering signal at front-end input
-30dBm at min, 10MHz offset modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in A.2 3GPP 25.104;
tested by measurement of SNDR at output on CW
input signal at -90dBm; (test only worst case in
production); SNDR at MAX-PHY filter output
established with FFT (Note 3)
-117
Wb5fu-0
Wb5fu-1
Wb5fu-4
Wb5fu-5
Sensitivity with In-Band
Blocking Interference
3GPP TS25.104 Section
7.5.1
Maxim Integrated
821.4
-101
dBm
10
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band V Uplink WCDMA Rx Mode on RXIN3 (Full Duplex) (continued)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
Sensitivity with
Out-of-Band Blocking
Interference
3GPP TS25.104 Section
7.5.1
Front-end assumed response as above; Tx on at
-27dBm; LNA gain high; PGA gain register set
to 6; assumed SNDR > -17.5dB at sensitivity;
interfering signal at Front-end input -15dBm CW;
1MHz to 804MHz and 869MHz to 12750MHz with
1 MHz steps; no exceptions allowed; (test only
worst case in production); using UL reference
measurement channel (12.2kbps) as specified
in A.2 3GPP 25.104; tested by measurement of
SNDR at output on CW input signal at -90dBm;
SNDR at MAX-PHY filter output established with
FFT
-111
Wb5fu-7
Sensitivity with
Intermodulation
Interference
3GPP TS25.104 Section
7.6.1
Tx on at -27dBm; LNA gain high; PGA gain
register set to 6; assumed SNDR > -17.5dB at
sensitivity; interfering signals at front-end input
-38dBm, at 10MHz offset (CW) and 20MHz offset
(modulated) as in 3GPP; using UL
reference measurement channel (12.2kbps) as
specified in A.2 3GPP 25.104; tested by
measurement of SNDR at output on CW input
signal at -90dBm; SNDR at MAX-PHY filter output
established with FFT (Note 3)
-117
-101
30MHz to 1GHz, measured in 100kHz BW
-100
-60
Wb5fu-8
Spurious Emissions
Out-of-Band
3GPP TS25.104
Section 7.7.1
1GHz to 12.75GHz, measured in 1MHz BW, with
the exception of frequencies between 12.5MHz
below the first carrier frequency and 12.5MHz
above the last carrier frequency used by the BS
(Note 3)
-86
-50
Wb5fu-6
Wb5fu-10
Wb5fu-11
UNITS
dBm
dBm
dBm
Conversion Gain
High LNA Gain
LNA high gain; PGA gain register set to 6; tested
on CW input signal at -90dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter outputs,
includes digital gain to the 16-bit output
22
29.5
35
dB
Conversion Gain
Mid LNA Gain
LNA mid gain; PGA gain register set to 9; tested
on CW input signal at -90dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter outputs,
includes digital gain to the 16-bit output
22
29
35
dB
Maxim Integrated
11
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band V Uplink WCDMA Rx Mode on RXIN3 (Full Duplex) (continued)
SPEC NO.
Wb5fu-12
PARAMETER
CONDITIONS
LNA gain low; PGA gain register set to 1; tested
on CW input signal at -20dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter outputs,
includes digital gain to the 16-bit output
Conversion Gain
Low LNA Gain
MIN
TYP
MAX
UNITS
-17.5
-10.5
-6
dB
Antenna—Downlink Port (Applies to Downlink WCDMA Rx Mode on RXIN4)
Downlink
869 to 894
BAND (MHz)
ATTENUATION (dB)
1 to 804
824 to 849
37
51
Attenuation
3
914 to 3000
3000 to 6000
Minimum Attenuation
35
20
Band V Downlink WCDMA Rx Mode on RXIN4 (Monitor)
SPEC NO.
Wb5fd-0
Wb5fd-1
Wb5fd-4
Wb5fd-9
PARAMETER
CONDITIONS
Frequency Band
MIN
TYP
867.4
MAX
UNITS
891.6
MHz
Sensitivity
3GPP TS25.101
Section 7.3.1
LNA gain high, PGA gain register set to 11,
assumed SNDR > -7dB at sensitivity, using UL
reference measurement channel (12.2kbps) as
specified in C.3.1 3GPP 25.101, tested by
measurement of SNDR at output on CW input
signal at -90dBm, SNDR at MAX-PHY filter output
established with FFT, LNA linearity set to high
-111.5
-104.7
dBm
Sensitivity with Adjacent
Channel Interference
3GPP TS25.101
Section 7.5.1
LNA gain high; PGA gain register set to 11;
assumed SNDR > -7dB at sensitivity; interfering
signals at front-end input -52dBm, at 5MHz
offset and -5MHz offset and modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in C.3.1 3GPP 25.101;
tested by measurement of SNDR at output on
CW input signal at -90dBm; SNDR at MAX-PHY
filter output established with FFT
-111
-101
dBm
30MHz to 1000MHz, 100kHz bandwidth
-100
-60
1000MHz to 12750MHz, 1MHz bandwidth
-98
-50
Spurious Emissions
Out-of-Band
3GPP TS25.101
Section 7.9.1 (Note 3)
Maxim Integrated
dBm
12
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band V Downlink WCDMA Rx Mode on RXIN4 (Monitor) (continued)
SPEC NO.
Wb5fd-10
Wb5fd-11
Wb5fd-12
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
-95
-80
dBm
Spurious Emissions
in Receive Bands
3GPP TS25.101
Section 7.9.2
Front-end assumed response as above, 824MHz
to 849MHz and 869MHz to 894MHz (Note 3)
Conversion Gain
High LNA Gain
LNA gain high; PGA gain register set to 11;
tested on CW input signal at -90dBm; calculated
by subtracting the FE input signal in dBm from
the ADC output signal in dBFS at digital filter
outputs, includes digital gain to the 16-bit output
40
45
48.5
dB
Conversion Gain
Low LNA Gain
LNA gain low; PGA gain register set to 0; tested
on CW input signal at -20dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter
outputs, includes digital gain to the16-bit output
-18
-14
-10
dB
Band VIII Duplexer Specifications
Antenna—Uplink Port (Applies to Uplink WCDMA Rx Mode on RXIN3)
Uplink
880 to 915
BAND (MHz)
1 to 870
925 to 960
960 to 2500
Attenuation
ATTENUATION (dB)
2
32
2500 to 3000
3000 to 6000
Minimum Attenuation
43
32
22
15
Rx SAW FILTER RESPONSE
BAND (MHz)
ATTENUATION (dB)
Maxim Integrated
Out-of-band
Required minimum attenuation relative to in-band
25
13
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band VIII Uplink WCDMA Rx Mode on RXIN3 (Full Duplex)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
912.6
MHz
Frequency Band
WCDMA FDD Band V uplink (lowest to highest
channel center frequency)
Sensitivity
3GPP TS25.104
Section 7.2.1
Tx on at -27dBm, LNA gain mid gain, PGA gain
register set to 9, assumed SNDR > -17.5dB at
sensitivity, using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR at
MAX-PHY filter output established with FFT, LNA
linearity set to high (Note 3)
-116
-107
dBm
Wb8fu-2
Sensitivity with LNA in
High-Gain Mode
Tx on at -27dBm, LNA gain high, PGA gain
register set to 6, assumed SNDR > -17.5dB at
sensitivity, using UL reference measurement
channel (12.2kbps) as specified in A.2 3GPP
25.104, tested by measurement of SNDR at
output on CW input signal at -90dBm, SNDR at
MAX-PHY filter output established with FFT, LNA
linearity set to high
-120
-107
dBm
Wb8fu-3
High-Level EVM WCDMA
PIN = -20dBm, LNA gain low, PGA gain register
set to 1
4.0
Sensitivity with Adjacent
Channel Interference
3GPP TS25.104 Section
7.4.1
Tx on at -27dBm; LNA gain high; PGA gain register
set to 3; assumed SNDR > -17.5dB at sensitivity;
interfering signals at front-end input -28dBm, at
5MHz offset and -5MHz offset and modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in A.2 3GPP 25.104; tested
by measurement of SNDR at output on CW input
signal at -90dBm; SNDR at MAX-PHY filter output
established with FFT (Note 3)
-107
-101
dBm
Tx on at -27dBm; LNA gain high; PGA gain
register set to 6; assumed SNDR > -17.5dB at
sensitivity; interfering signal at front-end input
-30dBm at min, 10MHz offset modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in A.2 3GPP 25.104;
tested by measurement of SNDR at output on CW
input signal at -90dBm; (test only worst case in
production); SNDR at MAX-PHY filter output
established with FFT (Note 3)
-118
-101
dBm
Wb8fu-0
Wb8fu-1
Wb8fu-4
Wb8fu-5
Sensitivity with In-Band
Blocking Interference
3GPP TS25.104 Section
7.5.1
Maxim Integrated
882.4
%
14
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band VIII Uplink WCDMA Rx Mode on RXIN3 (Full Duplex) (continued)
SPEC NO.
Wb8fu-6
Wb8fu-7
Wb8fu-8
Wb8fu-10
Wb8fu-11
PARAMETER
TYP
MAX
UNITS
Sensitivity with
Out-of-Band Blocking
Interference
3GPP TS25.104 Section
7.5.1
Front-end assumed response as above; Tx on at
-27dBm; LNA gain high; PGA gain register set to
6; assumed SNDR > -17.5dB at
sensitivity; interfering signal at front-end input
-15dBm CW; 1MHz to 804MHz and 869MHz
to 12750MHz with 1 MHz steps; no exceptions
allowed; (test only worst case in production);
using UL reference measurement channel
(12.2kbps) as specified in A.2 3GPP 25.104;
tested by measurement of SNDR at output on CW
input signal at -90dBm; SNDR at MAX-PHY filter
output established with FFT (Note 3)
-113
-101
dBm
Sensitivity with
Intermodulation
Interference
3GPP TS25.104 Section
7.6.1
Tx on at -27dBm; LNA gain high; PGA gain
register set to 6; assumed SNDR > -17.5dB at
sensitivity; interfering signals at front-end input
-38dBm, at 10MHz offset (CW) and 20MHz offset
(modulated) as in 3GPP; using UL
reference measurement channel (12.2kbps) as
specified in A.2 3GPP 25.104; tested by
measurement of SNDR at output on CW input
signal at -90dBm; SNDR at MAX-PHY filter output
established with FFT (Note 3)
-118
-101
dBm
30MHz to 1GHz, measured in 100kHz BW
-100
-60
1GHz to 12.75GHz, measured in 1MHz BW, with
the exception of frequencies between 12.5MHz
below the first carrier frequency and 12.5MHz
above the last carrier frequency used by the BS
(Note 3)
-78
-50
Spurious Emissions
Out-of-Band
3GPP TS25.104
Section 7.7.1
CONDITIONS
MIN
dBm
Conversion Gain
High LNA Gain
LNA high gain; PGA gain register set to 6; tested
on CW input signal at -90dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter outputs,
includes digital gain to the 16-bit output
23
30
35
dB
Conversion Gain
Mid LNA Gain
LNA mid gain; PGA gain register set to 9; tested
on CW input signal at -90dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter outputs,
includes digital gain to the 16-bit output
22
29.5
35
dB
Maxim Integrated
15
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band VIII Uplink WCDMA Rx Mode on RXIN3 (Full Duplex) (continued)
SPEC NO.
Wb8fu-12
PARAMETER
CONDITIONS
LNA gain low; PGA gain register set to 1; tested
on CW input signal at -20dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter outputs,
includes digital gain to the 16-bit output
Conversion Gain
Low LNA Gain
MIN
TYP
MAX
UNITS
-16
-9
-5
dB
Antenna—Downlink Port (Applies to Downlink WCDMA Rx Mode on RXIN4)
Downlink
925 to 960
BAND (MHz)
ATTENUATION (dB)
1 to 804
880 to 915
37
51
Attenuation
3
914 to 3000
3000 to 6000
Minimum Attenuation
35
20
Band VIII Downlink WCDMA Rx Mode on RXIN4 (Monitor)
SPEC NO.
Wb8fd-0
Wb8fd-1
Wb8fd-4
PARAMETER
CONDITIONS
Frequency Band
MIN
TYP
927.4
MAX
UNITS
957.6
MHz
Sensitivity
3GPP TS25.101
Section 7.3.1
LNA gain high, PGA gain register set to 11,
assumed SNDR > -7dB at sensitivity, using UL
reference measurement channel (12.2kbps) as
specified in C.3.1 3GPP 25.101, tested by
measurement of SNDR at output on CW input
signal at -90dBm, SNDR at MAX-PHY filter output
established with FFT, LNA linearity set to high,
specified data is for a manual built fcLGA using
2.7pF filter caps
-111.5
-104.7
dBm
Sensitivity with Adjacent
Channel Interference
3GPP TS25.101
Section 7.5.1
LNA gain high; PGA gain register set to 11;
assumed SNDR > -7dB at sensitivity; interfering
signals at front-end input -52dBm, at 5MHz
offset and -5MHz offset and modulated as in
3GPP; using UL reference measurement channel
(12.2kbps) as specified in C.3.1 3GPP 25.101;
tested by measurement of SNDR at output on
CW input signal at -90dBm; SNDR at MAX-PHY
filter output established with FFT
-111
-101
dBm
Maxim Integrated
16
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred. Typical values are at VCC_ = 3.3V, TA = +25NC and mid-band, unless otherwise
noted. Tx specifications are referred to the input pin of the chip.) (Note 2)
Band VIII Downlink WCDMA Rx Mode on RXIN4 (Monitor) (continued)
SPEC NO.
Wb8fd-9
Wb8fd-10
Wb8fd-11
Wb8fd-12
PARAMETER
TYP
MAX
30MHz to 1000MHz, 100kHz bandwidth
-100
-60
1000MHz to 12750MHz, 1MHz bandwidth
-90
-50
Spurious Emissions
in Receive Bands
3GPP TS25.101
Section 7.9.2
Front-end assumed response as above, 925MHz
to 960MHz and 880MHz to 915MHz (Note 3)
-100
-80
dBm
Conversion Gain
High LNA Gain
LNA gain high; PGA gain register set to 11;
tested on CW input signal at -90dBm; calculated
by subtracting the FE input signal in dBm from
the ADC output signal in dBFS at digital filter
outputs, includes digital gain to the 16-bit output
40
44.5
49
dB
Conversion Gain
Low LNA Gain
LNA gain low; PGA gain register set to 0; tested
on CW input signal at -20dBm; calculated by
subtracting the FE input signal in dBm from the
ADC output signal in dBFS at digital filter
outputs, includes digital gain to the16-bit output
-17.5
-12
-8.5
dB
Spurious Emissions
Out-of-Band
3GPP TS25.101
Section 7.9.1 (Note 3)
Maxim Integrated
CONDITIONS
MIN
UNITS
dBm
17
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Tx MODE AC ELECTRICAL CHARACTERISTICS
(MAX2550 EV kit, TA = -40NC to +85NC, WCDMA downlink TM1 16 channels with -14dBFs peak level into sigma-delta modulator inside
baseband chip (see the Baseband Input Level section), registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN =
19.2MHz, typical values are at TA = +25NC, VCC_ = 3.3V, and mid-band, unless otherwise noted. Tx specifications are referred to the
input pin of the chip.) (Note 2)
SPEC NO.
PARAMETER
W1
W1a
RF Frequency Range
W1b
CONDITIONS
MAX
UNITS
2112.4
2167.6
MHz
Band V
867.4
891.6
Band VIII
927.4
957.6
Center of the WCDMA signal, Band I output
(TXOUTH)
Band V and VIII output
(TXOUTL)
MIN
TYP
W2
Linear Output Power
TX_GAIN = 1023
W3
Adjacent Channel Power
Ratio
Offset frequency = Q5MHz in 3.84MHz BW,
POUT = 0dBm
-55
dBc
W4
Alternate Channel Power
Ratio
Offset frequency = Q10MHz in 3.84MHz BW,
POUT = 0dBm
-70
dBc
Noise measured at -80MHz offset in 3.84MHz
BW, then convert to per Hz, Band I output
-149
-142
dBm/Hz
Noise measured at -45MHz offset in 3.84MHz
BW, then convert to per Hz, Band V and VIII
output
-145
-140
dBm/Hz
W5
W5a
Rx Band Noise Power,
POUT ≤ 0dBm (Note 3)
0
MHz
dBm
W6
EVM
POUT = 0dBm
4
%
W6a
RCDE
TM6, 8 channels at 0dBm
-28
dB
W7
Minimum Output Power
TX_GAIN = 0
-61
-45
W8
Output Power Deviation
from TA = +25NC to -40NC
(Note 3)
W9
Output Power Deviation
TX_GAIN = 1023, high band
from TA = +25NC to +85NC
(Note 3)
Low band
W10
W11
TX_GAIN = 1023, high band
-1.5
+0.4
+2
Low band
-0.5
+1.5
+3.5
-3
-0.8
0
-3.5
-1.6
0
dBm
dB
dB
Power Control Step Size
Accuracy
Five calibration points over the power control
range to create four linear regions, any linearly
interpolated 1dB TX_GAIN step over the
specified power range (W2 and W7) produces
1dB output power step within this error range.
±0.25
dB
Power Control Step Size
Accuracy
Five calibration points over the power control
range to create four linear regions, any linearly
interpolated 10dB TX_GAIN step over the
specified power range (W2 and W7) produces
10dB output power step within this error range.
±0.75
dB
Maxim Integrated
18
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS: General
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred, typical values are at TA = +25NC, VCC_ = 3.3V, unless otherwise noted.) (Note 2)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
600
mVP-P
REFERENCE FREQUENCY INPUT
R1
Input Level
Test condition
125
R2
Input Frequency
Reference divider set to divide-by-2 for
frequencies higher than 26MHz
13
19.2
40
MHz
110
320
500
mVP-P
REFERENCE FREQUENCY OUTPUT
RO1a
REFOUT Output Level, AC 500I || 22pF load, REFOUT_LV_CMOS_SEL = 1
RO1b
REFOUT Output Level, DC
RO2
REFOUT Output Amplitude 500I || 22pF load, REFOUT_LV_CMOS_SEL = 0
RO4
REFOUT Output
Frequency
Matches REFIN frequency (FREF)
0.8
V
2.25
2.7
VP-P
13
19.2
40
MHz
Rx DIGITAL LOW-VOLTAGE DIFFERENTIAL SIGNALING OUTPUT INTERFACE
LV0
Output Bit Rate on Each I
and Q
LV1
Output Common Mode
LV3
Output Differential Swing
on Load (Note 3)
LV4
Differential Output
Resistance
Test condition
120I differential output load (Note 3)
100
153.6
Mbps
1.2
V
140
220
mVPEAK
670
I
153.6
Mbps
1.25
V
Tx BASEBAND INTERFACE
Bb1
Input Bit Rate, on Each I
and Q
Bb8
Common Mode Input
Voltage
Bb9
Differential Input Swing
Bb10
Differential Input
Resistance (Note 3)
Bb11
Test condition
112
140
500
Bit TXINDACZI = 1
55
100
140
Bit TXINDACZI = 0
140
220
340
mVP-P
I
Rx RF PLL
RS1
Valid RF Main Division
Ratio Range
RS3
Valid Main Fractional
Divider Programming
Value
20-bit resolution
RS5
Charge-Pump Current
Gain
Using 800FA setting
0.5
RXVCO, high band
RXVCO, low band
RS6a
RS6b
RS9
VCO Tuning Gain
PLL Settling Time
Maxim Integrated
50kHz loop bandwidth
62
147
00000
FFFFF
hex
0.82
1.0
mA
38
127
216
21
65
111
200
MHz/V
Fs
19
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
AC ELECTRICAL CHARACTERISTICS: General (continued)
(MAX2550 EV kit, TA = -40NC to +85NC, registers set as described in Tables 20–51, VCC_ = 3.0V to 3.6V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred, typical values are at TA = +25NC, VCC_ = 3.3V, unless otherwise noted.) (Note 2)
SPEC NO.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Tx RF PLL
TS2
Valid RF Main Division
Ratio Range
TS3
Valid Reference Division
Ratios
Division ratios are 1 or 2
TS4
Valid Main Fractional
Divider Programming
Value
20-bit resolution
TS5
Charge-Pump Current CP
800FA
TS9
PLL Settling Time
50kHz loop bandwidth
200
Fs
Resolution
Monotonicity is production tested
12
Bits
Output-Voltage High
Load > 200kI to GND, AFCDAC = all 1
2.68
V
DAC4
Output-Voltage Low
Load > 200kI to VCC_, AFCDAC = all 0
DAC5
Output Noise
Any code within 0.5V to 2.5V output level, 100Hz
to 20kHz
DAC1
AFC DAC
DAC3
DAC6
Settling Time
DIGITAL TEMPERATURE SENSOR
T1
Output Code vs.
T2
Temperature
T3
T5
Code Slope
ISOLATION
66
153
1
2
00000
FFFFF
hex
1.0
mA
0.5
2.55
0.82
0.37
6
Step from 0.6V to 2V, settling to Q10mV
0.45
V
FV/rtHz
Fs
TA = -40NC
5
TA = +25NC
17
TA = +85NC
27
TA = -20NC to +70NC
5
Between any RXIN_ pins, with one of the two
ports disabled
30
dB
60
dB
M1
RXIN_ Pin-to-Pin Isolation
M2
TXOUT_ to RXIN_ Isolation Between any TXOUT and RXIN_, with both ports on
N/code
Note 2: Production tested at TA = +25NC. Cold and hot are guaranteed by design and characterization.
Note 3: Guaranteed by design and characterization.
Maxim Integrated
20
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Additional Information
General Comments
The specifications in the following pages calculate sensitivity with a specified front-end loss from a measured signal-to-noise and distortion ratio (SNDR) and an assumed
minimum output SNDRSENS needed for demodulation at
sensitivity. The sensitivity values can be related to noise
figure by the formula:
MAX-PHY
MAX-PHY is Maxim’s solution for the digital interface
system between the radio IC and the baseband/DSP. It is
a multimode, software programmable, digital signal postprocessing engine that processes the data out of the
radio IC and produces the digital filtered outputs for use
in the DSP. It enables multimode operation of the radio
through software control. Maxim offers an evaluation kit
for the MAX2550 along with an FPGA-based MAX-PHY
evaluation platform. The FPGA includes the recommended digital channel-selection filters. The Verilog code for
these filters is also available for integration into the DSP.
Contact Maxim for further information.
Noise Figure of MAX2550 (dB) = Sensitivity (dBm) Front-End Loss (dB) - SNDRSENS (dB) + 174dBm/Hz 10 x LOG(bandwidth in Hz)
Low-noise amplifier (LNA) and programmable-gain
amplifier (PGA) gain are set according to the Conditions
column in the Electrical Characteristics table. The output
SNDR is measured using MAX-PHY and the bandwidth of
the measurement is defined by the digital filters in MAXPHY. DC at the output is excluded from the SNDR measurement. SNDR is calculated using an FFT of the output
bytes with a typical FFT length of 214 output samples.
Typical Operating Characteristics
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
AFC-ONLY MODE SUPPLY CURRENT
vs. SUPPLY VOLTAGE
0.185
TA = +25°C
ICC (mA)
13
TA = +85°C
0.175
TA = -40°C
0.170
12
5.4
ICC (mA)
0.180
TA = -40°C
14
10
3.1
3.2
3.3
VCC (V)
Maxim Integrated
3.4
3.5
3.6
TA = -40°C
TA = +85°C
5.2
TA = +25°C
5.0
0.165
11
3.0
5.6
TA = +85°C
TA = +25°C
15
5.8
MAX2550 toc02
16
ICC (µA)
0.190
MAX2550 toc01
17
REFERENCE BUFFER MODE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX2550 toc03
SLEEP MODE SUPPLY CURRENT
vs. SUPPLY VOLTAGE
4.8
0.160
4.6
3.0
3.1
3.2
3.3
VCC (V)
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
VCC (V)
21
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
93
47
46
TA = +25°C
ICC (mA)
0.290
ICC (mA)
91
90
89
TA = +25°C
88
0.285
0.280
TA = -40°C
3.1
3.2
3.3
3.4
3.5
44
86
41
TA = -40°C
40
TA = -40°C
39
3.0
3.6
TA = +25°C
43
42
84
3.0
TA = +85°C
45
87
85
0.275
3.1
3.2
3.3
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.6
3.5
VCC (V)
VCC (V)
VCC (V)
FULL-DUPLEX MODE, BAND5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX3 ONLY MODE, BAND 5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX3 IDLE MODE, BAND5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
82
ICC (mA)
0.285
TA = -40°C
0.280
TA = +25°C
80
79
TA = -40°C
3.1
3.2
3.3
VCC (V)
Maxim Integrated
3.4
3.5
3.6
20
5
76
3.0
TA = +25°C
10
77
0.270
TA = +85°C
TA = -40°C
25
15
78
0.275
35
30
81
TA = +85°C
40
MAX2550 toc09
0.290
TA = +85°C
ICC (mA)
TA = +25°C
MAX2550 toc08
83
MAX2550 toc07
0.295
ICC (A)
48
92
0.295
ICC (mA)
TA = +85°C
94
49
MAX2550 toc05
TA = +85°C
0.300
95
MAX2550 toc04
0.305
RX1 IDLE MODE, BAND1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX1 ONLY MODE, BAND 1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX2550 toc06
FULL DUPLEX MODE, BAND1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
0
3.0
3.1
3.2
3.3
VCC (V)
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
VCC (V)
22
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
TA = +25°C
0.315
93
91
0.305
TA = -40°C
0.295
47
46
TA = +25°C
90
89
88
TA = -40°C
3.0
3.1
3.2
3.3
3.4
3.5
44
TA = -40°C
43
42
86
41
85
40
39
3.0
3.6
TA = +85°C
45
87
84
0.290
TA = +25°C
48
ICC (mA)
ICC (mA)
3.1
3.2
3.3
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
VCC (V)
VCC (V)
VCC (V)
RX4 MONITOR MODE, BAND5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX4 MONITOR MODE, BAND8
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX5 MONITOR MODE, BAND1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
82
TA = +25°C
71
ICC (mA)
69
TA = -40°C
68
66
75
74
78
TA = -40°C
76
67
TA = +85°C
76
TA = +25°C
80
70
77
MAX2550 toc15
72
TA = +85°C
ICC (mA)
TA = +85°C
73
84
MAX2550 toc13
74
MAX2550 toc14
ICC (A)
TA = +85°C
0.300
ICC (mA)
TA = +85°C
92
0.310
49
MAX2550 toc11
94
MAX2550 toc10
0.320
RX3 IDLE MODE, BAND8
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX3 ONLY MODE, BAND8
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX2550 toc12
FULL-DUPLEX MODE, BAND8
SUPPLY CURRENT vs. SUPPLY VOLTAGE
TA = +25°C
73
72
71
TA = -40°C
70
69
74
65
68
64
3.0
3.1
3.2
3.3
VCC (V)
Maxim Integrated
3.4
3.5
3.6
67
72
3.0
3.1
3.2
3.3
VCC (V)
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
VCC (V)
23
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
RX4 MONITOR MODE, GSM
SUPPLY CURRENT vs. SUPPLY VOLTAGE
82
TA = -40°C
80
78
TA = -40°C
76
78
-118
-119
-120
-121
76
74
-122
74
72
-123
3.1
3.2
3.3
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
VCC (V)
VCC (V)
BAND5 UPLINK Rx
SENSITIVITY vs. FREQUENCY
BAND8 UPLINK Rx
SENSITIVITY vs. FREQUENCY
-116.5
-118
-117.5
SENSITIVITY (dBm)
-119
-117.0
-120
-121
-122
TA = -40°C
TA = +25°C
TA = +85°C
-124
820
TA = -40°C
TA = +25°C
825
835
830
840
FREQUENCY (MHz)
Maxim Integrated
TA = +85°C
845
850
TA = +25°C
TA = +85°C
FREQUENCY (MHz)
BAND5 DOWNLINK Rx
SENSITIVITY vs. FREQUENCY
-118.0
-118.5
-119.0
-119.5
-120.0
-110.5
-111.0
-111.5
-112.0
-112.5
-120.5
-123
TA = -40°C
1910 1920 1930 1940 1950 1960 1970 1980 1990
SENSITIVITY (dBm)
MAX2550 toc19
-117
3.6
MAX2550 toc20
3.0
SENSITIVITY (dBm)
TA = +25°C
80
-117
MAX2550 toc21
TA = +25°C
TA = +85°C
MAX2550 toc18
82
ICC (mA)
ICC (mA)
84
-116
MAX2550 toc17
TA = +85°C
86
84
MAX2550 toc16
88
BAND1 UPLINK Rx
SENSITIVITY vs. FREQUENCY
SENSITIVITY (dBm)
RX2 MONITOR MODE, DCS
SUPPLY CURRENT vs. SUPPLY VOLTAGE
-121.0
TA = -40°C
-113.0
-121.5
875 880 885 890 895 900 905 910 915 920
FREQUENCY (MHz)
865
870
875
TA = +25°C
880
885
TA = +85°C
890
895
FREQUENCY (MHz)
24
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
-110.5
-111.0
TA = +85°C
920 925 930 935 940 945 950 955 960 965
-110.0
-110.5
2100 2110 2120 2130 2140 2150 2160 2170 2180
MAX2550 toc25
8
-109.5
MAX2550 toc24
1800
1820
TA = +25°C
1840
1860
TA = +85°C
1880
FREQUENCY (MHz)
Rx BAND1
EVM vs. FREQUENCY
Rx BAND5
EVM vs. FREQUENCY
TA = +25°C
TA = +85°C
10
1900
9
8
7
TA = +25°C
-109.0
TA = -40°C
FREQUENCY (MHz)
10
EVM (%)
SENSITIVITY (dBm)
-108.5
-109.5
-112.5
GSM Rx
SENSITIVITY vs. FREQUENCY
TA = +85°C
-109.0
-112.0
FREQUENCY (MHz)
-108.0
-108.5
MAX2550 toc27
TA = +25°C
-108.0
MAX2550 toc26
TA = -40°C
-107.0
-107.5
-110.0
-111.5
-111.5
-106.5
SENSITIVITY (dBm)
-111.0
TA = -40°C
TA = +25°C
TA = +85°C
6
TA = -40°C
4
-110.0
EVM (%)
-110.5
-112.0
-109.5
SENSITIVITY (dBm)
SENSITIVITY (dBm)
-110.0
-109.0
MAX2550 toc23
MAX2550 toc22
-109.5
DCS Rx
SENSITIVITY vs. FREQUENCY
BAND1 DOWNLINK Rx
SENSITIVITY vs. FREQUENCY
BAND8 DOWNLINK Rx SENSITIVITY
6
TA = +25°C
TA = +85°C
5
4
3
2
-110.5
TA = -40°C
-111.0
1
0
920 925 930 935 940 945 950 955 960 965
2100 2110 2120 2130 2140 2150 2160 2170 2180
FREQUENCY (MHz)
FREQUENCY (MHz)
Maxim Integrated
TA = -40°C
2
0
820
825
830
835
840
845
850
FREQUENCY (MHz)
25
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
TA = +25°C
TA = +85°C
31.6
6
GAIN (dB)
5
TA = -40°C
4
3
30.6
TA = -40°C
1
31.2
30.2
30.0
29.8
TA = -40°C
29.6
29.4
TA = +25°C
LNA GAIN = MID
PGA = 9
29.2
30.6
0
TA = +25°C
30.4
31.4
30.8
TA = +85°C
30.8
31.0
2
29.0
875 880 885 890 895 900 905 910 915 920
1910 1920 1930 1940 1950 1960 1970 1980 1990
1910 1920 1930 1940 1950 1960 1970 1980 1990
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
48.3
48.2
TA = +25°C
-6.8
GAIN (dB)
-6.7
48.1
TA = +85°C
LNA GAIN = HIGH
PGA = 11
TA = -40°C
32.8
TA = +25°C
TA = -40°C
48.0
47.9
-6.9
33.0
TA = +25°C
TA = +85°C
32.6
GAIN (dB)
LNA GAIN = LOW
PGA = 1
MAX2550 toc31
TA = +85°C
-6.6
RX3 BAND 5 GAIN vs. FREQUENCY
RX2 GAIN vs. FREQUENCY
48.4
MAX2550 toc33
RX1 GAIN vs. FREQUENCY
-6.5
GAIN (dB)
LNA GAIN = HIGH
PGA = 6
MAX2550 toc32
EVM (%)
7
TA = +85°C
GAIN (dB)
8
31.8
RX1 GAIN vs. FREQUENCY
31.0
MAX2550 toc29
9
RX1 GAIN vs. FREQUENCY
32.0
MAX2550 toc28
10
MAX2550 toc30
Rx BAND8
EVM vs. FREQUENCY
32.4
32.2
47.8
-7.0
TA = -40°C
32.0
47.7
47.6
-7.1
31.8
1910 1920 1930 1940 1950 1960 1970 1980 1990
1800 1810 1820 1830 1840 1850 1860 1870 1880 1890
FREQUENCY (MHz)
FREQUENCY (MHz)
Maxim Integrated
LNA = HIGH
PGA = 6
820
825
830
835
840
845
850
FREQUENCY (MHz)
26
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
RX3 BAND5 GAIN vs. FREQUENCY
-7.8
TA = +25°C
-8.0
-8.2
-8.4
LNA GAIN = MID
PGA = 9
TA = +85°C
835
840
845
820
850
840
MAX2550 toc37
-6.8
TA = +85°C
TA = +25°C
29.3
GAIN (dB)
-7.0
29.4
835
-6.6
29.6
29.5
830
845
RX4 BAND5 GAIN vs. FREQUENCY
TA = -40°C
-7.8
TA = -40°C
29.0
-8.0
TA = +25°C
LNA = HIGH, PGA = 11
45.1
45.0
TA = -40°C
44.8
44.7
TA = +25°C
44.6
44.5
LNA GAIN = LOW
PGA = 1
TA = +85°C
875 880 885 890 900 905 910 915 920
875 880 885 890 900 905 910 915 920
FREQUENCY (MHz)
FREQUENCY (MHz)
Maxim Integrated
45.2
44.9
-7.2
-7.4
MAX2550 toc36
FREQUENCY (MHz)
-7.6
29.2
29.1
875 880 885 890 900 905 910 915 920
850
RX3 BAND8 GAIN vs. FREQUENCY
RX3 BAND8 GAIN vs. FREQUENCY
LNA GAIN = MID
PGA = 9
825
FREQUENCY (MHz)
FREQUENCY (MHz)
GAIN (dB)
830
MAX2550 toc38
825
TA = -40°C
30.2
-9.0
820
30.5
30.3
-8.8
29.4
TA = +85°C
TA = +25°C
30.6
30.4
TA = +85°C
-8.6
29.6
LNA GAIN = HIGH
PGA = 6
30.7
GAIN (dB)
GAIN (dB)
GAIN (dB)
30.0
29.8
GAIN (dB)
30.8
-7.6
30.2
29.7
TA = -40°C
-7.4
30.4
29.8
LNA GAIN = LOW
PGA = 1
-7.2
RX3 BAND8 GAIN vs. FREQUENCY
30.9
MAX2550 toc39
TA = +25°C
MAX2550 toc34
TA = -40°C
30.6
-7.0
MAX2550 toc35
RX3 BAND5 GAIN vs. FREQUENCY
30.8
44.4
TA = +85°C
44.3
865
870
875
880
885
890
895
FREQUENCY (MHz)
27
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
-13.5
TA = +25°C
-13.8
-13.9
TA = -40°C
TA = -40°C
44.5
44.4
870
875
880
885
890
895
FREQUENCY (MHz)
RX5 GAIN vs. FREQUENCY
45.2
45.1
-12.6
920 925 930 935 940 945 950 955 960 965
FREQUENCY (MHz)
FREQUENCY (MHz)
RX5 GAIN vs. FREQUENCY
-11.2
MAX2550 toc43
45.3
-11.4
LNA = LOW
PGA = 0
TA = -40°C
RXIN1 PIN S-PARAMETER
0.1
0
REAL
44.8
44.7
44.6
TA = +25°C
GAIN (dB)
TA = -40°C
S-PARAMETER
-11.6
45.0
44.9
-11.8
-12.0
-12.2
TA = +85°C
-12.4
LNA = HIGH
PGA = 11
IMAGINARY
TA = +25°C
2100 2110 2120 2130 2140 2150 2160 2170 2180
2100 2110 2120 2130 2140 2150 2160 2170 2180
FREQUENCY (MHz)
FREQUENCY (MHz)
Maxim Integrated
-0.2
-0.4
-12.6
44.3
-0.1
-0.3
TA = +85°C
44.5
TA = -40°C
-12.2
920 925 930 935 940 945 950 955 960
MAX2550 toc44
865
-12.1
-12.5
TA = +85°C
44.1
-14.3
TA = +25°C
-12.4
44.2
-14.2
TA = +85°C
-12.3
TA = +25°C
44.3
-14.1
LNA GAIN = LOW
PGA = 0
-12.0
GAIN (dB)
GAIN (dB)
GAIN (dB)
TA = +85°C
-13.7
-14.0
GAIN (dB)
-11.9
44.6
-13.6
44.4
LNA GAIN = HIGH,
PGA = 11
44.7
MAX2550 toc45
LNA = LOW
PGA = 0
RX4 BAND8 GAIN vs. FREQUENCY
-11.8
MAX2550 toc41
MAX2550 toc40
-13.4
RX4 BAND8 GAIN vs. FREQUENCY
44.8
MAX2550 toc42
RX4 BAND 5 GAIN vs. FREQUENCY
-13.3
-0.5
1860
1880
1900
1940
1980
2020
2040
1920
1960
2000
FREQUENCY (MHz)
28
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
RXIN3 PIN S-PARAMETER
0
-0.3
-0.4
IMAGINARY
-0.5
-0.10
-0.15
-0.20
1740
1760
1780
1820
1860
1800
1840
1880
FREQUENCY (MHz)
1900
-0.30
-0.6
-0.7
900 910 920 930 940 950 960 970 980 990
FREQUENCY (MHz)
FREQUENCY (MHz)
Rx GAIN vs. PGA GAIN CODE
WCDMA FILTER RESPONSE
vs. OFFSET FREQUENCY
-0.3
REAL
-0.4
IMAGINARY
-0.5
-10
-15
-20
-25
-30
-35
-40
-0.6
RXBB-I
-45
2060
2080
2100
Maxim Integrated
2140
2120
2160
FREQUENCY (MHz)
2180
2200
2220
-5
-10
-15
-20
-25
-30
RXBB-Q
-50
-0.7
0
MAX2550 toc50
0
ATTENUATION (dB)
-0.2
IMAGINARY
850 860 870 880 890 900 910 920 930 940
-5
GAIN FROM MAX GAIN (dB)
MAX2550 toc49
-0.1
-0.3
-0.5
RXIN5 PIN S-PARAMETER
0
-0.2
-0.25
1940
1920
REAL
-0.1
-0.4
IMAGINARY
-0.35
-0.6
S-PARAMETER
0
REAL
-0.05
MAX2550 toc51
-0.2
0.1
S-PARAMETER
REAL
0.2
MAX2550 toc47
MAX2550 toc46
0.05
S-PARAMETER
S-PARAMETER
-0.1
RXIN4 PIN S-PARAMETER
0.10
MAX2550 toc48
RXIN2 PIN S-PARAMETER
0
0
2
4
6
8
10
PGA GAIN CODE
12
14
-35
0.1
1
10
OFFSET FREQUENCY (MHz)
100
29
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
Tx ONLY MODEBAND1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
-10
0.222
-40
0.216
0.214
TA = +25°C
0.212
-50
0.225
TA = +85°C
0.220
TA = -40°C
0.210
TA = -40°C
0.208
-70
ICC (A)
-30
-60
0.215
0.206
0.210
0.204
3.0
10k
Tx ONLY MODE BAND8
SUPPLY CURRENT vs. SUPPLY VOLTAGE
TA = +25°C
0.240
3.2
0.230
TA = -40°C
0.225
0.220
3.5
3.1
3.2
3.3
VCC (V)
Maxim Integrated
3.4
3.5
3.6
3.1
3.2
3.3
3.4
3.5
3.6
Tx IDLE MODE BAND5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
TA = +85°C
0.035
0.045
0.035
0.030
TA = -40°C
0.025
TA = +85°C
0.040
TA = +25°C
0.020
TA = +25°C
0.025
TA = -40°C
0.020
0.015
0.015
0.010
0.010
0.005
0.005
0
3.0
3.0
3.6
Tx IDLE MODE BAND1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
0.040
ICC (A)
TA = +85°C
3.4
VCC (V)
0.030
0.235
3.3
VCC (V)
0.045
MAX2550 toc55
0.245
3.1
MAX2550 toc57
100
1k
OFFSET FREQUENCY (kHz)
ICC (A)
10
MAX2550 toc56
-80
ICC (A)
TA = +25°C
0.230
0.218
ICC (A)
ATTENUATION (dB)
TA = +85°C
0.220
-20
0.235
MAX2550 toc53
0.224
MAX2550 toc52
0
Tx ONLY MODE BAND5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX2550 toc54
GSM FILTER RESPONSE
vs. OFFSET FREQUENCY
0
3.0
3.1
3.2
3.3
VCC (V)
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
VCC (V)
30
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
Tx IDLE MODE BAND8
SUPPLY CURRENT vs. SUPPLY VOLTAGE
4.0
0.02
4
3.0
2.5
PO (dBm)
PO (dBm)
ICC (A)
TA = -40°C
0.03
5
TA = -40°C
TA = +25°C
3.5
TA = +25°C
TA = +85°C
2.0
TA = -40°C
3
TA = +25°C
2
1.5
TA = +85°C
1.0
0.01
MAX2550 toc60
4.5
0.04
6
MAX2550 toc59
TA = +85°C
0.05
5.0
MAX2550 toc58
0.06
Tx BAND5 MAXIMUM OUTPUT
POWER vs. FREQUENCY
Tx BAND1 MAXIMUM OUTPUT
POWER vs. FREQUENCY
1
0.5
3.1
3.2
3.3
3.4
3.5
2100 2110 2120 2130 2140 2150 2160 2170 2180
855 860 865 870 875 880 885 890 895 900
VCC (V)
FREQUENCY (MHz)
FREQUENCY (MHz)
Tx BAND8 MAXIMUM OUTPUT
POWER vs. FREQUENCY
Tx OUTPUT POWER
vs. GAIN SETTINGS, HIGH BAND
LOW BAND Tx OUTPUT POWER AND
OUTPUT POWER ERROR vs. GAIN SETTINGS
TA = +25°C
0
PO ERROR
TA = +85°C
-10
6
5
PO (dBm)
TA = -40°C
4
TA = +85°C
TA = +25°C
3
TA = -40°C
TA = +85°C
-20
PO ERROR
TA = +25°C
-60
PO ERROR
TA = -40°C
925
930
935
940
945
950
FREQUENCY (MHz)
Maxim Integrated
955
960
-10
-2
-70
0
2
-1
-50
1
0
1
0
256
512
Tx GAIN SETTINGS
768
1024
MAX2550 toc63
10
3
0
-30
-40
2
4
PO (dBm)
7
MAX2550 toc62
10
MAX2550 toc61
8
PO (dBm)
0
0
3.6
PO ERROR (dB)
3.0
TA = +25°C
PO ERROR
TA = +85°C
3
2
TA = -40°C
-20
4
TA = +85°C
1
-30
0
-40
-1
-50
-3
-60
-4
-70
PO ERROR
TA = +25°C
-2
PO ERROR
TA = -40°C
-3
-4
0
256
512
768
1024
Tx GAIN SETTINGS
31
PO ERROR (dB)
0
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
LOW BAND Tx GAIN STEP
vs. GAIN SETTINGS
8
MAX2550 toc65
0.15
BAND1 Tx EVM vs. OUTPUT POWER
0.20
MAX2550 toc64
0.20
0.15
MAX2550 toc66
HIGH BAND Tx GAIN STEP
vs. GAIN SETTINGS
7
2110MHz, 2170MHz
TA = -40°C
0.05
0
TA = +25°C
TA = -40°C
TA = +85°C
0.05
0
-0.10
768
1024
256
Tx GAIN SETTINGS
BAND5 Tx EVM vs. OUTPUT POWER
860MHz, 895MHz
TA = +85°C
4
3
2
860MHz, 895MHz
TA = +25°C
927MHz, 957MHz
TA = -40°C
-50
-30
PO (dBm)
Maxim Integrated
-10
10
-20
0
-20
-21
-22
20
2110MHz, 2170MHz
TA = -40°C
-23
927MHz, 957MHz
TA = +85°C
5
4
3
-24
2110MHz, 2170MHz
TA = +85°C
-25
-26
-27
-28
927MHz, 957MHz
TA = +25°C
1
0
-70
-40
Tx TM6 RCDE, BAND1
2
1
-60
1024
PO (dBm)
7
Tx EVM (%)
Tx EVM (%)
768
BAND8 Tx EVM vs. OUTPUT POWER
6
5
512
8
MAX2550 toc67
860MHz, 895MHz
TA = -40°C
6
2110MHz, 2170MHz
TA = +25°C
Tx GAIN SETTINGS
8
7
2110MHz, 2170MHz
TA = +85°C
0
0
Tx EVM (dB)
512
MAX2550 toc68
256
3
1
-0.10
0
4
2
TA = +25°C
TA = -40°C
TA = +85°C
-0.05
5
MAX2550 toc69
-0.05
0.10
Tx EVM (%)
GAIN STEP (dB)
GAIN STEP (dB)
6
0.10
2110MHz, 2170MHz
TA = +25°C
-29
-30
0
-70
-50
-30
PO (dBm)
-10
10
-60
-40
-20
PO (dBm)
0
20
32
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
Tx OUTPUT SPECTRUM, HIGH BAND
-40
860MHz, 894MHz
TA = -40°C
-25
-26
POWER (dBm)
860MHz, 894MHz
TA = +85°C
-50
-60
-70
-50
-28
-90
-90
-100
-100
-30
-60
-40
-20
PO (dBm)
0
BAND1 ADJACENT CHANNEL POWER
RATIO AT 0dBM vs. FREQUENCY
-52
-54
2.1400
FREQUENCY (GHz)
-110
865.0
2.1450
-50
-52
-54
-50
-52
-54
-58
-58
-58
TA = +25°C, ACPL
TA = +25°C, ACPR
TA = -40°C, ACPL
TA = -40°C, ACPR
TA = +85°C, ACPL
TA = +85°C, ACPR
-62
-64
-66
-68
-70
ACP (dBc)
-56
ACP (dBc)
-56
-60
TA = +25°C, ACPL
TA = +25°C, ACPR
TA = -40°C, ACPL
TA = -40°C, ACPR
TA = +85°C, ACPL
TA = +85°C, ACPR
-62
-64
-66
-68
FREQUENCY (MHz)
Maxim Integrated
-60
TA = +25°C, ACPL
TA = +25°C, ACPR
TA = -40°C, ACPL
TA = -40°C, ACPR
TA = +85°C, ACPL
TA = +85°C, ACPR
-62
-64
-66
-68
-70
2100 2110 2120 2130 2140 2150 2160 2170 2180
890.0
BAND8 ADJACENT CHANNEL POWER
RATIO AT 0dBM vs. FREQUENCY
-56
-60
877.5
FREQUENCY (GHz)
BAND5 ADJACENT CHANNEL POWER
RATIO AT 0dBM vs. FREQUENCY
MAX2550 toc73
-50
-80
-110
2.1275
20
MAX2550 toc72
-70
-80
860MHz, 894MHz
TA = +25°C
1AVG
-60
-27
-29
ACP (dBc)
-40
1AVG
2.5MHz /div
-20
-30
MAX2550 toc74
Tx EVM (dB)
-23
-24
2.5MHz/div
-20
-30
POWER (dBm)
-22
-10
MAX2550 toc71
MAX2550 toc70
-21
Tx OUTPUT SPECTRUM, LOW BAND
-10
MAX2550 toc75
Tx TM6 RCDE, BAND5
-20
-70
850
860
870
880
FREQUENCY (MHz)
890
900
920
930
940
950
960
FREQUENCY (MHz)
33
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
-60
-65
-65
-70
-75
-75
-75
TA = +25°C, ALT1I
TA = +25°C, ALT1U
TA = -40°C, ALT1I
TA = -40°C, ALT1U
TA = +85°C, ALT1I
TA = +85°C, ALT1U
-85
-95
-80
TA = +25°C, ALT1I
TA = +25°C, ALT1U
TA = -40°C, ALT1I
TA = -40°C, ALT1U
TA = +85°C, ALT1I
TA = +85°C, ALT1U
-85
-90
-95
-100
-95
-100
850
860
FREQUENCY (MHz)
4
-60
890
900
920
0
-10
-20
-30
-40
SWP
59 OF 100
-40
-50
-70
-90
-100
-80
-100
2
MARKER1 [T1] -13.54dBm
934.294871795MHz
D2 [T1] -31.22dB
2.845352564GHz
D3 [T1] -34.26dB
1.868589744GHz
-80
-90
Maxim Integrated
960
-70
-90
26.50
4
-60
-50
13.25
FREQUENCY (GHz)
3
-50
-80
-110
950
Tx OUTPUT SPECTRUM, BAND8
-20
-30
940
-10
MAX2550 toc80
MAX2550 toc79
-70
0
930
FREQUENCY (MHz)
POWER (dBm)
3 2
-50
D2 [T1] -37.51dB
6.412660256GHz
D3 [T1] -38.13dB
4.289262821GHz
D4 [T1] -43.52dB
2.123397436GHz
10
POWER (dBm)
-40
880
Tx OUTPUT SPECTRUM, BAND5
Tx OUTPUT SPECTRUM, BAND1
-30
870
FREQUENCY (MHz)
-10
-20
TA = +25°C, ALT1I
TA = +25°C, ALT1U
TA = -40°C, ALT1I
TA = -40°C, ALT1U
TA = +85°C, ALT1I
TA = +85°C, ALT1U
-85
-90
-100
2100 2110 2120 2130 2140 2150 2160 2170 2180
-80
MAX2550 toc81
-80
ALT1 (dBc)
-70
ALT1 (dBc)
-70
-90
POWER (dBm)
BAND8 ALTERNATE CHANNEL POWER
RATIO AT 0dBM vs. FREQUENCY
MAX2550 toc77
-65
ALT1 (dBc)
-60
MAX2550 toc76
-60
BAND5 ALTERNATE CHANNEL POWER
RATIO AT 0dBM vs. FREQUENCY
MAX2550 toc78
BAND1 ALTERNATE CHANNEL POWER
RATIO AT 0dBM vs. FREQUENCY
-110
0
13.25
FREQUENCY (GHz)
26.50
0
13.25
26.50
FREQUENCY (GHz)
34
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
TXOUTL S-PARAMETER, LOW BAND
0.4
0.3
-0.10
REAL
-0.15
-0.20
0
IMAGINARY
IMAGINARY
-0.4
2180
2185
2190
2195
2200
-60
800
950
1000
0
2000
4000
6000
8000
10,000
FREQUENCY (MHz)
LO FREQUENCY AND GAIN
vs. CHARGE-PUMP VOLTAGE
REG3[20:19] OR REG28[15:14] = 01
LO FREQUENCY AND GAIN
vs. CHARGE-PUMP VOLTAGE
REG3[20:19] OR REG28[15:14] = 10,
AND REG3[22:21] OR REG28[17:16] = 00
LO FREQUENCY AND GAIN
vs. CHARGE-PUMP VOLTAGE
WITH REG3[20:19] OR REG28[15:14] = 10,
AND REG3[22:21] OR REG28[15:14] = 01
MAX2550 toc86
KLO,
TA = +85°C
100
FLO,
TA = +85°C
80
KLO,
TA = +85°C
KLO,
TA = -40°C
2.1
120
60
0.80
LO GAIN (MHz/V)
LO FREQUENCY (GHz)
FLO,
KLO,
TA = +25°C
TA = +25°C
FLO,
TA = -40°C
FLO,
TA = -40°C
2.0
1.9
20
0
0.70
1
2
VCPOUT (V)
Maxim Integrated
3
4
150
100
1.8
KLO,
TA = -40°C
1.7
50
0
1.6
0
1
2
VCPOUT (V)
3
4
MAX2550 toc87
2.2
KLO,
TA = +85°C
2.1
200
FLO,
TA = +85°C
KLO,
TA = +25°C
40
0.75
FLO,
TA = +25°C
250
LO GAIN (MHz/ V)
FLO (GHz)
2.2
140
0
900
FREQUENCY (MHz)
MAX2550 toc85
0.90
850
FREQUENCY (MHz)
1.00
0.95
-30
-50
-0.3
-0.35
-20
-40
-0.2
-0.30
LO FREQUENCY (GHz)
0.1
-0.1
-0.25
0.85
-10
REAL
0.2
1.9
1.8
200
FLO,
TA = +25°C
FLO,
TA = -40°C
2.0
150
FLO,
TA = +85°C
KLO,
TA = +25°C
100
KLO,
TA = -40°C
1.7
250
50
0
1.6
0
1
2
3
4
VCPOUT (V)
35
KLO (MHz/ V)
S-PARAMETER
S-PARAMETER
-0.05
TA = +25°C
TA = +85°C
TA = -40°C
0
GAIN (dB)
0
Tx LOWPASS FILTER REJECTION
10
MAX2550 toc83
MAX2550 toc82
0.5
MAX2550 toc84
TXOUTH S-PARAMETER, HIGH BAND
0.05
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
LO FREQUENCY AND GAIN
vs. CHARGE-PUMP VOLTAGE
REG3[20:19] OR REG28[15:1] = 11
MAX2550 toc88
2.4
2.2
FLO,
TA = +25°C
120
KLO,
TA = -40°C
2.1
140
FLO,
TA = +85°C
2.0
100
80
KLO,
TA = +25°C
FREQUENCY (10kHz/div)
FLO,
TA = -40°C
MAX2550 toc89
160
LO GAIN (MHz/ V)
KLO,
TA = +85°C
2.3
LO FREQUENCY (GHz)
TURN-ON FREQUENCY SETTLING,
LOW BAND
60
1.9
1.8
40
0
1
2
3
TIME (20µs/div)
4
VCPOUT (V)
TURN-ON FREQUENCY SETTLING,
HIGH BAND
CHANNEL-SWITCH FREQUENCY SETTLING,
LOW BAND
FREQUENCY (10kHz /div)
TIME (20µs/div)
Maxim Integrated
MAX2550 toc91
FREQUENCY (10kHz/div)
MAX2550 toc90
TIME (20µs/div)
36
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
-80
-90
-100
-110
-120
2170MHz TA = -40°C
2170MHz TA = +25°C
2170MHz TA = +85°C
-130
-90
-100
-110
-120
-130
10
100
1k
1
10
100
FREQUENCY OFFSET (kHz)
Maxim Integrated
1k
10k
-40.0
-40.5
-40
-15
10
35
60
TEMPERATURE (°C)
INTEGRATED PHASE NOISE,
LOW BAND
GAIN FROM TXOUTH TO OTHER
RF PORTS vs. FREQUENCY
0
MAX2550 toc96
-46.2
820MHz
-46.4
-10
TXOUTL
-20
-46.6
-46.8
-47.0
-30
85
RXIN1~5
-40
-50
-47.2
960MHz
-47.4
-60
-70
-80
-47.8
0.1
2170MHz
-39.5
FREQUENCY OFFSET (kHz)
-47.6
-140
-39.0
10k
GAIN (dB)
-80
1
-46.0
INTEGRATED PHASE NOISE (dBc)
PHASE NOISE (dBc/Hz)
-70
MAX2550 toc95
LO PHASE NOISE
vs. FREQUENCY OFFSET LOW BAND
820MHz TA = -40°C
820MHz TA = +25°C
820MHz TA = +85°C
960MHz TA = -40°C
960MHz TA = +25°C
960MHz TA = +85°C
-38.5
-41.5
0.1
-60
-38.0
-41.0
-140
TIME (20µs/div)
2110MHz
-37.5
MAX2550 toc97
FREQUENCY (10kHz/div)
PHASE NOISE (dBc/Hz)
-70
-37.0
INTEGRATED PHASE NOISE (dBc)
2110MHz TA = -40°C
2110MHz TA = +25°C
2110MHz TA = +85°C
MAX2550 toc93
-60
MAX2550 toc92
MAX2550 toc94
INTEGRATED PHASE NOISE
vs. TEMPERATURE, HIGH BAND
LO PHASE NOISE
vs. FREQUENCY OFFSET HIGH BAND
CHANNEL-SWITCH FREQUENCY SETTLING,
HIGH BAND
-40
-15
10
35
TEMPERATURE (°C)
60
85
0
1000
2000
3000
4000
5000
6000
FREQUENCY (MHz)
37
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
TXOUTH
RXIN4
-30
RXIN3
-20
-40
-50
RXIN3
RXIN4
-40
GAIN (dB)
RXIN1~5
RXIN1
RXIN5
-30
-40
-30
GAIN (dB)
GAIN (dB)
RXIN2
RXIN5
GAIN FROM ALL OTHER RF PORTS
TO RXIN2 vs. FREQUENCY
MAX2550 toc100
-10
-20
-20
MAX2550 toc98
0
GAIN FROM ALL OTHER RF PORTS
TO RXIN1 vs. FREQUENCY
MAX2550 toc99
GAIN FROM TXOUTL TO OTHER RF PORTS
vs. FREQUENCY
-50
-50
-60
-60
-70
-70
-60
-80
TXOUTL, TXOUTH
-80
0
1000
2000
3000
4000
5000
6000
0
FREQUENCY (MHz)
1000
2000
3000
4000
5000
-30
RXIN1
RXIN5
-20
RXIN1
3000
RXIN3 RXIN5
RXIN2
-30
4000
5000
6000
-40
GAIN (dB)
GAIN (dB)
2000
GAIN FROM ALL OTHER RF PORTS
TO RXIN4 vs. FREQUENCY
-40
-50
-50
-60
-60
-70
-70
TXOUTL, TXOUTH
-80
0
1000
2000
3000
4000
FREQUENCY (MHz)
Maxim Integrated
1000
FREQUENCY (MHz)
MAX2550 toc101
RXIN4
RXIN2
0
FREQUENCY (MHz)
GAIN FROM ALL OTHER RF PORTS TO
RXIN3 vs. FREQUENCY
-20
TXOUTL, TXOUTH
-80
6000
MAX2550 toc102
-70
5000
TXOUTL, TXOUTH
-80
6000
0
1000
2000
3000
4000
5000
6000
FREQUENCY (MHz)
38
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Typical Operating Characteristics (continued)
(MAX2550 EV kit and MAX-PHY FPGA evaluation platform, TA = +25NC, unless otherwise noted. Registers set as described in
Tables 20 and 21, VCC_ = 3.3V, fREFIN = 19.2MHz, all sensitivity levels and blocker levels are antenna referred.)
GAIN FROM ALL OTHER RF PORTS
TO RXIN5 vs. FREQUENCY
RXIN2
RXIN3
VAFCDAC (V)
-50
0.5
2.0
0.4
VSTEP
1.5
0.3
-60
1.0
-70
0.5
0.2
VOUT, TA = +85°C, +25°C, -40°C
TXOUTL, TXOUTH
-80
0
1000
2000
3000
4000
0.1
0
5000
6000
0
0
1024
FREQUENCY (MHz)
TEMPERATURE SENSOR
TURN-ON TRANSIENT
0.7
0.6
2.5
-40
GAIN (dB)
MAX2550 toc104
3.0
2048
3072
4096
AFCDAC[11:0] CODE
TEMPERATURE SENSOR SWITCHING
TRANSIENT FROM CODE 4095 TO 0
MAX2550 toc105
TEMPERATURE SENSOR CODE
vs. TEMPERATURE
MAX2550 toc106
35
CH1: CSB
MAX2550 toc107
-30
RXIN4
STEP (mV)
RXIN1
MAX2550 toc103
-20
AFCDAC OUTPUT VOLTAGE
AND STEP vs. AFCDAC CODE
30
FULL-DUPLEX MODE
25
OUTPUT CODE
CH1: CSB
CH2: AFCOUT
CH2: AFCOUT
20
15
IDLE MODE
10
CH1 1V/div
CH2 500mV/div
CH1 1V/div
CH2 500mV/div
5
0
1µs/div
1µs/div
-40
-15
10
35
60
85
TEMPERATURE (°C)
Maxim Integrated
39
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
SCLK
VCC_RXPLL
BYPASS_RX
CPOUT_RX
GND_RXVCO
VCC_RXVCO
DOUT
VCC_MXR
MIXINH
MIXINL
GPO3
VCC_LNA
LNAOUTL
TOP VIEW
LNAOUTH
Pin Configuration
42 41 40 39 38 37 36 35 34 33 32 31 30 29
REFEN 43
28 VCC_CLKPLL
RXIN2 44
27 GND_CLKVCO
26 VCC_CLKVCO
GND_LNAP 45
RXIN1 46
25 N.C.
GPO2 47
24 VCC_RXBB
RXIN3 48
23 RXOUTQ-
GND_LNAC 49
22 RXOUTQ+
MAX2550
RXIN4 50
21 RXOUTI20 RXOUTI+
GND_LNAI 51
RXIN5 52
19 AFC_OUT
GPO1 53
18 VCC_TXVCO
17 GND_TXVCO
CS 54
VCC_TXRF 55
EP
+
16 BYPASS_TX
15 REFIN
GND_TXH
DIN
TXINI+
9
10 11 12 13 14
TQFN
REFOUT
TXOUTH
8
VCC_REF
TXOUTL
7
VCC_TXPLL
6
VCC_TXBB
5
CPOUT_TX
4
TXINQ-
3
TXINQ+
2
TXINI-
1
GND_TXL
VCC_PAD 56
Pin Description
PIN
NAME
1
TXOUTL
2
GND_TXL
Tx Ground. Connect directly to ground plane.
3
TXOUTH
High-Band TXRF Output. Internally matched to 50I over the band of operation.
4
GND_TXH
5
DIN
6
TXINI+
Transmitter Noninverting In-Phase Input. Accepts baseband sigma-delta modulated digital bit
streams. Connect directly to the baseband processor.
7
TXINI-
Transmitter Inverting In-Phase Input. Accepts baseband sigma-delta modulated digital bit streams.
Connect directly to the baseband processor.
Maxim Integrated
FUNCTION
Low-Band TXRF Output. Internally matched to 50I over the band of operation.
High-Band Tx Output Ground. Connect directly to ground plane.
Data Input of the 4-Wire Serial Interface
40
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Pin Description (continued)
PIN
NAME
FUNCTION
8
TXINQ+
Transmitter Noninverting Quadrature Input. Accepts baseband sigma-delta modulated digital bit
streams. Connect directly to the baseband processor.
9
TXINQ-
Transmitter Inverting Quadrature Input. Accepts baseband sigma-delta modulated digital bit
streams. Connect directly to the baseband processor.
10
VCC_TXBB
Baseband Tx Path Supply. Connect to a regulated supply voltage. Bypass each supply to the PCB
ground plane with a capacitor placed as close as possible to the pin. Do not share ground vias
among multiple bypass capacitors.
11
CPOUT_TX
Charge-Pump Output for Tx Synthesizer. Also used as the tuning voltage for Tx VCO. Connect to an
external loop filter.
12
VCC_TXPLL
Tx Synthesizer Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB
ground plane with a capacitor placed as close as possible to the pin. Do not share ground vias
among multiple bypass capacitors.
13
REFOUT
Reference Clock Buffer Output. Configurable by the REFEN pin and SPI. See the REFOUT
Functionality section for details.
14
VCC_REF
Reference Buffer Supply. Connect to a regulated supply voltage. Bypass each supply pin to the
PCB ground plane with a capacitor placed as close as possible to the pin. Do not share ground
vias among multiple bypass capacitors.
15
REFIN
16
BYPASS_TX
Tx VCO Bias Bypass. Bypass to ground with a 470nF capacitor as close as possible.to the pin.
17
GND_TXVCO
Tx VCO Ground. Connect to the PCB ground plane with a separate via.
18
VCC_TXVCO
19
AFC_OUT
AFC DAC Output. The DAC is controlled by the register TXLO_AFCDAC (Table 43).
20
RXOUTI+
Receiver Noninverting In-Phase Output. Digital sigma-delta modulated LVDS output. Connect
directly to the baseband processor.
21
RXOUTI-
Receiver Inverting In-Phase Output. Digital sigma-delta modulated LVDS output. Connect directly to
the baseband processor.
22
RXOUTQ+
Receiver Noninverting Quadrature Output. Digital sigma-delta modulated LVDS output. Connect
directly to the baseband processor.
23
RXOUTQ-
Receiver Inverting Quadrature Output. Digital sigma-delta modulated LVDS output. Connect directly
to the baseband processor.
24
VCC_RXBB
Baseband Rx Path Supply. Regulated Power-Supply Input. Connect to a regulated supply voltage.
Bypass each supply pin to the PCB ground plane with a capacitor placed as close as possible to
the pin. Do not share ground vias among multiple bypass capacitors.
25
N.C.
26
VCC_CLKVCO
Maxim Integrated
Reference Input Pin. Connected to TCXO. Requires a DC-blocking capacitor (1nF).
Tx VCO Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB ground
plane with a capacitor placed as close as possible to the pin. Do not share ground vias among
multiple bypass capacitors.
No Connection. Leave unconnected.
Clock Generation VCO Supply. Connect to a regulated supply voltage. Bypass each supply pin to
the PCB ground plane with a capacitor placed as close as possible to the pin. Do not share ground
vias among multiple bypass capacitors.
41
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Pin Description (continued)
PIN
NAME
FUNCTION
27
GND_CLKVCO
28
VCC_CLKPLL
29
SCLK
30
VCC_RXPLL
Rx Synthesizer Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB
ground plane with a capacitor placed as close as possible to the pin. Do not share ground vias
among multiple bypass capacitors.
31
CPOUT_RX
Rx Synthesizer Charge-Pump Output. Also used as the tuning voltage for Rx VCO. Connect to an
external loop filter.
Clock Generation Synthesizer Ground. Connect clock generation synthesizer ground to the PCB
ground plane with a separate via.
Clock Generation Synthesizer Supply. Connect to a regulated supply voltage. Bypass each supply
pin to the PCB ground plane with a capacitor placed as close as possible to the pin. Do not share
ground vias among multiple bypass capacitors.
SPI Interface Clock Input. Data is clocked in to the serial data input on the rising edge of SCLK.
See Figure 4 for details.
32
BYPASS_RX
Rx VCO Bias Bypass. Bypass to ground with a 470nF capacitor as close as possible to the pin.
33
GND_RXVCO
Rx VCO Ground. Connect ground to the PCB ground plane with a separate via.
34
VCC_RXVCO
35
DOUT
36
VCC_MXR
37
MIXINH
High-Band Rx Mixer Input. RF input to mixer from an external filter (optional). Internally DC-blocked
and matched to 50I.
38
MININL
Low-Band Rx Mixer Input. RF input to mixer from an external filter (optional). Internally DC-blocked
and matched to 50I.
39
GPO3
General-Purpose Output. Controlled by register 7 (Table 20). GPO3 can also be configure as a PLL
lock-detect output.
40
VCC_LNA
LNA Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB ground
plane with a capacitor placed as close as possible to the pin. Do not share ground vias among
multiple bypass capacitors.
41
LNAOUTL
Low-Band LNA Output. RF output from LNA 3 to external SAW filter. Internally DC-blocked and
matched to 50I.
42
LNAOUTH
High-Band LNA Output. RF Output from LNA 1 to an external SAW filter. Internally DC-blocked and
matched to 50I
REFEN
Configuration for REFOUT. When REFEN = 0, REFOUT can be configured for CMOS or low-voltage
output by the SPI interface. See the REFOUT Functionality section. When REFEN = 1, REFOUT is
configured as REFIN buffer with CMOS output.
44
RXIN2
Low-Noise Amplifier Input 2. Requires AC-coupling and external matching.
45
GND_LNAP
46
RXIN1
Low-Noise Amplifier Input 1. Requires AC-coupling and external matching.
47
GPO2
General-Purpose Output. Controlled by register 7.
43
Maxim Integrated
Rx VCO Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB ground
plane with a capacitor placed as close as possible to the pin. Do not share ground vias among
multiple bypass capacitors.
SPI Data Output
Rx Mixer Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB
ground plane with a capacitor placed as close as possible to the pin. Do not share ground vias
among multiple bypass capacitors.
.
PCS LNA Ground. Connect directly to ground plane.
42
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Pin Description (continued)
PIN
NAME
FUNCTION
48
RXIN3
49
GND_LNAC
Low-Noise Amplifier Input 3. Requires AC-coupling and external matching.
50
RXIN4
51
GND_LNAI
52
RXIN5
Low-Noise Amplifier Input 5. Requires AC-coupling and external matching.
53
GPO1
General-Purpose Output. Controlled by register 23.
54
CS
55
VCC_TXRF
Tx Upconverter Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB
ground plane with a capacitor placed as close as possible to the pin. Do not share ground vias
among multiple bypass capacitors.
56
VCC_PAD
PA Driver Supply. Connect to a regulated supply voltage. Bypass each supply pin to the PCB
ground plane with a capacitor placed as close as possible to the pin. Do not share ground vias
among multiple bypass capacitors.
—
EP
Ground for Cellular LNA. Connect directly to the ground plane.
Low-Noise Amplifier Input 4. Requires AC-coupling and external matching.
IMT LNA Ground. Connect directly to the ground plane.
Serial-Interface Chip Select. See Figure 4.
Exposed Pad. Connect to a large ground plane to maximize thermal performance.
Detailed Description
Quad RF Inputs
The MAX2550 features five independent RF inputs.
RXIN1 and RXIN3 are used for receiving WCDMA Bands
I, V, VI, and VIII. Bands I, V, VI, and VIII WCDMA/PCS
downlink can be monitored (network listen) by programming the part to receive through the RXIN4 and RXIN5
inputs. RXIN2 can be used to monitor Band III. This
allows the base station to monitor surrounding cells to
select the best operating conditions (transmit power,
codes, frequency, capacity, etc.)
REFOUT Functionality
The MAX2550 features a reference oscillator buffered
output that is configurable by the REFEN input and
Register 29. REFOUT can be configured as CMOS or
as a low-voltage output. Table 2 lists all REFOUT
configurations.
Receiver System Gain Control
The device features programmable-gain LNAs and programmable variable-gain baseband amplifiers, allowing
the system gain to be entirely controlled by the serial
interface. RX1, RX2, RX3, and RX5 have three possible
gain states: high gain, medium gain, and low gain. RX4
Maxim Integrated
has high and low gain modes. The gain state of the LNA
in operation is programmed by the LNAGAIN bits in the
RX_GAIN[15:14] register. Each LNA requires an external
matching network to optimize system sensitivity. Table 3
provides S11 for each LNA input over the specified band
of operation, Table 4 provides S11 of RXIN1 and RXIN3
LNA output, and Table 5 provides S11 of the mixer input.
The receiver also features a separate dedicated receive
path for the 1930MHz to 1995MHz band that enables
monitoring.
The baseband amplifiers has 16 possible gain states with
each LSB providing a gain step of 3dB. The gain state of
the baseband amplifiers is programmed by the PGAGAIN
bits in the RX_GAIN[11:8] register. The dynamic range of
the data converters when using the recommended sampling rates is sufficient to allow for minimal switching of
system gain over varying input signal power. Tables 6
and 7 provide suggested LNA and PGA settings for various input signal power ranges. Two possible LNA/PGA
gain settings are provided for the uplink band. Case 1
(Table 6) allows for 3GPP TS25.104 compliance under all
conditions while case 2 (Table 7) allows best sensitivity,
but compromises adjacent channel selectivity and intermodulation in high-gain LNA mode.
43
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 1. RF Input/Output Frequency Range
PIN
FUNCTION
FREQUENCY RANGE (MHz)
RXIN1
Band I WCDMA uplink Rx
1920 to 1980
RXIN2
Band III DCS monitor
1805 to 1880
RXIN3
Band V uplink WCDMA/GSM
Band VI WCDMA uplink
Band VIII uplink WCDMA
824 to 849
830 to 840
880 to 915
RXIN4
Band V downlink WCDMA/GSM monitor
Band VI WCDMA monitor
Band VIII downlink WCDMA/GSM monitor
865 to 894
875 to 885
925 to 960
RXIN5
Band I WCDMA monitor
2110 to 2170
TXOUTL
Band V WCDMA downlink Tx
Band VI WCDMA downlink Tx
Band VIII WCDMA downlink Tx
865 to 894
875 to 885
925 to 960
TXOUTH
Band I WCDMA downlink Tx
2110 to 2170
Table 2. REFOUT Output Configurations
INPUT
REFEN INPUT
0
REFOUT_LV_CMOS_SEL
(TXLO_REF)
OUTPUT TYPE
0
X
0
1
X
Off
CMOS
Low voltage
CMOS
1
1
OUTPUT
REFIN_ENOUT3
(TXLO_REF)
X
Table 3. Typical RXIN1 (High Gain) S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
1880
34.3
-40.1
1955
36.0
-39.8
1885
34.4
-40.0
1960
36.1
-39.8
1890
34.6
-40.0
1965
36.2
-39.8
1895
34.7
-40.0
1970
36.3
-39.8
1900
34.8
-39.9
1975
36.4
-39.9
1905
34.9
-39.9
1980
36.5
-39.9
1910
35.0
-39.9
1985
36.6
-39.9
1915
35.1
-39.8
1990
36.6
-39.9
1920
35.3
-39.8
1995
36.7
-40.0
1925
35.4
-39.8
2000
36.8
-40.0
1930
35.5
-39.8
2005
36.9
-40.0
1935
35.6
-39.8
2010
36.9
-40.1
1940
35.7
-39.8
2015
37.0
-40.1
1945
35.8
-39.8
2020
37.1
-40.2
1950
35.9
-39.8
Maxim Integrated
44
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 4. Typical RXIN3 (High Gain) S11
Parameters (VCC_ = +3.3V, TA = +25°C)
Table 5. Typical RXIN4 (High Gain) S11
Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
1765
S11 REAL
23.4
S11 IMAGINARY
-38.9
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
840
22.0
-53.8
1770
23.5
-38.8
845
22.5
-53.6
1775
23.7
-38.6
850
22.9
-53.4
1780
23.8
-38.5
855
23.3
-53.3
1785
23.9
-38.4
860
23.7
-53.2
1790
24.1
-38.3
865
24.1
-53.1
1795
24.2
-38.2
870
24.3
-53.0
1800
24.3
-38.1
875
24.6
-53.0
1805
24.4
-38.0
880
24.8
-52.9
1810
24.6
-37.9
885
24.9
-52.9
1815
24.7
-37.8
890
25.0
-52.8
1820
24.8
-37.7
895
25.1
-52.8
1825
24.9
-37.6
900
25.1
-52.7
1830
25.0
-37.5
905
25.3
-52.3
1835
25.1
-37.4
910
25.6
-52.2
1840
25.2
-37.3
915
25.9
-52.1
1845
25.3
-37.2
920
26.2
-52.0
1850
25.4
-37.1
925
26.4
-52.0
1855
25.5
-37.1
930
26.5
-51.9
1860
25.6
-37.0
935
26.6
-51.9
1865
25.7
-36.9
940
26.7
-51.8
1870
25.8
-36.8
945
26.8
-51.8
1875
25.9
-36.7
950
26.8
-51.7
1880
26.0
-36.6
955
26.8
-51.6
1885
26.1
-36.5
960
26.8
-51.5
1890
26.1
-36.4
965
26.7
-51.4
1895
26.2
-36.3
970
26.6
-51.2
1900
26.3
-36.2
975
26.5
-51.1
1905
26.4
-36.2
980
26.4
-50.9
1910
26.5
-36.1
1915
26.6
-36.0
1920
26.6
-35.9
Maxim Integrated
45
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 6. Typical RXIN5 (High Gain) S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
2070
16.9
-33.3
2150
17.6
-30.2
2075
16.9
-33.1
2155
17.6
-30.0
2080
17.0
-32.9
2160
17.7
-29.8
2085
17.0
-32.7
2165
17.7
-29.6
2090
17.0
-32.5
2170
17.8
-29.5
2095
17.1
-32.3
2175
17.9
-29.3
2100
17.1
-32.2
2180
17.9
-29.1
2105
17.1
-32.0
2185
18.0
-28.9
2110
17.2
-31.8
2190
18.1
-28.7
2115
17.2
-31.6
2195
18.1
-28.5
2120
17.3
-31.4
2200
18.2
-28.3
2125
17.3
-31.2
2205
18.3
-28.2
2130
17.3
-31.0
2210
18.4
-28.0
2135
17.4
-30.8
2070
16.9
-33.3
2140
17.4
-30.6
2075
16.9
-33.1
2145
17.5
-30.4
Table 7. Typical LNAOUTH (High Gain) S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
1880
28.2
-5.7
1955
33.0
1.5
1885
28.5
-5.2
1960
33.3
2.0
1890
28.8
-4.7
1965
33.7
2.5
34.1
2.9
1895
29.1
-4.3
1970
1900
29.4
-3.8
1975
34.4
3.4
1905
29.7
-3.3
1980
34.8
3.9
1910
30.0
-2.8
1985
35.2
4.4
35.6
4.9
1915
30.3
-2.4
1990
1920
30.6
-1.9
1995
36.0
5.4
1925
31.0
-1.4
2000
36.4
5.8
1930
31.3
-0.9
2005
36.8
6.3
37.2
6.8
1935
31.6
-0.4
2010
1940
31.9
0.0
2015
37.6
7.3
1945
32.3
0.5
2020
38.0
7.8
1950
32.6
1.0
Maxim Integrated
46
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Digital I/Q Receive Interface
The baseband output of the device is in the form of a
digital I/Q interface. The received signals are sampled
by a 1-bit sigma-delta modulator clocked at 153.6MHz
for WCDMA and 26MHz for GSMK. The digital bitstream
out of the converter is transported from the device to
the baseband processor by a low-voltage differential
signaling (LVDS) interface. The output data is single-bit
nonreturn-to-zero (NRZ). The device does not perform
any encoding of the data and no clock is exchanged
between the device and the baseband processor.
The device performs limited analog filtering only to minimize aliasing; all channel filtering is realized entirely in
the digital domain. The digital filtering removes undesired
signals as well as the inherent quantization noise of the
sigma-delta modulator. In addition, the device’s analog
filters include a pole at approximately half the channel
bandwdith that must be equalized by the digital filters.
The differential outputs require a termination resistor at
the digital baseband IC inputs. The output current of the
LVDS drivers are programmable by the LVDSI_2X bit in
the BB_CLKOUT register to accommodate different termination resistors. Set LVDSI_2X = 1 to set the drive current to nominal for operation with 120I differential loads.
Digital I/Q Transmit Interface
The Tx baseband input of the device is in the form of a
sigma-delta modulated digital I/Q interface. The digital
bitstream of the baseband processor is transported
to the device by a low-voltage differential signaling
(LVDS) or DDR3 interface. The LVDS signal has a typical
common-mode voltage of 1.2V and a differential swing
of 140mVP-P, while DDR3 has a common-mode voltage
of 0.75V and differential of 600mVP-P. For LVDS, the
input data should be in single-bit NRZ format; no clock
is exchanged between the baseband processor and the
device. The device recovers the I/Q bitstreams with an
on-chip data recovery circuit. The bitstream is converted
to an analog signal and filtered prior to upconversion to
an RF signal.
Maxim Integrated
Baseband Input Level
The baseband input is in digital 1-bit sigma-delta converted format. There are internal 1-bit I/Q DACs that restore
the level of the incoming digital signals to a repeatable
analog level in the device. At a given TX_GAIN value,
the RMS output power level depends on the density of
the bit stream, not the voltage level of the LVDS digital
signal. The density of the bit stream, in turn, depends
on the input level of the sigma-delta converter, which
resides in the baseband chip. The condition for the AC
performance in the EC table calls for -4dBFs peak, which
means -4dB relative to the full scale of the input of the
sigma-delta converter. The sigma-delta converter, coded
in Verilog, and implemented on FPGA has 10 bits (9 bits
+ sign) at the input. In this case, the full scale is Q511,
and -4dBFs peak means Q322 peak excursion. The RMS
level is lower than this number, depending on the peakaverage ratio of the signal. For TM1, the peak-average
is 10.6dB at 0.01%, so the RMS level of the baseband
signal is -14.6dBFs, or Q95.
DC Offset
While the inherent DC offset at the I/Q outputs is very
low, it is expected that the baseband processor digitally
removes any DC offset.
Digital Filters/Sigma Delta Modulator
Verilog code is available for implementation of the sigmadelta modulator and digital filters in the baseband processor. Contact the factory for more information.
Fractional-N Synthesizers
The device includes three fractional-N frequency synthesizers. One synthesizer is used to generate the receive
RF local oscillator (LO), the second is used to generate
the transmit RF local oscillator, while the third is used to
generate the ADC sampling clock. The loop filter for the
ADC sampling clock synthesizer is integrated on-chip.
RF synthesizers require an external loop filter. All synthesizers have 20 bits of fractional resolution.
47
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
LVDS
INTERFACE
ANALOG
PREFILTER
I MIXER
1-BIT SIGMADELTA ADC
I CHANNEL
PGA
1-BIT SIGMADELTA ADC
Q CHANNEL
PGA
120I
FRAC-N
SYNTHESIZER
MAX2550
DATA SYNC
DECIMATION
EQUALIZER
MATCHED
FILTER
LVDS
INTERFACE
ANALOG
PREFILTER
Q MIXER
120I
DEMOD
DATA SYNC
DECIMATION
CLOCK
GENERATOR
19.2MHz
TCXO
EQUALIZER
/K
MATCHED
FILTER
DIGITAL
FILTER
CLOCK
DIGITAL BASEBAND IC
Figure 1. Digital Baseband Receiver Interface
I
1-BIT
DAC
SIGMA-DELTA
CONVERTER
10
FULL SCALE IS (2(n-1) - 1)
WHERE n = NUMBER OF BITS.
FOR 10 BITS, FULL SCALE IS 511.
dBFs IS dB RELATIVE TO THIS FULL SCALE.
BASEBAND
MAX2550
DIGITAL RRC
Q
1-BIT
DAC
SIGMA-DELTA
CONVERTER
10
DIGITAL RRC
THE DENSITY OF 1S AND 0S HERE DETERMINES THE MAX2550
OUTPUT POWER, AND THE DENSITY IS DETERMINED BY THE LEVEL AT
THE INPUT OF THE SIGMA-DELTA CONVERTER.
Figure 2. Baseband Input Example
Maxim Integrated
48
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
RF Synthesizers
For the receiver the RF LO frequency is programmed
by the RXLO_FRAC [19:0] (Fractional) register and the
RXLO_SYN[7:0] (Integer) register. The synthesizer frequency is demonstrated by the following example.
Assume:
fREFIN = fCOMPARISON = 19.2MHz
RXLO_FRAC
fLO =
fREFIN × RXLO_SYN +
×K
2 20
where:
K = 1 if RXIN1, RXIN2, RXIN5
K = 0.5 if RXIN3, RXIN4
For the transmitter the RF LO frequency is programmed
by the TXLO_FRAC [19:0] (Fractional) register and the
TXLO_SYN[7:0] (Integer) register. The synthesizer frequency is demonstrated by the following example.
Assume:
fREFIN = fCOMPARISON = 19.2MHz
TXLO_FRAC
fLO =
fREFIN × TXLO_SYN +
× K
2 20
where:
K = 0.5 for TXOUTL
K = 1 for TXOUTH
Calculate the required divider ratio by dividing the LO
frequency by the reference frequency.
multiplying by 220 and rounding to the nearest whole
number. Then, convert the result to binary and program
the bits into the RXLO_FRAC.
Fractional-N divider = 0.479166 x 220 = 502442 =
0x7AAAA à RXLO_FRAC = 0x7AAAA
ADC Clock Synthesizer
The sampling clock frequency is controlled by the CINT
(BBCLK_SYN[7:0]) and CFRAC (BBCLK_FRAC[19:0])
registers. The sampling clock synthesizer does not need
to be repeatedly programmed during normal operation.
The sampling clock frequency (fADCCLK) is 153.6MHz in
WCDMA mode and 26MHz in GSM mode. The dynamic
range of the converters with this sampling frequency is
sufficient to meet all system specifications with very minimal control of the PGA.
Assume:
fREFIN = fCOMPARISON = 19.2MHz
ADC Clock Synthesizer
Fractional Frequency Correction
The ADC clock synthesizer uses a 20-bit frequency synthesizer and can be enhanced by a fractional error correction. Parameters PBYQ_RATUP and PBYQ_RATDN
implement the following function.
fADCCLK = fREFIN x (CINT + (CFRAC + PBYQ_RATUP/
(PBYQ_RATUP + PBYQ_RATDN))/220) x K
PBYQ_RATUP/(PBYQ_RATUP + PBYQ_RATDN) =
(fADCCLK/fREFIN - CINT) x 220 x K - CFRAC
where:
K = 8 if WCDMA
K = 48 if GSM/PCS/DCS
fLO x 2
1910MHz
=
= = 99.479166
Divider
fCOMPARISON 19.2MHz
The integer-N divider is equal to the integer portion of the
divider ratio, 99 in this example. Convert the integer-N decimal value to binary and program into the RXLO_SYN bits.
Integer-N divider = 99 = 0x63 = 0110 0011 à
RXLO_SYN = 0110 0011
The fractional-N divider is equal to the fractional portion
of the divider ration, 0.479166 in this example. Convert
the fractional portion of the divider to a 20-bit word by
Maxim Integrated
PBYQ_RATUP and PBYQ_RATDN should be chosen for
the best fit.
This feature can be enabled or disabled through EN_
PBYQDIV (REG15). Table 8 shows the PBYQ_
RATUP and PBYQ_RATDN with commonly used crystal
oscillator frequencies.
Power-Down Modes
The device features multiple power-down modes that can
be controlled by hardware or software. Table 9 describes
the various power-down modes.
49
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 8. Typical LNAOUTL (High Gain) S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
FREQUENCY (MHz)
S11 REAL
795
40.1
-4.0
870
52.7
S11 IMAGINARY
5.3
800
40.8
-3.3
875
53.6
5.8
805
41.6
-2.6
880
54.6
6.3
810
42.3
-1.9
885
55.6
6.7
815
43.1
-1.2
890
56.6
7.2
820
43.9
-0.6
895
57.6
7.6
825
44.7
0.1
900
58.6
8.0
830
45.5
0.7
905
59.7
8.4
835
46.4
1.3
910
60.7
8.8
840
47.2
1.9
915
61.8
9.1
845
48.1
2.5
920
62.9
9.4
850
49.0
3.1
925
64.0
9.7
855
49.9
3.7
930
65.1
10.0
935
66.3
10.2
860
50.8
4.2
865
51.7
4.8
Table 9. Typical MIXINH S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
FREQUENCY (MHz)
REAL
IMAGINARY
1880
28.55
-31.48
1955
31.31
-32.35
1885
28.77
-31.50
1960
31.45
-32.44
1890
28.98
-31.53
1965
31.59
-32.54
1895
29.19
-31.56
1970
31.72
-32.64
1900
29.39
-31.60
1975
31.84
-32.74
1905
29.59
-31.64
1980
31.96
-32.85
1910
29.79
-31.69
1985
32.07
-32.95
1915
29.98
-31.75
1990
32.18
-33.06
1920
30.16
-31.81
1995
32.28
-33.18
1925
30.34
-31.87
2000
32.37
-33.29
1930
30.52
-31.94
2005
32.46
-33.41
1935
30.69
-32.01
2010
32.54
-33.52
1940
30.85
-32.09
2015
32.61
-33.64
1945
31.01
-32.17
2020
32.68
-33.76
1950
31.16
-32.26
Maxim Integrated
50
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Carrier and
Sideband Suppression Optimization
The device delivers a typical carrier suppression of
-40dBc and a sideband suppression of -45dBc without
any external calibration; however, if greater suppression
is required, the device is capable of overriding the factory settings and accepting manual calibration from the
baseband processor.
RF Band Configuration
The device has configurable VCO and LO generation
to support Bands I, V, and VIII forward and reverse link
operation. In transmit signal path, LC tank is also configurable to optimize performance in both bands. Table 10
shows the key difference in SPI settings.
General-Purpose Outputs
The device is equipped with three general-purpose outputs. GPO3 can also be configured as a PLL lock detect
for the Rx, Tx, or Rx and Tx. See Table 20 for how to
properly configure the general-purpose outputs.
Table 10. Typical MIXINL S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
S11 REAL
S11 IMAGINARY
FREQUENCY (MHz)
REAL
IMAGINARY
795
25.70
-43.40
870
36.10
-30.90
800
26.10
-42.50
875
37.22
-30.22
805
26.50
-41.60
880
38.39
-29.58
810
27.00
-40.70
885
39.60
-28.97
815
27.50
-39.80
890
40.85
-28.41
820
28.00
-38.90
895
42.14
-27.89
825
28.60
-38.00
900
43.48
-27.42
830
29.20
-37.10
905
44.85
-27.00
835
29.90
-36.30
910
46.27
-26.64
840
30.60
-35.50
915
47.73
-26.35
845
31.40
-34.70
920
49.22
-26.11
850
32.20
-33.90
925
50.75
-25.95
855
33.10
-33.10
930
52.31
-25.87
860
33.97
-32.34
935
53.91
-25.86
865
35.01
-31.60
Maxim Integrated
51
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Power-On Reset (POR)
Recommended defaults are not guaranteed upon powerup and are provided for reference only. All registers must
be written with the proper values no earlier than 100Fs
after power-up. Figure 3 displays the time it takes for
Tx/Rx PLL lock detect (GPO3) to become active after
power-up and enabling the correct registers for proper
operation. All reserved registers should only be written
with default values.
Temperature Sensor
An on-chip temperature sensor is enabled by programming RX_ENABLE = 1. To trigger temperature sensor ADC reading, program RX_MISC2 from 0 to 1.
The ADC acquires the 5-bit logic output in 2Fs; the temperature sensor needs to be on (RX_ENABLE = 1)
to maintain the ADC logic output. To read the 5-bit logic
output through the DOUT pin, apply 4-wire SPI readout
programming sequence to RX_MISC2.
4-Wire Serial Interface
The device includes 32 programmable 26-bit registers.
The most significant bit (MSB) is the read/write selection
bit (R/W in Figure 4). The next 5 bits are register address
(A[4:0] in Figure 4). The 26 least significant bits (LSBs)
are register data (D[25:0] in Figure 4). Register data is
loaded through the 4-wire SPI/MICROWIREK-compatible
serial interface. MSB of data at the DIN pin is shifted in
first and is framed by CS. When CS is low, input data is
shifted at the rising edge of the clock at the SCLK pin. At
CS rising edge, the 26-bit data bits are latched into the
register selected by the address bits. See Figure 4. There
is no power-on SPI register self-reset functionality in the
device; the user must program all register values after
power-up. During the read mode, register data selected
by address bits is shifted out to the DOUT pin at the falling edges of the clock.
CS
SCLK
DIN
INTERNAL
BUILDING BLOCK
ENABLE BITS
W/ADDRESS/DATA
32tSCLK
32tSCLK
WCDMA = 200µs
TXPLL
LOCK DETECT
AT GPO3
RXPLL
LOCK DETECT
AT GPO3
WCDMA = 200µs
XCVR IS ENABLED
XCVR IS READY
Figure 3. POR PLL Lock-Detect Time
MICROWIRE is a trademark of National Semiconductor Corp.
Maxim Integrated
52
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 11. Typical TXOUTL S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
REAL
IMAGINARY
FREQUENCY (MHz)
REAL
IMAGINARY
700.0
25.5
63.9
1500.0
9.7
20.1
750.0
52.3
76.8
1550.0
9.6
22.5
800.0
103.7
59.2
1600.0
9.6
24.8
850.0
107.4
-9.9
1650.0
9.6
27.1
900.0
64.8
-32.6
1700.0
9.7
29.4
950.0
39.6
-27.2
1750.0
9.8
31.6
1000.0
27.2
-18.9
1800.0
10.0
33.9
1050.0
20.7
-11.8
1850.0
10.2
36.2
1100.0
16.9
-6.1
1900.0
10.4
38.6
1150.0
14.5
-1.3
1950.0
10.7
41.0
1200.0
12.9
2.7
2000.0
11.0
43.5
1250.0
11.8
6.3
2050.0
11.3
46.0
1300.0
11.1
9.4
2100.0
11.7
48.6
1350.0
10.5
12.3
2150.0
12.2
51.4
1400.0
10.1
15.0
2200.0
12.7
54.2
1450.0
9.9
17.6
Table 12. Typical TXOUTH S11 Parameters (VCC_ = +3.3V, TA = +25°C)
FREQUENCY (MHz)
REAL
IMAGINARY
FREQUENCY (MHz)
REAL
IMAGINARY
700.0
3.7
21.9
1500.0
41.1
89.9
750.0
3.9
23.9
1550.0
58.2
98.0
800.0
4.2
26.0
1600.0
83.9
101.3
850.0
4.5
28.2
1650.0
117.3
91.2
900.0
4.8
30.5
1700.0
146.2
58.0
950.0
5.2
33.1
1750.0
149.1
10.8
1000.0
5.8
35.8
1800.0
126.3
-24.1
1050.0
6.4
38.9
1850.0
97.4
-38.3
1100.0
7.2
42.2
1900.0
74.0
-39.5
1150.0
8.3
45.8
1950.0
57.4
-35.4
1200.0
9.7
50.0
2000.0
45.8
-29.5
1250.0
11.5
54.6
2050.0
37.8
-23.5
1300.0
14.0
60.0
2100.0
32.0
-17.8
1350.0
17.5
66.1
2150.0
27.8
-12.6
1400.0
22.5
73.2
2200.0
24.7
-7.8
1450.0
29.9
81.2
Maxim Integrated
53
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 13. PBYQ_RATUP and PBYQ_RATDN Commonly Used Crystal Oscillator
Frequencies
fREFIN
(MHz)
STANDARD
Reference
Frequency
13
WCDMA
GSM
CINT
REG15
CFRAC
REG1
PBYQ_RATUP PBYQ_RATDN CINT
REG16
REG16
REG15
CFRAC
PBYQ_RATUP PBYQ_RATDN
REG14
REG16 REG16
Integer Fractional
Integer Fractional
Fractional LSB
Fractional LSB
Divide
Divide Fractional LSB
Divide
Divide Fractional LSB
Dither Down
Dither Down
Ratio
Ratio
Dither Up (dec)
Ratio
Ratio Dither Up (hex)
(dec)
(hex)
(dec)
(dec)
(hex)
(hex)
94
548485
59
6
5E
85E85
3B
6
15.36
80
0
0
0
50
0
0
0
19.2
64
0
0
0
40
0
0
0
20
61
461373
11
14
3D
70A3D
B
E
26
47
274242
62
3
2F
42F42
3E
3
13
96
0
0
0
60
0
0
0
15.36
81
262144
0
0
51
40000
0
0
19.2
65
0
0
0
41
0
0
0
20
62
419430
2
3
3E
66666
2
3
26
48
0
0
0
30
0
0
0
Table 14. Power-Down Modes
OPERATING MODE
REFEN PIN,
REG29
BLOCKS
ENABLE
REG00
BIAS
ENABLE
REG20
AFCDAC
ENABLE
REG30
CDR DIVIDER
ENABLE
REG16
CDR ENABLE
REG24
Sleep
0000
00000
0
0
0
0
AFC Only
0000
00000
0
1
0
0
Reference Buffer Only
1xxx or 0100
00000
0
1
0
0
Idle RX
1xxx or 0x11
00840
1
1
0
0
Idle TX
1xxx or 0x11
01000
1
1
1
1
RXIN1/TXOUTH Full
Duplex
1xxx or 0x11
79BFF
1
1
1
1
RXIN1 Only
1xxx or 0x11
009FF
1
1
0
0
RXIN3/TXOUTL Full
Duplex
1xxx or 0x11
79BFF
1
1
1
1
RXIN3 Only
1xxx or 0x11
009FF
1
1
0
0
RXIN4 Monitor
1xxx or 0x11
009FF
1
1
0
0
RXIN5 Monitor
1xxx or 0x11
009FF
1
1
0
0
TXOUTL Only
1xxx or 0x11
79240
1
1
1
1
TXOUTH Only
1xxx or 0x11
79240
1
1
1
1
RXIN2
1xx or 0x11
009FF
1
1
0
0
Maxim Integrated
54
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 15. RF Band Configuration
INPUT
PIN
RF RANGE
(MHz)
VCO SELECT
REG03
VCO ROH BAND
REG03
VCO DIVIDER
REG03
LNA/MIXER
SELECT
REG01
RXIN4_HB
REG06
RXIN1
1920 to 1980
10
01
10
18
X
RXIN3 (Band V)
820 to 849
01
XX
01
01
X
RXIN3 (Band VIII)
880 to 915
10
11
01
01
X
RXIN4 (Band V)
865 to 894
01
00
01
15
0
RXIN4 (Band VIII)
925 to 960
10
01
01
15
1
RXIN5
2110 to 2170
10
00
10
2A
X
RXIN2
1805 to 1880
10
11
10
0C
X
VCO
SELECT
REG28
VCO ROH
BAND
REG28
VCO
DIVIDER
REG28
PAD_
BAND
REG19
PAD_
CTUNE
REG19
TXLO_
IQ_GAIN
REG20
UCX_
CSW
REG21
T_UCX_
RSW
REG22
T_UCX_
BAND_SEL
REG22
TX_OUTL
925 to 960
(Band VIII)
10
01
01
00
00100
1
1011
XXXX
01
TX_OUTL
865 to 894
(Band V)
01
00
01
00
00100
1
1101
XXXX
01
11
00
10
11
00000
0
0000
0101
11
OUTPUT
PIN
TX_OUTH
RF
RANGE
(MHz)
2110 to
2170
Maxim Integrated
55
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
tCSW
CS
tCSO
tCSH
tCSS
tCS1
SCLK
tDS
tDH
tCL
tCH
DIN
(SPI WRITE)
R/W
A4
A0
D25
D0
DON’T CARE
DIN
(SPI READ)
R/W
A4
A0
D25
D0
DON’T CARE
tD
DOUT
(SPI READ)
DON’T CARE
D25
D0
DON’T CARE
Figure 4. SPI Timing
Table 16. SPI Serial Interface Timing
SPEC NO.
PARAMETER
SYMBOL
TYP
UNITS
SPI1
SCLK Rising Edge to CS Falling Edge Wait Time
tCSO
6
ns
SPI2
tCSS
6
ns
SPI3
Falling Edge of CS to Rising Edge of First SCLK Time
DIN to SCLK Setup Time
tDS
6
ns
SPI4
DIN to SCLK Hold Time
tDH
6
ns
SPI5
SCLK Pulse-Width High
tCH
6
ns
SPI6
SCLK Pulse-Width Low
tCL
6
ns
SPI7
Last Rising Edge of SCLK to Rising Edge of CS
tCSH
6
ns
SPI8
CS High Pulse Width
tCSW
50
ns
SPI9
Time Between Rising Edge of CS and the Next Rising Edge of SCLK
SCLK Frequency
tCS1
6
ns
fCLK
40
MHz
SPI10
SPI11
Rise Time
tR
2.5
ns
SPI12
Fall Time
tF
2.5
ns
SPI13
SCLK Falling Edge to Valid DOUT
tD
12.5
ns
Maxim Integrated
56
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Register and Bit Descriptions
(If Applicable)
The operating mode of the device is completely controlled by 32 on-chip registers.
Recommended defaults are not guaranteed upon powerup and are provided for reference only. All registers must
be written with the proper values no earlier than 10Fs after
power-up (once VCC_ is 90% of final value). All reserved
registers should only be written with default values.
Table 17. Brief Register Map
REGISTER NO.
REGISTER NAME
ADDRESS
FUNCTION
0
RX_ENABLE
00000
Enable bits for various internal functions
1
RX_GAIN
00001
Gain control of LNA and PGA
2
Reserved
00010
—
3
RX_LNA
00011
LNA bias, Rx synthesizer configuration
4
Reserved
00100
—
5
Reserved
00101
—
6
RX_LPF
00110
RXLPF configuration
7
GPO_CONFIG
00111
Configuration of GPOs
8
Reserved
01000
—
9
Reserved
01001
—
10
RXLO_FRAC
01010
Receive synthesizer fractional division ratio
11
RXLO_SYN
01011
Configuration of Rx synthesizer
12
BBCLK_OUT
01100
ADC configuration
13
Reserved
01101
—
14
BBCLK_FRAC
01110
ADC clock generator fractional division ratio
15
BBCLK_SYN
01111
Configuration of clock generator synthesizer
16
BBCLK_MISC
10000
Dithering clock generator synthesizer
17
BBCLK_SPARE
10001
Miscellaneous setting for clock generator
18
TX_LPF
10010
LPF settings for Tx path
19
TX_PAD
10011
PA driver settings
20
TX_UPX1
10100
Tx upconverter bias
21
TX_UPX2
10101
Tx upconverter bias adjustment and V2I attenuation
22
TX_UPX3
10110
Tx upconverter DC offset adjustment
23
TX_GAIN1
10111
Tx path gain setting
24
TX_GAIN2
11000
Tx path gain curve adjustment
25
Reserved
11001
—
26
Reserved
11010
—
27
TXLO_FRAC
11011
Transmit synthesizer fractional division ratio
28
TXLO_SYN
11100
Configuration of Tx synthesizer
29
TXLO_REF
11101
Configuring REFOUT and REFIN
30
TXLO_AFCDAC
11110
AFC DAC word
31
Reserved
11111
—
Maxim Integrated
57
Maxim Integrated
BAND1 RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
Tx VGC
Enable
BIT
Rx I LVDS
Enable
TXVGCEN
DEFINITION
Rx Q LVDS
Enable
LVDSI
9
0 = Disable
1 = Enable
ADC Clock
Enable
LVDSQ
8
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
ADC Enable
ADCCLKEN
7
1
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
Rx I PGA
Enable
ADCEN
6
1
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
Rx Q PGA
Enable
PGAIEN
5
1
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
Rx LPF
Enable
PGAQEN
4
1
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
Rx Mixer
Enable
RXLPFEN
3
1
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
LNA Enable
RXMXREN
2
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0 = Disable
1 = Enable
NAME
LNAEN
1
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
BIT ID
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 18. RX_ENABLE Register 0 (Address = 00000)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
58
Maxim Integrated
BAND1 RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND8 RX3 ONLY
BAND5 RX4 ONLY
BAND8 RX4 ONLY
BAND1 RX5 ONLY
BAND1 TXH ONLY
BAND5 TXL ONLY
BAND8 TXL ONLY
BAND1 RX1/TXH
FDD
BAND5 RX3/TXL
FDD
BAND8 RX3/TXL
FDD
BAND1 RX IDLE
BAND1 TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
Upconverter
Enable
BIT
Tx LO
Enable
UPCXEN
DEFINITION
Tx LPF
Enable
TXLOEN
18
—
PA Driver
Enable
TXLPFEN
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0 = Disable
1 = Enable
Temperature
Sensor Enable
PADEN
16
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
0
0
0
0 = Disable
1 = Enable
BB Loopback
Enable
TSEN
15
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
Tx SYN
Enable
BBLBEN
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 = Disable
1 = Enable
Rx SYN
Enable
TXSYNEN
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 = Disable
1 = Enable
Reserved
RXSYNEN
12
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
NAME
Reserved
11
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
BIT ID
10
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0 = Disable
1 = Enable
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 18. RX_ENABLE Register 0 (Address = 00000) (continued)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
59
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND1 RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND8 RX3 ONLY
BAND5 RX4 ONLY
BAND8 RX4 ONLY
BAND1 RX5 ONLY
BAND1 TXH ONLY
BAND5 TXL ONLY
BAND8 TXL ONLY
BAND1 RX1/TXH
FDD
BAND5 RX3/TXL
FDD
BAND8 RX3/TXL
FDD
BAND1 RX IDLE
BAND1 TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
22
Maxim Integrated
DEFINITION
0
NAME
0
BIT ID
19
BIT
BIT
Table 18. RX_ENABLE Register 0 (Address = 00000) (continued)
60
6
7
9
10
Maxim Integrated
BAND V RX3 ONLY
BAND8 RX3 ONLY
BAND5 RX4 ONLY
BAND8 RX4 ONLY
BAND1 RX5 ONLY
BAND1 TXH ONLY
BAND5 TXL ONLY
BAND8 TXL ONLY
BAND1 RX1/TXH
FDD
BAND5 RX3/TXL
FDD
BAND8 RX3/TXL
FDD
BAND1 RX IDLE
BAND1 TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
1
1
0
1
1
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
2
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
0
1
0
0
0
1
1
0
1
0
0
1
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
1
1
1
0
0
0
1
1
1
1
1
0
0
0
2
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
3
0
1
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
= 1110 = Max gain - 3dB
= 1111 = Max gain
…
= 0001 = Min gain + 3dB
X1 = GSM input
X0 = CELL input
11 = None
= 101 = RXIN4
= X10 = RXIN5
= 001 = RXIN3
1
= 100 = RXIN2
1
(default)
1 = PCS mixer
1
—
1
0 = CEL mixer
0
(CELL)
0
= 0000 = Min gain (default)
DEFINITION
NAME
BIT ID
DCS RX2 ONLY
LNA
Selection
LNASEL
BAND1 RX1 ONLY
11
BIT
8
= 000 = RXIN1
2
0
If BandSel_Mix = 1
(PCS)
00 = DCS input
01 = PCS input
10 = IMT input
11 = None
Rx Mixer Select
BandSel_Mix
0
If BandSel_Mix = 0
Rx Mixer Input Select
5
Reserved
4
Rx PGA Gain Control
MX_SW
3
Reserved
1
PGAGAIN
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 19. RX_GAIN Register 1 (Address = 00001)
61
BAND8 RX4 ONLY
BAND1 RX5 ONLY
BAND1 TXH ONLY
BAND5 TXL ONLY
BAND8 TXL ONLY
BAND1 RX1/TXH
FDD
BAND5 RX3/TXL
FDD
BAND8 RX3/TXL
FDD
BAND1 RX IDLE
BAND1 TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
—
Reserved
Reserved
—
LNA GAIN
Control
= 00 = Low gain
= 01 = Mid gain (not
available
for RXIN4)
= 10 = High gain (default)
= 11 = Do not use
DEFINITION
NAME
BIT ID
0
Reserved
0
Reserved
BAND5 RX4 ONLY
21
BAND8 RX3 ONLY
15
BAND V RX3 ONLY
14
DCS RX2 ONLY
13
BAND1 RX1 ONLY
12
BIT
LNAGAIN
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 19. RX_GAIN Register 1 (Address = 00001) (continued)
62
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND1 TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
0
NAME
0
BIT ID
0
BIT
BIT
Table 20. Reserved Register 2 (Address = 00010)
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
24
24
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
Maxim Integrated
—
0
0
Reserved
11
12
Reserved
11
12
63
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
9
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
—
Rx RF PLL Loop
Filter Adjust
0 = WCDMA
1 = Not used
—
Reserved
Reserved
Rx SYN
Ena Rx RF oop
Filter ble
Reserved
14
RXSYN_RBYP
11
Reserved
5
DEFINITION
0
NAME
0
BIT ID
0
BIT
BIT
Table 21. RX_LNA Register 3 (Address = 00011)
64
24
Maxim Integrated
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
DEFINITION
BAND V RX4 ONLY
Rx RF VCO
Prescaler Divide
Ratio Configuration
= 01 = CELL
= 10 = PCS
BAND VIII RX3
ONLY
10 = ROH (PCS)
11 = Not used
00 = Disable
01 = ROL
BAND V RX3 ONLY
=
=
(CELL)
=
=
NAME
BIT ID
DCS RX2 ONLY
(PCS)
= 11 = Not used
= 01 = band3
(IMT)
= 00 = band2
RVCO_DIV2
BAND I RX1 ONLY
23
BIT
25
—
22
Rx RF VCO Selection
21
Rx RF VCO ROH Band
Selection
20
Reserved
19
RVCO_SEL
18
RVCOTUNE
17
Reserved
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 21. RX_LNA Register 3 (Address = 00011) (continued)
6
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
7
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
8
0
0
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
9
1
1
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
10
0
1
1
1
0
1
0
0
0
1
0
1
1
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
0
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
65
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DEFINITION
0
1
NAME
0
1
BIT ID
0
BIT
BIT
Table 22. Reserved Register 4 (Address = 00100)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
13
14
—
0
6
Reserved
5
Reserved
5
6
18
18
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
23
23
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
66
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND1 RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND8 RX3 ONLY
BAND5 RX4 ONLY
BAND8 RX4 ONLY
BAND1 RX5 ONLY
BAND1 TXH ONLY
BAND5 TXL ONLY
BAND8 TXL ONLY
BAND1 RX1/TXH
FDD
BAND5 RX3/TXL
FDD
BAND8 RX3/TXL
FDD
BAND1 RX IDLE
BAND1 TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
1
NAME
0
BIT ID
0
BIT
BIT
Table 23. Reserved Register 5 (Address = 00101)
—
Reserved
13
Reserved
11
12
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
67
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
—
Reserved
9
Reserved
8
DEFINITION
0
NAME
0
BIT ID
0
BIT
BIT
Table 24. RX_LPF Register 6 (Address = 00110)
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
13
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
16
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
—
Reserved
20
Reserved
17
0 = Normal operation
1 = Bypass Rx LPF
0
0
Rx LPF Bypass
11
12
LPFBYPASS
11
12
Maxim Integrated
011 = GSM
25
000 = WCDMA
24
BBMODE
23
Rx LPF Bandwidth
Select
22
68
6
Maxim Integrated
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 = Not trigger reading
1 = Trigger reading
BIT
Reserved
GPO3_LD_RD_sel_LSB
DEFINITION
= 00 = High-Z
= 01 = High-Z
= 10 = Low-Z low
= 11 = Low-Z high
= 00 = High-Z
= 01 = High-Z
= 10 = Low-Z low
= 11 = Low-Z high
NAME
Reserved
1
—
GPO2 GPO2 Output
Select Select
GPO3 Output Select
BIT ID
0
GPO3 Output Mux Select LSB
MSB in REG7
00 = RXPLL LD
01 = TXPLL LD
10 = Output selected by GPO3
11 = RXPLL LD and TXPLL LD and CLKPLL LD
Reading Trigger
5
Temperature Sensor
4
GPO2
3
GPO3
2
TS_TRIG
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 25. GPO_CONFIG Register 7 (Address = 00111)
69
21
23
24
25
Maxim Integrated
= 00 = 1x
= 01 = 2x
= 10 = 3x
= 11 = 4x
—
GPO3 Output Mux Select MSB
LSB in REG7
00 = RXPLL LD
01 = TXPLL LD
10 = Output selected by GPO3
11 = RXPLL LD and TXPLL LD and
CLKPLL LD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
—
16
22
SLEEP
REFERENCE
BUFFER
AFC ONLY
BAND I TX IDLE
BAND I RX IDLE
BAND VIII RX3/TXL
FDD
BAND V RX3/TXL
FDD
BAND I RX1/TXH
FDD
BAND VIII TXL
ONLY
BAND V TXL ONLY
BAND I TXH ONLY
BAND I RX5 ONLY
BAND VIII RX4
ONLY
BAND V RX4 ONLY
BAND VIII RX3
ONLY
BAND V RX3 ONLY
DCS RX2 ONLY
BAND I RX1 ONLY
BIT
DEFINITION
BIT ID
To be read at DOUT
pin
through SPI readback
10
NAME
11
Temperature Sensor
Output
9
Reserved
7
—
20
Reserved
19
DOUT Drive Strength
12
13
Reserved
8
Reserved
18
GPO3_LD_RD_sel_MSB
17
Reserved
15
DOUT_DRV
14
Reserved
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 25. GPO_CONFIG Register 7 (Address = 00111) (continued)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
70
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
0
1
NAME
0
1
BIT ID
0
BIT
BIT
Table 26. Reserved Register 8 (Address = 01000)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
13
—
0
6
Reserved
5
Reserved
5
6
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
71
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
0
1
NAME
0
1
BIT ID
0
BIT
BIT
Table 27. Reserved Register 9 (Address = 01001)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
13
—
0
6
Reserved
5
Reserved
5
6
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
72
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
2
2
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
3
3
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
4
4
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
5
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
6
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
7
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
8
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
9
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
10
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
11
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
12
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
13
0
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
14
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
7
9
10
RFFRAC
8
11
12
13
14
15
See the RF Synthesizers
section
6
Receiver RF Synthesizer Fractional Division Ratio
5
DEFINITION
0
1
NAME
0
1
BIT ID
0
BIT
BIT
Table 28. RXLO_FRAC Register 10 (Address = 01010)
15
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
16
16
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
17
17
0
1
1
1
1
1
1
0
1
1
0
1
1
0
0
0
0
0
1
1
0
0
1
1
0
1
0
0
1
0
0
0
0
0
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
20
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
23
—
0
1
—
18
19
Reserved
18
19
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
73
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
3
5
6
8
RRD
7
SLEEP
REFERENCE
BUFFER
AFC ONLY
BAND I TX IDLE
BAND I RX IDLE
BAND VIII RX3/TXL
FDD
BAND V RX3/TXL
FDD
BAND I RX1/TXH
FDD
BAND VIII TXL
ONLY
BAND V TXL ONLY
BAND I TXH ONLY
BAND I RX5 ONLY
BAND VIII RX4
ONLY
BAND V RX4 ONLY
BAND VIII RX3
ONLY
BAND V RX3 ONLY
DCS RX2 ONLY
BAND I RX1 ONLY
See the RF Synthesizers
section
0 = Divide-by-1
1 = Divide-by-2
2
BIT
NAME
Rx RF PLL Integer Divide Ratio
Rx Reference
Divide Ratio
0
1
4
DEFINITION
BIT ID
RINT
BIT
Table 29. RXLO_SYN Register 11 (Address = 01011)
0
1
1
0
1
1
1
1
1
0
1
1
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
0
1
1
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
1
1
0
1
1
0
0
0
0
0
0
1
0
0
0
0
1
1
1
0
0
1
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
24
Reserved
20
25
Maxim Integrated
—
19
RCPI
18
Rx RF PLL Charge-Pump
Current
000 = Not used
001 = 200µA
011 = 600µA
110 = 1200µA
0
0
Rx PLL Charge-Pump Current
0
15
Reserved
14
—
1
1
Reserved
0
0
Reserved
9
10
74
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BIT
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
011 = 6 for GSM
100~111 = Not used
DEFINITION
010 = Not used
2
001 = Not used
ADC Clock
Divide Ratio
1
ADF
0
000 = 1 for WCDMA
NAME
BIT ID
BIT
Table 30. BBCLK_OUT Register 12 (Address = 01100)
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0 = 220I load
1 = 100I load
9
—
0
0
RxBB LVDS 2X
Current Enable
2
3
6
LVDSI_2X
5
Reserved
0
4
Reserved
3
10
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
18
19
—
0
0
Reserved
5
6
Reserved
15
16
20
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
75
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
0
NAME
0
BIT ID
0
BIT
BIT
Table 31. Reserved Register 13 (Address = 01101)
—
Reserved
13
Reserved
11
12
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
14
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
18
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
76
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
BIT
DEFINITION
NAME
BIT ID
BIT
Table 32. BBCLK_FRAC Register 14 (Address = 01110)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
CFRAC
8
9
11
12
13
14
15
16
17
18
19
WCDMA:
For fREFIN =
13.0MHz = 85E85 (hex)
15.36MHz = 00000 (hex)
19.2MHz = 00000 (hex)
26.0MHz = 42F4s (hex)
6
7
ADC Clock PLL Fractional Divide Ratio
5
GSM:
For fREFIN =
13.0MHz = 00000 (hex)
15.36MHz = 40000 (hex)
19.2MHz = 00000 (hex)
26.0MHz = 00000 (hex)
3
4
20
—
Reserved
23
Reserved
21
22
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
77
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
—
Reserved
0 = Divide-by-1
(default)
1 = Divide-by-2
ADC Clock PLL
Reference Divide
Ratio
WCDMA:
For fREFIN =
13.0MHz = 5E (hex)
15.36MHz = 50 (hex)
19.2MHz = 40 (hex)
26.0MHz = 2F (hex)
GSM:
For fREFIN =
13.0MHz = 60 (hex)
15.36MHz = 51 (hex)
19.2MHz = 41 (hex)
26.0MHz = 30 (hex)
ADC Clock PLL Integer Divide Ratio
DEFINITION
NAME
BIT ID
1
CINT
0
CRD
0
Reserved
BAND VIII TXL ONLY
13
BAND V TXL ONLY
8
BAND I TXH ONLY
7
BAND I RX5 ONLY
6
BAND VIII RX4 ONLY
5
BAND V RX4 ONLY
4
BAND V RX3 ONLY
3
BAND VIII RX3 ONLY
2
DCS RX2 ONLY
1
BIT
0
BAND I RX1 ONLY
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 33. BBCLK SYN Register 15 (Address = 01111)
78
Maxim Integrated
BIT
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3 ONLY
BAND V RX4 ONLY
BAND VIII RX4 ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
DEFINITION
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
—
000 = 0FA, do not use
001 = 25FA
010 = 50FA (fREFIN = 26MHz)
011 = 75FA (fREFIN = 19.2MHz
100 = 100FA (fREFIN = 13MHz)
111 = 175FA
NAME
ADC Clock PLL Charge Pump
Current
1
—
ADC Clock PLL
Integer/
Fractional Mode
0
ADC Clock PLL
P/Q Rational
Division Enable
0 = Disabled
1 = Enable
Reserved
ADC Clock PLL
P/Q Rational
Division Enable
23
Reserved
20
BIT ID
19
CCPI
18
ADC Clock
Integer/Fractional
Mode
0 = Integer mode
1 = Fractional
mode
Reserved
EN_
PBYQDIV
25
22
CINTB
24
21
Reserved
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 33. BBCLK SYN Register 15 (Address = 01111) (continued)
79
6
8
9
10
11
12
13
14
15
Maxim Integrated
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
DEFINITION
BAND I RX1 ONLY
GSM:
For fREFIN =
13.0MHz = 00 (hex)
15.36MHz = 00 (hex)
19.2MHz = 00 (hex)
26.0MHz = 00 (hex)
NAME
BIT ID
BIT
WCDMA:
For fREFIN =
13.0MHz = 3B (hex)
15.36MHz = 00 (hex)
19.2MHz = 00 (hex)
20.0MHz = 0B (hex)
26.0MHz = 3E (hex)
7
GSM:
For fREFIN =
13.0MHz = 00 (hex)
15.36MHz = 00 (hex)
19.2MHz = 00 (hex)
26.0MHz = 00 (hex)
5
WCDMA:
For fREFIN =
13.0MHz = 06 (hex)
15.36MHz = 00 (hex)
19.2MHz = 00 (hex)
20.0MHz = 0E (hex)
26.0MHz = 03 (hex)
0
DC Clock
Fractional LSB
Dither Down.
Number of
cycles LSB is
low.
4
ADC Clock Fractional LSB Dither Up
Number of Cycles LSB Is High
1
ADC Clock Fractional LSB Dither Down
Number of Cycles LSB Is Low
3
PBYQ_RATUP
2
PBYQ_RATDN
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 34. BBCLK_MISC Register 16 (Address = 10000)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
80
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
—
Reserved
CLK VCO to
CDR Divideby-2 Enable
0 = Disable
1 = Enable
CLK VCO to
CDR Divideby-2 Enable
—
Reserved
DEFINITION
NAME
BIT ID
0
Reserved
0
CDR_DIV2_
EN
16
Reserved
BAND VIII RX3
ONLY
23
BAND V RX3 ONLY
20
DCS RX2 ONLY
19
BAND I RX1 ONLY
18
BIT
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 34. BBCLK_MISC Register 16 (Address = 10000) (continued)
81
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
SLEEP
REFERENCE
BUFFER
AFC ONLY
BAND I TX IDLE
BAND I RX IDLE
BAND VIII RX3/TXL
FDD
BAND V RX3/TXL
FDD
BAND I RX1/TXH
FDD
BAND VIII TXL
ONLY
BAND V TXL ONLY
BAND I TXH ONLY
BAND I RX5 ONLY
BAND VIII RX4
ONLY
BAND V RX4 ONLY
BAND VIII RX3
ONLY
BAND V RX3 ONLY
DCS RX2 ONLY
BAND I RX1 ONLY
BIT
DEFINITION
NAME
BIT ID
BIT
Table 35. BBCLK_SPARE Register 17 (Address = 10001)
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
9
—
0
6
Reserved
5
6
Reserved
5
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
Affect REG17
0 = Read register value
1 = Read die ID
0
0
Die ID Readout Select
15
16
DIE_ID_sel
15
16
23
24
25
Maxim Integrated
DIE_ID
001 = 1Z
010 = 2Z
011 = 3Z
22
DIE_ID
20
21
Die ID Readout Bits at
DOUT pin
19
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
82
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TXLPF Bandwidth
000 = Do not use
001 = WCDMA
010 = Do not use
011 = Do not use
100~111 = Do not use
TXLPF Operating Mode
= 00 = Shut down
= 01 = LPF bypass
= 10 = Do not use
= 11 = Normal operation
(WCDMA
TXLPF
Baseband
Loopback
0 = Enable
loopback
1 = Normal
operation
Maxim Integrated
—
Reserved
DEFINITION
NAME
BIT ID
0
Reserved
0
TXLPFB
0
BBLB
BAND I RX5 ONLY
10
BAND VIII RX4
ONLY
9
BAND V RX4 ONLY
8
BAND VIII RX3
ONLY
7
BAND V RX3 ONLY
6
DCS RX2 ONLY
5
BAND I RX1 ONLY
2
BIT
TXLPFMD
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 36. TX_LPF Register 18 (Address = 10010)
83
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
14
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
17
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
23
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
—
Tx DAC
Bandwidth
1 = 15MHz
Reserved
Reserved
Tx DAC
Bandwidth
Select
25
TXINDACF
18
DEFINITION
0
NAME
0
BIT ID
11
BIT
BIT
Table 36. TX_LPF Register 18 (Address = 10010) (continued)
84
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
5
6
7
BIT
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
DEFINITION
= 00 = CELL
= 01 = Do not use
= 10 = PCS
= 11 = Do not use
CELL = 00100
PCS = 10001
3
4
PAD_CTUNE
2
NAME
1
PA Driver
Frequency Band
PAD_BAND
0
PA Driver Center
Frequency Select
BIT ID
BIT
Table 37. TX_PAD Register 19 (Address = 10011)
0
1
1
0
0
1
1
1
1
0
0
1
0
0
1
1
1
1
1
1
1
1
0
0
1
1
1
1
0
0
1
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
1
1
0
0
0
0
1
1
0
1
1
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
17
—
1
0
Reserved
6
7
Reserved
13
14
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
18
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
85
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DEFINITION
0
1
NAME
0
1
BIT ID
0
BIT
BIT
Table 38. TX_UPX1 Register 20 (Address = 10100)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
13
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
14
14
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 = Disable
1 = Enable
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
0 = PCS bands
1 = CELL band
0
11
TXLO IQ Phase
Adjust Slope
10
TXLO_IQ_
GAIN
10
11
—
9
—
1
6
Reserved
5
Reserved
5
6
—
22
Reserved
21
Reserved
20
24
BIAS_EN
Master Bias
Enable
25
Reserved
Reserved
23
Maxim Integrated
86
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
1
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
0
0
2
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
0
0
0
3
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
16
Reserved
Reserved
—
0000 = PCS
1101 = CELL
5
—
4
UCX Tank Frequency
Adjust
3
UCX_CSW
2
Reserved
Reserved
1
DEFINITION
0
NAME
0
0
BIT ID
0
BIT
BIT
Table 39. TX_UPX2 Register 21 (Address = 10101)
17
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
14
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
19
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
87
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
SLEEP
REFERENCE
BUFFER
AFC ONLY
BAND I TX IDLE
BAND I RX IDLE
BAND VIII RX3/TXL
FDD
BAND V RX3/TXL
FDD
BAND I RX1/TXH
FDD
BAND VIII TXL
ONLY
BAND V TXL ONLY
BAND I TXH ONLY
BAND I RX5 ONLY
BAND VIII RX4
ONLY
BAND V RX4 ONLY
BAND VIII RX3
ONLY
BAND V RX3 ONLY
DCS RX2 ONLY
BAND I RX1 ONLY
BIT
DEFINITION
NAME
BIT ID
BIT
Table 40. TX_UPX3 Register 22 (Address = 10110)
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
11
—
1
0
Reserved
8
9
Reserved
8
9
12
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
1
1
0
0
1
1
1
1
0
0
1
0
0
1
1
1
1
1
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
19
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
0
0
1
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
23
24
25
= 00 = Do not use
= 01 = CELL band
= 10 = Do not use
= 11 = PCS band
0
0
= 00 = Do not use
= 01 = WCDMA
= 10 = Do not use
= 11 = Do not use
0
0
Upconverter
Band Select
0
0
Upconverter V2I
Bandwidth
0
0
T_UCX_BAND_SEL
20
21
UCX_V2I_MODE_F
20
21
Maxim Integrated
88
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
7
8
9
000 (hex) = Minimum gain
3FF (hex) = Maximum gain
Tx Gain
5
TX_GAIN
4
BIT
1
1
DEFINITION
1
1
NAME
0
1
BIT ID
0
BIT
BAND1 RX1 ONLY
Table 41. TX_GAIN1 Register 23 (Address = 10111)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
—
0
1
Reserved
0
Reserved
10
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
22
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
=
=
=
=
00
01
10
11
=
=
=
=
25
GPO1
24
High-Z
High-Z
Low-Z low
Low-Z high
8
9
GPO1 Output Select
18
19
89
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Maxim Integrated
0 = 220I
1 = 100I
TXBB Differential
Input Impedance
TXBB DAC Bias Current
010100 = WCDMA
TXBB DAC Bias Current
—
Reserved
DEFINITION
NAME
BIT ID
0
Reserved
0
TXINDACI
0
TXINDACZI
BAND I RX5 ONLY
12
BAND VIII RX4
ONLY
11
BAND V RX4 ONLY
10
BAND VIII RX3
ONLY
9
BAND V RX3 ONLY
8
DCS RX2 ONLY
7
BAND I RX1 ONLY
3
BIT
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 42. TX_GAIN2 Register 24 (Address = 11000)
90
Maxim Integrated
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
BIT
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
14
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
—
0
TXBB Input LVDS/DDR3 Select
0 = LVDS
1 = DDR3
0
—
0
Reserved
0
CDR Enable
0 = Disable
1 = Enable
CDR Enable
—
Reserved
DEFINITION
NAME
BIT ID
0
Reserved
0
CDR_EN
0
TXBB Input
LVDS/DDR3 Select
2
BIT
0
Reserved
21
20
0
Reserved
22
19
0
TXBB_LVDS_
DDR3
23
18
13
Reserved
24
15
3
25
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 42. TX_GAIN2 Register 24 (Address = 11000) (continued)
91
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
0
1
NAME
0
1
BIT ID
0
BIT
BIT
Table 43. Reserved Register 25 (Address = 11001)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
13
—
0
6
Reserved
5
Reserved
5
6
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
92
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFINITION
1
NAME
0
BIT ID
0
BIT
BIT
Table 44. Reserved Register 26 (Address = 11010)
—
Reserved
13
Reserved
11
12
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19
19
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
20
20
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
93
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
2
2
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
SLEEP
DCS RX2 ONLY
0
0
REFERENCE
BUFFER
BAND I RX1 ONLY
1
0
DEFINITION
1
1
NAME
0
BIT ID
0
1
BIT
BIT
Table 45. TXLO_FRAC Register 27 (Address = 11011)
3
3
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
4
4
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
7
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
7
10
TFRAC
8
9
11
12
13
AAAAB (hex) = CELL band
36AAB (hex) = PCS band
5
6
Tx RF PLL Fractional Divide Ratio
5
6
14
8
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
9
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
10
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
11
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
12
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
13
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
14
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
15
15
0
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
16
16
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
17
17
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
0
1
1
1
1
0
0
1
1
0
1
1
0
0
0
0
0
20
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
22
—
1
0
Reserved
18
19
Reserved
18
19
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
23
Maxim Integrated
94
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
2
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
1
1
1
3
1
1
1
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
4
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
0
0
0
5
1
1
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
1
1
0
0
0
0
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
1
1
1
1
0
0
1
0
0
1
1
1
1
1
Maxim Integrated
= 01 = CELL
= 10 = PCS
Tx RF VCO Prescaler Divide
Ratio Configuration
1
—
Reserved
0 = Divide-by-1
1 = Divide-by-2
Tx Reference
Divide Ratio
5B (hex) = CELL
66 (hex) = PCS
Tx RF PLL Integer Divide Ratio
DEFINITION
NAME
BIT ID
1
TINT
0
TRD
0
Reserved
BAND V RX3/TXL
FDD
13
BAND I RX1/TXH
FDD
12
BAND VIII TXL
ONLY
11
BAND V TXL ONLY
10
BAND I TXH ONLY
9
BAND I RX5 ONLY
8
BAND VIII RX4
ONLY
7
BAND V RX4 ONLY
6
BAND VIII RX3
ONLY
5
BAND V RX3 ONLY
4
DCS RX2 ONLY
3
BAND I RX1 ONLY
2
BIT
TVCO_DIV2
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 46. TXLO_SYN Register 28 (Address = 11100)
95
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
1
1
1
1
0
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
1
1
0
1
1
1
1
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
21
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
22
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
24
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
25
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
—
Reserved
000 = 0FA,
001 = 200FA
...
100 = 800FA
...
110 = 1200FA
Tx RF PLL Charge
Pump Current
—
Reserved
= 00 = Disable
= 01 = ROL
= 10 = ROH
= 11 = Not used
DEFINITION
NAME
1
Tx RF VCO Selection
0
BIT ID
1
TVCO_SEL
1
Reserved
1
TCPI
0
Reserved
BAND I TXH ONLY
23
BAND I RX5 ONLY
20
BAND VIII RX4
ONLY
19
BAND V RX4 ONLY
18
BAND VIII RX3
ONLY
17
BAND V RX3 ONLY
16
DCS RX2 ONLY
15
BAND I RX1 ONLY
14
BIT
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 46. TXLO_SYN Register 28 (Address = 11100) (continued)
96
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
9
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
12
Reference for Rx
PLL Enable
0 = Disable
1 = Enable
1
0
13
Reference for Tx
PLL Enable
0 = Disable
1 = Enable
1
Reference Rx PLL
Output Enable
1
Reference Tx PLL
Output Enable
1
Maxim Integrated
—
Reserved
DEFINITION
NAME
BIT ID
1
Reserved
0
REFIN_ENOUT1
0
REFIN_ENOUT2
BAND I RX1 ONLY
6
BIT
BIT
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 47. TXLO_REF Register 29 (Address = 11101)
0
97
REFOUT_
DRV
18
21
22
23
24
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
20
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
—
Reserved
0 = CMOS
1 = Low voltage
REFOUT Output
Driver Select
REFOUT Drive Strength
00 = 1x
01 = 2x
10 = 3x
11 = 4x
REFOUT Buffer Drive Strength
0
—
Reserved
Reserved
0
REFOUT_LV_
CMOS_SEL
15
Reserved
BIT
BIT ID
NAME
DEFINITION
BIT
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
14
REFIN_ENOUT3
REFOUT Enable
REFOUT Enable
0 = Disable
1 = Enable
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Table 47. TXLO_REF Register 29 (Address = 11101) (continued)
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
98
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
18
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
9
10
22
23
Reserved
AFCDAC
Enable
Reserved
19
AFCDAC_EN
16
Reserved
15
Reserved
11
Maxim Integrated
800 (hex)
VAFCOUT = 0.4 + (2.5 - 0.4) x AFCDAC/212
7
—
6
0 = Disable
1 = Enable
5
AFCDAC
4
—
3
AFCDAC Output Voltage
2
DEFINITION
0
1
NAME
0
1
BIT ID
0
80BIT
BIT
Table 48. TXLO_AFCDAC Register 30 (Address = 11110)
99
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
BAND I RX1 ONLY
DCS RX2 ONLY
BAND V RX3 ONLY
BAND VIII RX3
ONLY
BAND V RX4 ONLY
BAND VIII RX4
ONLY
BAND I RX5 ONLY
BAND I TXH ONLY
BAND V TXL ONLY
BAND VIII TXL
ONLY
BAND I RX1/TXH
FDD
BAND V RX3/TXL
FDD
BAND VIII RX3/TXL
FDD
BAND I RX IDLE
BAND I TX IDLE
AFC ONLY
REFERENCE
BUFFER
SLEEP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT ID
DEFINITION
0
BIT
BIT
Table 49. Reserved Register 31 (Address = 11111)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
12
13
—
0
Reserved
5
6
Reserved
5
6
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
17
17
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
18
18
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
19
19
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
20
20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
21
21
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
22
22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
23
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
25
25
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Maxim Integrated
100
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Applications Information
Layout Considerations
The EV kit and reference design serve as a guide for
PCB layout. Keep RF signal lines as short as possible to
minimize losses and radiation. Use controlled impedance
on all high-frequency traces. The exposed pad must be
soldered evenly to the board’s ground plane for proper
operation. Use abundant ground vias between RF traces
to minimize undesired coupling. Bypass each VCC_ pin
to ground with capacitors placed as close as possible
to the pin.
Simplified Block Diagram
OPTIONAL FILTERS
LNAOUTL
MIXINL
LNAOUTH
MIXINH
3RD-PARTY BROADBAND
RXIN4
MAX2550
ADC
1
2
Q
2
DECIMATION
FILTER
MULTIMODE ADC
RXIN1
ADC
RXIN5
/2, /4
FRAC-N
PLL
RXIN2
PA
R/W
SPI
TXOUTH
/2, /4
SPI
GPO3
FRAC-N
PLL
PA
1930MHz
TO 1995MHz
(LOCK DETECT
WCDMA
DAC
1
2
CD MOD
TX I
Q
2
CD MOD
TX Q
I DATA
Tx
PROCESSING
TXOUTL
865MHz
TO 894MHz
DAC
Ordering Information
PART
BAND
TEMP
RANGE
PINPACKAGE
MAX2550ETN+
I, V, and
VIII
-40NC to
+85NC
56 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Maxim Integrated
Rx
PROCESSING
Q DATA
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
56 TQFN-EP
T5677+2
21-0144
90-0043
101
MAX2550
Band I, V, and VIII WCDMA Femtocell
Transceiver with GSM Monitoring
Revision History
REVISION
NUMBER
REVISION
DATE
0
7/12
DESCRIPTION
Initial release
PAGES
CHANGED
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
© Maxim Integrated
102
The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.
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