19-2493; Rev 5; 5/05
2.4GHz 802.11b Zero-IF Transceivers
The MAX2820/MAX2820A and MAX2821/MAX2821A
single-chip zero-IF transceivers are designed for the
802.11b (11Mbps) applications operating in the
2.4GHz to 2.5GHz ISM band. The transceivers are
nearly identical, except the MAX2821 and MAX2821A
also provide a low-power shutdown mode and an analog voltage reference output. The MAX2820A/
MAX2821A are cost-reduced versions, virtually identical in pinout and performance to the MAX2820/
MAX2821. The transceivers include all the circuitry
required to implement an 802.11b RF-to-baseband
transceiver solution, providing a fully integrated
receive path, transmit path, VCO, frequency synthesis,
and baseband/control interface. Only a PA, RF switch,
RF BPF, and a small number of passive components are
needed to form the complete radio front-end solution.
The ICs eliminate the need for external IF and baseband filters by utilizing a direct-conversion radio architecture and monolithic baseband filters for both
receiver and transmitter. They are specifically optimized for 802.11b (11Mbps CCK) applications. The
baseband filtering and Rx and Tx signal paths support
the CCK modulation scheme for BER = 10-5 at the
required sensitivity levels.
The devices are suitable for the full range of 802.11b
data rates (1Mbps, 2Mbps, 5.5Mbps, and 11Mbps) and
also the higher-rate 22Mbps PBCCTM standard. The
MAX2820 and MAX2821 are available in a 7mm × 7mm
48-lead QFN package. The MAX2820, MAX2821,
MAX2820A, and MAX2821A are available in a 48-lead
thin QFN package.
Applications
802.11b 11Mbps WLAN
802.11b+ 22Mbps PBCC High-Data-Rate WLAN
802.11a + b Dual-Band WLAN
2.4GHz ISM Band Radios
Features
♦ 2.4GHz to 2.5GHz ISM Band Operation
♦ 802.11b (11Mbps CCK and 22Mbps PBCC) PHY
Compatible
♦ Complete RF-to-Baseband Transceiver
Direct-Conversion Upconverters and
Downconverters
Monolithic Low-Phase-Noise VCO
Integrated Baseband Lowpass Filters
Integrated PLL with 3-Wire Serial Interface
Digital Bias Control for External PA
Transmit Power Control (Range > 25dB)
Receive Baseband AGC (Range > 65dB)
Complete Baseband Interface
Digital Tx/Rx Mode Control
Analog Receive Level Detection
♦ -97dBm Rx Sensitivity at 1Mbps
♦ -87dBm Rx Sensitivity at 11Mbps
♦ +2dBm Transmit Power (11Mbps CCK)
♦ Single +2.7V to +3.6V Supply
♦ Low-Current Shutdown Mode (MAX2821 only)
♦ Very Small 48-Pin QFN Package(s)
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX2820ETM-TD
-40°C to +85°C
48 Thin QFN
MAX2820ETM+TD
-40°C to +85°C
Lead Free
MAX2820AETM-TD
-40°C to +85°C
48 Thin QFN
MAX2820AETM+TD
-40°C to +85°C
Lead Free
MAX2821ETM-TD
-40°C to +85°C
48 Thin QFN
MAX2821ETM+TD
-40°C to +85°C
Lead Free
MAX2821AETM-TD
-40°C to +85°C
48 Thin QFN
MAX2821AETM+TD
-40°C to +85°C
Lead Free
PBCC is a trademark of Texas Instruments, Inc.
Pin Configuration/Functional Diagram and Typical
Application Circuit appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX2820/MAX2820A/MAX2821/MAX2821A
General Description
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
ABSOLUTE MAXIMUM RATINGS
VCC Pins to GND ...................................................-0.3V to +4.2V
RF Inputs: RX_RFP, RX_RFN to GND.........-0.3V to (VCC + 0.3V)
RF Outputs: TX_RFP, TX_RFN to GND..................-0.3V to +4.2V
Baseband Inputs: TX_BBIP, TX_BBIN, TX_BBQP,
TX_BBQN to GND ...................................-0.3V to (VCC + 0.3V)
Baseband Outputs: RX_BBIP, RX_BBIN, RX_BBQP,
RX_BBQN to GND ...................................-0.3V to (VCC + 0.3V)
Analog Inputs: RX_AGC, TX_GC, TUNE, ROSCN,
ROSCP to GND .......................................-0.3V to (VCC + 0.3V)
Analog Outputs: PA_BIAS, CP_OUT, VREF
to GND.....................................................-0.3V to (VCC + 0.3V)
Digital Inputs: RX_ON, TX_ON, SHDNB, CSB, SCLK,
DIN, RF_GAIN, RX_1K to GND................-0.3V to (VCC + 0.3V)
Bias Voltages: RBIAS, BYP ..................................+0.9V to +1.5V
Short-Circuit Duration Digital Outputs: DOUT, RX_DET .........10s
RF Input Power: RX_RFN, RX_RFP.................................+10dBm
Continuous Power Dissipation (TA = +70°C)
48-Lead QFN (derate 27.0mW/°C above +70°C)...........2162mW
48-Lead Thin QFN (derate 38.5mW/°C
above +70°C) ...................................................................3077mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
CAUTION! ESD SENSITIVE DEVICE
DC ELECTRICAL CHARACTERISTICS
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, RF_GAIN = VIH, 0V ≤ VTX_GC ≤ +2.0V, 0V ≤ VRX_AGC ≤ +2.0V, RBIAS = 12kΩ, no
input signals at RF and baseband inputs, all RF inputs and outputs terminated into 50Ω, receiver baseband outputs are open, transmitter baseband inputs biased at +1.2V, registers set to default power-up settings, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at VCC = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETERS
CONDITIONS
Supply Voltage
MIN
TYP
2.7
Shutdown-Mode Supply Current
(MAX2821 and MAX2821A)
SHDNB = VIL, RX_ON = VIL,
TX_ON = VIL
Standby-Mode Supply Current
MAX
UNITS
3.6
V
µA
TA = -40°C to +85°C
2
50
SHDNB = VIH, RX_ON = VIL,
TX_ON = VIL
TA = +25°C
25
35
Receive-Mode Supply Current
SHDNB = VIH, RX_ON = VIH,
TX_ON = VIL
TA = +25°C
Transmit-Mode Supply Current
SHDNB = VIH, RX_ON = VIL,
TX_ON = VIH
TA = +25°C
TA = -40°C to +85°C
40
80
TA = -40°C to +85°C
100
110
70
TA = -40°C to +85°C
85
90
mA
mA
mA
LOGIC INPUTS: SHDNB, RX_ON, TX_ON, SCLK, DIN, CSB, RF_GAIN
Digital Input Voltage High (VIH)
VCC - 0.5
V
Digital Input Voltage Low (VIL)
0.5
V
Digital Input Current High (IIH)
-5
+5
µA
Digital Input Current Low (IIL)
-5
+5
µA
LOGIC OUTPUTS: DOUT, RX_DET
Digital Output Voltage High (VOH) Sourcing 100µA
Digital Output Voltage Low (VOL)
VCC - 0.5
V
Sinking 100µA
0.5
V
RX BASEBAND I/O
RX_AGC Input Resistance
0V ≤ VRX_AGC ≤ +2.0V
RX I/Q Common-Mode Voltage
50
kΩ
1.25
V
RX I/Q Output DC Offsets
15
mV
1.3
V
VOLTAGE REFERENCE (MAX2821/MAX2821A)
Reference Voltage Output
Output Impedance
2
TA = -40°C to +85°C, ILOAD = ±2mA
1.1
1.2
25
_______________________________________________________________________________________
Ω
2.4GHz 802.11b Zero-IF Transceivers
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, RF_GAIN = VIH, 0V ≤ VTX_GC ≤ +2.0V, 0V ≤ VRX_AGC ≤ +2.0V, RBIAS = 12kΩ, no
input signals at RF and baseband inputs, all RF inputs and outputs terminated into 50Ω, receiver baseband outputs are open, transmitter baseband inputs biased at +1.2V, registers set to default power-up settings, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at VCC = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNITS
1.0
1.2
1.4
V
TX BASEBAND I/O
TX BB Input Common-Mode
Range
TX BBI and BBQ Input Bias
Current
TX BB Input Impedance
Differential resistance
-10
µA
100
kΩ
TX_GC Input Bias Current
0V ≤ VTX_GC ≤ +2.0V
10
µA
TX_GC Input Impedance
Resistance
250
kΩ
20
kΩ
REFERENCE OSCILLATOR INPUT
Reference Oscillator Input
Impedance
AC ELECTRICAL CHARACTERISTICS—RECEIVE MODE
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, receive baseband
outputs = 500mVP-P, SHDNB = RX_ON = VIH, TX_ON = VIL, CSB = VIH, SCLK = DIN = VIL, RF_GAIN = VIH, 0V ≤ VRX_AGC ≤ +2.0V,
RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, differential RF input matched to 50Ω, registers set to default power-up settings, TA =
+25°C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RECEIVER CASCADE PERFORMANCE (RF INPUT TO BASEBAND OUTPUT)
RF Frequency Range
2400
2499
MHz
LO Frequency Range
2400
2499
MHz
RF_GAIN = VIH,
VRX_AGC = 0V
Voltage Gain (Note 2)
RF Gain Step
DSB Noise Figure (Note 3)
Adjacent Channel Rejection
Input Third-Order Intercept Point (Note 5)
Input Second-Order Intercept Point (Note 6)
TA = +25°C
97
TA = -40°C to +85°C
95
105
RF_GAIN = VIH,
VRX_AGC = +2.0V
TA = +25°C
33
RF_GAIN = VIL,
VRX_AGC = 0V
TA = +25°C
75
RF_GAIN = VIL,
VRX_AGC = +2.0V
TA = +25°C
2
dB
From RF_GAIN = VIH to RF_GAIN =VIL
30
RF_GAIN = VIH, RX gain ≥ 80dB
3.5
RF_GAIN = VIH, RX gain = 50dB
4.5
RF_GAIN = VIL, RX gain = 50dB
34
RX gain = 70dB (Note 4)
49
RF_GAIN = VIH, RX gain = 80dB
-14
RF_GAIN = VIL, RX gain = 50dB
18
RF_GAIN = VIH, RX gain = 80dB
22
RF_GAIN = VIL, RX gain = 50dB
60
dB
dB
dB
dBm
dBm
_______________________________________________________________________________________
3
MAX2820/MAX2820A/MAX2821/MAX2821A
DC ELECTRICAL CHARACTERISTICS (continued)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
AC ELECTRICAL CHARACTERISTICS—RECEIVE MODE (continued)
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, receive baseband
outputs = 500mVP-P, SHDNB = RX_ON = VIH, TX_ON = VIL, CSB = VIH, SCLK = DIN = VIL, RF_GAIN = VIH, 0V ≤ VRX_AGC ≤ +2.0V,
RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, differential RF input matched to 50Ω, registers set to default power-up settings, TA =
+25°C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 1)
PARAMETER
CONDITIONS
MIN
LO Leakage
Input Return Loss
With external match
TYP
MAX
UNITS
-65
dBm
15
dB
RECEIVER BASEBAND
BASEBAND FILTER RESPONSE
MAX2820/
MAX2821
Default bandwidth setting
BW (2:0) = (010)
7
-3dB Frequency
MHz
MAX2820A/
MAX2821A
MAX2820/
MAX2821
Attenuation Relative to Passband
MAX2820A/
MAX2821A
8
At 12.5MHz
40
At 16MHz
65
At 20MHz
70
At 30MHz
85
At 12.5MHz
28
At 16MHz
52
At 20MHz
70
At 30MHz
85
dB
BASEBAND OUTPUT CHARACTERISTICS
RX I/Q Gain Imbalance
-1
+1
dB
RX I/Q Phase Quadrature Imbalance
-5
+5
Degrees
RX I/Q Output 1dB Compression
Differential voltage into 5kΩ
1
VP-P
RX I/Q Output THD
VOUT = 500mVP-P at 5.5MHz, ZL = 5kΩ||5pF
-35
dBc
VRX_AGC = 0 to +2.0V
70
dB
AGC Slope
Peak gain slope
60
dB/V
AGC Response Time
20dB gain step, 80dB to 60dB,
settling to ±1dB
2
µs
BASEBAND AGC AMPLIFIER
AGC Range
BASEBAND RX PEAK LEVEL DETECTION (MAX2820/MAX2821 ONLY)
RX Detector Trip Point (at RX_RF)
CW signal
RF_GAIN = VIH,
RX_DET = VOL to VOH
-49
RF_GAIN = VIL,
RX_DET = VOH to VOL
-54
RX Detector Hysteresis
RX Detector Rise Time
4
With 3dB overdrive
dBm
5
dB
1
µs
_______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, transmit baseband
inputs = 400mVP-P, SHDNB = TX_ON = VIH, RX_ON = VIL, CSB = VIH, 0V ≤ VTX_GC ≤ +2.0V, RBIAS = 12kΩ, ICP = +2mA, BWPLL =
45kHz, differential RF output matched to 50Ω through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
TRANSMIT SIGNAL PATH: BASEBAND INPUT TO RF OUTPUT
RF Output Frequency Range
2400
2499
MHz
LO Output Frequency Range
2400
2499
MHz
TX RF Output Power
TX RF ACPR (Note 8)
In-Band Spurious Signals Relative to
Modulated Carrier
TX RF Harmonics
VIN = 400mVP-P at
5.5MHz,
VTX_GC = 0V,
I/Q CW signal (Note 7)
TA = +25°C
-1
TA = -40°C to
+85°C
-2
+3
dBm
-22MHz ≤ fOFFSET ≤ -11MHz,
11MHz ≤ fOFFSET ≤ 22MHz
-37
-33MHz ≤ fOFFSET < -22MHz,
22MHz < fOFFSET ≤ 33MHz
-59
fRF = 2400MHz to
2483MHz
dBc
Unwanted sideband
-40
LO signal
-30
Spurs > ±22MHz
dBc
-80
2 × fLO
-40
3 × fLO
-55
fRF < 2400MHz
-60
fRF = 2500MHz to 3350MHz
-43
dBm
TX RF Spurious Signal Emissions
(Outside 2400MHz to 2483.5MHz)
Nonharmonic Signals
fRF > 3350MHz
-45
TX RF Output Noise
fOFFSET ≥ 22MHz, 0V ≤ VTX_GC ≤ +2.0V
-135
dBm/Hz
TX RF Output Return Loss
With external match
15
dB
10
MHz
dBm
TX BASEBAND FILTER RESPONSE
-3dB Frequency
Attenuation Relative to Passband
At 22MHz
25
At 44MHz
50
0V ≤ VTX_GC ≤ +2.0V
30
dB
dB
TX GAIN-CONTROL CHARACTERISTICS
Gain-Control Range
Gain-Control Slope
Peak gain slope
40
dB/V
Gain-Control Response Time
VTX_GC = +2.0V to 0V step
0.3
µs
_______________________________________________________________________________________
5
MAX2820/MAX2820A/MAX2821/MAX2821A
AC ELECTRICAL CHARACTERISTICS—TRANSMIT MODE
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
AC ELECTRICAL CHARACTERISTICS—PA BIAS
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, SHDNB = VIH, TX_ON = VIH, CSB = VIH, PA_BIAS enabled, RBIAS = 12kΩ, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are at VCC = +2.7V, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
Resolution
Full-Scale Output Current
LSB Size
TYP
MAX
4
Bits
300
µA
20
Output Voltage Compliance Range
(Note 11)
1.0
Settling Time
Relative to rising edge of CSB, zero to fullscale step 0000 → 1111, settle to 1/2 LSB,
2pF load
UNITS
1.2
µA
1.3
1
V
µs
AC ELECTRICAL CHARACTERISTICS—SYNTHESIZER
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH,
CSB = VIH, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise
noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 11)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2499
MHz
FREQUENCY SYNTHESIZER
LO Frequency Range
Reference Frequency
2400
R(0) = 0
22
R(0) = 1
44
Channel Spacing
Charge-Pump Output Current
1
MAX2820/MAX2821
±2
ICP = 1
Charge-Pump Compliance Range
MHz
±1
ICP = 0
0.4
VCC - 0.4
-11MHz ≤ fOFFSET ≤ 11MHz
-41
-22MHz ≤ fOFFSET < -11MHz,
11MHz < fOFFSET ≤ 22MHz
-75
fOFFSET < -22MHz, fOFFSET > 22MHz
-90
fOFFSET = 10kHz
-80
fOFFSET = 100kHz
-87
Closed-Loop Integrated Phase Noise
Noise integrated from 100Hz to 10MHz,
measured at the TX_RF output
2.5
Reference Oscillator Input Level
AC-coupled sine wave input
Closed-Loop Phase Noise
mA
±2
MAX2820A/MAX2821A
Reference Spur Level (Note 10)
MHz
200
600
V
dBc
dBc/Hz
°RMS
1000
mVP-P
2.3
V
VOLTAGE-CONTROLLED OSCILLATOR
VCO Tuning Voltage Range
VCO Tuning Gain
6
0.4
fLO = 2400MHz
170
fLO = 2499MHz
130
_______________________________________________________________________________________
MHz/V
2.4GHz 802.11b Zero-IF Transceivers
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH,
CSB = VIH, RBIAS = 12kΩ, ICP = +2mA, BWLOOP = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise
noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 11)
PARAMETER
Channel-Switching Time
CONDITIONS
MIN
fLO = 2400MHz ↔ 2499MHz,
fLO settles to ±10kHz (Note 9)
TYP
MAX
UNITS
150
200
µs
RX to TX, output settles to within ±2dB of final value of
output power, relative to rising edge of TX_ON
3
TX to RX, output settles to within ±2dB of final value of
output power, relative to rising edge of RX_ON
5
Standby-to-Transmit Mode
Standby to TX, output settles to within ±2dB of final value
of output power, relative to rising edge of TX_ON (Note 11)
3
µs
Standby-to-Receive Mode
Standby to RX, output settles to within ±2dB of final value
of output power, relative to rising edge of RX_ON (Note 11)
5
µs
RX/TX Turnaround Time
(Note 11)
µs
AC ELECTRICAL CHARACTERISTICS—SERIAL INTERFACE TIMING
(MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.) (Note 11)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SERIAL INTERFACE TIMING (See Figure 1)
tCSO
SCLK rising edge to CSB falling edge wait time
5
ns
tCSS
Falling edge of CSB to rising edge of first SCLK time
5
ns
tDS
Data-to-serial clock setup time
5
ns
tDH
Data-to-clock hold time
10
ns
tCH
Serial clock pulse-width high
10
ns
tCL
Clock pulse-width low
10
ns
tCSH
Last SCLK rising edge to rising edge of CSB
5
ns
tCSW
CSB high pulse width
10
ns
tCS1
Time between the rising edge of CSB and the next rising edge of SCLK
5
ns
fCLK
Clock frequency
50
MHz
Parameters are production tested at +25°C only. Min/max limits over temperature are guaranteed by design and characterization.
Defined as the baseband differential RMS output voltage divided by the RMS input voltage (at the RF balun input).
Noise-figure specification excludes the loss of the external balun. The external balun loss is typically ~0.5dB.
CCK interferer at 25MHz offset. Desired signal equals -73dBm. Interferer amplitude increases until baseband output from
interferer is 10dB below desired signal. Adjacent channel rejection = Pinterferer - Pdesired.
Note 5: Measured at balun input. Two CW tones at -43dBm with 15MHz and 25MHz spacing from the MAX2820/MAX2821 channel
frequency. IP3 is computed from 5MHz IMD3 product measured at the RX I/Q output.
Note 6: Two CW interferers at -38dBm with 24.5MHz and 25.5MHz spacing from the MAX2820/MAX2821 channel frequency. IP2 is
computed from the 1MHz IMD2 product measured at the RX I/Q output.
Note 7: Output power measured after the matching and balun. TX gain is set to maximum.
Note 8: Adjacent and alternate channel power relative to the desired signal. TX gain is adjusted until the output power is -1dBm.
Power measured with 100kHz video BW and 100kHz resolution BW.
Note 9: Time required to reprogram the PLL, change the operating channel, and wait for the operating channel center frequency to
settle within ±10kHz of the nominal (final) channel frequency.
Note 10: Relative amplitude of reference spurious products appearing in the TX RF output spectrum relative to a CW tone at
0.5MHz offset from the LO.
Note 11: Min/max limits are guaranteed by design and characterization.
Note 1:
Note 2:
Note 3:
Note 4:
_______________________________________________________________________________________
7
MAX2820/MAX2820A/MAX2821/MAX2821A
AC ELECTRICAL CHARACTERISTICS—SYSTEM TIMING
Typical Operating Characteristics
(MAX2820/MAX2821 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2450MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50Ω through a balun, baseband
input biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.)
60
TRANSMIT
ICC (mA)
RECEIVE, VRF_GAIN = VIL
50
40
30
30
RECEIVE, VRF_GAIN = VIL
20
STANDBY
10
-15
10
35
60
85
VRF_GAIN = VIL,
("A" VERSION)
60
VRF_GAIN = VIL
40
VOUT = 500mVP-P
fBB = 1MHz
fLO = 2450MHz
2.7
3.0
0
3.6
3.3
0.5
1.0
VCC (V)
VRX_AGC (V)
RECEIVER VOLTAGE GAIN
vs. RF FREQUENCY
RECEIVER NOISE FIGURE vs. GAIN
RECEIVER DETECTOR HYSTERESIS
vs. INPUT POWER
45
40
NOISE FIGURE (dB)
30
VRF_GAIN = VIH, VRX_AGC = 2.0V
20
15
MAX2820/MAX2821 ONLY
HIGH
VRF_GAIN = VIL
35
LOGIC LEVEL
35
MAX2820 toc05
50
MAX2820 toc04
fBB = 1MHz
30
25
20
HIGH-GAIN MODE
LOW
HIGH
15
10
10
VRF_GAIN = VIL, VRX_AGC = 2.0V
5
2.0
1.5
TEMPERATURE (°C)
40
25
80
0
0
-40
VRF_GAIN = VIH,
("A" VERSION)
20
STANDBY
10
0
5
LOW-GAIN MODE
VRF_GAIN = VIH
fBB = 1MHz
fLO = 2450MHz
LOW
0
2420
2440
2460
2480
80
MAX2820 toc07
RX_1K = VIH
-40
RX_1K = VIL,
(BOTH VERSIONS)
-70
-80
10
0
-10
"A" VERSION
-40
-50
-60
-70
-80
-90
10
100
FREQUENCY (kHz)
1000
-55
-50
-45
-40
-35
-10
VRF_GAIN = VIH
fLO = 2400MHz
-20
-30
-40
-50
-60
-70
-80
-90
-100
-90
1
-60
RECEIVER LEAKAGE SPECTRUM
-20
-30
-65
100
PIN (dBm)
RECEIVER FILTER RESPONSE
(1MHz TO 100MHz)
RX_1K = VIH,
("A" VERSION)
-60
60
RECEIVER FILTER RESPONSE
(1kHz TO 1MHz)
0
-50
40
RX GAIN (dB)
-10
-30
20
RF FREQUENCY (MHz)
10
-20
0
2500
NORMALIZED RESPONSE (dB)
2400
MAX2820 toc09
0
RECEIVER LEAKAGE POWER (dBm)
RX VOLTAGE GAIN (dB)
TRANSMIT
50
40
20
8
60
MAX2820 toc08
ICC (mA)
70
MAX2820 toc03
80
70
VRF_GAIN = VIH
100
MAX2820 toc06
80
RECEIVE, VRF_GAIN = VIH
90
120
MAX2820 toc02
RECEIVE, VRF_GAIN = VIH
90
100
MAX2820 toc01
100
RECEIVER VOLTAGE GAIN
vs. GAIN-CONTROL VOLTAGE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
RX VOLTAGE GAIN (dB)
SUPPLY CURRENT vs. TEMPERATURE
NORMALIZED RESPONSE (dB)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
-120
1
10
FREQUENCY (MHz)
100
0
0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0
FREQUENCY (GHz)
_______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
TRANSMITTER OUTPUT POWER
vs. FREQUENCY
RECEIVER BASEBAND OUTPUT SPECTRUM
-20
3.5
-30
-40
-50
-60
-40°C
("A" VERSION)
3.0
2.5
+25°C
("A" VERSION)
-40°C
2.0
+85°C
1.0
VIN = 400mVP-P
VTX_GC = 0V
11Mbps CCK
0
-80
5
2400
10 15 20 25 30 35 40 45 50
2420
TRANSMITTER OUTPUT POWER
vs. SUPPLY VOLTAGE
-40°C ("A" VERSION)
-40°C
+25°C ("A" VERSION)
2.5
+85°C ("A" VERSION)
+25°C
1.5
1.0
+85°C
3.0
3.3
-50
-60
-70
-33
3.6
-22
-11
0
11
22
VCC (V)
FREQUENCY OFFSET FROM CARRIER (MHz)
TRANSMITTER OUTPUT SPECTRUM
TRANSMITTER GAIN
vs. GAIN-CONTROL VOLTAGE
5
-20
-30
-40
-50
-40°C
0
NORMALIZED GAIN (dB)
CW SIGNAL
fBB = 3.3MHz
fLO = 2450MHz
MAX2820toc14
10
TX OUTPUT POWER (dBm)
-40
-90
2.7
-10
-30
-80
0
0
RBW = 100kHz
VIN = 400mVP-P
11Mbps CCK
POUT = -1dBm
-20
VIN = 400mVP-P
VTX_GC = 0V
11Mbps CCK
0.5
2500
-5
+25°C +85°C
-10
-40°C ("A" VERSION)
+25°C ("A" VERSION)
+85°C ("A" VERSION)
-15
-20
-60
-25
-70
-30
-80
0dB = MAX POUT AT +25°C
VIN = 400mVP-P
11Mbps CCK
-35
0 0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0
FREQUENCY (GHz)
33
MAX2820 toc15
2.0
2480
TRANSMITTER OUTPUT SPECTRUM
TX OUTPUT POWER (dBm)
TX OUTPUT POWER (dBm)
3.5
2460
-10
MAX2820 toc12
4.0
2440
FREQUENCY (MHz)
FREQUENCY (MHz)
MAX2820 toc13
0
3.0
+85°C
("A" VERSION)
+25°C
1.5
0.5
-70
MAX2820 toc11
-10
4.0
TX OUTPUT POWER (dBm)
VRF_GAIN = VIH
RX GAIN = 50dB
fBB = 5MHz
fLO = 2450MHz
MAX2820 toc10
BASEBAND OUTPUT POWER (dBm)
0
0
0.5
1.0
1.5
2.0
VTX_GC (V)
_______________________________________________________________________________________
9
MAX2820/MAX2820A/MAX2821/MAX2821A
Typical Operating Characteristics (continued)
(MAX2820/MAX2821 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2450MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50Ω through a balun, baseband
input biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(MAX2820/MAX2821 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2450MHz, receive baseband outputs = 500mVP-P, transmit baseband
inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50Ω through a balun, baseband input
biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.)
2.60
-30
-40
2.45
+25°C
2.40
+85°C
2.35
2.30
-50
-60
0
-130
-140
0
0.5
1.0
1.5
2.5
2.0
100
VCO/PLL SETTING TIME
50
-80
MAX2820/MAX2821
("A" VERSION)
-110
BWLOOP = 45kHz
fLO = 2499MHz TO 2400MHz
40
FREQUENCY ERROR (kHz)
MAX2820/MAX2821
fLO = 2450MHz
BWLOOP = 45kHz
ICP = 2mA
φINT = 2.1°RMS
10
OFFSET FREQUENCY (kHz)
MAX2820 toc19
-60
PHASE NOISE (dBc/Hz)
1
VTUNE (V)
-50
30
20
10
0
-10
-20
-30
-120
-40
-130
-50
100
1k
10k
100k
OFFSET FREQUENCY (Hz)
10
-110
2.20
CLOSED-LOOP PHASE NOISE
vs. OFFSET FREQUENCY
-100
-90
-100
-120
FREQUENCY (MHz)
-90
-70
-80
2.25
10 20 30 40 50 60 70 80 90 100
-70
-60
MAX2820 toc20
-20
-40°C
2.50
fLO = 2450MHz
MEASURED AT
TX OUTPUT
-50
PHASE NOISE (dBc/Hz)
2.55
LO FREQUENCY (GHz)
-10
-40
MAX2820 toc17
fLO = 2450MHz
0
2.65
MAX2820 toc16
10
OPEN-LOOP PHASE NOISE
vs. OFFSET FREQUENCY
LO FREQUENCY vs. TUNING VOLTAGE
MAX2820 toc18
TRANSMITTER BASEBAND FILTER RESPONSE
NORMALIZED RESPONSE (dB)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
1M
0
40 80 120 160 200 240 280 320 360 400
TIME (µs)
______________________________________________________________________________________
1000
2.4GHz 802.11b Zero-IF Transceivers
VCC_LNA
RX_AGC
TX_ON
VCC_RMX
RX_ON
VCC_BUF
RX_DET (MAX2820/MAX2821)
N.C. (MAX2820A/MAX2821A)
RX_BBIP
RX_BBIN
RX_BBQN
RX_BBQP
RX_1K
DOUT
48
47
46
45
44
43
42
41
40
39
38
37
1
36 SHDNB
PROGRAMMING AND
MODE CONTROL
RX LEVEL
DETECTOR
VREF
(MAX2821/MAX2821A)
2
35 VCC_RXF
RF_GAIN
3
34 VCC_LO
RX_RFN
4
33 VCC_VCO
RX_RFP
5
32 BYP
VCC_REF
6
31 TUNE
90
RBIAS
0
7
TX_RFP
8
TX_RFN
9
30 GND_VCO
MAX2820/
MAX2821
90
INTEGER-N
SYNTHESIZER
0
29 GND_CP
28 CP_OUT
PA_BIAS 10
27 VCC_CP
∑
VOS COMP
SERIAL
INTERFACE
VCC_DRVR 11
13
14
15
16
17
18
19
20
21
22
23
24
TX_BBIN
TX_BBIP
TX_BBQP
TX_BBQN
VCC_TXF
GND_DIG
VCC_DIG
N.C.
ROSCP
ROSCN
DIN
25 SCLK
VCC_TMX
TX_GC 12
26 CSB
______________________________________________________________________________________
11
MAX2820/MAX2820A/MAX2821/MAX2821A
Pin Configuration/Functional Diagram
2.4GHz 802.11b Zero-IF Transceivers
MAX2820/MAX2820A/MAX2821/MAX2821A
Pin Description
PIN
NAME
1
VCC_LNA
2
12
DESCRIPTION
Supply Voltage for LNA. Bypass with a capacitor as close to the pin as possible. Do not share the
bypass capacitor ground vias with other branches.
N.C.
No Connection. Not internally connected (MAX2820/MAX2820A only).
VREF
Voltage Reference Output (MAX2821/MAX2821A only).
3
RF_GAIN
LNA Gain Select Logic Input. Logic high for LNA high-gain mode, logic low for LNA low-gain mode.
4
RX_RFN
Receiver LNA Negative Input. On-chip AC-coupling. Requires off-chip impedance match and
connection to 2:1 balun.
5
RX_RFP
Receiver LNA Positive Input. On-chip AC-coupling. Requires off-chip impedance match and
connection to 2:1 balun.
6
VCC_REF
7
RBIAS
8
TX_RFP
Transmit Driver Amplifier Positive Output. On-chip pullup choke to VCC. Requires off-chip impedance
match and connection to 4:1 balun.
9
TX_RFN
Transmit Driver Amplifier Negative Output. On-chip pullup choke to VCC. Requires off-chip
impedance match and connection to 4:1 balun.
10
PA_BIAS
Power-Amplifier Bias-Current Control Signal. Analog output. High-impedance, open-drain current
source. Connect directly to bias-current control input on external PA.
11
VCC_DRVR
Supply Voltage for Transmit Driver. Bypass with a capacitor as close to the pin as possible. Do not
share the bypass capacitor ground vias with other branches.
12
TX_GC
Transmit Gain-Control Input. Analog high-impedance input. Connect directly to baseband IC DAC
output. See the Typical Operating Characteristics for Transmitter Gain vs. Gain-Control Voltage.
13
VCC_TMX
Supply Voltage for Transmit Mixer and VGA. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
14
TX_BBIN
Transmit Negative In-Phase Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
15
TX_BBIP
Transmit Positive In-Phase Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
16
TX_BBQP
Transmit Positive Quadrature Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
17
TX_BBQN
Transmit Negative Quadrature Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
18
VCC_TXF
Supply Voltage for Transmit Baseband Filter. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
19
GND_DIG
Digital Ground
Supply Voltage for Bias Circuitry and Autotuner. Bypass with a capacitor as close to the pin as
possible. Do not share the bypass capacitor ground vias with other branches.
Precision Bias Resistor Pin. Connect a 12kΩ precision resistor (≤2%) to GND.
______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
PIN
NAME
DESCRIPTION
20
VCC_DIG
21
N.C.
22
ROSCP
Reference Oscillator Positive Input. Analog high-impedance differential input. DC-coupled. Requires
external AC-coupling. Connect an external reference oscillator to this analog input.
23
ROSCN
Reference Oscillator Negative Input. Analog high-impedance differential input. DC-coupled. Requires
external AC-coupling. Bypass this analog input to ground with a capacitor for single-ended operation.
24
DIN
25
SCLK
3-Wire Serial-Interface Clock Input. Digital high-impedance input. Connect this digital input directly to
baseband IC serial-interface CMOS output (SPI/QSPI/MICROWIRE compatible).
26
CSB
3-Wire Serial-Interface Enable Input. Digital high-impedance input. Connect directly to baseband IC
serial-interface CMOS output (SPI/QSPI/MICROWIRE compatible).
27
VCC_CP
Supply Voltage for PLL Charge Pump. Bypass with a capacitor as close to the pin as possible. Do not
share the bypass capacitor ground vias with other branches.
28
CP_OUT
PLL Charge-Pump Output. Analog high-impedance output. Current source. Connect directly to the
PLL loop filter input.
29
GND_CP
PLL Charge-Pump Ground. Connect to PC board ground plane.
30
GND_VCO
Supply Voltage for Digital Circuitry. Bypass with a capacitor as close to the pin as possible. Do not
share the bypass capacitor ground vias with other branches.
No Connection. Not internally connected.
3-Wire Serial-Interface Data Input. Digital high-impedance input. Connect directly to baseband IC
serial-interface CMOS output (SPI™/QSPI™/MICROWIRE™ compatible).
VCO Ground. Connect to PC board ground plane.
VCO Frequency Tuning Input. Analog high-impedance voltage input. Connect directly to the PLL loop
filter output.
31
TUNE
32
BYP
33
VCC_VCO
34
VCC_LO
Supply Voltage for VCO, LO Buffers, and LO Quadrature Circuitry. Bypass with a capacitor as close
to the pin as possible. Do not share the bypass capacitor ground vias with other branches.
35
VCC_RXF
Supply Voltage for Receiver Baseband Filter. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
36
SHDNB
37
DOUT
Serial-Interface Data Output. Digital CMOS output. Optional connection.
38
RX_1K
Receiver 1kHz Highpass Bandwidth Control. Digital CMOS input. Connect directly to baseband IC
CMOS output. Controls receiver baseband highpass -3dB corner frequency; logic low for 10kHz,
logic high for 1kHz. See the Applications Information section for proper use of this function.
VCO Bias Bypass. Bypass with a 2000pF capacitor to ground.
Supply Voltage for VCO. Bypass with a capacitor as close to the pin as possible. Do not share the
bypass capacitor ground vias with other branches. Important note: Operate from separate regulated
supply voltage.
Active-Low Shutdown Input. Digital high-impedance CMOS input. Connect directly to baseband IC
mode control CMOS output. Logic low to disable all device functions. Logic high to enable normal
chip operation.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
______________________________________________________________________________________
13
MAX2820/MAX2820A/MAX2821/MAX2821A
Pin Description (continued)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
Pin Description (continued)
PIN
NAME
DESCRIPTION
39
RX_BBQP
Receive Positive Quadrature Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and
can drive loads up to 5kΩ || 5pF.
40
RX_BBQN
Receive Negative Quadrature Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and
can drive loads up to 5kΩ || 5pF.
41
RX_BBIN
Receive Negative In-Phase Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and
can drive loads up to 5kΩ || 5pF.
42
RX_BBIP
Receive Positive In-Phase Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V and can drive loads up to
5kΩ || 5pF.
RX_DET
Receive Level Detection Output. Digital CMOS output. Connect output directly to baseband IC input.
Used to indicate RF input level. Logic high for input levels above -49dBm (typ). Logic low for levels
below -54dBm (typ). (MAX2820 and MAX2821)
43
N.C.
No Connection (MAX2820A/MAX2821A)
Supply Voltage for Receiver Baseband Buffer. Bypass with a capacitor as close to the pin as
possible. Do not share the bypass capacitor ground vias with other branches.
44
VCC_BUF
45
RX_ON
Receiver-On Control Input. Digital CMOS input. Connect to baseband IC mode control CMOS output.
46
VCC_RMX
Supply Voltage for Receiver Downconverter. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
47
TX_ON
48
RX_AGC
Exposed
Paddle
GND
Transmitter-On Control Input. Digital CMOS input. Connect directly to baseband IC mode control
CMOS output.
Receive AGC Control. Analog high-impedance input. Connect directly to baseband IC DAC voltage
output. See the Typical Operating Characteristics for Gain vs. VRX_AGC.
DC and AC Ground Return for IC. Connect to PC board ground plane using multiple vias.
Changes in “A” Version
The MAX2820A/MAX2821A are cost-reduced versions
of the original MAX2820/MAX2821, intended as a dropin replacement—no changes to PC board layout, BOM,
or control software are required. Functionally, the “A”
version removes unused functions and programmability
while maintaining virtually identical performance characteristics. The changes are detailed below.
Synthesizer
Receive Filter
The original device has the ability to control the baseband LPF corner; the “A” version sets the LPF corner at
8.0MHz. Register bits RECEIVE:D2–D0 are now “don’t
cares.”
Receive-Level Detector (RSSI)
The original device has a receive-level detect output (pin
43, “RX_DET”); the “A” version removes this functionality.
Pin 43 is a no-connect (N.C.) on the “A” version.
The original device has the ability to program the
charge-pump source/sink current (±1mA or ±2mA); the
“A” version sets the charge-pump current at ±2mA, and
bit SYNTH:D6 (ICP) should now always be programmed to be 1.
14
______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
tCSW
tCSO
tCSH
tCSS
SCLK
tDS
tDH
tCH
tCS1
tCL
BIT 1
DIN
BIT 2
BIT 6
BIT 7
BIT 8
BIT 14
BIT 15
BIT 16
tDV
tTR
tDO
DOUT
BIT 1
BIT 2
BIT 6
BIT 7
BIT 8
BIT 14
BIT 15
BIT 16
Figure 1. MAX2820/MAX2821 Serial-Interface Timing Diagram
Table 1. Operating-Mode Truth Table
OPERATING MODE
MODE CONTROL INPUTS
CIRCUIT BLOCK STATES
SHDNB
TX_ON
RX_ON
RX_PATH
TX_PATH
PLL/VCO/LO GEN.
Shutdown
0
X
X
OFF
OFF
OFF
Standby
1
0
0
OFF
OFF
ON
Receive
1
0
1
ON
OFF
ON
Transmit
1
1
0
OFF
ON
ON
Operating Modes
The MAX2820/MAX2821 have four primary modes of
operation: shutdown, standby, receive active, and
transmit active. The modes are controlled by the digital
inputs SHDNB, TX_ON, and RX_ON. Table 1 shows the
operating mode vs. the digital mode control input.
Shutdown Mode
Shutdown mode is achieved by driving SHDNB low. In
shutdown mode, all circuit blocks are powered down,
except for the serial interface circuitry. While the device
is in shutdown, the serial interface registers can still be
loaded by applying VCC to the digital supply voltage
(VCC_DIG). All previously programmed register values
are preserved during the shutdown mode, as long as
VCC_DIG is applied.
Standby Mode
Standby mode is achieved by driving SHDNB high and
RX_ON and TX_ON low. In standby mode, the PLL,
VCO, LO generator, LO buffer, LO quadrature, and filter autotuner are powered on by default. The standby
mode is intended to provide time for the slower-settling
circuitry (PLL and autotuner) to turn on and settle to the
correct frequency before making RX or TX active. The
3-wire serial interface is active and can load register
values at any time. Refer to the serial-interface specification for details.
Receive Mode
Receive mode is enabled by driving the digital inputs
SHDNB high, RX_ON high, and TX_ON low. In receive
mode, all receive circuit blocks are powered on and all
VCO, PLL, and autotuner circuits are powered on. None of
the transmit path blocks are active in this mode. Although
the receiver blocks turn on quickly, the DC offset nulling
requires ~10µs to settle. The receiver signal path is ready
~10µs after a low-to-high transition on RX_ON.
Transmit Mode
Transmit mode is achieved by driving the digital inputs
SHDNB high, RX_ON low, and TX_ON high. In transmit
mode, all transmit circuit blocks are powered on and all
VCO, PLL, and autotuner circuits are powered on.
None of the receive path blocks is active in this mode.
Although the transmitter blocks turn on quickly, the
baseband DC offset calibration requires ~2.2µs to
complete. In addition, the TX driver amplifier is ramped
from the low-gain state (minimum RF output) to highgain state (peak RF output) over the next 1µs to 2µs.
The transmit signal path is ready ~4µs after a low-tohigh transition on TX_ON.
______________________________________________________________________________________
15
MAX2820/MAX2820A/MAX2821/MAX2821A
CSB
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
Table 2. Programming Register Definition Summary (Address and Data)
4 ADDRESS BITS
REGISTER
NAME
12 DATA BITS
A3
A2
A1
A0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
LSB
TEST
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
ENABLE
0
0
0
1
E11
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
E0
SYNTH
0
0
1
0
X
X
X
X
X
ICP
R5
R4
R3
R2
R1
R0
SYNTH
(“A” VERSION)
0
0
1
0
X
X
X
X
X
X
R5
R4
R3
R2
R1
R0
CHANNEL
0
0
1
1
X
X
X
X
X
CF6
CF5
CF4
CF3
CF2
CF1
CF0
RECEIVE
0
1
0
0
2C2
2C1
2C0
1C2
1C1
1C0
DL1
DL0
SF
BW2
BW1
BW0
RECEIVE
(“A” VERSION)
0
1
0
0
2C2
2C1
2C0
1C2
1C1
1C0
0
1
0
X
X
X
TRANSMIT
0
1
0
1
X
X
X
X
X
X
X
X
PA3
PA2
PA1
PA0
X = Don’t care.
Programmable Registers
The MAX2820/MAX2820A and MAX2821/MAX2821A
(the MAX2820 family) contain programmable registers
to control various modes of operation for the major circuit blocks. The registers can be programmed through
the 3-wire SPI/QSPI/MICROWIRE-compatible serial
port. The MAX2820 family includes five programmable
registers:
1) Test register (always program as in Table 2).
2) Block-enable register
3) Synthesizer register
4) Channel frequency register
5) Receiver settings register
6) Transmitter settings register
Each register consists of 16 bits. The four most significant bits (MSBs) are the register’s address. The twelve
least significant bits (LSBs) are used for register data.
Table 2 summarizes the register configuration. A
detailed description of each register is provided in
Tables 3–6.
Data is shifted in the MSB first. The data sent to the
transceiver, in 16-bit words, is framed by CSB. When
CSB is low, the clock is active and data is shifted with
the rising edge of the clock. When CSB transitions to
high, the shift register is latched into the register selected by the contents of the address bits. Only the last 16
bits shifted into the device are retained in the shift register. No check is made on the number of clock pulses.
Figure 1 documents the serial interface timing for the
MAX2820 family.
16
Power-Up Default States
The devices provide power-up loading of default states
for each of the registers. The states are loaded on a
VCC_DIG supply voltage transition from 0V to VCC. The
default values are retained until reprogrammed through
the serial interface or the power supply voltage is taken
to 0V. The default state of each register is described in
Table 3. Note: Putting the IC in shutdown mode does
not change the contents of the programming registers.
Block-Enable Register
The block-enable register permits individual control of the
enable state for each major circuit block in the transceiver.
The actual enable condition of the circuit block is a logical
function of the block-enable bit setting and other control
input states. Table 4 documents the logical definition of
state for each major circuit block.
Synthesizer Register
The synthesizer register (SYNTH) controls the reference
frequency divider and charge-pump current of the PLL.
See Table 5 for a description of the bit settings.
Channel Frequency Register
The channel frequency register (CHANNEL) sets the
RF carrier frequency for the radio. The channel is programmed as a number from 0 to 99. The actual frequency
is 2400 + channel in MHz. The default setting is 37 for
2437MHz. See Table 6 for a description of the bit settings.
Receiver Settings Register
(MAX2820/MAX2821 Only)
The receive settings register (RECEIVE) controls the
receive filter -3dB corner frequency, RX level detector
midpoint, and VGA DC offset nulling parameters. The
defaults are intended to provide proper operation.
______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
MAX2820/MAX2820A/MAX2821/MAX2821A
Table 3. Register Power-Up Default States
REGISTER
ADDRESS
DEFAULT
ENABLE
0001
000000011110
Block-Enable Control Settings (E)
FUNCTION
SYNTH
0010
000001000000
Synthesizer Settings:
• Reference frequency (R)
• Lock-detect enable (LD)
• Charge-pump current (ICP) (MAX2820/MAX2821 only)
CHANNEL
0011
000000100101
Channel frequency settings (CF)
RECEIVE
0100
111111010010
Receiver Settings:
• VGA DC offset nulling parameter 1 (1C)
• VGA DC offset nulling parameter 2 (2C)
• -3dB lowpass filter bandwidth (BW)
• Detector midpoint level (DL)
• Special function bit (SF)
TRANSMIT
0101
000000000000
Transmit Settings:
• PA bias (PA)
Table 4. Block-Enable Register (ENABLE)
ADDRESS
DATA BIT CONTENT DEFAULT
DESCRIPTION AND LOGICAL DEFINITION
D11
E(11)
0
Reserved
D10
E(10)
0
PA Bias-Control Enable (PAB_EN)
• PAB_EN = SHDNB • (E(10) + TX_ON)
D9
E(9)
0
Transmit Baseband Filters Enable (TXFLT_EN)
• TXFLT_EN = SHDNB • (E(9) + TX_ON)
D8
E(8)
0
TX Upconverter + VGA + Driver Amp Enable (TXUVD_EN)
• TXUVD_EN = SHDNB • (E(8) + TX_ON)
D7
E(7)
0
Receive Detector Enable (DET_EN)
• DET_EN = SHDNB • (E(7) + RX_ON)
D6
E(6)
0
RX Downconverter + Filters + AGC Amps Enable (RXDFA_EN)
• RXDFA_EN = SHDNB • (E(6) + RX_ON)
D5
E(5)
0
Receive LNA Enable (RXLNA_EN)
• RXLNA_EN = SHDNB • (E(5) + RX_ON )
D4
E(4)
1
Autotuner Enable (AT_EN)
• AT_EN = SHDNB • (E(4) + RX_ON + TX_ON)
D3
E(3)
1
PLL Charge-Pump Enable (CP_EN)
• CP_EN = SHDNB • E(3)
D2
E(2)
1
PLL Enable (PLL_EN)
• PLL_EN = SHDNB • E(2)
D1
E(1)
1
VCO Enable (VCO_EN)
• VCO_EN = SHDNB • E(1)
D0
E(0)
0
Reserved
0001
______________________________________________________________________________________
17
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
Table 5. Synthesizer Register (SYNTH)
ADDRESS
DATA BIT
CONTENT
DEFAULT
D11:D7
X
00000
1
D6
ICP
(MAX2820/
MAX2821)
Charge-Pump Current Select
• 0 = ±1mA charge-pump current
• 1 = ±2mA charge-pump current
X (MAX2820A/
MAX2821A)
1
Reserved
R(5:0)
000000
0010
D5:D0
DESCRIPTION
Reserved
Reference Frequency Divider
• 000000 = 22MHz
• 000001 = 44MHz
Table 6. Channel Frequency Block Register (CHANNEL)
ADDRESS
0011
DATA BIT
CONTENT
DEFAULT
D11:D7
X
00000
D6:D0
CF(6:0)
0100101
DESCRIPTION
Reserved
Channel Frequency Select: fLO = (2400 + CF(6:0))MHz
• 0000000 = 2400MHz
• 0000001 = 2401MHz
• …………
• 1100010 = 2498MHz
• 1100011 = 2499MHz
Table 7a. Receive Settings Register (RECEIVE), (MAX2820/MAX2821 Only)
ADDRESS
0100
DATA BIT
CONTENT
DEFAULT
D11:D9
2C(2:0)
111
D8:D6
1C(2:0)
111
VGA DC Offset Nulling Parameter 1
D5:D4
DL(1:0)
01
RX Level Detector Midpoint Select
• 11 = 01 = 50.2mVP
• 10 = 70.9mVP
• 00 = 35.5mVP
D3
SF(0)
0
Special Function Select (not presently used)
• 0 = OFF
• 1 = ON
D2:D0
18
DESCRIPTION
VGA DC Offset Nulling Parameter 2
BW(2:0)
010
Receive Filter -3dB Frequency Select (frequencies are
approximate)
• 000 = 8.5MHz
• 001 = 8.0MHz
• 010 = 7.5MHz
• 011 = 7.0MHz
• 100 = 6.5MHz
• 101 = 6.0MHz
______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
ADDRESS
0100
DATA BIT
CONTENT
DEFAULT
D11:D9
2C (2:0)
111
VGA DC Offset Nulling Parameter 2
DESCRIPTION
D8:D6
1C (2:0)
111
VGA DC Offset Nulling Parameter 1
D5:D3
X
010
Reserved—Set to these Values
D2:D0
X
010
Reserved—X = Don’t Care. Rx filter is not programmable.
Table 8. Transmit Settings Register (TRANSMIT)
ADDRESS
0101
DATA BIT
CONTENT
DEFAULT
D11:D4
X
X
D3:D0
PA(3:0)
0000
However, the filter frequency and detector can be modified if desired. Do not reprogram VGA DC offset nulling
parameters. These settings were optimized during development. See Table 7 for a description of the bit settings.
Transmitter Settings Register
The transmitter settings register (TRANSMIT) controls
the 4-bit PA bias DAC. The 4 bits correspond to a PA
bias current between 0 and full scale (~300µA). See
Table 8 for the bit settings.
Applications Information
Receive Path
LNA
The RX_RF inputs are high-impedance RF differential
inputs AC-coupled on-chip to the LNA. The LNA inputs
require external impedance matching and differential to
single-ended conversion. The balanced to singleended conversion and interface to 50Ω is achieved
through the use of an off-chip 2:1 balun transformer,
such as the small surface-mount baluns offered by
Murata and TOKO. In the case of the 2:1 balun, the RX
RF input must be impedance-matched to a differential/balanced impedance of 100Ω. A simple LC network
is sufficient to impedance-match the LNA to the balun.
The Typical Application Circuit shows the balun, inductors, and capacitors that constitute the matching network. Refer to the MAX2820/MAX2821 EV kit schematic
for component values of the matching network.
The line lengths and parasitics have a noticeable impact
on the matching element values in the board-level circuit.
Some empirical adjustment of LC component values is
likely. Balanced line layout on the differential input traces
is essential to maintaining good IP2 performance and RF
common-mode noise rejection.
DESCRIPTION
Reserved
PA Bias Select:
• 1111 = Highest PA bias
• …………
• 0000 = Lowest PA bias
The receivers have two LNA gain modes that are digitally
controlled by the logic signal applied to RF_GAIN.
RF_GAIN high enables the high-gain mode, and
RF_GAIN low enables the low-gain mode. The LNA gain
step is nominally 30dB. In most applications, RF_GAIN is
connected directly to a CMOS output of the baseband
IC, and the baseband IC controls the state of the LNA
gain based on the detected signal amplitude.
Receiver Baseband Lowpass Filtering
The on-chip receive lowpass filters provide the steep
filtering necessary to attenuate the out-of-band
(>11MHz) interfering signals to sufficiently low levels to
preserve receiver sensitivity. The filter frequency
response is precisely controlled on-chip and does not
require user adjustment. In the MAX2820/MAX2821, a
provision is made to permit the -3dB corner frequency
and entire response to be slightly shifted up or down in
frequency. This is intended to offer some flexibility in
trading off adjacent channel rejection vs. passband
distortion. The filter -3dB frequency is programmed
through the serial interface. The specific bit setting vs.
-3dB frequency is shown in Table 7. The typical receive
baseband filter gain vs. frequency profile is shown in
the Typical Operating Characteristics.
Receive Gain Control and DC Offset Nulling
The receive path gain is varied through an external voltage applied to the pin RX_AGC. Maximum gain is at
VRX_AGC = 0V and minimum gain is at VRX_AGC = 2V.
The RX_AGC input is a high-impedance analog input
designed for direct connection to the RX_AGC DAC
output of the baseband IC. The gain-control range,
which is continuously variable, is typically 70dB. The
gain-control characteristic is shown in the Typical
______________________________________________________________________________________
19
MAX2820/MAX2820A/MAX2821/MAX2821A
Table 7b. Receive Settings Register (RECEIVE), (MAX2820A/MAX2821A Only)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
Operating Characteristics section graph Receiver
Voltage Gain vs. Gain-Control Voltage.
Some local noise filtering through a simple RC network
at the input is permissible. However, the time constant
of this network should be kept sufficiently low in order
not to limit the desired response time of the RX gaincontrol function.
Receiver Baseband Amplifier Outputs
The receiver baseband outputs (RX_BBIP, RX_BBIN,
RX_BBQP, and RX_BBQN) are differential low-impedance buffer outputs. The outputs are designed to be
directly connected (DC-coupled) to the in-phase (I) and
quadrature-phase (Q) ADC inputs of the baseband IC.
The RX I/Q outputs are internally biased to +1.2V common-mode voltage. The outputs are capable of driving
loads up to 5kΩ || 5pF with the full bandwidth baseband
signals at a differential amplitude of 500mVP-P.
Proper board layout is essential to maintain good balance between I/Q traces. This provides good quadrature phase accuracy.
Receiver Power Detector (MAX2820/MAX2821 Only)
The receiver level detector is a digital output from an
internal threshold detector that is used to determine
when to change the LNA gain state. In most applications,
it is connected directly to a comparator input of the baseband IC. The threshold level can be programmed
through the MAX2820/MAX2821 control software.
Transmit Path
Transmitter Baseband Inputs
The transmitter baseband inputs (TX_BBIP, TX_BBIN,
TX_BBQP, and TX_BBQN) are high-impedance differential analog inputs. The inputs are designed to be
directly connected (DC-coupled) to the in-phase (I) and
quadrature-phase (Q) DAC outputs of the baseband IC.
The inputs must be externally biased to +1.2V commonmode voltage. Typically, the DAC outputs are current
outputs with external resistor loads to ground. I and Q
are nominally driven by a 400mVP-P differential baseband signal.
Proper board layout is essential to maintain good balance between I/Q traces. This provides good quadrature phase accuracy by maintaining equal parasitic
capacitance on the lines. In addition, it is important not
to expose the TX I/Q circuit board traces going from the
digital baseband IC to the TX_BB inputs. The lines
should be shielded on an inner layer to prevent coupling of RF to these TX I/Q inputs and possible envelope demodulation of the RF signal.
20
Transmit Path Baseband Lowpass Filtering
The on-chip transmit lowpass filters provide the filtering
necessary to attenuate the unwanted higher-frequency
spurious signal content that arises from the DAC clock
feedthrough and sampling images. In addition, the filter
provides additional attenuation of the second sidelobe
of signal spectrum. The filter frequency response is set
on-chip. No user adjustment or programming is
required. The Typical Gain vs. Frequency profile is
shown in the Typical Operating Characteristics.
Transmitter DC Offset Calibration
In a zero-IF system, in order to achieve low LO leakage
at the RF output, the DC offset of the TX baseband signal path must be reduced to as near zero as possible.
Given that the amplifier stages, baseband filters, and
TX DAC possesses some finite DC offset that is too
large for the required LO leakage specification, it is
necessary to “null” the DC offset. The MAX2820 family
accomplishes this through an on-chip calibration
sequence. During this sequence, the net TX baseband
signal path offsets are sampled and cancelled in the
baseband amplifiers. This calibration occurs in the first
~2.2µs after TX_ON is taken high. During this time, it is
essential that the TX DAC output is in the 0V differential
state. The calibration corrects for any DAC offset.
However, if the DAC is set to a value other than the 0V
state, then an offset is erroneously sampled by the TX
offset calibration. The TX DAC output must be put into
the 0V differential state at or before the time TX_ON is
taken high.
Power-Amplifier Driver Output
The TX_RF outputs are high-impedance RF differential
outputs directly connected to the driver amplifier. The
outputs are essentially open-collector outputs with an
on-chip inductor choke connected to VCC_DRVR. The
power-amplifier driver outputs require external impedance matching and differential to single-ended conversion. The balanced to single-ended conversion and
interface to 50Ω is achieved through the use of an offchip 4:1 balun transformer, such as one from Murata or
TOKO. In this case, the TX RF output must be impedance-matched to a differential/balanced impedance of
200Ω. The Typical Application Circuit shows the balun,
inductors, and capacitors that constitute the matching
network of the power amplifier driver outputs. The output match should be adjusted until the return loss at the
balun output is >10dB.
______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
PA Bias DAC Output
The MAX2820 family provides a programmable analog
current source output for use in biasing the RF power
amplifier, such as the MAX2242. The output is essentially
an open-drain output of a current source DAC. The output
is designed to directly connect to the bias-current pin on
the power amplifier. The value of the current is determined by the 4 bits programmed into transmit (D3:D0).
This programmability permits optimizing of the poweramplifier idle current based on the output power level of
the PA. Care must be taken in the layout of this line. Avoid
running the line in parallel with the RF line. RF might couple onto the line, given the high impedance of the output.
This might result in rectified RF, altering the value of the
bias current and causing erratic PA operation.
Synthesizer
Channel Frequency and Reference Frequency
The synthesizer/PLL channel frequency and reference
settings establish the divider/counter settings in the integer-N synthesizer. Both the channel frequency and reference oscillator frequency are programmable through
the serial interface. The channel frequency is programmed as a channel number 0 to 99 to set the carrier frequency to 2400MHz to 2499MHz (LO frequency =
channel + 2400). The reference frequency is programmable to 22MHz or 44MHz. These settings are intend-
ed to cover only the required 802.11b channel spacing
and the two possible crystal oscillator options used in
the radios.
Reference Oscillator Input
The reference oscillator inputs ROSCP and ROSCN are
high-impedance analog inputs. They are designed to
be connected to the reference oscillator output through
a coupling capacitor. The input amplitude can range
from 200mVP-P to 1000mVP-P; therefore, in the case of
a reference oscillator with a CMOS output, the signal
must be attenuated before being applied to the ROSC
inputs. The signal can be attenuated with a resistor- or
capacitor-divider network.
Reference Voltage Output
A voltage reference output is provided on the MAX2821/
MAX2821A from pin 2, VREF, for use with certain baseband ICs. The nominal output voltage is 1.2V. The reference voltage is first- order compensated over
temperature to provide a reasonably low drift output,
1.1V to 1.3V over temperature, under load conditions.
The output stage is designed to drive 2mA loads with
up to 20pF of load capacitance. The VREF output is
designed to directly connect to the baseband reference input.
Loop Filter
The PLL uses a classical charge pump into an external
loop filter (C-RC) in which the filter output connects to
the voltage tuning input of the VCO. This simple thirdorder lowpass loop filter closes the loop around the
synthesizer. The Typical Application Circuit shows the
loop filter elements around the transceiver. The capacitor and resistor values are set to provide the loop bandwidth required to achieve the desired lock time while
also maintaining loop stability. Refer to the MAX2820/
MAX2821 EV kit schematic for component values. A
45kHz loop bandwidth is recommended to ensure that
the loop settles quickly enough to achieve 5µs TX turnaround time and 10µs RX turnaround time. This is the
loop filter on the EV kit. Narrowing the loop bandwidth
increases the settling time and results in unacceptable
TX-RX turnaround time performance.
Chip Information
TRANSISTOR COUNT: 13,607
______________________________________________________________________________________
21
MAX2820/MAX2820A/MAX2821/MAX2821A
Transmit Gain Control
The transmit gain-control input provides a direct analog
control over the transmit path gain. The transmit gain is
controlled by an external voltage at pin TX_GC. The typical gain-control characteristic is provided in the Typical
Operating Characteristics graph Transmitter Gain
Control vs. Gain-Control Voltage. The input is a highimpedance analog input designed to directly connect to
the DAC output of the baseband IC. Some local noise
filtering through a simple RC network at the input is permissible. However, the time constant of this network
should be kept sufficiently low so the desired response
time of the TX gain-control function is not limited.
During the TX turn-on sequence, the gain is internally
set at the minimum while the TX baseband offset calibration is taking place. The RF output is effectively
“blanked” for the first 2.2µs after TX_ON is taken high.
After 2.2µs, the “blanking” is released, and the gaincontrol amplifier ramps to the gain set by the external
voltage applied to the TX_GC input.
Typical Application Circuit
DIGITAL MODE CONTROL SIGNALS
FROM/TO BASEBAND IC
48
RX GAIN-CONTROL SIGNALS
TO/FROM BASEBAND IC
RF_GAIN
RX_RFN
RX RF INPUT FROM
SWITCH AND BPF
RX_RFP
VCC_REF
45
TX_RFP
TX RF OUTPUT TO
SWITCH AND BPF
TX_RFN
TO PA BIAS INPUT
PA_BIAS
43
42
41
40
39
DOUT
37
RX LEVEL
DETECTOR
2
35
3
34
4
33
5
32
6
31
7
MAX2820/MAX2820A/
MAX2821/MAX2821A
30
90
8
INTEGER-N
SYNTHESIZER
0
29
9
28
10
27
∑
VOS COMP
SERIAL
INTERFACE
12
26
25
22
ROSCP
21
N.C.
20
VCC_DIG
19
GND_DIG
18
VCC_TXF
17
TX_BBQN
16
TX_BBQP
15
TX_BBIP
14
TX_BBIN
13
SHDNB
VCC_RXF
VCC_LO
VCC_VCO
BYP
TUNE
0
11
DAC OUTPUT
FROM BASEBAND IC
38
36
PROGRAMMING AND
MODE CONTROL
VCC_DRVR
TX_GC
RX_1K
RX_BBQP
RX_BBQN
RX_BBIN
RX_BBIP
VCC_BUF
44
90
RBIAS
RX_DET (MAX2820/MAX2821)
N.C. (MAX2820A/MAX2821A)
RX_ON
VCC_RMX
46
23
GND_VCO
GND_CP
CP_OUT
LOOP FILTER
VCC_CP
CSB
SCLK
24
DIN
VREF (MAX2821/MAX2821A)
1
47
RX ANALOG OUTPUT SIGNAL
DIGITAL MODE CONTROL
SIGNALS TO/FROM BASEBAND IC
TO BASEBAND IC
ROSCN
VCC_LNA
OPTIONAL CONNECTION
TO BASEBAND
TX_ON
RX_AGC
DAC OUTPUT
FROM BASEBAND IC
VCC_TMX
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
REFERENCE
OSCILLATOR INPUT
TX ANALOG INPUT SIGNAL
FROM BASEBAND IC
22
______________________________________________________________________________________
SERIAL INTERFACE
TO BASEBAND IC
2.4GHz 802.11b Zero-IF Transceivers
32, 44, 48L QFN.EPS
PACKAGE OUTLINE
32,44,48L QFN, 7x7x0.90 MM
21-0092
H
1
2
______________________________________________________________________________________
23
MAX2820/MAX2820A/MAX2821/MAX2821A
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
U
PACKAGE OUTLINE,
32,44,48L QFN, 7x7x0.90 MM
21-0092
24
______________________________________________________________________________________
H
2
2
2.4GHz 802.11b Zero-IF Transceivers
32, 44, 48L QFN.EPS
D2
D
CL
D/2
b
D2/2
k
E/2
E2/2
CL
(NE-1) X e
E
E2
k
L
DETAIL A
e
(ND-1) X e
DETAIL B
e
CL
L
L1
CL
L
L
e
e
DALLAS
A1
A2
SEMICONDUCTOR
A
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
APPROVAL
DOCUMENT CONTROL NO.
21-0144
REV.
D
1
2
______________________________________________________________________________________
25
MAX2820/MAX2820A/MAX2821/MAX2821A
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MAX2820/MAX2820A/MAX2821/MAX2821A
2.4GHz 802.11b Zero-IF Transceivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
DALLAS
SEMICONDUCTOR
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
APPROVAL
DOCUMENT CONTROL NO.
21-0144
REV.
D
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
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