19-4588; Rev 1; 5/10
KIT
ATION
EVALU
E
L
B
AVAILA
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
The MAX2839AS direct conversion, zero-IF, RF transceiver
is designed specifically for 2.3GHz to 2.7GHz 802.16e
MIMO mobile WiMAX™ systems. The device incorporates one transmitter and two receivers, with > 40dB isolation between each receiver. The MAX2839AS
completely integrates all circuitry required to implement
the RF transceiver function, providing RF to baseband
receive path, and baseband to RF transmit path, VCO,
frequency synthesizer, crystal oscillator, and baseband/control interface. The device includes a fast-settling sigma-delta RF synthesizer with smaller than 40Hz
frequency steps and a crystal oscillator that allows the
use of a low-cost crystal in place of a TCXO. The transceiver IC also integrates circuits for on-chip DC-offset
cancellation, I/Q error, and carrier leakage detection
circuits. An internal transmit to receive loopback mode
allows for receiver I/Q imbalance calibration. The local
oscillator I/Q quadrature phase error can be digitally
corrected in approximately 0.125° steps. Only an RF
bandpass filter (BPF), crystal, RF switch, PA, and a
small number of passive components are needed to
form a complete wireless broadband RF radio solution.
The MAX2839AS completely eliminates the need for an
external SAW filter by implementing on-chip programmable monolithic filters for both the receiver and transmitter, for all 2GHz and 802.16e profiles and WiBro. The
baseband filters along with the Rx and Tx signal paths
are optimized to meet the stringent noise figure and linearity specifications. The device supports up to 2048
FFT OFDM and implements programmable channel filters for 3.5MHz to 20MHz RF channel bandwidths. The
transceiver requires only 2µs Tx-Rx switching time. The
IC is available in a small wafer-level package (WLP)
measuring 5.16mm x 3.66mm x 0.5mm.
Applications
Features
o 2.3GHz to 2.7GHz Wideband Operation
o Dual Receivers for MIMO, Single Transmitter
o Complete RF Transceiver, PA Driver, and Crystal
Oscillator
3.5dB Rx Noise Figure on Each Receiver with
Balun
-35dB Rx EVM for 64QAM Signal
0dBm Linear OFDM Transmit Power (64QAM)
-70dBr Tx Spectral Emission Mask
-35dBc LO Leakage
Automatic Rx DC Offset Correction
Monolithic Low-Noise VCO with -39dBc
Integrated Phase Noise
Programmable Rx I/Q Lowpass Channel Filters
Programmable Tx I/Q Lowpass Anti-Aliasing
Filters
Sigma-Delta Fractional-N PLL with 28.61Hz
Minimum Step Size
62dB Tx Gain Control Range with 1dB Step
Size, Digitally Controlled
95dB Rx Gain Control Range with 1dB Step
Size, Digitally Controlled
60dB Analog RSSI Instantaneous Dynamic
Range
4-Wire SPI™ Digital Interface
I/Q Analog Baseband Interface
Digital Tx/Rx Mode Control
Digitally Tuned Crystal Oscillator
On-Chip Digital Temperature Sensor Readout
o +2.7V to +3.6V Transceiver Supply
o Low-Power Shutdown Current
o Small WLP Package (5.16mm x 3.66mm x 0.5mm)
802.16e Mobile WiMAX Systems
Ordering Information
Korean WiBro Systems
Proprietary Wireless Broadband Systems
802.11g or n WLAN with MRC or MIMO Down Link
PART
MAX2839ASEWO+T
TEMP RANGE
PIN-PACKAGE
-40°C to +85°C
73 WLP
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
WiMAX is a trademark of the WiMAX Forum.
SPI is a trademark of Motorola, Inc.
Bump Configuration and Typical Operating Circuit appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX2839AS
General Description
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
ABSOLUTE MAXIMUM RATINGS
VCC_ Pins to GND..................................................-0.3V to +3.9V
RF Inputs: RXINA+, RXINA-, RXINB+,
RXINB- to GND ............................................AC-Coupled Only
RF Outputs: TXOUT+, TXOUT- to GND.................-0.3V to +3.9V
Analog Inputs: TXBBI+, TXBBI-, TXBBQ+,
TXBBQ- to GND.................................................-0.3V to +3.9V
Analog Input: REFCLK, XTAL1 .........................-0.3V to +3.9VP-P
Analog Outputs: RXBBIA+, RXBBIA-, RXBBQA+, RXBBQA-,
RXBBIB+, RXBBIB-, RXBBQB+, RXBBQB-, CPOUT+,
CPOUT-, PABIAS, RSSI to GND........................-0.3V to +3.9V
Digital Inputs: TXRX, CS, SCLK, DIN, B7:B0,
CLKOUT_DIV, RXHP, ENABLE to GND ............-0.3V to +3.9V
Digital Outputs: DOUT, CLKOUT ..........................-0.3V to +3.9V
Bias Voltages: VCOBYP .......................................-0.3V to +3.9V
Short-Circuit Duration on All Output Pins ...............................10s
RF Input Power: All RXIN_ ..............................................+10dBm
RF Output Differential Load VSWR: All TXOUT .......................6:1
Continuous Power Dissipation (TA = +70°C)
73-Bump WLP (derate 31.3mW/°C above +70°C).....2500mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Soldering Temperature (reflow) .........................(Note 1) +260°C
Note 1: Refer to Application Note 1891: Understanding the Basics of the Wafer-Level Chip-Scale Package (WL-CSP) available at
www.maxim-ic.com.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
CAUTION! ESD SENSITIVE DEVICE
DC ELECTRICAL CHARACTERISTICS
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.7V to 3.6V, TA = -40°C to +85°C, Rx set to the maximum gain.
ENABLE and TXRX set according to operating mode. CS = high, SCLK = DIN = low, no input signal at RF inputs, all RF inputs and
outputs terminated into 50Ω. 90mVRMS differential I and Q signals (1MHz) applied to I, Q baseband inputs of transmitter in transmit
mode, all registers set to recommended settings. Typical values are at VCC_ = 2.8V, fLO = 2.5GHz, and TA = +25°C.) (Note 2)
PARAMETER
Supply Voltage
CONDITIONS
VCC_
MIN
Shutdown mode, TA = +25°C; all logic inputs equal 0 or
VCC
2.7
Standby mode
UNITS
3.6
V
µA
3.8
33
50
One receiver on
79
101
Both receivers on
120
148
16 QAM
116
148
64 QAM (Note 3)
145
183
Rx calibration mode, both receivers on
153
200
Tx calibration mode
102
145
1.05
1.35
Rx mode
Tx mode
D[9:8] = 00 in A[4:0] = 00100
Rx I/Q Output Common-Mode
Voltage
MAX
2
Clock-out only mode
Supply Current
TYP
2.7
0.8
D[9:8] = 01 in A[4:0] = 00100
1.15
D[9:8] = 10 in A[4:0] = 00100
1.25
D[9:8] = 11 in A[4:0] = 00100
1.45
Tx Baseband Input CommonMode Voltage Operating Range
DC-coupled
Tx Baseband Input Bias Current
Source current
0.5
10
mA
V
1.2
V
20
µA
LOGIC INPUTS: TXRX, ENABLE, SCLK, DIN, CS, B7:B0, CLKOUT_DIV, RXHP
Digital Input-Voltage High, VIH
VCC - 0.4
Digital Input-Voltage Low, VIL
Digital Input-Current High, IIH
2
-1
_______________________________________________________________________________________
V
0.4
V
+1
µA
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.7V to 3.6V, TA = -40°C to +85°C, Rx set to the maximum gain.
ENABLE and TXRX set according to operating mode. CS = high, SCLK = DIN = low, no input signal at RF inputs, all RF inputs and
outputs terminated into 50Ω. 90mVRMS differential I and Q signals (1MHz) applied to I, Q baseband inputs of transmitter in transmit
mode, all registers set to recommended settings. Typical values are at VCC_ = 2.8V, fLO = 2.5GHz, and TA = +25°C.) (Note 2)
PARAMETER
CONDITIONS
Digital Input-Current Low, IIL
MIN
TYP
-1
MAX
UNITS
+1
µA
LOGIC OUTPUTS: DOUT, CLKOUT
Digital Output-Voltage High, VOH
Sourcing 100µA
Digital Output-Voltage Low, VOL
Sinking 100µA
VCC - 0.4
V
0.4
V
AC ELECTRICAL CHARACTERISTICS—Rx MODE
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, TA = +25°C, fRF = 2.4999GHz, fLO = 2.5GHz; baseband output
signal frequency = 100kHz, fREF = 40MHz, ENABLE = TXRX = CS = high, SCLK = DIN = low, with power matching for the differential
RF pins using the Typical Operating Circuit and registers set to default settings. Lowpass filter is set to 10MHz RF channel BW.
Unmodulated single-tone RF input signal is used.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.7
GHz
RF INPUT TO I, Q BASEBAND-LOADED OUTPUT
RF Input Frequency Range
2.3
Peak-to-Peak Gain Variation over
RF Input Frequency Range
Tested at band edges and band center
RF Input Return Loss
All LNA settings
TA = -40°C to
+85°C
Total Voltage Gain
RF Gain Steps
Maximum gain, B7:B0 = 0000000
92
1.5
dB
12
dB
99
Minimum gain, B7:B0 = 1111111
4
From max RF gain (B7:B6 = 00) to max RF gain - 8dB
(B7:B6 = 01)
8
From max RF gain to max RF gain - 16dB (B7:B6 = 10)
16
From max RF gain to max RF gain - 32dB (B7:B6 = 11)
32
Any RF or baseband gain change; gain settling to within
±1dB of steady state; RXHP = 1
200
Any RF or baseband gain change; gain settling to within
±0.1dB of steady state; RXHP = 1
2000
10
dB
Gain Change Settling Time
Baseband Gain Range
ns
From maximum baseband gain (B5:B0 = 000000) to
minimum gain (B5:B0 = 111111), TA = -40°C to +85°C
Baseband Gain Step Size
DSB Noise Figure
(Including Balun Loss)
dB
60.5
63
1
Voltage gain = 65dB with max RF gain (B7:B6 = 00)
3.5
Voltage gain = 50dB with max RF gain - 8dB (B7:B6 = 01)
8.5
Voltage gain = 45dB with max RF gain - 16dB
(B7:B6 = 10)
14.5
Voltage gain = 15dB with max RF gain - 32dB
(B7:B6 = 11)
32
65.5
dB
dB
dB
_______________________________________________________________________________________
3
MAX2839AS
DC ELECTRICAL CHARACTERISTICS (continued)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
AC ELECTRICAL CHARACTERISTICS—Rx MODE (continued)
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, TA = +25°C, fRF = 2.4999GHz, fLO = 2.5GHz; baseband output
signal frequency = 100kHz, fREF = 40MHz, ENABLE = TXRX = CS = high, SCLK = DIN = low, with power matching for the differential
RF pins using the Typical Operating Circuit and registers set to default settings. Lowpass filter is set to 10MHz RF channel BW.
Unmodulated single-tone RF input signal is used.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
AGC set for -65dBm wanted signal, max RF gain
(B7:B6 = 00)
-13
AGC set for -55dBm wanted signal, max RF gain - 8dB
(B7:B6 = 01)
-9
AGC set for -40dBm wanted signal, max RF gain - 16dB
(B7:B6 = 10)
-7
AGC set for -30dBm wanted signal, max RF gain - 32dB
(B7:B6 = 11)
+16
MAX
dBm
Out-of-Band Input IP3 (Note 4)
Inband Input P-1dB
Maximum Output Signal Level
UNITS
Max RF gain (B7:B6 = 00)
-37
Max RF gain - 8dB (B7:B6 = 01)
-29
Max RF gain - 16dB (B7:B6 = 01)
-21
Max RF gain - 32dB (B7:B6 = 11)
-4
Over passband frequency range at VGA gain between
max and max - 54dB; 1dB compression point
dBm
1.15
VP-P
I/Q Gain Imbalance
100kHz IQ baseband output; 1 σ variation
0.05
dB
I/Q Phase Error
100kHz IQ baseband output; 1 σ variation
0.25
Degrees
Rx I/Q Output Load Impedance
(R || C)
Minimum differential resistance
10
kΩ
Maximum differential capacitance
5
pF
+4.5
dB
Loopback Gain (for Receiver I/Q
Calibration)
Transmitter I/Q input to receiver I/Q output; transmitter
B6:B1 = 000011, receiver B5:B0 = 101010 programmed
through SPI
I/Q Output DC Droop
After switching RXHP to 0; average over 1µs after any
gain change, or 2µs after receive enabled with 100Hz
AC-coupling
1
V/s
I/Q Static DC Offset
No RF input signal; measure at 3µs after receive enable;
RXHP = 1 for 0 to 2µs and set to 0 after 2µs, 1 σ variation
1
mV
Isolation Between Rx Channels A
and B
Any RF gain settings
40
dB
At 15MHz
57
At 20MHz
75
-6
-1
RECEIVER BASEBAND FILTERS
Baseband Filter Rejection
At > 40MHz
75
RXHP = 1 (used before AGC completion)
650
D[5:4] = 00
Baseband Highpass Filter Corner
Frequency
4
RXHP = 0 (used after AGC
completion) address A[4:0] = 01110
dB
0.1
D[5:4] = 01
1
D[5:4] = 10
30
D[5:4] = 11
100
_______________________________________________________________________________________
kHz
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, TA = +25°C, fRF = 2.4999GHz, fLO = 2.5GHz; baseband output
signal frequency = 100kHz, fREF = 40MHz, ENABLE = TXRX = CS = high, SCLK = DIN = low, with power matching for the differential
RF pins using the Typical Operating Circuit and registers set to default settings. Lowpass filter is set to 10MHz RF channel BW.
Unmodulated single-tone RF input signal is used.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
A[4:0] = 00100 serial bits D[9:6] = 0000
1.75
A[4:0] = 00100 serial bits D[9:6] = 0001
2.25
A[4:0] = 00100 serial bits D[9:6] = 0010
3.5
A[4:0] = 00100 serial bits D[9:6] = 0011
5.0
A[4:0] = 00100 serial bits D[9:6] = 0100
5.5
A[4:0] = 00100 serial bits D[9:6] = 0101
6.0
A[4:0] = 00100 serial bits D[9:6] = 0110
7.0
A[4:0] = 00100 serial bits D[9:6] = 0111
8.0
A[4:0] = 00100 serial bits D[9:6] = 1000
9.0
A[4:0] = 00100 serial bits D[9:6] = 1001
10.0
A[4:0] = 00100 serial bits D[9:6] = 1010
12.0
A[4:0] = 00100 serial bits D[9:6] = 1011
14.0
A[4:0] = 00100 serial bits D[9:6] = 1100
15.0
A[4:0] = 00100 serial bits D[9:6] = 1101
20.0
A[4:0] = 00100 serial bits D[9:6] = 1110
24.0
A[4:0] = 00100 serial bits D[9:6] = 1111
28.0
0 to 2.3MHz for RF BW = 5MHz
1.3
0 to 4.6MHz for RF BW = 10MHz
1.3
0 to 2.3MHz for RF BW = 5MHz
90
0 to 4.6MHz for RF BW = 10MHz
50
Baseband Filter Rejection for
5MHz RF Channel BW
At 2.3MHz
1.8
At > 8.75MHz
75
Baseband Filter Rejection for
10MHz RF Channel BW
At 4.6MHz
1.6
At > 17.5MHz
75
RSSI Minimum Output Voltage
RLOAD ≥ 10kΩ
0.6
RSSI Maximum Output Voltage
RLOAD ≥ 10kΩ
2.1
V
29
mV/dB
RF Channel BW Supported by
Baseband Filter
Baseband Gain Ripple
Baseband Group Delay Ripple
MHz
dBP-P
nsP-P
dB
dB
RSSI
RSSI Slope
RSSI Output Settling Time
To within 3dB of steady state
+32dB signal step
200
-32dB signal step
800
V
ns
_______________________________________________________________________________________
5
MAX2839AS
AC ELECTRICAL CHARACTERISTICS—Rx MODE (continued)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
AC ELECTRICAL CHARACTERISTICS—Tx MODE
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, TA = +25°C, fRF = 2.501GHz, fLO = 2.5GHz, fREF = 40MHz,
ENABLE = CS = high, TXRX = SCLK = DIN = low, with power matching for the differential RF pins using the Typical Operating Circuit
and registers set to default settings. Lowpass filter is set to 10MHz RF channel BW. 1MHz 90mVRMS cosine and sine signals applied
to I/Q baseband inputs of transmitter (differential DC-coupled)). (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.7
GHz
2
dB
Tx BASEBAND I/Q INPUTS TO RF OUTPUTS
RF Output Frequency Range
2.3
Peak-to-Peak Peak Gain Variation
over RF Band
1
Total Voltage Gain
Max gain - 3dB; at unbalanced 50Ω matched output
Max Output Power over
Frequency
8
dB
64 QAM OFDM signal conforming to spectral emission
mask and -36dB EVM after I/Q imbalance calibration by
modem (Note 5)
0
dBm
8
dB
RF Gain Control Range
B6:B1 = 000000 to 111111
62
dB
Unwanted Sideband Suppression
Without calibration by modem, and excludes modem I/Q
imbalance; POUT = 0dBm
40
dB
B1
1
B2
2
B3
4
B4
8
B5
16
B6
32
Relative to 0dBm output power; without calibration by
modem
-30
dBc
Differential resistance
100
kΩ
Differential capacitance
0.5
pF
Baseband Frequency Response
for 5MHz RF Channel BW
0 to 3.333MHz
0.9
At > 9.45MHz
43
Baseband Frequency Response
for 10MHz RF Channel BW
0 to 6.667MHz
0.9
At > 18.9MHz
43
0 to 3.333MHz (RF BW = 5MHz)
20
0 to 6.667MHz (RF BW = 10MHz)
12
RF Output Return Loss
RF Gain Control Binary Weights
Carrier Leakage
Tx I/Q Input Impedance (R||C)
Baseband Group Delay Ripple
6
3.5
_______________________________________________________________________________________
dB
dB
dB
ns
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, SCLK = DIN
= low, PLL closed-loop unity gain bandwidth = 120kHz. VCO and RF synthesis enabled.) (Note 2)
PARAMETER
CONDITIONS
RF Channel Center Frequency
Range
MIN
2.3
Channel Center Frequency
Programming Minimum Step Size
Charge-Pump Comparison
Frequency
Reference Frequency Range
Reference Frequency Input
Levels
Reference Frequency Input
Impedance (R||C)
TYP
15
AC-coupled to REFCLK pin
MAX
UNITS
2.7
GHz
28.61
Hz
40
MHz
40
80
0.6
MHz
VP-P
Resistance (REFCLK pin)
10
kΩ
Capacitance (REFCLK pin)
1
pF
Programmable Reference Divider
Values
1
2
4
Closed-Loop Integrated Phase
Noise
Integrate phase noise from 200Hz to 5MHz; chargepump comparison frequency = 40MHz
-39
dBc
Charge-Pump Output Current
On each differential side
0.8
mA
fOFFSET = 0 to 1.8MHz
-40
Close-In Spur Level
fOFFSET = 1.8MHz to 7MHz
-70
fOFFSET > 7MHz
-80
Reference Spur Level
Turnaround LO Frequency Error
Relative to steady state; measured 35µs after Tx-Rx or
Rx-Tx switching instant, and 4µs after any receiver gain
changes
Temperature Range Over Which
VCO Maintains Lock
Relative to the ambient temperature TA at initial lock
dBc
-85
dBc
±50
Hz
TA ±40
°C
Reference Output Clock Divider
Values
CLKOUT_DIV pin = 0
Output Clock Drive Level
20MHz output, A[4:0] = 10100, D5 = 0
2.4
VP-P
Output Clock Load Impedance
(R||C)
Resistance
10
kΩ
Capacitance
2
pF
CLKOUT_DIV pin = 1
1
2
_______________________________________________________________________________________
7
MAX2839AS
AC ELECTRICAL CHARACTERISTICS—FREQUENCY SYNTHESIS
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
AC ELECTRICAL CHARACTERISTICS—MISCELLANEOUS BLOCKS
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, fREF = 40MHz, CS = high, SCLK = DIN = low, and TA = +25°C.) (Note
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PA BIAS DAC: VOLTAGE MODE
Output High level
10mA source current
VCC - 0.1
V
Output Low level
100µA sink current
0.1
V
Turn-On Time
Excludes programmable delay of 0 to 7µs in steps of
0.5µs
200
ns
Maximum capacitance, A[4:0] = 11000, D[6:0] = 1111111
15.5
Minimum capacitance, A[4:0] = 11000, D[6:0] = 0000000
0.5
CRYSTAL OSCILLATOR
On-Chip Tuning Capacitance
Range
On-Chip Tuning Capacitance
Step Size
pF
0.12
pF
ON-CHIP TEMPERATURE SENSOR
Digital Output Code
Readout at DOUT pin through SPI
A[4:0] = 01011, D[4:0]
TA = +25°C
01111
TA = +85°C
11101
TA = -40°C
00001
AC ELECTRICAL CHARACTERISTICS—TIMING
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, fLO = 2.5GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, PLL
closed-loop unity gain bandwidth = 120kHz, and TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SYSTEM TIMING
Turnaround Time
Measured from Tx or
Rx enable edge;
signal settling to
within 2dB of steady
state
Rx to Tx
µs
Tx to Rx, RXHP = 1
Tx Turn-On Time
(from Standby Mode)
Measured from Tx-enable edge; signal
settling to within 2dB of steady state
Tx Turn-Off Time
(to Standby Mode)
From Tx-disable edge
Rx Turn-On Time
(from Standby Mode)
Measured from Rx-enable edge; signal
settling to within 2dB of steady state
Rx Turn-Off Time
(to Standby Mode)
From Rx-disable edge
8
2
2
2
µs
0.1
µs
2
µs
0.1
µs
_______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
(MAX2839AS Evaluation Kit. Unless otherwise noted, VCC_ = 2.8V, fLO = 2.5GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, PLL
closed-loop unity gain bandwidth = 120kHz, and TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4-WIRE SERIAL PARALLEL INTERFACE TIMING (see Figure 1)
SCLK Rising Edge to CS Falling
Edge Wait Time
tCSO
6
ns
Falling Edge of CS to Rising
Edge of First SCLK Time
tCSS
6
ns
DIN to SCLK Setup Time
tDS
6
ns
DIN to SCLK Hold Time
tDH
6
ns
SCLK Pulse-Width High
tCH
6
ns
SCLK Pulse-Width Low
tCL
6
ns
Last Rising Edge of SCLK to
Rising Edge of CS or Clock to
Load Enable Setup Time
tCSH
6
ns
CS High Pulse Width
tCSW
20
ns
Time Between Rising Edge of CS
and the Next Rising Edge of
SCLK
tCS1
6
ns
Clock Frequency
fCLK
40
MHz
Rise Time
tR
0.1/fCLK
ns
Fall Time
tF
0.1/fCLK
ns
SCLK Falling Edge to Valid DOUT
tD
12.5
ns
Note 2: Min/max limits are production tested at TA = +85°C. Min/max limits at TA = -40°C and TA = +25°C are guaranteed by
design and characterization. The power-on default register settings are not production tested. Load register setting 10µs
after VCC is applied.
Note 3: Tx mode supply current is specified for 64 QAM while achieving the Tx output spectrum mask shown in the Typical Operating
Characteristics. The supply current can be reduced for 16 QAM signal by adjusting the Tx bias settings through the SPI.
Note 4: Two tones at +20MHz and +39MHz offset with -35dBm/tone. Measure IM3 at 1MHz.
Note 5: Gain adjusted over max gain and max gain -3dB.
_______________________________________________________________________________________
9
MAX2839AS
AC ELECTRICAL CHARACTERISTICS—TIMING (continued)
Typical Operating Characteristics
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
TA = -40°C
120
110
TA = +25°C
TA = -40°C
100
30
20
LNA = MAX - 16dB
10
LNA = MAX - 8dB
90
65
LNA = MAX GAIN
0
80
60
2.7
3.6
90
LNA = MAX - 8dB
80
LNA = MAX - 32dB
TA = -40°C
102
RX MAX GAIN (dB)
MAX2839ASWO+T toc04
LNA = MAX GAIN
100
0
3.6
100
98
TA = +25°C
LNA = MAX - 16dB
LNA = MAX - 8dB
80
40
LNA = MAX - 16dB
LNA = MAX - 32dB
0
94
2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70
FREQUENCY (GHz)
2.3
2.4
2.5
2.6
FREQUENCY (GHz)
0
2.7
18
27
36
45
BASEBAND VGA CODE
0.8
0.4
46
LNA = MAX - 32dB
RECEIVER ISOLATION (dB)
MAX2839ASWO+T toc07
OUTPUT V1dB (VRMS)
1.2
9
RX_B TO RX_A ISOLATION
vs. LNA GAIN SETTING
Rx OUTPUT V1dB vs. GAIN SETTING
1.6
44
LNA = MAX - 8dB
42
LNA = MAX - 16dB
40
LNA = MAX GAIN
0
38
0
10
9
18
27
36
45
BASEBAND VGA CODE
54
63
LNA = MAX
TA = +85°C
60
18
27
36
45
54
BASEBAND VGA GAIN CODE
120
96
70
9
Rx VOLTAGE GAIN
vs. BASEBAND GAIN SETTING
Rx MAX GAIN
vs. TEMPERATURE AND FREQUENCY
Rx GAIN vs. FREQUENCY
110
3.0
3.3
SUPPLY VOLTAGE (V)
VOLTAGE GAIN (dB)
3.0
3.3
SUPPLY VOLTAGE (V)
MAX2939ASWO+T toc05
2.7
MAX2839ASWO+T toc03
LNA = MAX - 32dB
MAX2839ASWO+T toc06
TA = +25°C
70
130
40
MAX2839ASWO+T toc08
75
TA = +85°C
NOISE FIGURE (dB)
80
MAX2839ASWO+T toc02
TA = +85°C
140
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
85
MAX2839ASWO+T toc01
90
Rx NOISE FIGURE
vs. BASEBAND GAIN SETTING
DUAL Rx SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SINGLE Rx SUPPLY CURRENT
vs. SUPPLY VOLTAGE
GAIN (dB)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
63
-35
-30
-25 -20 -15 -10 -5
LNA GAIN SETTING (dB)
______________________________________________________________________________________
0
5
54
63
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Rx EVM vs. VOUT
(CHANNEL BANDWIDTH = 10MHz,
64 QAM FUSC)
Rx EVM vs. PIN
(CHANNEL BANDWIDTH = 10MHz,
64 QAM FUSC)
16
LNA = MAX
- 32dB
EVM (%)
14
MAX2839ASWO+T toc10
18
12
LNA = MAX
PIN = -50dBm
8
EVM (%)
LNA = MAX
LNA = MAX
- 8dB
- 16dB
20
MAX2839ASWO+T toc09
22
12
10
8
4
6
4
0
LNA = MAX
0
-30
-100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10
PIN (dBm)
WiMAX EVM vs. OFDM JAMMER
(10MHz CHANNEL BANDWIDTH, 64 QAM FUSC)
PWANTED = PSENSITIVITY + 3dB = -70.3dBm AT ANTENNA
(INCLUDING 4dB FRONT-END LOSS),
EVM AT PSENSITIVITY = 6.37%, WITHOUT JAMMER
12
fOFFSET =10MHz
-40
-45
-50
-55
6
-10
-6
4 x LO
-60
8
(dBm)
EVM (%)
10
-22
-18
-14
VOUT (dBVRMS)
Rx EMISSION SPECTRUM AT LNA INPUT
(LNA = MAX GAIN)
MAX2839ASWO+T toc11
14
-26
MAX2839ASWO+T toc12
2
4/3 x LO
-65
-70
-75
4
-80
fOFFSET = 20MHz
2
-85
-90
0
-70
-60
-50
-40
-30
PJAMMER AT ANTENNA (dBm)
-20
0
26.5
FREQUENCY (GHz)
______________________________________________________________________________________
11
MAX2839AS
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
RXINA± DIFFERENTIAL IMPEDANCE
vs. FREQUENCY
RXINB± DIFFERENTIAL IMPEDANCE
vs. FREQUENCY
-100
IMAGINARY
-110
55.2
-115
55.0
-120
54.8
-110
53.0
52.8
52.6
-120
-125
52.2
-130
2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70
52.0
-130
2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70
FREQUENCY (GHz)
FREQUENCY (GHz)
Rx INPUT RETURN LOSS vs. FREQUENCY
LNA = MAX - 32dB
LNA = MAX
2.0
LNA = MAX - 8dB
RSSI VOLTAGE (V)
-10
LNA = MAX GAIN
RSSI VOLTAGE vs. INPUT POWER
2.5
MAX2839ASWO+T toc15
0
-5
-15
-20
-25
1.5
1.0
LNA = MAX - 16dB
-30
LNA = MAX - 16dB
LNA = MAX - 8dB
0.5
LNA = MAX - 32dB
-35
2300 2350 2400 2450 2500 2550 2600 2650 2700
FREQUENCY (MHz)
0
-110
-80
-50
PIN (dBm)
-20
Rx RSSI STEP RESPONSE
(-32dB SIGNAL STEP)
Rx RSSI STEP RESPONSE
(+32dB SIGNAL STEP)
MAX2839ASWO+T toc18
MAX2839ASWO+T toc17
3V
3V
LNA GAIN
CONTROL
LNA GAIN CONTROL
0V
0V
1.45V
1.45V
RSSI OUTPUT
RSSI
0.45V
0.45V
200ns/div
12
-115
REAL
MAX2839ASWO+T toc16
54.4
-105
IMAGINARY
53.2
52.4
-125
REAL
54.6
-100
53.4
REAL COMPONENT (Ω)
55.4
-105
IMAGINARY COMPONENT (Ω)
REAL COMPONENT (Ω)
55.6
MAX2839ASWO+T toc14
53.6
200ns/div
______________________________________________________________________________________
10
IMAGIANRY COMPONENT (Ω)
MAX2839ASWO+T toc13
55.8
Rx INPUT RETURN LOSS (dB)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Rx LPF GROUP DELAY
vs. FREQUENCY
MAX2839ASWO+T toc21
MAX2839ASWO+T toc20
MAX2839ASWO+T toc19
350
CHANNEL BW = 5MHz
300
LPF GROUP DELAY (ns)
Rx DC OFFSET SETTLING RESPONSE
(-8dB BB VGA GAIN STEP)
Rx DC OFFSET SETTLING RESPONSE
(+8dB BB VGA GAIN STEP)
CHANNEL BW = 8MHz
CHANNEL BW = 9MHz
250
200
CHANNEL BW = 10MHz
2V/div
2V/div
0V
VGA GAIN
CONTROL
0V
0V
0V
5mV/div
5mV/div
VGA GAIN
CONTROL
150
100
50
0
0
2
4
6
8
10 12
FREQUENCY (MHz)
14
16
Rx DC OFFSET SETTLING RESPONSE
(-16dB BB VGA GAIN STEP)
10µs/div
10µs/div
Rx DC OFFSET SETTLING RESPONSE
(-32dB BB VGA GAIN STEP)
Rx BB VGA SETTLING RESPONSE
(+8dB BB VGA GAIN STEP)
2V/div
0V
2V/div
2V/div
VGA GAIN
CONTROL
MAX2839ASWO+T toc24
MAX2839ASWO+T toc23
MAX2839ASWO+T toc22
0V
VGA GAIN CONTROL
VGA GAIN
CONTROL
0V
0V
5mV/div
0V
1V/div
5mV/div
10µs/div
10µs/div
200ns/div
Rx BB VGA SETTLING RESPONSE
(-8dB BB VGA GAIN STEP)
Rx BB VGA SETTLING RESPONSE
(-16dB BB VGA GAIN STEP)
Rx BB VGA SETTLING RESPONSE
(-32dB BB VGA GAIN STEP)
MAX2839ASWO+T toc25
2V/div
MAX2839ASWO+T toc27
MAX2839ASWO+T toc26
2V/div
2V/div
VGA GAIN CONTROL
VGA GAIN CONTROL
VGA GAIN CONTROL
0V
0V
1V/div
1V/div
0V
1V/div
200ns/div
200ns/div
200ns/div
______________________________________________________________________________________
13
MAX2839AS
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
Rx LNA SETTLING RESPONSE
(MAX TO MAX - 32dB)
Rx LNA SETTLING RESPONSE
(MAX TO MAX - 8dB)
MAX2839ASWO+T toc29
MAX2839ASWO+T toc28
2V/div
2V/div
LNA GAIN CONTROL
LNA GAIN CONTROL
0V
0V
1V/div
1V/div
200ns/div
200ns/div
10
CHANNEL BW = 28MHz
0
-10
-20
MAX2839ASWO+T toc30
Rx BB FREQUENCY RESPONSE
RESPONSE (dB)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
CHANNEL BW
= 1.5MHz
-30
-40
CHANNEL BW
= 5MHz
-50
CHANNEL BW
= 10MHz
-60
-70
0.1
14
1
10
FREQUENCY (MHz)
100
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
RESPONSE (dB)
-2
-3
-4
-5
395
316
CHANNEL BW
= 1.5MHz
CHANNEL BW
= 5MHz
CHANNEL BW
= 10MHz
645
MAX2839ASWO+T toc33
MEAN = 0
DEV = 51.8mV
SAMPLE SIZE = 7839
774
MAX2839ASWO+T toc32
CHANNEL BW
= 28MHz
-1
474
MAX2839ASWO+T toc31
1
0
HISTOGRAM: Rx PHASE IMBALANCE
HISTOGRAM: IQ GAIN IMBALANCE
Rx BB FREQUENCY RESPONSE
2
MEAN = 0
DEV = 0.11878°
SAMPLE SIZE = 7841
516
237
387
158
258
79
129
-6
0.1
1
10
FREQUENCY (MHz)
MAX2839ASWO+T toc36
MAX2839ASWO+T toc35
MEAN = 0
DEV = 0.23981mV
SAMPLE SIZE = 7841
664
MAX2839ASWO+T toc34
830
POWER-ON DC OFFSET CANCELLATION
WITHOUT INPUT SIGNAL
POWER-ON DC OFFSET CANCELLATION
WITH INPUT SIGNAL
HISTOGRAM: Rx STATIC DC OFFSET
996
1σ/div
1σ/div
100
5V/div
5V/div
ENABLE
ENABLE
0V
0V
498
200mV/div
332
I/Q OUTPUT
10mV/div
166
VGA CODE = -36
LNA GAIN = MAX
1σ/div
I/Q OUTPUT
1µs/div
VGA CODE = -36
LNA GAIN = MAX
1µs/div
______________________________________________________________________________________
15
MAX2839AS
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
Tx BASEBAND FREQUENCY RESPONSE
TA = -40°C
CHANNEL BW
= 1.5MHz
-20
-30
CHANNEL BW
= 5MHz
-40
0
CHANNEL BW
= 10MHz
-50
134
Tx OUTPUT POWER vs. FREQUENCY
(Tx GAIN = MAX - 3dB)
TA = -40°C
3
2
1
-1
0
TA = -40°C
-10
-2
CHANNEL BW
= 10MHz
1
10
FREQUENCY (MHz)
100
Tx OUTPUT SPECTRUM
(10MHz CHANNEL BANDWIDTH, 16 QAM FUSC)
-70dBr
POUT = 0dBm
-20
10dB/div
TA = +25°C
-30
MASK
TA = +85°C
-40
0dBr
-60
TA = +85°C
-4
-70
0
10dB/div
0dBr
50
2.495GHz
60
TX GAIN SET TO MAX - 3dB
-35
TA = -40°C
-40
-45
-50
TA = +85°C
TA = +25°C
2.555GHz
-20
-25
-30
TA = -40°C
TA = +85°C
-35
-40
-45
-50
-55
TA = +25°C
-65
-70
-60
2.5GHz
2.555GHz
-60
-55
2.495GHz
2.5GHz
Tx CARRIER LEAKAGE vs. GAIN SETTING
Tx CARRIER LEAKAGE vs. FREQUENCY
CARRIER LEAKAGE (dBc)
MASK
30
40
Tx GAIN CODE
MAX2839ASWO+T toc44
POUT = 0dBm
20
-30
CARRIER LEAKAGE (dBc)
MAX2839ASWO+T toc43
Tx OUTPUT SPECTRUM
(10MHz CHANNEL BANDWIDTH, 64 QAM FUSC)
10
MAX2839ASWO+T toc45
2300 2350 2400 2450 2500 2550 2600 2650 2700
FREQUENCY (MHz)
16
CHANNEL BW
= 5MHz
0.1
-50
-3
-3
100
10
POUT (dBm)
TA = +25°C
0
-70dBr
1
10
FREQUENCY (MHz)
Tx OUTPUT POWER vs. GAIN SETTING
MAX2839ASWO+T toc40
4
CHANNEL BW
= 1.5MHz
-6
0.1
3.6
MAX2839ASWO+T toc41
3.0
3.3
SUPPLY VOLTAGE (V)
-2
-5
-70
2.7
-1
-4
-60
130
CHANNEL BW = 28MHz
MAX2839ASWO+T toc39
1
RESPONSE (dB)
142
TA = +25°C
-10
RESPONSE (dB)
TA = +85°C
CHANNEL BW
= 28MHz
0
Tx BASEBAND FREQUENCY RESPONSE
2
MAX2839ASWO+T toc42
MAX2839ASWO+T toc37
SUPPLY CURRENT (mA)
146
138
10
MAX2839ASWO+T toc38
Tx SUPPLY CURRENT vs. SUPPLY VOLTAGE
150
POUT (dBm)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
2300 2350 2400 2450 2500 2550 2600 2650 2700
FREQUENCY (MHz)
0
9
18
27
36
45
Tx GAIN CODE
______________________________________________________________________________________
54
63
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
TA = +85°C
-45
-50
-55
-60
TA = -40°C
-65
-70
-40
TA = +25°C
TA = +85°C
-50
2.5
2.0
EVM (%)
SIDEBAND LEVEL (dBc)
-40
3.0
MAX2839ASWO+T toc47
-35
-30
SIDEBAND LEVEL (dBc)
TX GAIN SET TO MAX - 3dB
MAX2839ASWO+T toc46
-30
EVM vs. Tx OUTPUT POWER
(64 QAM FUSC, 10MHz CHANNEL BANDWIDTH)
Tx SIDEBAND LEVEL vs. GAIN SETTING
-60
MAX2839ASWO+T toc48
Tx SIDEBAND LEVEL vs. FREQUENCY
1.5
1.0
-70
TA = -40°C
TA = +25°C
0.5
-75
0
-20
310
-40
4 x LO
2 x LO
54
-50
63
MEAN = -46.235dBc
DEV = 5.1577dB
SAMPLE SIZE = 7841
248
3 x LO
-30
27
36
45
Tx GAIN CODE
-40
-30
-20
POUT (dBm)
-10
0
HISTOGRAM: Tx SIDEBAND SUPPRESSION
504
MAX2839ASWO+T toc50
-10
18
372
MAX2839ASWO+T toc49
0
9
HISTOGRAM: Tx LO LEAKAGE
Tx OUTPUT EMISSION SPECTRUM
10
(dBm)
0
-80
2300 2350 2400 2450 2500 2550 2600 2650 2700
FREQUENCY (MHz)
420
MEAN = -47.856dBc
DEV = 2.8827dB
SAMPLE SIZE = 7841
336
186
252
124
168
62
84
MAX2839ASWO+T toc51
-80
-50
-60
-70
-80
4/3 x LO
5/3 x LO
-90
0
1σ/div
1σ/div
Tx MAX OUTPUT POWER OVER FREQUENCY
LO FREQUENCY vs.
DIFFERENTIAL TUNE VOLTAGE
26.5
0
5.00
4.00
POUT (dBm)
-2
TA = -40°C
-4
-6
-8
3.00
2.00
-10
-12
64QAM OFDM SIGNAL CONFORMING
TO SPECTRAL EMISSION MASK AND
-35dB EVM AFTER I/Q IMBALANCE
CALIBRATION BY MODEM
TA = +25°C
1.00
-14
2.8
MAX2839ASWO+T toc54
2
OUTPUT RETURN LOSS (dB)
6.00
MAX2839ASWO+T toc52
4
2.7
LO FREQUENCY (GHz)
Tx OUTPUT RETURN LOSS
vs. FREQUENCY
MAX2839ASWO+T toc53
FREQUENCY (GHz)
2.6
2.5
2.4
2.3
2.2
TA = +85°C
0
-16
2300
2400
2500
2600
FREQUENCY (MHz)
2700
2.1
2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70
FREQUENCY (GHz)
-1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0
DIFFERENTIAL TUNE VOLTAGE (V)
______________________________________________________________________________________
2.5
17
MAX2839AS
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
Typical Operating Characteristics (continued)
(VCC_ = 2.8V, TA = +25°C, fLO = 2.5GHz, fREF = 40MHz, CS = high, RXHP = SCLK = DIN = low, RF BW = 10MHz, Tx output at 50Ω
unbalanced output of balun, using the MAX2839AS Evaluation Kit.)
MAX2839ASWO+T toc56
60
VCO GAIN (MHz/V)
-80
-90
-100
-110
-120
-130
100kHz
20kHz/div
-70
PHASE NOISE (dBc/Hz)
VCO GAIN vs. DIFFERENTIAL TUNE VOLTAGE
80
MAX2839ASWO+T toc55
-60
CHANNEL-SWITCHING FREQUENCY SETTLING
(2.3GHz TO 2.7GHz,
AUTOMATIC VCO SUB-BAND SELECTION)
MAX2839ASWO+T toc57
PHASE NOISE vs. OFFSET FREQUENCY
-50
40
20
-140
-100kHz
0.1
1
10
0
20kHz/div
MAX2839ASWO+T toc58
100kHz
-100kHz
CHANNEL-SWITCHING FREQUENCY SETTLING
(2.7GHz TO 2.3GHz,
MANUAL VCO SUB-BAND SELECTION)
0
1.498
100kHz
-100kHz
-100kHz
0
1.498
TIME (ms)
2.5
CHANNEL-SWITCHING FREQUENCY SETTLING
(2.3GHz TO 2.7GHz,
MANUAL VCO SUB-BAND SELECTION)
CHANNEL-SWITCHING FREQUENCY SETTLING
(2.7GHz TO 2.3GHz,
AUTOMATIC VCO SUB-BAND SELECTION)
100kHz
0
-1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0
DIFFERENTIAL TUNE VOLTAGE (V)
OFFSET FREQUENCY (MHz)
MAX2839ASWO+T toc60
0.01
20kHz/div
0.001
MAX2839ASWO+T toc59
-150
0.0001
20kHz/div
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
199.89
199.89
0
TIME (µs)
TIME (µs)
TIME (ms)
Rx-TO-Tx TURNAROUND FREQUENCY
GLITCHING SETTLING
Tx-TO-Rx TURNAROUND FREQUENCY
GLITCH SETTLING
MAX2839ASWO+T toc62
MAX2839ASWO+T toc61
2V/div
Tx TO Rx SWITCHING
2V/div
Rx TO Tx SWITCHING
10kHz/div
10kHz/div
18
FREQUENCY ERROR
FREQUENCY ERROR
1µs/div
1µs/div
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
BUMP
NAME
1
GNDRXLNA_A
FUNCTION
2
VCCRXLNA_A
Receiver A LNA Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
3
VCCRXLNA_B
Receiver B LNA Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
4
GND_LNA_B
Receiver B LNA Ground
5
RXINB+
6
GND_MXR_B
7
B2
Receiver and Transmitter Gain-Control Logic Input Bit 2
8
B3
Receiver and Transmitter Gain-Control Logic Input Bit 3
9
B4
Receiver A LNA Ground
Receiver B LNA Differential Input Plus. Input is internally DC-coupled.
Receiver B Mixer Ground
Receiver and Transmitter Gain-Control Logic Input Bit 4
Supply Voltage for Transmitter Power Amplifier Driver. Bypass with a 22pF capacitor as close as
possible to the pin.
10
VCCTXPAD
11
GND1_PAD_RF
12
GND2_PAD_RF
13
PABIAS
14
GND_TXMX
15
SCLK
16
REFCLK
Reference Clock Input. AC-couple a reference clock to this analog input.
17
VCCXTAL
Crystal Oscillator Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
18
VCCCP
PLL Charge-Pump Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
19
GNDCP
Charge-Pump Ground
20
CPOUT+
Differential Charge-Pump Output Plus. Connect the frequency synthesizer’s loop filter between
CPOUT+ and CPOUT- (see the Typical Operating Circuit).
21
GNDVCO
VCO Ground
22
VCOBYP
On-Chip VCO Regulator Output Bypass. Bypass with a 1µF capacitor to GND. Do not connect other
circuitry to this point.
23
VCCVCO
VCO Supply Voltage. Bypass with a 22nF capacitor as close as possible to the pin.
24
GND_LO
Local Oscillator Generation Ground
Transmit Power Amplifier Driver Ground
Transmit Power Amplifier Driver Ground
Transmit External Power Amplifier Bias DAC Output
Transmit Upconverter Ground
Serial-Clock Logic Input of 4-Wire Serial Interface
25
CS
26
GND_RXBB_B
27
RXBBIB+
28
RXBBQB+
29
B6
30
RXBBQA-
31
RXBBQA+
Receiver A Baseband Q-Channel Differential Output Plus
32
VCCRXVGA
Receiver VGA Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
33
GND_RXBB_A
34
Active-Low Chip-Select Logic Input of 4-Wire Serial Interface
Receiver B Baseband Ground
Receiver B Baseband I-Channel Differential Output Plus
Receiver B Baseband Q-Channel Differential Output Plus
Receiver and Transmitter Gain-Control Logic Input Bit 6
Receiver A Baseband Q-Channel Differential Output Minus
Receiver A Baseband Ground
GND_RXLOGEN Receiver Divide-by-2 Ground
35
GND_MXR_A
Receiver A Mixer Ground
36
GND_LNA_A
Receiver A LNA Ground
37
TXBBQ-
38
CLKOUT_DIV
Transmitter Baseband Q-Channel Differential Input Minus
Clockout Divide Ratio Select Logic Input
______________________________________________________________________________________
19
MAX2839AS
Bump Description
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
MAX2839AS
Bump Description (continued)
BUMP
NAME
39
GNDRXLNA_B
40
RXINB-
41
TXRX
42
B5
43
TXOUT+
Receiver B LNA Differential Input Minus. Input is internally DC-coupled.
Transmit/Receive Mode Enable Logic Input
Receiver and Transmitter Gain-Control Logic Input Bit 5
Power Amplifier Driver Differential Output Plus. The pin is biased at VCC/2 internally.
44
B1
45
TXOUT-
Power Amplifier Driver Differential Output Minus. The pin is biased at VCC/2 internally.
46
VCCTXMX
Transmitter Upconverter Supply Voltage. Bypass with a 22pF capacitor as close as possible to the
pin.
47
CLKOUT
Reference Clock Buffer Output
48
GND_XTAL
49
GND_DIG
50
VCC_DIG
PLL Digital Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
51
CPOUT-
Differential Charge-Pump Output Minus. Connect the frequency synthesizer’s loop filter between
CPOUT+ and CPOUT- (see the Typical Operating Circuit).
52, 67
GND
Ground. Connect to the PCB ground plane.
53
DIN
Data Logic Input of 4-Wire Serial Interface
54
20
FUNCTION
Receiver B LNA Ground
Receiver and Transmitter Gain-Control Logic Input Bit 1
Crystal Oscillator Ground
PLL Digital Ground
GND_PAD_BIAS Transmit Bias Ground
55
XTAL1
XTAL Input. AC-couple crystal to this analog pin.
56
RXHP
Receiver I- and Q-Channel AC-Coupling Highpass Corner Frequency Selection Logic Input
57
RXBBIA-
58
RXBBIA+
59
TXBBI+
Transmitter Baseband I-Channel Differential Input Plus
60
TXBBQ+
Transmitter Baseband Q-Channel Differential Input Plus
61
VCCRXMX
Receiver Downconverters Supply Voltage. Bypass with a 22pF capacitor as close as possible to the
pin.
62
RXINA-
63
RXINA+
64
B0
65
ENABLE
Receiver A Baseband I-Channel Differential Output Minus
Receiver A Baseband I-Channel Differential Output Plus
Receiver A LNA Differential Input Minus. Input is internally DC-coupled.
Receiver A LNA Differential Input Plus. Input is internally DC-coupled.
Receiver and Transmitter Gain-Control Logic Input Bit 0
Transceiver Enable Logic Input
66
DOUT
68
RXBBIB-
Receiver B Baseband I-Channel Differential Output Minus
Data Logic Output of 4-Wire Serial Interface
69
RXBBQB-
Receiver B Baseband Q-Channel Differential Output Minus
70
RSSI
71
B7
72
VCCRXFL
73
TXBBI-
Receiver Signal Strength Output
Receiver Gain-Control Logic Input Bit 7
Receiver Baseband Filter Supply Voltage. Bypass with a 100nF capacitor as close as possible to
the pin.
Transmitter Baseband I-Channel Differential Input Minus
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
MODE CONTROL LOGIC INPUTS
MODE
SPI
ENABLE TXRX
REG1
PIN
PIN
D
CIRCUIT BLOCK STATES
SPI
REG16
D
Rx PATH
Tx PATH
PLL, VCO, LO
GEN
CALIBRATION
SECTIONS ON
CLOCK
OUTPUT
Shutdown
0
0
X
XX
Off
Off
Off
None
Off
Clock-Out Only
1
X
X
X0
Off
Off
Off
None
On
Clock-Out Only
X
1
X
X0
Off
Off
Off
None
On
Standby
0
1
X
01
Off
Off
On or Off
None
On
Rx (1x2 MIMO)
1
1
1
01
On
Off
On
None
On
Rx (1x1 SISO)
1
1
0
01
On (RX_A)
Off
On
None
On
Tx
1
0
X
01
Off
On
On
None
On
Tx Calibration
1
0
X
11
Off
RX_A
Calibration
(Loopback)
1
1
0
11
RX_B
Calibration
(Loopback)
1
1
1
11
On (except
On
AM detector + Rx
PA driver) SPI REG7D = 1
I, Q buffers
On
On
(except
LNA)
On (except
On
PA driver) SPI REG26D = 1
Loopback
On
On
(except
LNA)
On (except
On
PA driver) SPI REG26D = 1
Loopback
On
Detailed Description
Modes of Operation
The modes of operation for the MAX2839AS are shutdown, clock-out only, standby, receive, transmit, transmitter calibration, and receiver calibration. See Table 1
for a summary of the modes of operation. When the
parts are active, various blocks can be shutdown individually by programming different SPI registers.
Shutdown Mode
The MAX2839AS features a low-power shutdown mode.
In shutdown mode, all circuit blocks are powered down,
except the 4-wire serial bus and its internal programmable registers.
Clock-Out Only
In clock-out mode, the entire transceiver is off except
the divided reference clock output on the CLKOUT pin
and the clock divider, which remain on.
Standby Mode
The standby mode is used to enable the frequency
synthesizer block while the rest of the device is powered down. In this mode, the PLL, VCO, and LO gener-
ator are on so that Tx or Rx modes can be quickly
enabled from this mode. These and other blocks can
be selectively enabled in this mode by programming
different SPI registers.
Receive (Rx) Mode
In receive mode, all Rx circuit blocks are powered on
and active. Antenna signal is applied; RF is downconverted, filtered, and buffered at Rx BB I and Q outputs.
Either receiver A or both receivers can be enabled.
Receiver B cannot be enabled by itself.
Transmit (Tx) Mode
In transmit mode, all Tx circuit blocks are powered on.
The external PA is powered on after a programmable
delay using the on-chip PA bias DAC.
Transmitter (Tx) Calibration Mode
All Tx circuit blocks except PA driver and external PA
are powered on and active. The AM detector and
receiver I/Q channel buffers are also on, along with
multiplexers in the receiver side to route this AM detector’s signal to each I and Q differential outputs. When
required, the I/Q lowpass filter can be bypassed.
______________________________________________________________________________________
21
MAX2839AS
Table 1. Operating Mode
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Receiver (Rx) Calibration or Loopback
Part of the Rx and Tx circuit blocks except LNA and PA
driver are powered on and active. The transmitter I/Q
input signals are upconverted to RF, and the output of
the Tx gain control block (VGA) is fed to the receiver at
the input of the downconverter. Either receiver A or
both receivers can be connected to the transmitter and
powered on. The I/Q lowpass filters are not present in
the transmitter signal path (they are bypassed).
10 least significant bits (LSBs) are register data.
Register data is loaded through the 4-wire
SPI/MICROWIRE™-compatible serial interface. Data at
DIN is shifted in MSB first and is framed by CS. When
CS is low, the clock is active, and input data is shifted
at the rising edge of the clock. During the read mode,
register data selected by address bits is shifted out to
DOUT at the falling edges of the clock. At the CS rising
edge, the 10-bit data bits are latched into the register
selected by address bits. See Figure 1. The register
values are preserved in shutdown mode as long as the
power-supply voltage is maintained. After power-up,
the user must program all register values.
Programmable Registers
and 4-Wire SPI Interface
The MAX2839AS includes 32 programmable 16-bit registers. The most significant bit (MSB) is the read/write
selection bit. The next 5 bits are register address. The
DON'T CARE
DOUT
BIT 1
DIN
BIT 2
BIT 5
BIT 13
BIT 6
BIT 14
SCLK
tCS1
tCH
tDS
CS
tCL
tCSO
tDH
tCSS
tCSH
tCSW
SPI REGISTER WRITE
DON'T CARE
DOUT
BIT 6
BIT 13
tD
DIN
BIT 1
BIT 5
BIT 2
DON'T CARE
SCLK
CS
SPI REGISTER READ
Figure 1. 4-Wire SPI Serial-Interface Timing Diagram
MICROWIRE is a trademark of National Semiconductor Corp.
22
______________________________________________________________________________________
BIT 14
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
(All values in the register definition table are typical numbers. The MAX2839AS SPI does not have a power-on-default feature; the
user must program all SPI addresses for normal operation. Prior to use of any untested settings, contact the factory.)
Table 2. MAX2839AS Register Summary
REGISTER NO.
REGISTER NAME
DEFAULT
FUNCTIONS
0
RX_ENABLE
000
Reserved for internal use
1
RX_RF_1
00C
• LNA band select, MIMO mode select
• Rx I/Q phase error correction
2
RX_RF_2
081
• LNA gain SPI control enable
• Rx I/Q phase error SPI control enable
3
RX_RF/LPF
1B9
Reserved for internal use
4
LPF
3E6
• RF channel bandwidth select
5
LPF/VGA_1
100
• RX_A LNA and VGA gain controls
• LPF operating mode select
6
LPF/VGA_2
000
• RX_B LNA and VGA gain controls
• Rx VGA common-mode select
7
RSSI/VGA
208
• RSSI pin output select, operating mode as a function of RXHP, and receiver
select
• Rx baseband outputs routing select
8
RX_TOP_SPI_1
222
• Rx VGA gain SPI control enable
• LPF operating mode select enable
9
RX_TOP_SPI_2
018
• Temperature sensor enable, and ADC readout trigger
• DOUT output selection, drive select, three-state output select
10
TX_TOP_ SPI
00C
• Tx AM detector gain and filter bandwidth controls
11
TEMP_SEN
004
• Temperature sensor ADC readout
12
HPFSM 1
24F
• 10MHz HPC duration select when triggered by RXEN or LNA gain
• 600kHz HPC duration select when triggered by RXEN or LNA gain
13
HPFSM 2
150
• 100kHz HPC duration select when triggered by RXEN or LNA gain
• 30kHz HPC duration select when triggered by RXEN or LNA gain
• 1kHz HPC duration select when triggered by RXEN
14
HPFSM 3
3C5
•
•
•
•
15
HPFSM 4
201
• HPC state machine clock divider, sequence bypass, and RXHP dependent
select
16
BLK_SPI_EN
01C
• Block enabled by SPI
17
FRAC_DIV_1
155
• Last 10 of 20 fractional divider bits
18
FRAC_DIV_2
155
• First 10 of 20 fractional divider bits
19
INT_DIV
153
• Integer divider bits
• LO generation band select
20
SYNTH_CONFIG_1
249
• Reference divider ratio
• CLKOUT buffer drive select
21
SYNTH_CONFIG_2
02D
Reserved for internal use
1kHz HPC duration select when triggered by LNA gain
HPC rising edge delay and final highpass corner select
HPC on-hold corner select as a function of RXHP
HPC state machine retriggered by LNA gain enable
______________________________________________________________________________________
23
MAX2839AS
SPI Register Definitions
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 2. MAX2839AS Register Summary (continued)
REGISTER NO.
REGISTER NAME
DEFAULT
FUNCTIONS
22
VAS_CONFIG
1A9
• VAS operating mode select, relock location, clock divide ratio, delay counter
ratio, and triggering
23
LO_MISC_CONFIG
24F
• VAS sub-band SPI overwrite
• Crystal oscillator bias select
24
XTAL_CONFIG
180
• Crystal oscillator core enable, and frequency tuning
25
VCO_CONFIG
000
Reserved for internal use
26
LOGEN_CONFIG
3C0
• VAS test signal select
• VTUNE test signal select
• LOGEN Gm enable
27
TXLO_I/Q_CONFIG
280
• Tx LO I/Q phase adjustment by SPI enable, and phase adjustment select
• Tx DC correction by SPI enable
• Tx VGA gain control by SPI enable
28
PA_BIAS_ DAC
0C0
• PA DAC output current select, and turn-on delay control
29
TX_GAIN_CONFIG
03F
• Tx VGA gain control
30
TX_DC CORR_1
380
• Tx DC offset correction for I-channel
• PA DAC output type select, and voltage mode output select
31
TX_DC_CORR_2
340
• Tx DC offset correction for Q-channel
• PA DAC clock-divide ratio
REGISTER NAME
24
ADDRESS BITS
A4
A3
DATA BITS
A2
A1
A0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
RX_ENABLE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX_RF_1
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
RX_RF_2
0
0
0
1
0
0
0
1
0
0
0
0
0
0
1
RX_RF/LPF
0
0
0
1
1
0
1
1
0
1
1
1
0
0
1
LPF
0
0
1
0
0
1
1
1
1
1
0
0
1
1
0
LPF/VGA_1
0
0
1
0
1
0
1
0
0
0
0
0
0
0
0
LPF/VGA_2
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
RSSI/VGA
0
0
1
1
1
1
0
0
0
0
0
1
0
0
0
RX_TOP_SPI_1
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
RX_TOP_SPI_2
0
1
0
0
1
0
0
0
0
0
1
1
0
0
0
TX_TOP_ SPI
0
1
0
1
0
0
0
0
0
0
0
1
1
0
0
TEMP_SEN
0
1
0
1
1
0
0
0
0
0
0
0
1
0
0
HPFSM 1
0
1
1
0
0
1
0
0
1
0
0
1
1
1
1
HPFSM 2
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
HPFSM 3
0
1
1
1
0
1
1
1
1
0
0
0
1
0
1
HPFSM 4
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
BLK_SPI_EN
1
0
0
0
0
0
0
0
0
0
1
1
1
0
0
FRAC_DIV_1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
FRAC_DIV_2
1
0
0
1
0
0
1
0
1
0
1
0
1
0
1
INT_DIV
1
0
0
1
1
0
1
0
1
0
1
0
0
1
1
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
REGISTER NAME
ADDRESS BITS
DATA BITS
A4
A3
A2
A1
A0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SYNTH_CONFIG_1
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
SYNTH_CONFIG_2
1
0
1
0
1
0
0
0
0
1
0
1
1
0
1
VAS_CONFIG
1
0
1
1
0
0
1
1
0
1
0
1
0
0
1
LO_MISC_CONFIG
1
0
1
1
1
1
0
0
1
0
0
1
1
1
1
XTAL_CONFIG
1
1
0
0
0
0
1
1
0
0
0
0
0
0
0
VCO_CONFIG
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
LOGEN_CONFIG
1
1
0
1
0
1
1
1
1
0
0
0
0
0
0
TXLO_I/Q_CONFIG
1
1
0
1
1
1
0
1
0
0
0
0
0
0
0
PA_BIAS_ DAC
1
1
1
0
0
0
0
1
1
0
0
0
0
0
0
TX_GAIN_CONFIG
1
1
1
0
1
0
0
0
0
1
1
1
1
1
1
TX_DC CORR_1
1
1
1
1
0
1
1
1
0
0
0
0
0
0
0
TX_DC_CORR_2
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
Table 3. Register 0: RX_ENABLE Register (Address = 00000, Default = 000HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:0
DESCRIPTION
Reserved bits—set to default
Table 4. Register 1: RX_RF_1 Register (Address = 00001, Default = 00CHEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:4
MIMO_MODE_SEL
3
RESERVED
2:1
LNA_BAND
0
DESCRIPTION
Reserved bits—set to default
MIMO mode selection.
0 = RX_A
1 = RX_A + RX_B (default)
Reserved bits—set to default
LNA output LC tank center frequency select.
0 = 2.3GHz to 2.5GHz (default)
1 = 2.5GHz to 2.7GHz
Table 5. Register 2: RX_RF_2 Register (Address = 00010, Default = 081HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:1
LNA_GAIN_SPI_EN
0
DESCRIPTION
Reserved bits—set to default
LNA gain control select.
0 = LNA gain controlled by external pins B7 and B6
1 = LNA gain controlled by SPI through register 6 bits 1:0 (default)
______________________________________________________________________________________
25
MAX2839AS
Table 2. MAX2839AS Register Summary (continued)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 6. Register 3: RX_RF/LPF Register (Address = 00011, Default = 1B9HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:0
DESCRIPTION
Reserved bits—set to default
Table 7. Register 4: LPF Register (Address = 00100, Default = 3E6HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
DESCRIPTION
FT
9:6
RF channel bandwidth select.
Test at RFBW 5MHz, 10MHz, and 28MHz.
0000 = 1.75MHz
0001 = 2.5MHz
0010 = 3.5MHz
0011 = 5.0MHz
0100 = 5.5MHz
0101 = 6.0MHz
0110 = 7.0MHz
0111 = 8.0MHz
1000 = 9.0MHz
1001 = 10.0MHz
1010 = 12.0MHz
1011 = 14.0MHz
1100 = 15.0MHz
1101 = 20.0MHz
1110 = 24.0MHz
1111 = 28.0MHz (default)
RESERVED
5:0
Reserved bits—set to default
Table 8. Register 5: LPF/VGA_1 Register (Address = 00101, Default = 100HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:8
Reserved bits—set to default
7:2
Receiver 1 VGA attenuation settings through SPI.
Active when register 8 D = 1.
000000 = Max gain (default)
000001 = Max - 1dB
……….
111110 = Max - 62dB
111111 = Max - 63dB (min gain)
Test at settings 000000, 000001, 001000, 010000, 100000, 110110, and
111111.
1:0
Receiver 1 LNA gain settings through SPI.
Active when register 2 D = 1.
00 = Max gain (default)
01 = Max - 8dB
10 = Max - 16dB
11 = Max - 32dB
VGA1
LNA1
26
DESCRIPTION
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
MAX2839AS
Table 9. Register 6: LPF/VGA_2 Register (Address = 00110, Default = 000HEX)
BIT NAME
BUFF_VCM
VGA2
LNA2
BIT LOCATION
(0 = LSB)
DESCRIPTION
9:8
Rx VGA output common-mode voltage select.
00 = 1.05V (default)
01 = 1.15V
10 = 1.25V
11 = 1.45V
7:2
Receiver 2 VGA attenuation settings through SPI.
Active when register 8 D = 1.
000000 = Max gain (default)
000001 = Max - 1dB
……….
111110 = Max - 62dB
111111 = Max - 63dB (min gain)
Test at settings 000000, 000001, 001000, 010000, 100000, 110110, and
111111.
1:0
Receiver 2 LNA gain settings through SPI.
Active when register 2 D = 1.
00 = Max gain (default)
01 = Max - 8dB
10 = Max - 16dB
11 = Max - 32dB
Table 10. Register 7: RSSI/VGA Register (Address = 00111, Default = 208HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RSSI_RXSEL
9
RSSI for receiver 1 or 2 select.
0 = RSSI for receiver 2
1 = RSSI for receiver 1 (default)
RESERVED
8
Reserved bits—set to default
SEL_IN1_IN2
7
RXBBI output select.
0 = Select Rx VGA output (default)
1 = Select Tx AM detector output
RESERVED
6:0
DESCRIPTION
Reserved bits—set to default
______________________________________________________________________________________
27
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 11. Register 8: RX_TOP_SPI_1 Register (Address = 01000, Default = 222HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:3
DESCRIPTION
Reserved bits—set to default
LPF_MODE_SEL
2
LPF operating mode select.
0 = LPF response changes automatically between Tx and Rx by TXRX pin
(default)
1 = LPF response fixed in Tx, Rx, calibration, or trim mode as defined in
register 5 D
VGA_GAIN _SPI_EN
1
Rx VGA gain control through SPI.
0 = Rx VGA gain controlled by external pins B5:B1
1 = Rx VGA gain controlled by SPI (default)
RESERVED
0
Reserved bits—set to default
Table 12. Register 9: RX_TOP_SPI_2 Register (Address = 01001, Default = 018HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:8
Reserved bits—set to default
DOUT_SEL
7:5
DOUT pin multiplexed output select.
000 = SPI register (default)
001 = PLL lock detect. Set register 21 D = 000 for lock-detect out.
010 = VAS and VTUNE outputs defined by register 26 D
DOUT_CSB_SEL
4
DOUT pin three-state control.
0 = DOUT pin is independent of CSB pin
1 = DOUT pin is in three-state mode when CSB is high (default)
DOUT_DRVH
3
DOUT pin output drive select.
0 = 1x drive. Delay < 4.4ns.
1 = 4x drive. Delay < 3.1ns (default).
RESERVED
2
Reserved bits—set to default
1
Temperature sensor comparator and clock enable.
0 = Disabled (default)
1 = Enabled
0
Temperature sensor ADC trigger.
0 = Not trigger ADC readout (default)
1 = Trigger ADC readout. ADC is disabled automatically after readout
finishes.
TS_EN
TS_ADC_TRIG
DESCRIPTION
Table 13. Register 10: TX_TOP_SPI Register (Address = 01010, Default = 00CHEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:2
Reserved bits—set to default
1:0
Transmit AM detector baseband gain control select.
00 = Minimum gain (default)
01 = +10dB
10 = +20dB
11 = +30dB
TXCAL_GAIN
28
DESCRIPTION
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
MAX2839AS
Table 14. Register 11: TEMP_SEN Register (Address = 01011, Default = 004HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:0
DESCRIPTION
Reserved bits—set to default.
Readout at DOUT pin through SPI A[4:0] = 01011, D[4:0]
Table 15. Register 12: HPFSM 1 Register (Address = 01100, Default = 24FHEX)
BIT NAME
HPC_600k_GAIN
HPC_600k
HPC_10M_GAIN
HPC_10M
BIT LOCATION
(0 = LSB)
DESCRIPTION
9:7
Rx VGA highpass corner duration at 600kHz. Triggered by LNA gain
change. Test at settings 000, 001, and 011.
000 = 0µs
001 = 0.8µs
010 = 1.6µs
011 = 2.4µs
100 = 3.2µs (default)
101 = 4.0µs
110 = 4.8µs
111 = stay “1”
6:4
Rx VGA highpass corner duration at 600kHz. Triggered by RXEN rising
edge. Test at settings 000, 100, and 110.
000 = 0µs
001 = 0.8µs
010 = 1.6µs
011 = 2.4µs
100 = 3.2µs (default)
101 = 4.0µs
110 = 4.8µs
111 = stay “1”
3:2
Rx VGA highpass corner duration at 10MHz. Triggered by LNA gain
change. Test at settings 00, 01, and 11.
00 = 0µs
01 = 0.4µs
10 = 0.8µs
11 = 1.2µs (default)
1:0
Rx VGA highpass corner duration 10MHz. Triggered by RXEN rising edge.
Test at settings 00 and 11.
00 = 0µs
01 = 0.4µs
10 = 0.8µs
11 = 1.2µs (default)
______________________________________________________________________________________
29
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 16. Register 13: HPFSM 2 Register (Address = 01101, Default = 150HEX)
BIT NAME
HPC_1k
HPC_30k_GAIN
HPC_30k
HPC_100k_GAIN
HPC_100k
30
BIT LOCATION
(0 = LSB)
DESCRIPTION
9:8
Rx VGA highpass corner duration at 1kHz. Triggered by RXEN rising edge.
Test at settings 00, 01, and 11.
00 = 0µs
01 = 3.2µs (default)
10 = 6.4µs
11 = 9.6µs
7:6
Rx VGA highpass corner duration at 30kHz. Triggered by LNA gain change.
Test at settings 00 and 01.
00 = 0µs
01 = 3.2µs (default)
10 = 6.4µs
11 = 9.6µs
5:4
Rx VGA highpass corner duration at 30kHz. Triggered by RXEN rising edge.
Test at settings 00, 01, and 10.
00 = 0µs
01 = 3.2µs (default)
10 = 6.4µs
11 = 9.6µs
3:2
Rx VGA highpass corner duration at 100kHz. Triggered by LNA gain
change. Test at settings 00 and 11.
00 = 0µs (default)
01 = 3.2µs
10 = 6.4µs
11 = 9.6µs
1:0
Rx VGA highpass corner duration at 100kHz. Triggered by RXEN rising
edge. Test at settings 00, 01, and 11.
00 = 0µs (default)
01 = 3.2µs
10 = 6.4µs
11 = 9.6µs
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
BIT NAME
BIT LOCATION
(0 = LSB)
TXGATE_EN
9
PA driver and DAC on/off state gated by PLL lock detect.
0 = Independent of PLL lock detect
1 = Disable PA driver when PLL lock detect = 0 (default)
RESERVED
8
Reserved bits—set to default
HPC_STOP_M2
HPC_STOP
HPC_DELAY
HPC_1k_GAIN
DESCRIPTION
7:6
Rx VGA on-hold highpass corner when RXHP = 1. Test at settings 00, 01, and
11. Only active when Reg15_D9 = 1.
00 = 1kHz
01 = 30kHz
10 = 100kHz
11 = 600kHz (default)
5:4
Rx VGA final highpass corner selection. Test at settings 00, 01, and 11.
00 = 100Hz (default)
01 = 1kHz
10 = 30kHz
11 = 100kHz
3:2
Rx VGA HPCA and HPCD rising edge delay for 100k, 30k, 1k, and 100Hz
highpass corner. Test at settings 00, 01, and 11.
00 = 0µs
01 = 0.2µs (default)
10 = 0.4µs
11 = 0.6µs
1:0
Rx VGA highpass corner duration at 1kHz. Triggered by LNA gain change.
Test at settings 00, 01, and 10.
00 = 0µs
01 = 3.2µs (default)
10 = 6.4µs
11 = 9.6µs
Table 18. Register 15: HPFSM 4 Register (Address = 01111, Default = 201HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
HP_MODE
9
RESERVED
8:7
HPC_SEQ_BYP
6
RESERVED
5:0
DESCRIPTION
Highpass corner control using RXHP.
0 = Highpass corner switches automatically without RXHP
1 = Highpass corner switches dependent on RXHP (default)
Reserved bits—set to default
Highpass corner switching sequence bypassed during RXHP transition from
1 to 0.
0 = Start switching from highpass corner set by HPC_STOP_M2 in
register 14 and continue with programmed sequence (default)
1 = Switch from highpass corner set by HPC_STOP_M2 directly to
final highpass corner set by HPC_STOP in register 14.
Reserved bits—set to default
______________________________________________________________________________________
31
MAX2839AS
Table 17. Register 14: HPFSM 3 Register (Address = 01110, Default = 3C5HEX)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 19. Register 16: BLK_SPI_EN Register (Address = 10000, Default = 01CHEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:8
DESCRIPTION
Reserved bits—set to default
7
PA bias DAC Tx mode enable bit. Enables PA bias DAC only in Tx mode.
Turn-on delay is controlled by bits 9:6 of register 28.
0 = Disabled (default)
1 = Enabled when TXRX = 0
PADAC_SPI_EN
6
PA bias DAC SPI enable bit. Turn-on delay is controlled by bits 9:6 of
register 28.
0 = Disabled (default)
1 = Enabled in all modes except for shutdown
RESERVED
5:2
PADAC_TX_EN
Reserved bits—set to default
CAL_SPI
1
Receive and transmit calibration mode enable bit. Rx or Tx calibration mode
is selected by TXRX pin.
0 = Normal receive or transmit mode (default)
1 = Calibration mode
EN_SPI
0
Transceiver enable bit.
0 = Disabled (default)
1 = Enabled. Enable pin must also be 1 to turn on transceiver.
Table 20. Register 17: FRAC_DIV_1 Register (Address = 10001, Default = 155HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
DESCRIPTION
SYN_CONFIG0
9:0
Bits 9:0 of the 20-bit fractional divide ratio. The remaining bits 19:10 reside
in register 18. Both registers are combined to form the 20-bit fractional word.
Program register 17 to engage the stored values of registers 18 and 19.
Table 21. Register 18: FRAC_DIV_2 Register (Address = 10010, Default = 155HEX)
32
BIT NAME
BIT LOCATION
(0 = LSB)
DESCRIPTION
SYN_CONFIG0
9:0
Bits 19:10 of the 20-bit fractional divide ratio. The remaining bits 9:0 reside
in register 17. Both registers are combined to form the 20-bit fractional word.
Program register 18 before register 17.
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
BIT NAME
BIT LOCATION
(0 = LSB)
DESCRIPTION
LOGEN_BSW
9:8
LO generation band switch control for optimal transmit spur.
00 = 2300MHz to 2399.99MHz
01 = 2400MHz to 2499.99MHz (default)
10 = 2500MHz to 2599.99MHz
11 = 2600MHz to 2700MHz
SYN_CONFIG1
7:0
Synthesizer 8-bit integer divide ratio.
Program register 19 before register 17. Test at settings between 76 and 90
to support LO frequency between 2300MHz and 2700MHz.
Table 23. Register 20: SYNTH_CONFIG_1 Register (Address = 10100, Default = 249HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:6
DESCRIPTION
Reserved bits—set to default
Reference clock output buffer drive selection.
0 = 1x drive (default)
1 = 4x drive
CLKOUT_DRV
5
RESERVED
4:3
Reserved bits—set to default
SYN_CONFIG1
2:1
Reference divide ratio selection.
00 = Divide by 1 (default)
01 = Divide by 2
10 = Divide by 4
RESERVED
0
Reserved bit—set to default
Table 24. Register 21: SYNTH_CONFIG_2 Register (Address = 10101, Default = 02DHEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:0
DESCRIPTION
Reserved bits—set to default
Table 25. Register 22: VAS_CONFIG Register (Address = 10110, Default = 1A9HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:1
VAS_MODE
0
DESCRIPTION
Reserved bits—set to default
VCO autoselect (VAS) operating mode selection.
0 = Manually select VCO sub-band by SPI register 23 D[4:0]
1 = Select VCO sub-band automatically by VAS (default)
______________________________________________________________________________________
33
MAX2839AS
Table 22. Register 19: INT_DIV Register (Address = 10011, Default = 153HEX)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 26. Register 23: LO_ MISC_CONFIG Register (Address = 10111, Default = 24FHEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:5
Reserved bits—set to default
4:0
VCO autoselect (VAS) sub-band SPI overwrite.
Active when register 22 D0 = 0.
00000 = Minimum frequency - sub-band 0
00001 = Sub-band 1
………
01111 = Sub-band 15 (default)
………
11110 = Sub band 30
11111 = Maximum frequency - sub-band 31
VAS_SPI
DESCRIPTION
Table 27. Register 24: XTAL_CONFIG Register (Address = 11000, Default = 180HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:7
Reserved bits—set to default
6:0
Crystal oscillator frequency tuning.
0000000 = Minimum frequency tuning (default)
………….
1111111 = Maximum frequency tuning
XTAL
DESCRIPTION
Table 28. Register 25: VCO_CONFIG Register (Address = 11001, Default = 000HEX)
34
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:0
DESCRIPTION
Reserved bits—set to default
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
BIT LOCATION
(0 = LSB)
DESCRIPTION
VAS_TST
9:6
VCO autoselect (VAS) sub-band and VCO tune voltage test signal output
select. Results are delivered to DOUT pin by setting register 9 D = 010.
VCO_BSW = 5 VCO sub-band bits representing sub-band number 0 to 31.
0000 = VCO_BSW
0001 = VCO_BSW
0010 = VCO_BSW
0011 = VCO_BSW
0100 = VCO_BSW
VTUNE_ADC = 3-bit ADC output representing VCO tune voltage.
0101 = VTUNE_ADC
0110 = VTUNE_ADC
0111 = VTUNE_ADC
1111 = 0 (default)
RESERVED
5:4
Reserved bits—set to default
LOGEN_2GM
3
RESERVED
2:0
BIT NAME
LO generation Gm enable.
0 = Function of TXRX and ENABLE pins (default)
1 = Enable both Rx/Tx output (required for Rx loopback calibration)
Reserved bits—set to default
Table 30. Register 27: TXLO_I/Q_CONFIG Register (Address = 11011, Default = 280HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:8
TXVGA_GAIN_SPI_EN
7
RESERVED
6:0
DESCRIPTION
Reserved bits—set to default
Transmit VGA gain control through SPI enable bit.
0 = Tx VGA gain control by pins B6:B1.
1 = Tx VGA gain control by register 29 D[5:0] (default)
Reserved bits—set to default
Table 31. Register 28: PA_BIAS_DAC Register (Address = 11100, Default = 0C0HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
DESCRIPTION
PADAC_DLY
9:6
PA bias DAC turn-on delay control.
0000 = 0µs
0001 = 0µs
0010 = 0.5µs
0011 = 1.0µs (default)
1111 = 7.0µs
RESERVED
5:0
Reserved bits—set to default
______________________________________________________________________________________
35
MAX2839AS
Table 29. Register 26: LOGEN_CONFIG Register (Address = 11010, Default = 3C0HEX)
MAX2839AS
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 32. Register 29: TX_GAIN_CONFIG Register (Address = 11101, Default = 03FHEX)
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:6
Reserved bits—set to default
5:0
Tx VGA gain control through SPI.
Active when register 27 D7 = 1.
000000 = 0dB attenuation (max gain)
000001 = Max - 1dB
……….
011111 = Max - 31dB
……….
111111 = Max - 63dB (default)
Test at settings 000000, 000011, 001001, 001010, 011101, 011110, and
111111.
TXVGA_GAIN_SPI
DESCRIPTION
Table 33. Register 30: TX_DC_CORR_1 Register (Address = 11110, Default = 380HEX)
BIT NAME
BIT LOCATION
(0 = LSB)
PADAC_VMODE
9
RESERVED
8:0
DESCRIPTION
PA DAC voltage mode output select
Active when register 30 D8 = 0.
0 = Logic “0” output
1 = Logic “1” output (default)
Reserved bits—set to default
Table 34. Register 31: TX_DC_CORR_2 Configuration Register (Address = 11111,
Default = 340HEX)
36
BIT NAME
BIT LOCATION
(0 = LSB)
RESERVED
9:0
DESCRIPTION
Reserved bits—set to default
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
Rx A INPUT
63
62
41
61
37
60
59
73
72
32
58
57
RXBBQA-
RXBBQA+
RXBBIA-
RXBBIA+
VCCRXVGA
VCCRXFL
Rx A OUTPUTS
TXBBI-
TXBBI+
TXBBQ+
TXBBQ-
Tx INPUTS
VCCRXMX
TXRX
RXINA-
RXINA+
MODE
CONTROL
31
30
+
TXOUT+
TXOUT-
68
9
8
SERIAL
INTERFACE
TEMP
SENSOR
IMUX/QMUX
AM
DETECTOR
90°
53
66
SCLK
10
25
0°
7
23
43
SERIAL
INTERFACE
45
44
42
Rx/Tx GAIN
CONTROL
13
46
15
÷
65
47
CRYSTAL
OSCILLATOR/
BUFFER
16
MODE
CONTROL
SERIAL
INPUT
55
22
÷
PLL
21
17
18
19
20
RXHP
Rx BASBAND
HPF CONTROL
B6
Rx/Tx GAIN
CONTROL
Rx GAIN
CONTROL
B7
RSSI
RXBBQB+
RXBBQBRXBBIB+
Rx B
OUTPUTS
RXBBIBDIN
DOUT
CS
SERIAL
INPUT
SERIAL
OUTPUT
SERIAL
INPUT
VCCVCO
VCOBYP
GNDVCO
51
CPOUT-
B2
IMUX
40
GNDCP
Rx/Tx GAIN
CONTROL
69
27
B1
Tx OUTPUT
5
CPOUT+
VCCTXPAD
QMUX
VCCCP
B3
28
39
VCCXTAL
B4
RSSI
MAX2839AS
XTAL1
Rx/Tx GAIN
CONTROL
Rx/Tx GAIN
CONTROL
3
REFCLK
RXINB-
70
RSSI
MUX
CLKOUT
RXINB+
71
38
SCLK
GNDRXLNA_B
Rx B INPUT
QMUX
64
ENABLE
VCCRXLNA_B
29
VCCTXMX
B0
CLKOUT_DIV
56
2
B5
VCCRXLNA_A
Rx/Tx GAIN
CONTROL
CLKOUT
SELECT
IMUX
1
PABIAS
GNDRXLNA_A
PLL
FILTER
REFERENCE
CLOCK
OUTPUT
______________________________________________________________________________________
37
MAX2839AS
Typical Operating Circuit
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
MAX2839AS
Bump Configuration
36
1
35
34
62
63
33
61
2
60
59
37
73
31
32
58
72
57
30
56
29
64
3
38
4
71
39
5
70
68
69
40
27
67
41
6
28
66
53
26
7
8
25
MAX2839AS
42
9
24
10
43
11
44
52
65
45
22
54
12
46
13
14
23
55
15
49
48
47
16
17
50
51
18
19 20
21
Chip Information
PROCESS: BiCMOS
38
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
73 WLP
W733A5+1
21-0146
______________________________________________________________________________________
2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
REVISION
NUMBER
REVISION
DATE
0
4/09
Initial release
1
5/10
Added soldering temperature to Absolute Maximum Ratings; corrected name in
global references to MAX2839AS Evaluation Kit
DESCRIPTION
PAGES
CHANGED
—
2–18
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 39
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX2839AS
Revision History
工商网监
湘ICP备2023018690号
