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MAX40018
General Description
The MAX40018 is a dual operational amplifier that
consumes only 400nA supply current (per channel). At
such low power consumption, the device is ideal for
battery-powered applications such as portable medical
equipment, portable instruments and wireless handsets.
The MAX40018 operates from a single 1.7V to 5.5V
supply, allowing the device to be powered by the same
1.8V, 2.5V, or 3.3V nominal supply that powers the
microcontroller. The MAX40018 features rail-to-rail
outputs and is unity-gain stable with a 9kHz gain bandwidth
product (GBP).
The ultra-low supply current, ultra-low input bias current,
low operating voltage, and rail-to-rail output capabilities
make this dual operational amplifier ideal for use with single
lithium-ion (Li+), or two-cell NiCd or alkaline batteries.
The MAX40018 is available in a tiny, 8-bump, 1.63mm x
0.91mm wafer-level package (WLP), with a bump pitch
of 0.4mm, as well as in an 8-pin 3mm x 3mm TDFN
package. The device is specified over the -40°C to
+125°C, automotive temperature range.
Applications
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Benefits and Features
●● U
ltra-Low Power Preserves Battery Life
• 400nA Typical Supply Current (Per Channel)
●● Single 1.7V to 5.5V Supply Voltage Range
• The Device Can be Powered From the Same
1.8V/2.5V/3.3V/5V System Rails
●● Tiny Packages Save Board Space
• 1.63mm x 0.91mm x 0.5mm WLP-8 with 0.4mm
Bump Pitch
• 3mm x 3mm x 0.75mm TDFN-8 Package
●● Precision Specifications for Buffer/Filter/Gain Stages
• Low 350μV Input Offset Voltage
• Rail-to-Rail Output Voltage
• 9kHz GBP
• Low 0.1pA Input Bias Current
• Unity-Gain Stable
●● -40°C to +125°C Temperature Range
Ordering Information appears at end of data sheet.
Simplified Block Diagram
●● Wearable Devices
VDD
●● Handheld Devices
●● Notebook and Tablet Computers
●● Portable Medical Devices
●● Portable Instrumentation
IN1+
OUT1
IN1-
IN2+
OUT2
IN2-
MAX40018
VSS
19-100227; Rev 3; 11/19
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Absolute Maximum Ratings
VDD to VSS...............................................................-0.3V to +6V
OUT_ to VSS.......................................VSS - 0.3V to VDD + 0.3V
IN_+, IN_- to VSS................................VSS - 0.3V to VDD + 0.3V
IN_+ to IN_-............................................................................±2V
Continuous Current Into Any Input Pin..............................±10mA
Continuous Current Into Any Output Pin...........................±20mA
Output Short-Circuit Duration to VDD or VSS......................... 10s
Continuous Power Dissipation (TA = +70°C; 8-Bump WLP,
derate 11.4mW/°C above +70°C).................................912mW
Continuous Power Dissipation (TA = +70°C; TDFN-8,
derate 24.4mW/°C above +70°C)............................1951.2mW
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Reflow Soldering Peak Temperature (Pb-free)................ +260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
TDFN-8
PACKAGE CODE
T833+2
Outline Number
21-0137
Land Pattern Number
90-0059
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA)
41°C/W
Junction to Case (θJC)
8°C/W
WLP-8
PACKAGE CODE
N80B1+1
Outline Number
21-100228
Land Pattern Number
Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA)
87.71°C/W
Junction to Case (θJC)
N/A
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VDD = +3V, VSS = 0V, VCM = 0.5V, VOUT = VDD/2, RL = 1MΩ to VDD/2, TA = +25°C, unless otherwise noted (Note 1).)
PARAMETER
Supply Voltage Range
SYMBOL
VDD
CONDITIONS
Guaranteed by PSRR tests
TA = +25°C
Supply Current (Dual)
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IDD
MIN
TYP
1.7
0.8
MAX
UNITS
5.5
V
1.3
TA = -40°C to +85°C
1.4
TA = -40°C to +125°C
1.6
μA
Maxim Integrated │ 2
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Electrical Characteristics (continued)
(VDD = +3V, VSS = 0V, VCM = 0.5V, VOUT = VDD/2, RL = 1MΩ to VDD/2, TA = +25°C, unless otherwise noted (Note 1).)
PARAMETER
Input Offset Voltage
SYMBOL
VOS
CONDITIONS
MIN
TA = +25°C, VSS - 0.1V < VCM < VDD - 1.1V
Input Offset Current (Note 2)
MAX
±1.3
TA = -40°C to +125°C, VSS - 0.1V < VCM <
VDD - 1.1V
±9
Input Offset Drift
Input Bias Current (Note 2)
TYP
±0.35
6.2
IB
IOS
Input Capacitance
TA = +25°C
88
0.1
TA = -40°C to +125°C
200
TA = +25°C
0.1
TA = -40°C to +125°C
60
Either input, over entire CMVR
3
CMVR
Common Mode Rejection Ratio
CMRR
Power Supply Rejection Ratio
PSRR
Open Loop Gain
AVOL
RL = 1MΩ, VOUT = +50mV to VDD - 50mV
VOH
Swing high specified RL = 100kΩ to VDD/2
as VDD - VOUT
RL = 10kΩ to VDD/2
2.2
8
19.3
70
RL = 100kΩ to VDD/2
2.2
8
RL = 10kΩ to VDD/2
20
70
VOL
Output Short-Circuit Current
Gain Bandwidth Product
GBP
DC, (VSS - 0.1V) ≤ VCM ≤ (VDD - 1.1V)
VSS - 0.1
70
AC, 100mVPP 1kHz, with output at VDD/2
DC, 1.7V ≤ VDD ≤ 5.5V
Swing low specified
as VOUT - VSS
VDD - 1.1
95
67
88
110
Shorted to VSS (sourcing)
8
Shorted to VDD (sinking)
8
AV = 1V/V , CL = 20pF
9
pA
pA
V
dB
35
75
μV/°C
dB
48
AC, 100mVPP 1kHz, superimposed on VDD
mV
pF
Common Mode Voltage Range
Output Voltage Swing
Guaranteed by CMRR tests
UNITS
dB
mV
mA
kHz
Phase Margin
φM
CL = 20pF
64
°
Slew Rate
SR
VOUT = 1VPP step, AV = 1V/V
6.4
V/ms
100mV step, AV = 1V/V, CL = 20pF,
0.1% settling
165
µs
f = 1kHz
730
nV/√Hz
7
μVRMS
Settling Time
Input Voltage Noise Density
eN
Noise Voltage
From 0.1Hz to 10Hz
Power-On Time
tON
Output reaches 1% of final value
0.39
ms
Stable Capacitive Load
CL
No sustained oscillations
30
pF
IN1+, 100mVPP, f = 1kHz, test VOUT2
78
dB
Crosstalk
Note 1: Limits are 100% tested at TA = +25°C. Limits over the temperature range and relevant supply voltage range are guaranteed
by design and characterization.
Note 2: Guaranteed by design.
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Maxim Integrated │ 3
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Typical Operating Characteristics
(VDD = +3.0V, VSS = 0V, VCM = 0.5V, VOUT = VDD/2, RL = 1MΩ to VDD/2, TA = +25°C, unless otherwise noted.)
3000
VDD = 3.0V
2500
1200
TA = +125°C
INPUT OFFSET VOTLAGE (μ V)
SUPPLY CURRENT (nA)
toc02A
TA =+85°C
1000
900
TA = 25°C
800
700
600
TA = -40°C
1500
TA = +85°C
500
0
TA = +25°C
-500
-1000
TA = -40°C
-1500
2.2
2.7 3.2 3.7 4.2
SUPPLY VOLTAGE (V)
4.7
5.2
-0.1
0
-200
0.2
0.5
0.8
1.1
1.4
1.7
10
TA = +25°C
0.1
TA = +85°C
1.1
1.4
1.7
TA = +25°C
-0.1
2
DC PSRR (dB)
CHA
90
CHB
80
VDD = 1.7V TO 5.5V
75
200
OUTPUT VOTLAGE HIGH (VDD -VOUT ) (mV)
95
85
0.2
0.5
0.8
1.1
1.4
0
50
100
TEMPERATURE (°C)
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150
VDD = 3V
VDD = 1.7V
-50
2
0
100
150
OUTPUT VOLTAGE LOW
vs. OUTPUT SINK CURRENT
toc06
150
TA = +125°C
TA =+25°C
50
TA = -40°C
toc07
200
VDD = 3.0V
100
50
TEMPERATURE (°C)
0
-50
90
60
1.7
OUTPUT VOLTAGE HIGH
vs. OUTPUT SOURCE CURRENT
DC PSRR vs. TEMPERATURE
100
100
INPUT COMMON MODE VOLTAGE (V)
INPUT COMMON MODE VOLTAGE (V)
toc05
2
70
TA = -40°C
OUTPUT VOTLAGE LOW (VOUT - VSS) (mV)
0.8
1.7
0.1
0.01
0.5
1.4
VDD = 5.5V
80
TA = -40°C
0.01
1.1
toc04
110
TA = +125°C
1
0.8
DC CMRR vs. TEMPERATURE
VDD = 3.0V
10
0.5
120
DC CMRR (dB)
INPUT OFFSET CURRENT (pA)
INPUT BIAS CURRENT (pA)
TA = +85°C
0.2
INPUT COMMON MODE VOLTAGE (V)
TA = +125°C
100
0.2
TA = -40°C
-0.1
2
toc03B
100
VDD = 3.0V
-0.1
TA = +25°C
-400
INPUT OFFSET CURRENT
vs. INPUT COMMON MODE VOTLAGE
toc03A
1
TA = +85°C
200
INPUT COMMON MODE VOLTAGE (V)
INPUT BIAS CURRENT
vs. INPUT COMMON MODE VOLTAGE
1000
400
-800
-2500
1.7
TA = +125°C
-600
-2000
500
VDD = 3.0V
600
2000
1000
toc02B
800
TA = +125°C
INPUT OFFSET VOTLAGE (μ V)
toc01
1300
1100
INPUT OFFSET VOLTAGE vs. INPUT COMMON
MODE VOLTAGE–CHANNEL B
INPUT OFFSET VOLTAGE vs. INPUT COMMON
MODE VOLTAGE–CHANNEL A
TOTAL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
VDD = 3.0V
150
TA = +125°C
100
TA =+25°C
50
TA = -40°C
0
0
200
400
600
800
OUTPUT SOURCE CURRENT (μ A)
1000
0
200
400
600
800
1000
OUTPUT SINK CURRENT (μ A)
Maxim Integrated │ 4
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Typical Operating Characteristics (continued)
(VDD = +3.0V, VSS = 0V, VCM = 0.5V, VOUT = VDD/2, RL = 1MΩ to VDD/2, TA = +25°C, unless otherwise noted.)
5
0
0
0
-5
-45
-5
MAGNITUDE
-90
-15
-135
-20
-180
PHASE
-225
-270
-30
VIN = 100mVp-p
RLOAD = 1MΩ
CLOAD = 10pF
-35
-40
10
100
1000
10000
SMALL SIGNAL RESPONSE
vs. FREQUENCY
-45
MAGNITUDE
-10
-135
PHASE
-20
-225
-270
-30
-35
-360
100000
-40
VIN = 100mVp-p
RLOAD = 100kΩ
CLOAD = 10pF
10
45
0
-5
-45
-5
MAGNITUDE
SMALL SIGNAL GAIN (V/V)
0
-90
-15
-135
-20
-180
PHASE
-225
-270
-30
VIN = 1Vp-p
RLOAD = 1MΩ
CLOAD = 10pF
-35
-40
10
100
1000
10000
-270
-30
VIN = 1Vp-p
RLOAD = 100kΩ
CLOAD = 10pF
10
AC PSRR vs. FREQUENCY
90
VDD = 3V ± 100mVp-p
AV = 1V/V
80
AC PSRR (dB)
AC CMRR (dB)
0
0.001
60
50
40
30
10
0
0.01
0.1
1
INPUT FREQUENCY (kHz)
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10
100
1000
10000
-360
100000
INPUT VOLTAGE NOISE DENSITY
vs. FREQUENCY
toc011
20
20
-315
100
70
40
-225
FREQUENCY (Hz)
100
60
-180
PHASE
-25
-40
45
-135
-20
-360
100000
toc09B
-90
-15
-35
toc010
80
-360
100000
-45
MAGNITUDE
-10
-315
VIN_CM = 100mVp-p
AV = 1V/V
120
10000
0
5000
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
AC CMRR vs. FREQUENCY
1000
LARGE SIGNAL RESPONSE
vs. FREQUENCY
FREQUENCY (Hz)
140
-315
100
5
PHASE (°)
SMALL SIGNAL GAIN (V/V)
toc09a
0
-25
-180
-25
FREQUENCY (Hz)
LARGE SIGNAL RESPONSE
vs. FREQUENCY
-10
-90
-15
-315
45
0
FREQUENCY (Hz)
5
toc08B
PHASE (°)
-25
PHASE (°)
-10
SMALL SIGNAL GAIN (V/V)
45
5
SMALL SIGNAL GAIN (V/V)
toc08A
PHASE (°)
SMALL SIGNAL RESPONSE
vs. FREQUENCY
toc12
4500
4000
3500
3000
2500
2000
1500
1000
500
0
0.01
0.1
1
10
INPUT FREQUENCY (kHz)
100
1
10
100
1000
10000
FREQUENCY (Hz)
Maxim Integrated │ 5
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Typical Operating Characteristics (continued)
(VDD = +3.0V, VSS = 0V, VCM = 0.5V, VOUT = VDD/2, RL = 1MΩ to VDD/2, TA = +25°C, unless otherwise noted.)
0.1 TO 10 Hz INTEGRATED NOISE
50
CROSSTALK vs. FREQUENCY
toc13
20
VIN = 100mVp-p
AV = 1V/V
0
10
0
-10
-20
CAPACITIVE LOAD (pF)
-20
20
-40
-60
-80
-30
toc15
100000
30
CORSSTALK (dB)
OUTPUT VOLTAGE NOISE (µVP-P)
40
RESISTIVE LOAD vs. CAPACITIVE LOAD
toc14
UNSTABLE
10000
1000
STABLE
100
-100
-40
-120
-50
0.01
2s/div
VIN = 100mVp-p
AV = 1V/V
10
0.1
1
10
100
1
INPUT FREQUENCY (kHz)
10
100
1000
10000
RESISTIVE LOAD (kΩ )
SMALL SIGNAL STEP RESPONSE vs. TIME
SMALL SIGNAL STEP RESPONSE vs. TIME
toc17
50mV/div
ACCOUPLED
VIN
VOUT
VOUT
50mV/div
ACCOUPLED
100μ s/div
100μ s/div
500mV/div
ACCOUPLED
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CLOAD = 15pF
toc20
toc19
500mV/di
v
ACCOUPLED
100μ s/div
CLOAD = 30pF
POWER UP RESPONSE vs. TIME
LARGE SIGNAL STEP RESPONSE vs. TIME
toc18
VOUT
50mV/div
ACCOUPLED
CLOAD = 15pF
LARGE SIGNAL STEP RESPONSE vs. TIME
VIN
50mV/div
ACCOUPLED
VIN
500mV/div
ACCOUPLED
VIN
VOUT
500mV/div
ACCOUPLED
100μ s/div
CLOAD = 30pF
1V/div
ACCOUPLED
VDD
VOUT
250mV/div
ACCOUPLED
200μ s/div
VIN = 100mV
Maxim Integrated │ 6
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Pin Configuration
TOP VIEW
MAX40018
1
2
3
4
A
OUT1
IN1-
IN1+
VSS
B
VDD
OUT2
IN2-
IN2+
+
THIN WLP-8
BUMP PITCH = 0.4mm HEIGHT = 0.5mm
TOP VIEW
8
VDD
2
7
OUT2
IN1+
3
6
IN2-
VSS
4
5
IN2+
OUT1
1
IN1-
MAX40018
3mm x 3mm x 0.75mm TDFN
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Maxim Integrated │ 7
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Pin Description
PIN
NAME
FUNCTION
WLP
TDFN
A1
1
OUT1
A2
2
IN1-
Inverting Input, Channel 1
A3
3
IN1+
Noninverting Input, Channel 1
A4
4
VSS
Negative Power Supply Input. Connect VSS to 0V in single-supply application.
B1
8
VDD
Positive Power Supply Input
B2
7
OUT2
B3
6
IN2-
Inverting Input, Channel 2
5
IN2+
Noninverting Input, Channel 2
—
EP
B4
Amplifier 1 Output
Amplifier 2 Output
Exposed Pad. Connect EP to VSS or leave unconnected.
Detailed Description
The MAX40018 is a dual operational amplifier that draws
just 400nA supply current (typical, per channel). It is
ideal for battery-powered applications, such as portable
medical equipment, portable instruments, and wireless
handsets. The amplifiers feature rail-to-rail outputs and
are unity-gain stable with a 9kHz GBP. The ultra-low
supply current, ultra-low input bias current, low operating
voltage, and rail-to-rail output capabilities make this dual
operational amplifier ideal for use with single lithium-ion
(Li+), or two-cell NiCd or alkaline batteries.
Power Supplies and PCB Layout
The MAX40018 operates from a single +1.7V to +5.5V
power supply, or dual ±0.85V to ±2.75V power supplies.
Bypass the power supplies with a 0.1μF ceramic capacitor
placed close to VDD and VSS pins. Adding a solid ground
plane improves performance generally by decreasing
the noise at the op amp’s inputs. However, in very high
impedance circuits, it may be worth removing the ground
plane under the IN_- pins to reduce the stray capacitance
and help avoid reducing the phase margin. To further
decrease stray capacitance, minimize PCB trace lengths
and resistor and capacitor leads, and place external
components close to the amplifier’s pins.
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Ground Sensing Inputs
The common-mode voltage range of the MAX40018
extends down to VSS - 0.1V, and offers excellent
common-mode rejection. This feature allows input
voltage below ground in a single power supply application,
where ground sensing is very common. This op amp is
also guaranteed not to exhibit phase reversal when either
input is overdriven.
Rail-To-Rail Outputs
The outputs of the MAX40018 dual op amps are guaranteed
to swing within 8mV of the power supply rails with a
100kΩ load.
ESD Protection
The MAX40018 input and output pins are protected
against electrical discharge (ESD) with dedicated diodes
as shown in the Simplified Block Diagram. Caution must
be used when input voltages are beyond the power rails.
Also, the maximum current in or out of any input pin
as shown in the Absolute Maximum Ratings must be
observed.
Maxim Integrated │ 8
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Stability
The MAX40018 maintains stability in its minimum gain
configuration while driving capacitive loads up to 30pF or
so. Larger capacitive loading is achieved using the techniques described in the Capacitive Load Stability section
below. Although this amplifier is primarily designed for low
frequency applications, good layout can still be extremely
important, especially if very high value resistors are being
used, as is likely in ultra-low-power circuitry. However,
some stray capacitance may be unavoidable; and it may
be necessary to add a 2pF to 10pF capacitor across the
feedback resistor, as shown in Figure 1. Select the smallest
capacitor value that ensures stability so that BW and
settling time are not significantly impacted.
Capacitive Load Stability
Driving large capacitive loads can cause instability in
amplifiers. The MAX40018 is stable with capacitive loads
up to 30pF. Stability with higher capacitive loads can
be achieved by adding a resistive load in parallel with
the capacitive load, as shown in Figure 2. This resistor
improves the circuit’s phase margin by reducing the effective
bandwidth of the amplifier. The graph in the Typical
Operating Characteristics gives the stable operation
region for capacitive load versus resistive load.
VDD
IN1+
VDD
1/2 MAX40018
OUT1
IN1+
IN11/2 MAX40018
OUT1
IN1R1
CL
RL
R2
2pF TO 10pF
Figure 1. Compensation for Feedback Node Capacitance
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Figure 2. RL Improving Capacitive Load Drive Capability of Op
Amp
Maxim Integrated │ 9
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Applications Information
Motion Detection Application Circuit
Optimizing for Ultra-Low-Power Applications
The MAX40018 is designed for ultra-low-power applications.
To reduce the power consumption in the application
circuits, use impedance as large as the performance
allows. For example, choose low leakage ceramic capacitors
and high-value resistors. If moisture in high-value resistors
causes stray capacitance or current leakage, use special
coating process to reduce the leakage.
General Purpose Active Filters
Figure 3 shows an active band-pass filter implemented
with the MAX40018. Set the operating point based on
the power supply voltage and the input signal range. Pay
attention that the common mode input range is from -0.1V
to VDD - 1.1V. The example circuit sets the operating
point at VDD/2.
The low cut-off frequency is
1
f LOW =
(2 × π × R2 × C2)
.
The high cut-off frequency is
f HIGH =
1
(2 × π × R1× C1)
.
VDD/2
VDD
C3
IN1+
INPUT
1/2 MAX40018
IN1-
The motion sensor is a Murata IRA-S210ST0 pyroelectric
passive infrared (PIR) sensor with a typical responsivity (RV)
of 4.6mVPP. With a power supply of 3.3V, the PIR sensor
output is biased around 1.0V. Since we are interested
in human motion, the frequency range of interest is set to
0.5 Hz to 7 Hz.
The first stage amplifies the PIR sensor output. The high
frequency noise is filtered by R3 and C3 feedback filter,
with a cutoff frequency fHIGH1 = 1/(2 x π x R3 x C3) = 7Hz.
The low frequency noise is filtered by the R1 and C1 high
pass filter, with a cutoff frequency fLOW1 = 1/(2 x π x R1
x C1) = 0.5 Hz. The DC signal of the sensor output and
the op amp input offset voltage are not amplified, they are
showing at the output of the first stage op amp.
The first stage gain is set by G1 = 1 + R3/R1 = 46.3. This
gain guarantees the amplified signal will not saturate the
first stage op amp, but large enough to distinguish the
motion generated signal from the background noise.
The second stage is similar to the first stage. It amplifies the
AC component of the signal and rejects the DC component.
The high cutoff frequency fHIGH2 = 1/(2 x π x R5 x C5) =
7 Hz. The low cutoff frequency is fLOW2 = 1/(2 x π x R4
x C4) = 0.5 Hz. The second stage gain is G2 = 1 + R5/
R4 = 46.3. Similar to the first stage, the input offset voltage does not matter because only AC is amplified. The
bias voltage at the noninverting input is set to 1.1V, so
that the input has the largest swing between 0V to VDD 1.1V. Use large divider network resistors to reduce power
consumption of the system.
The circuit has a GBP requirement of 7Hz x 46.3 = 324.1Hz,
which is guaranteed by the MAX40018's GBP of 9kHz.
R1
R2
OUT1
Figure 4 shows a human motion detection circuit using
the MAX40018 dual op amp.
The MAX40018's dual op amps and the ultra-low supply
current of 350nA per channel make it a perfect fit for this
motion detection circuit.
C1
C2
Figure 3. Active Band-Pass Filter
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Maxim Integrated │ 10
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
R3
680k
C3 33nF
R5
VDD
C1
22µF
R8
33k
PIR
SENSOR
VDD
R1
15k
C5 33nF
C4 22µF R4 15k
D
S
G
680k
1/2 MAX40018
2/2 MAX40018
R2
47k
C2
1nF
OUT
VDD
R6
R7 1M
2M
C6
10nF
Figure 4. Motion Detection Circuit
R1
R3
VDD
C1
VREF1
1/2MAX40018
MAX40018
1/2
ISENSE
C3
RE
CE
WE
R2
VREF2
2/2 MAX40018
VOUT
GAS
SENSOR
Figure 5. Gas Detection Circuit
Gas Detection Circuit
Figure 5 shows a gas detection circuit using the MAX40018.
The first op amp generates a constant voltage at the sensor
reference electrode (RE). The op amp's ultra-low input
bias current of 1pA is ideal for this stage. The second op
amp converts the sensor output current into a voltage
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output. The output voltage VOUT = VREF2 - ISENSE x R3.
ISENSE can be positive or negative, depending on the
type of the sensor.
The MAX40018's dual op amps, ultra-low current
consumption, and ultra-low input bias current minimizes
the power requirement of the gas detection circuit, while
providing high accuracy and low system cost.
Maxim Integrated │ 11
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Ordering Information
PART NUMBER
TEMP RANGE
PIN-PACKAGE
PACKAGE CODE
TOP MARK
MAX40018ANA+
-40°C to +125°C
WLP-8
N80B1+1
AAK
MAX40018ATA+
-40°C to +125°C
TDFN
T833+2
BAA
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Denotes tape-and-reel.
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Maxim Integrated │ 12
MAX40018
Dual nanoPower Op Amps
in Tiny WLP and TDFN Packages
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
0
12/17
Initial release
—
1
4/18
Updated Ordering Information table
12
2
10/19
Updated Pin Configuration and Pin Description
7, 8
3
11/19
Updated Electrical Characteristics table
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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