MAX4357ECD+D

19-2209; Rev 1; 5/09 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Applications Security Systems Features o 32  16 Nonblocking Matrix with Buffered Inputs and Outputs o Operates from ±3V, ±5V, or +5V Supplies o Each Output Individually Addressable o Individually Programmable Output Buffer Gain (AV = +1V/V or +2V/V) o High-Impedance Output Disable for Wired-OR Connections o 0.1dB Gain Flatness to 12MHz o Minimum -62dB Crosstalk, -110dB Isolation at 6MHz o 0.05%/0.1° Differential Gain/Differential Phase Error o Low 220mW Power Consumption (0.43mW per point) Ordering Information PART MAX4357ECD TEMP RANGE -40°C to +85°C PIN-PACKAGE 128 TQFP Pin Configuration appears at end of data sheet. Video Routing Video-On-Demand Systems Functional Diagram Typical Operating Circuit MAX4357 IN0 OUT0 MONITOR IN1 OUT1 MAX4357 AV* IN0 MONITOR IN1 IN2 AV* IN31 AV* RESET POWER-ON RESET THERMAL SHUTDOWN DISABLE ALL OUTPUTS IN31 AV* 32 x 16 SWITCH MATRIX OUT15 512 16 OUT0 ENABLE/DISABLE CAMERAS MONITOR SERIAL INTERFACE OUT2 OUT15 16 VCC VEE AGND VDD DGND DECODE LOGIC DIN SCLK UPDATE CE OUT1 LATCHES MATRIX REGISTER 112 BITS DOUT UPDATE REGISTER 16 BITS AOUT *AV = +1V/V OR +2V/V A0-A3 MODE SPI/QSPI are trademarks of Motorola, Inc. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX4357 General Description The MAX4357 is a 32  16 highly integrated video crosspoint switch matrix with input and output buffers. This device operates from dual ±3V to ±5V supplies or from a single +5V supply. Digital logic is supplied from an independent single +2.7V to +5.5V supply. All inputs and outputs are buffered, with all outputs able to drive standard 75Ω reverse-terminated video loads. The switch matrix configuration and output buffer gain are programmed through an SPI™/QSPI™-compatible, 3-wire serial interface and initialized with a single update signal. The unique serial interface operates in two modes facilitating both fast updates and initialization. On power-up, all outputs are initialized in the disabled state to avoid output conflicts in large-array configurations. Superior flexibility, high integration, and space-saving packaging make this nonblocking switch matrix ideal for routing video signals in security and video-ondemand systems. The MAX4357 is available in a 128-pin TQFP package and specified over an extended -40°C to +85°C temperature range. MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers ABSOLUTE MAXIMUM RATINGS Analog Supply Voltage (VCC - VEE) .....................................+11V Digital Supply Voltage (VDD - DGND) ...................................+6V Analog Supplies to Analog Ground (VCC - AGND) and (AGND - VEE) ..................................... +6V Analog Ground to Digital Ground .........................-0.3V to +0.3V IN_ Voltage Range .......................... (VCC + 0.3V) to (VEE - 0.3V) OUT_ Short-Circuit Duration to AGND, VCC, or VEE ......Indefinite SCLK, CE, UPDATE, MODE, A_, DIN, DOUT, RESET, AOUT..........................(VDD + 0.3V) to (DGND - 0.3V) Current into Any Analog Input Pin (IN_) ...........................±50mA Current into Any Analog Output Pin (OUT_).....................±75mA Continuous Power Dissipation (TA = +70°C) 128-Pin TQFP (derate 25mW/°C above +70°C).................2W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) ................................ +300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±5V (VCC = +5V, VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Operating Supply Voltage Range Logic-Supply Voltage Range Gain (Note 1) SYMBOL VCC VEE Guaranteed by PSRR test VDD to DGND AV Gain Matching (Channel to Channel) Temperature Coefficient of Gain CONDITIONS MAX UNITS 4.5 10.5 V 2.7 5.5 V 0.97 0.995 1 (VEE + 2.5V) < VIN_ < (VCC - 2.5V), AV = +1V/V, RL = 10kΩ 0.99 0.999 1 (VEE + 3.75V) < VIN_ < (VCC - 3.75V), AV = +2V/V, RL = 150Ω 1.92 1.996 2.08 (VEE + 3.75V) < VIN_ < (VCC - 3.75V) AV = +2V/V, RL = 10kΩ 1.94 2.008 2.06 (VEE + 1V) < VIN_ < (VCC - 1.2V), AV = +1V/V, RL = 10kΩ 0.95 0.994 1 RL = 10kΩ 0.5 1.5 RL = 150Ω 0.5 2 TCAV 10 VIN_ AV = +2V/V 2 TYP (VEE + 2.5V) < VIN_ < (VCC - 2.5V), AV = +1V/V, RL = 150Ω AV = +1V/V Input Voltage Range MIN V/V % ppm/°C RL = 10kΩ VEE + 1 VCC - 1.2 RL = 150Ω VEE + 2.5 VCC - 2.5 RL = 10kΩ VEE + 3 VCC - 3.1 RL = 150Ω VEE + 3.75 VCC - 3.75 _______________________________________________________________________________________ V 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers (VCC = +5V, VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Output Voltage Range Input Bias Current SYMBOL VOUT CONDITIONS MIN RIN_ Output Offset Voltage VOFFSET Output Short-Circuit Current ISC Enabled Output Impedance ZOUT Output Leakage Current, Disable Mode DC Power-Supply Rejection Ratio IOD PSRR ICC VEE + 1 VCC - 1.2 RL = 150Ω VEE + 2.5 VCC - 2.5 4 V µA 10 AV = +1V/V ±5 ±20 AV = +2V/V ±10 ±40 Sinking or sourcing, RL = 1Ω ±40 mA (VEE + 1V) < VIN_ < (VCC - 1.2V) 0.2 Ω (VEE + 1V) < VOUT_ < (VCC - 1.2V) 4.5V < (VCC - VEE) < 10.5V RL = ∞ RL = ∞ Outputs enabled, TA = +25°C 0.004 60 MΩ 1 70 100 Outputs enabled mV µA dB 150 175 Outputs disabled 55 75 Outputs enabled, TA = +25°C 95 150 Outputs enabled Outputs disabled IDD 11 UNITS (VEE + 1V) < VIN_ < (VCC - 1.2V) Quiescent Supply Current IEE MAX RL = 10kΩ IB Input Resistance TYP mA 175 50 75 4 8 _______________________________________________________________________________________ 3 MAX4357 DC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±5V (continued) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers DC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±3V (VCC = +3V, VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Operating Supply Voltage Range Logic-Supply Voltage Range Gain (Note 1) SYMBOL VCC - VEE Guaranteed by PSRR test VDD to DGND Input Bias Current Input Resistance Output Offset Voltage 4 MAX UNITS 4.5 10.5 V 2.7 5.5 V 0.94 0.983 1 (VEE + 1V) < VIN_ < (VCC - 1.2V), AV = +1V/V, RL = 10kΩ 0.96 0.993 1 V/V (VEE + 2V) < VIN_ < (VCC - 2.1V), AV = +2V/V, RL = 150Ω 1.92 1.985 2.08 (VEE + 2V) < VIN_ < (VCC - 2.1V) AV = +2V/V, RL = 10kΩ 1.94 2.00 2.06 RL = 10kΩ 0.5 1.5 RL = 150Ω 0.5 2 TCAV 10 VIN_ AV = +2V/V Output Voltage Range TYP (VEE + 1V) < VIN_ < (VCC - 1.2V), AV = +1V/V, RL = 150Ω AV = +1V/V Input Voltage Range MIN AV Gain Matching (Channel to Channel) Temperature Coefficient of Gain CONDITIONS VOUT VOFFSET ppm/°C RL = 10kΩ VEE + 1 VCC - 1.2 RL = 150Ω VEE + 1 VCC - 1.2 RL = 10kΩ VEE + 2 VCC - 2.1 RL = 150Ω VEE + 2 VCC - 2.1 RL = 10kΩ VEE + 1 VCC - 1.2 RL = 150Ω VEE + 1 VCC - 1.2 IB RIN 4 (VEE + 1V) < VIN_ < (VCC - 1.2V) % 11 10 V µA MΩ AV = +1V/V ±5 ±20 AV = +2V/V ±10 ±40 _______________________________________________________________________________________ V mV 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers (VCC = +3V, VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL Output Short-Circuit Current ISC Enabled Output Impedance ZOUT Output Leakage Current, Disable Mode DC Power-Supply Rejection Ratio IOD PSRR ICC Quiescent Supply Current IEE CONDITIONS MIN Sinking or sourcing, RL = 1Ω (VEE + 1V) < VIN_ < (VCC - 1.2V) (VEE + 1V) < VOUT_ < (VCC - 1.2V) 4.5V < (VCC - VEE) < 10.5V RL = ∞ RL = ∞ TYP UNITS mA 0.2 Ω 0.004 60 MAX ±40 1 75 Outputs enabled 90 Outputs disabled 45 Outputs enabled 85 Outputs disabled 40 µA dB mA 3 IDD DC ELECTRICAL CHARACTERISTICS—SINGLE SUPPLY +5V (VCC = +5V, VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = +1.75V, AV = +1V/V, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Operating Supply Voltage Range Logic-Supply Voltage Range Gain (Note 1) SYMBOL VCC Gain Matching (Channel to Channel) Input Voltage Range Output Voltage Range Guaranteed by PSRR test VDD to DGND AV Temperature Coefficient of Gain CONDITIONS MIN MAX UNITS 4.5 5.5 V 2.7 5.5 V (VEE + 1V) < VIN < (VCC - 2.5V), AV = +1V/V, RL = 150Ω 0.94 0.995 1 (VEE + 1V) < VIN < (VCC - 1.2V), AV = +1V/V, RL = 10kΩ 0.94 0.995 1 RL = 10kΩ 0.5 3 RL = 150Ω 0.5 3 V TCAV VIN VOUT TYP 10 ppm/°C RL = 10kΩ VEE + 1 VCC 1.2 RL = 150Ω VEE + 1 VCC 2.5 AV = +1V/V, RL = 10kΩ VEE + 1 VCC 1.2 AV = +1V/V, RL = 150Ω VEE + 1 VCC 2.5 AV = +1V/V % V V _______________________________________________________________________________________ 5 MAX4357 DC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±3V (continued) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers DC ELECTRICAL CHARACTERISTICS—SINGLE SUPPLY +5V (continued) (VCC = +5V, VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = +1.75V, AV = +1V/V, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Input Bias Current Input Resistance Output Offset Voltage Output Short-Circuit Current Enabled Output Impedance Output Leakage Current, Disable Mode DC Power-Supply Rejection Ratio SYMBOL VOFFSET ISC ZOUT IOD PSRR IEE IDD 6 MIN IB RIN ICC Quiescent Supply Current CONDITIONS VEE + 1V < VIN_ < VCC - 1.2V TYP MAX 4 11 10 UNITS µA MΩ AV = +1V/V ±10 Sinking or sourcing, RL = 1Ω ±35 mA (VEE + 1V) < VIN_ < (VCC - 1.2V) 0.2 Ω (VEE + 1V) < VOUT_ < (VCC - 1.2V) 4.5V < VCC VEE < 5.5V RL = ∞ RL = ∞ 0.004 TA = +25°C to +85°C 50 TA = -40°C to +85°C 35 65 Outputs enabled, TA = +25°C 90 Outputs disabled 40 Outputs enabled, TA = +25°C 85 Outputs disabled 35 4 _______________________________________________________________________________________ ±40 1 mV µA dB mA 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers (VCC - VEE) = +4.5V to +10.5V, VDD = +2.7V to +5.5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS 3 VDD = +3V 2 Input Voltage High Level VIH Input Voltage Low Level VIL Input Current High Level IIH VI > 2V Input Current Low Level IIL VI < 1V Output Voltage High Level VOH Output Voltage Low Level VOL Output Current High Level IOH Output Current Low Level IOL MIN VDD = +5.0V TYP MAX V VDD = +5.0V 0.8 VDD = +3V 0.6 Excluding RESET -1 0.01 RESET -30 -20 Excluding RESET -1 0.01 -300 -235 ISOURCE = 1mA, VDD = +5V 4.7 4.9 ISOURCE = 1mA, VDD = +3V 2.7 2.9 RESET UNITS 1 1 0.1 0.3 ISINK = 1mA, VDD = +3V 0.1 0.3 1 4 VDD = +3V, VOUT = +2.7V 1 8 VDD = +5V, VO = +0.1V 1 4 VDD = +3V, VO = +0.3V 1 8 µA µA V ISINK = 1mA, VDD = +5V VDD = +5V, VO = +4.9V V V mA mA AC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±5V (VCC = +5V, VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS Small-Signal -3dB Bandwidth BWSS VOUT_ = 20mVp-p Medium-Signal -3dB Bandwidth BWMS VOUT_ = 200mVp-p Large-Signal -3dB Bandwidth BWLS VOUT_ = 2Vp-p Small-Signal 0.1dB Bandwidth BW0.1dB-SS VOUT_ = 20mVp-p Medium-Signal 0.1dB Bandwidth BW0.1dB-MS VOUT_ = 200mVp-p Large-Signal 0.1dB Bandwidth BW0.1dB-LS VOUT_ = 2Vp-p Slew Rate SR MIN TYP AV = +1V/V 95 AV = +2V/V 70 AV = +1V/V 90 AV = +2V/V 70 AV = +1V/V 40 AV = +2V/V 50 AV = +1V/V 15 AV = +2V/V 15 AV = +1V/V 15 AV = +2V/V 15 AV = +1V/V 12 AV = +2V/V 12 VOUT_ = 2V step, AV = +1V/V 150 VOUT_ = 2V step, AV = +2V/V 160 MAX UNITS MHz MHz MHz MHz MHz MHz Vµs _______________________________________________________________________________________ 7 MAX4357 LOGIC-LEVEL CHARACTERISTICS MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers AC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±5V (continued) (VCC = +5V, VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, and TA = +25°C, unless otherwise noted.) PARAMETER Settling Time SYMBOL tS 0.1% CONDITIONS VOUT_ = 0 to 2V step MIN TYP AV = +1V/V 60 AV = +2V/V 60 MAX UNITS ns Switching Transient (Glitch) (Note 3) AV = +1V/V 50 AV = +2V/V 50 AC Power-Supply Rejection Ratio f = 100kHz 70 f = 1MHz 68 Differential Gain Error (Note 4) RL = 1kΩ 0.01 RL = 150Ω 0.05 Differential Phase Error (Note 4) RL = 1kΩ 0.03 RL = 150Ω 0.1 Crosstalk, All Hostile f = 6MHz -62 f = 6MHz -110 dB 73 µVRMS 5 pF 3 pF 30 pF Off-Isolation, Input-to-Output Input Noise Voltage Density en Input Capacitance CIN Disabled Output Capacitance BW = 6MHz Amplifier in disable mode Capacitive Load at 3dB Output Peaking Output Impedance ZOUT f = 6MHz Output enabled 3 Output disabled 4k mV dB % Degrees dB Ω AC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±3V (VCC = +3V, VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_= 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) PARAMETER 8 SYMBOL CONDITIONS Small-Signal -3dB Bandwidth BWSS VOUT_ = 20mVp-p Medium-Signal -3dB Bandwidth BWMS VOUT_ = 200mVp-p Large-Signal -3dB Bandwidth BWLS VOUT_ = 2Vp-p Small-Signal 0.1dB Bandwidth BW0.1dB-SS VOUT_ = 20mVp-p Medium-Signal 0.1dB Bandwidth BW0.1dB-MS VOUT_ = 200mVp-p Large-Signal 0.1dB Bandwidth BW0.1dB-LS VOUT_ = 2Vp-p MIN TYP AV = +1V/V 90 AV = +2V/V 65 AV = +1V/V 90 AV = +2V/V 65 AV = +1V/V 30 AV = +2V/V 35 AV = +1V/V 15 AV = +2V/V 15 AV = +1V/V 15 AV = +2V/V 15 AV = +1V/V 12 AV = +2V/V 12 _______________________________________________________________________________________ MAX UNITS MHz MHz MHz MHz MHz MHz 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers (VCC = +3V, VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) PARAMETER Slew Rate SYMBOL SR Settling Time tS 0.1% CONDITIONS MIN TYP VOUT_ = 2V step AV = +1V/V 120 VOUT_ = 2V step AV = +2V/V 120 VO = 0 to 2V step AV = +1V/V 60 AV = +2V/V 60 MAX UNITS Vµs ns Switching Transient (Glitch) (Note 3) AV = +1V/V 15 AV = +2V/V 20 AC Power-Supply Rejection Ratio f = 100kHz 60 f = 1MHz 40 Differential Gain Error (Note 4) RL = 1kΩ 0.03 RL = 150Ω 0.2 Differential Phase Error (Note 4) RL = 1kΩ 0.08 RL = 150Ω 0.2 Crosstalk, All Hostile f = 6MHz -63 Off-Isolation, Input to Output f = 6MHz -112 dB 73 µVRMS 5 pF 3 pF 30 pF Input Noise Voltage Density Input Capacitance en BW = 6MHz CIN_ Disabled Output Capacitance Amplifier in disable mode Capacitive Load at 3dB Output Peaking Output Impedance ZOUT f = 6MHz Output enabled 3 Output disabled 4k mV dB % Degrees dB Ω _______________________________________________________________________________________ 9 MAX4357 AC ELECTRICAL CHARACTERISTICS—DUAL SUPPLIES ±3V (continued) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers AC ELECTRICAL CHARACTERISTICS—SINGLE SUPPLY +5V (VCC = +5V, VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = 1.75V, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Small-Signal -3dB Bandwidth BWSS VOUT_ = 20mVp-p 90 MHz Medium-Signal -3dB Bandwidth BWMS VOUT_ = 200mVp-p 90 MHz Large-Signal -3dB Bandwidth BWLS VOUT_ = 1.5Vp-p 38 MHz Small-Signal 0.1dB Bandwidth BW0.1dB-SS VOUT_ = 20mVp-p 12 MHz Medium-Signal 0.1dB Bandwidth BW0.1dB-MS VOUT_ = 200mVp-p 12 MHz Large-Signal 0.1dB Bandwidth BW0.1dB-LS VOUT_ = 1.5Vp-p 12 MHz VOUT_ = 2V step, AV = +1V/V 100 V/µs VOUT_ = 0 to 2V step 60 ns 25 mV Slew Rate Settling Time SR tS 0.1% Switching Transient (Glitch) AC Power-Supply Rejection Ratio f = 100kHz 70 f = 1MHz 69 Differential Gain Error (Note 4) RL = 1kΩ 0.03 RL = 150Ω 0.15 Differential Phase Error (Note 4) RL = 1kΩ 0.06 RL = 150Ω 0.2 Crosstalk, All Hostile f = 6MHz -63 dB Off-Isolation, Input-toOutput f = 6MHz -110 dB 73 µVRMS 5 pF 3 pF 30 pF Input Noise Voltage en Input Capacitance CIN_ Disabled Output Capacitance BW = 6MHz Amplifier in disable mode Capacitive Load at 3dB Output Peaking Output Impedance 10 ZOUT f = 6MHz Output enabled 3 Output disabled 4k ______________________________________________________________________________________ dB % Degrees Ω 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers ((VCC - VEE) = +4.5V to +10.5V, VDD = +2.7V to +5.5V, DGND = AGND = 0, VIN_ = 0 for dual supplies, VIN_ = +1.75V for single supply, RL = 150Ω to AGND, CL = 100pF, AV = +1V/V, and TA = TMIN - TMAX, unless otherwise noted. Typical values are at TA = +25°C.) TYP MAX UNITS Delay: UPDATE to Video Out PARAMETER tPdUdVo VIN = 0.5V step 200 450 ns Delay: UPDATE to AOUT tPdUdAo MODE = 0, time to AOUT = low after UPDATE = low 30 200 ns tPdDo Logic state change in DOUT on active SCLK edge 30 200 ns Delay: Output Disable tPdHOeVo VOUT = 0.5V, 1kΩ pulldown to AGND 300 800 ns Delay: Output Enable tPdLOeVo Output disabled, 1kΩ pulldown to AGND, VIN = 0.5V 200 800 ns 100 ns Delay: SCLK to DOUT Valid Setup: CE to SCLK SYMBOL CONDITIONS MIN tSuCe Setup: DIN to SCLK tSuDi 100 ns Hold Time: SCLK to DIN tHdDi 100 ns tMnHCk 100 ns Minimum Low Time: SCLK tMnLCk 100 ns Minimum Low Time: UPDATE tMnLUd 100 ns Setup Time: UPDATE to SCLK tSuHUd Rising edge of UPDATE to falling edge of SCLK 100 ns Hold Time: SCLK to UPDATE tHdHUd Falling edge of SCLK to falling edge of UPDATE 100 ns Minimum High Time: SCLK Setup Time: MODE to SCLK tSuMd Minimum time from clock edge to MODE with valid data clocking 100 ns Hold Time: MODE to SCLK tHdMd Minimum time from clock edge to MODE with valid data clocking 100 ns Minimum Low Time: RESET tMnLRst Delay: RESET tPdRst 10kΩ pulldown to AGND 300 ns 600 ns Note 1: Associated output voltage may be determined by multiplying the input voltage by the specified gain (AV) and adding output offset voltage. Note 2: Logic-level characteristics apply to the following pins: DIN, DOUT, SCLK, CE, UPDATE, RESET, A3–A0, MODE, and AOUT. Note 3: Switching transient settling time is guaranteed by the settling time (tS) specification. Switching transient is a result of updating the switch matrix. Note 4: Input test signal: 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0 to 100IRE). IRE is a unit of video-signal amplitude developed by the International Radio Engineers: 140IRE = 1.0V. Note 5: All devices are 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by design. ______________________________________________________________________________________ 11 MAX4357 SWITCHING CHARACTERISTICS MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Symbol Definitions TYPE DESCRIPTION Ao Signal Address Valid Flag (AOUT) • Propagation delays for clocked signals are from active edge of clock. Ce Signal Clock Enable (CE) Ck Signal Clock (SCLK) • Propagation delay for level sensitive signals is from input to output at 50% point of a transition. Di Signal Serial Data In (DIN) Do Signal Serial Data Output (DOUT) Md Signal MODE Oe Signal Output Enable Rst Signal Reset Input (RESET) Ud Signal UPDATE Vo Signal Video Out (OUT) H Property High or Low-to-High Transition Hd Property Hold L Property Low or High-to-Low Transition Mn Property Minimum Mx Property Maximum SYMBOL 12 Naming Conventions • All parameters with time units are given “t” designation, with appropriate subscript modifiers. Pd Property Propagation delay Su Property Setup Tr Property Transition W Property Width • Setup and Hold times are measured from 50% point of signal transition to 50% point of clocking signal transition. • Setup time refers to any signal that must be stable before active clock edge, even if signal is not latched or clocked itself. • Hold time refers to any signal that must be stable during and after active clock edge, even if signal is not latched or clocked. • Propagation delays to unobservable internal signals are modified to setup and hold designations applied to observable I/O signals. ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers TIMING PARAMETER DEFINITIONS NAME DESCRIPTION DATA AND CONTROL TIMING Ce: CE tHdCe tSuCe tSuDi tHdDi tMnLCk Do: DOUT tMnLUd tPdDo tHdUd tSuUd tMnMd tMxTr tWTrVo tPdUdVo Hi-Z Vo: OUT_ Hi-Z Ao: AOUT tPdUdAo Rst: RESET tPdHOeVo Oe: OUTPUT ENABLE tPdLOeVo Min High Time: Clk Min Low Time: Clk Min Low Time: Update Not Valid tHdHUd Not Valid tPdDiDo Di: DIN Ud: UPDATE Hold Time: Clock to Data In tMnLCk tMnLUd tSuHUd Ck: SCLK tMnHCk tHdDi tMnHCk tPdRstVo tMnlRst tMnLRst tPdRstVo Setup Time: UPDATE to Clk with UPDATE High Setup Time: UPDATE to Clk with UPDATE Low Hold Time: Clk to UPDATE with UPDATE high Hold Time: Clk to UPDATE with UPDATE Low Asynchronous Delay: Data In to Data Out Min Low Time: MODE Max Rise Time: Clk, Update Min Low Time: Reset Delay: Reset to Video Output TIMING PARAMETER DEFINITIONS NAME DESCRIPTION tPdUdVo Delay: Update to Video Out tPdUdAo tPdDo tPdHOeVo tPdLOeVo tSuCe tSuDi Delay: UPDATE to Aout Delay: Clk to Data Out Delay: Output Enable to Video Output (High: Disable) Delay: Output Enable to Video Output (Low: Enable) Setup: Clock Enable to Clock Setup Time: Data In to Clock Figure 1. Timing Diagram ______________________________________________________________________________________ 13 MAX4357 Timing Diagram Typical Operating Characteristics—Dual Supplies ±5V (VCC = +5V and VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) -3 AV = +1V/V -4 -1 AV = +2V/V -2 -3 -4 -4 -6 -6 -7 -7 100 -7 0.1 1000 1 0.1 1000 -2 AV = +1V/V -4 MAX4357 toc05 RL = 1kΩ 1 AV = +1V/V 0 -1 -2 AV = +2V/V -3 -4 -1 -3 -4 -5 -6 -7 -7 -7 0.1 1 10 100 1000 0.1 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY LARGE-SIGNAL FREQUENCY RESPONSE (AV = +1V/V) AV = +1V/V 0.4 0.3 0.2 0.1 0.0 -0.1 AV = +1V/V 0.1 0.0 -0.1 -0.2 3 AV = +2V/V -0.3 -0.4 0 2 3 4 5 -0.6 6 -0.3 -0.7 10 FREQUENCY (MHz) 100 1000 CL = 15pF 1 -0.2 1 CL = 45pF 1 -0.5 AV = +2V/V CL = 30pF 2 NORMALIZED GAIN (dB) 0.5 RL = 1kΩ 0.2 NORMALIZED GAIN (dB) 0.6 MAX4357 toc08 MAX4357 toc07 0.3 MAX4357 toc09 FREQUENCY (MHz) 0.7 0.1 AV = +2V/V -2 -6 1000 AV = +1V/V 0 -6 100 1000 RL = 1kΩ 1 -5 10 100 2 -5 1 10 SMALL-SIGNAL FREQUENCY RESPONSE 3 NORMALIZED GAIN (dB) -1 0.1 1 FREQUENCY (MHz) 2 NORMALIZED GAIN (dB) AV = +2V/V 0 -3 100 MEDIUM-SIGNAL FREQUENCY RESPONSE 3 MAX4357 toc04 RL = 1kΩ 2 1 10 FREQUENCY (MHz) LARGE-SIGNAL FREQUENCY RESPONSE 3 AV = +2V/V -3 -6 10 MAX4357 toc03 -2 -5 FREQUENCY (MHz) NORMALIZED GAIN (dB) -1 -5 1 AV = +1V/V 0 -5 0.1 14 1 MAX4357 toc06 -2 0 RL = 150Ω 2 NORMALIZED GAIN (dB) -1 AV = +1V/V 1 3 MAX4357 toc02 AV = +2V/V 0 RL = 150Ω 2 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 3 MAX4357 toc01 RL = 150Ω 2 SMALL-SIGNAL FREQUENCY RESPONSE MEDIUM-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE 3 NORMALIZED GAIN (dB) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers 7 0.1 1 10 FREQUENCY (MHz) 100 1000 0.1 1 10 FREQUENCY (MHz) ______________________________________________________________________________________ 100 1000 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers CL = 15pF -2 -3 -4 CL = 45pF 7 6 5 4 CL = 30pF 3 2 -5 0 -7 -1 100 1000 1 100 1 -70 -80 -100 100 AV = +2V/V -55 -60 -65 -70 -90 -90 DISTORTION vs. FREQUENCY ENABLED OUTPUT IMPEDANCE vs. FREQUENCY 2ND HARMONIC -50 3RD HARMONIC -70 -80 1 10 100 1000 DISABLED OUTPUT IMPEDANCE vs. FREQUENCY 1M 100k OUTPUT IMPEDANCE (Ω) OUTPUT IMPEDANCE (Ω) -30 0.1 1000 MAX4357 toc17 1000 MAX4357 toc16 -20 3ND HARMONIC FREQUENCY (MHz) FREQUENCY (MHz) AV = +2V/V -60 -100 FREQUENCY (MHz) -10 -50 -80 100 2ND HARMONIC -40 -85 10 1000 -30 -80 1 AV = +1V/V -20 -70 0.1 100 -10 -75 1000 10 DISTORTION vs. FREQUENCY 0 DISTORTION (dBc) -60 -60 0.1 1000 FREQUENCY (MHz) -50 -90 DISTORTION (dBc) 10 -45 CROSSTALK (dB) CROSSTALK (dB) -50 -40 CL = 15pF CROSSTALK vs. FREQUENCY -40 MAX4357 toc13 AV = +1V/V 0 0 -1 -3 0.1 CROSSTALK vs. FREQUENCY 10 CL = 30pF 1 FREQUENCY (MHz) -40 1 2 -2 FREQUENCY (MHz) 0.1 3 MAX4357 toc15 10 4 100 10 1 MAX4357 toc18 1 CL = 45pF 5 MAX4357 toc14 0.1 6 CL = 15pF 1 -6 7 NORMALIZED GAIN (dB) 0 -1 8 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 9 MAX4357 toc11 CL = 45pF CL = 30pF 2 MAX4357 toc10 3 MEDIUM-SIGNAL FREQUENCY RESPONSE (AV = +2V/V) MEDIUM-SIGNAL FREQUENCY RESPONSE (AV = +1V/V) MAX4357 toc12 LARGE-SIGNAL FREQUENCY RESPONSE (AV = +2V/V) 10k 1k 100 10 -90 -100 1 0.1 0.1 1 10 FREQUENCY (MHz) 100 1000 0.1 1 10 FREQUENCY (MHz) 100 1000 0.1 1 10 100 1000 FREQUENCY (MHz) ______________________________________________________________________________________ 15 MAX4357 Typical Operating Characteristics—Dual Supplies ±5V (continued) (VCC = +5V and VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics—Dual Supplies ±5V (continued) (VCC = +5V and VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY PSRR (dB) -80 -90 1000 VOLTAGE NOISE (nV√Hz) -55 -60 -70 MAX4357 toc20 -50 INPUT VOLTAGE NOISE vs. FREQUENCY -50 MAX4357 toc19 -40 -60 -65 -100 MAX4357 toc21 OFF-ISOLATION vs. FREQUENCY OFF ISOLATION (dB) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers 100 -70 -110 -120 100k 10 -75 1M 10M 100M 1G 10k 100k 1M 10M 10 100M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) LARGE-SIGNAL PULSE RESPONSE (AV = +1V/V) LARGE-SIGNAL PULSE RESPONSE (AV = +2V/V) MEDIUM-SIGNAL PULSE RESPONSE (AV = +1V/V) MAX4357 toc23 MAX4357 toc22 MAX4357 toc24 INPUT 1V/div INPUT 500mV/div INPUT 100mV/div OUTPUT 1V/div OUTPUT 1V/div OUTPUT 100mV/div 20ns/div 20ns/div MEDIUM-SIGNAL PULSE RESPONSE (AV = +2V/V) SWITCHING TIME (AV = +1V/V) MAX4357 toc25 INPUT 50mV/div OUTPUT 100mV/div 20ns/div 16 100 FREQUENCY (Hz) 20ns/div SWITCHING TIME (AV = +2V/V) MAX4357 toc26 VUPDATE 5V/div VUPDATE 5V/div VOUT 500mV/div VOUT 1V/div 20ns/div 20ns/div ______________________________________________________________________________________ MAX4357 toc27 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers SWITCHING TRANSIENT (GLITCH) (AV = +2V/V) OFFSET VOLTAGE DISTRIBUTION MAX4357 toc29 MAX4357 toc28 300 250 VUPDATE 5V/div VUPDATE 5V/div MAX4357 toc30 SWITCHING TRANSIENT (GLITCH) (AV = +1V/V) 200 150 100 VOUT 25mV/div VOUT 25mV/div 50 0 -14 -12 -10 -8 -6 -4 -2 20ns/div 20ns/div 0 2 4 6 OFFSET VOLTAGE (mV) DIFFERENTIAL GAIN AND PHASE vs. DC VOLTAGE (RL = 150Ω) DIFFERENTIAL GAIN AND PHASE vs. DC VOLTAGE (RL = 1kΩ) LARGE-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +1V/V) 0.015 0.010 0.005 0.000 -0.005 INPUT 1V/div 0 10 20 30 40 50 60 70 80 90 100 DIFF PHASE (°) DIFF PHASE (°) 0 10 20 30 40 50 60 70 80 90 100 0.15 0.10 0.05 0.00 -0.05 MAX4357 toc32 DIFF GAIN (%) MAX4357 toc31 DIFF GAIN (%) MAX4357 toc33 0.08 0.06 0.04 0.02 0.00 -0.02 0.05 0.04 0.03 0.02 0.01 0.00 -0.01 OUTPUT 1V/div 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 IRE IRE LARGE-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +2V/V) MEDIUM-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +1V/V) 20ns/div MEDIUM-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +2V/V) MAX4357 toc35 MAX4357 toc34 MAX4357 toc36 INPUT 500mV/div INPUT 100mV/div INPUT 50mV/div OUTPUT 1V/div OUTPUT 100mV/div OUTPUT 100mV/div 20ns/div 20ns/div 20ns/div ______________________________________________________________________________________ 17 MAX4357 Typical Operating Characteristics—Dual Supplies ±5V (continued) (VCC = +5V and VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics—Dual Supplies ±5V (continued) (VCC = +5V and VEE = -5V, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) RESET DELAY (s) AV = +2V/V 0.05 0 AV = +1V/V -0.05 10m 1m 100μ 10μ -0.10 1μ -0.15 100n -50 -25 0 25 50 TEMPERATURE (°C) 75 100 60 50 ICC 40 IEE 30 20 10 10n -0.20 18 100m SUPPLY CURRENT (mA) 0.10 70 MAX4357 toc38 MAX4357 toc37 0.15 SUPPLY CURRENT vs. TEMPERATURE RESET DELAY vs. RESET CAPACITANCE 10 1 MAX4357 toc39 GAIN vs. TEMPERATURE 0.20 NORMALIZED GAIN (dB) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers IDD 0 1p 10p 100p 1n 10n 100n 1μ 10μ 100μ CRESET (F) -50 -25 0 25 50 TEMPERATURE (°C) ______________________________________________________________________________________ 75 100 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers MEDIUM-SIGNAL FREQUENCY RESPONSE AV = +2V/V -2 -3 -4 -1 AV = +2V/V -2 -3 -4 -4 -5 -6 -7 -7 100 -7 0.1 1000 1 0.1 -1 -2 AV = +1V/V -4 AV = +2V/V 1 -0 AV = +1V/V -1 -2 -3 -4 -0 -1 -2 -4 -6 -6 -6 -7 -7 10 100 1000 0.1 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY LARGE-SIGNAL FREQUENCY RESPONSE (AV = +1V/V) 0.6 AV = +1V/V 0.5 0.4 0.3 0.2 AV = +2V/V 0.4 0.3 0.2 0.1 0.0 -0.1 AV = +2V/V -0.2 0 -0.3 -0.1 -0.4 1 AV = +1V/V 10 FREQUENCY (MHz) 100 1000 3 2 CL = 45pF CL = 30pF 1 NORMALIZED GAIN (dB) 0.7 RL = 1kΩ 0.5 MAX4357 toc47 MAX4357 toc46 0.6 NORMALIZED GAIN (dB) 0.8 0.1 1 FREQUENCY (MHz) 0.9 0.1 -7 0.1 1000 AV = +2V/V -3 -5 100 1000 AV = +1V/V 1 -5 10 100 RL = 1kΩ 2 -5 1 10 SMALL-SIGNAL FREQUENCY RESPONSE 3 NORMALIZED GAIN (dB) -0 0.1 1 FREQUENCY (MHz) RL = 1kΩ 2 NORMALIZED GAIN (dB) AV = +2V/V -3 1000 MAX4357 toc44 1 100 MEDIUM-SIGNAL FREQUENCY RESPONSE 3 MAX4357 toc43 RL = 1kΩ 2 10 FREQUENCY (MHz) LARGE-SIGNAL FREQUENCY RESPONSE 3 NORMALIZED GAIN (dB) -3 -6 10 AV = +2V/V -2 -6 1 AV = +1V/V -1 -5 FREQUENCY (MHz) NORMALIZED GAIN (dB) 1 -0 -5 0.1 MAX4357 toc42 AV = +1V/V -0 RL = 150Ω 2 MAX4357 toc48 -1 1 NORMALIZED GAIN (dB) -0 RL = 150Ω MAX4357 toc45 AV = +1V/V 2 SMALL-SIGNAL FREQUENCY RESPONSE 3 NORMALIZED GAIN (dB) RL = 150Ω 1 NORMALIZED GAIN (dB) MAX4357 toc40 2 3 MAX4357 toc41 LARGE-SIGNAL FREQUENCY RESPONSE 3 0 CL = 15pF -1 -2 -3 -4 -5 -6 -7 0.1 1 10 FREQUENCY (MHz) 100 1000 0.1 1 10 100 1000 FREQUENCY (MHz) ______________________________________________________________________________________ 19 MAX4357 Typical Operating Characteristics—Dual Supplies ±3V (VCC = +3V and VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics—Dual Supplies ±3V (continued) (VCC = +3V and VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) MEDIUM-SIGNAL FREQUENCY RESPONSE (AV = +1V/V) -0 CL = 15pF -1 -2 -3 -4 6 5 4 CL = 30pF 3 2 CL = 15pF 4 3 2 0 -1 0 -2 1 100 1 CROSSTALK VS. FREQUENCY MAX4357 toc52 AV = + 1V/V -50 -60 -65 -70 1000 0.1 AV = + 2V/V -45 -10 -50 -55 -60 -40 -50 -60 -70 -80 -75 -90 -80 -100 100M 1M 10M 100M 1M 10M 100M FREQUENCY (Hz) DISTORTION VS. FREQUENCY ENABLED OUTPUT IMPEDANCE VS. FREQUENCY DISABLED OUTPUT IMPEDANCE VS. FREQUENCY -60 3RD HARMONIC -70 -80 100 10 1 10M FREQUENCY (Hz) 100M MAX4357 toc57 1k 100 1 0.1 1M 10k 10 -90 -100 100k OUTPUT IMPEDANCE (Ω) -50 1M MAX4357 toc56 1000 OUTPUT IMPEDANCE (Ω) -40 100k 100k 1G FREQUENCY (Hz) 2ND HARMONIC -30 100k 3RD HARMONIC FREQUENCY (Hz) AV = + 2V/V -20 1G MAX4357 toc55 -10 10M 1000 2ND HARMONIC -30 -85 1M AV = + 1V/V -20 -80 100k 100 DISTORTION VS. FREQUENCY -70 -90 10 CROSSTALK VS. FREQUENCY -65 -75 1 FREQUENCY (MHz) -40 CROSSTALK (dB) -55 -35 100 DISTORTION (dB) -45 -30 10 FREQUENCY (MHz) FREQUENCY (MHz) -40 CL = 15pF -3 0.1 1000 MAX4357 toc53 10 CL = 30pF 1 1 1 CL = 45pF 5 -6 0.1 CROSSTALK (dB) 6 -5 -7 20 7 MAX4357 toc51 CL = 45pF 7 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) CL = 30pF 8 MAX4357 toc54 CL = 45pF 1 9 NORMALIZED GAIN (dB) 2 MAX4357 toc49 3 MEDIUM-SIGNAL FREQUENCY RESPONSE (AV = +2V/V) MAX4357 toc50 LARGE-SIGNAL FREQUENCY RESPONSE (AV = +2V/V) DISTORTION (dB) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers 0.1 1 10 FREQUENCY (MHz) 100 1000 0.1 1 10 FREQUENCY (MHz) ______________________________________________________________________________________ 100 1000 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers POWER-SUPPLY REJECTION RATIO vs. FREQUENCY PSRR (dB) -70 -80 -90 VOLTAGE NOISE (nV/√Hz) -55 -60 INPUT VOLTAGE NOISE vs. FREQUENCY 1000 MAX4357 toc59 -50 OFF ISOLATION (dB) -50 MAX4357 toc58 -40 -60 -65 -100 -70 MAX4357 toc60 OFF-ISOLATION VS. FREQUENCY 100 -110 -75 100M 1G 10 10k FREQUENCY (Hz) 1M 10M 100M MAX4357 toc61 INPUT 500mV/div 1M 10M 20ns/div SWITCHING TIME (AV = +2V/V) SWITCHING TIME (AV = +1V/V) MAX4357 toc64 20ns/div 100k OUTPUT 100mV/div VUPDATE 3V/div VOUT 500mV/div OUTPUT 100mV/div 10k INPUT 100mV/div 20ns/div MEDIUM-SIGNAL PULSE RESPONSE (AV = +2V/V) 1k MEDIUM-SIGNAL PULSE RESPONSE (AV = +1V/V) OUTPUT 1V/div 20ns/div 100 FREQUENCY(Hz) LARGE-SIGNAL PULSE RESPONSE (AV = +2V/V) OUTPUT 1V/div INPUT 50mV/div 10 FREQUENCY (Hz) LARGE-SIGNAL PULSE RESPONSE (AV = +1V/V) INPUT 1V/div 100k MAX4357 toc66 10M MAX4357 toc62 1M MAX4357 toc65 100k MAX4357 toc63 -120 VUPDATE 3V/div VOUT 1V/div 20ns/div 20ns/div ______________________________________________________________________________________ 21 MAX4357 Typical Operating Characteristics—Dual Supplies ±3V (continued) (VCC = +3V and VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics—Dual Supplies ±3V (continued) (VCC = +3V and VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) SWITCHING TRANSIENT GLITCH (AV = +2V/V) MAX4357 toc67 OFFSET VOLTAGE DISTRIBUTION MAX4357 toc68 VUPDATE 3V/div 300 MAX4357 toc69 SWITCHING TRANSIENT GLITCH (AV = +1V/V) 250 VUPDATE 3V/div 200 150 100 VOUT 25mV/div VOUT 25mV/div 50 0 20ns/div 20ns/div -15 -13 -11 -9 -7 -5 -3 -1 1 3 5 OFFSET VOLTAGE (mV) MAX4357 toc72 MAX4357 toc71 DIFFERENTIAL GAIN (%) 0.25 0.15 0.05 -0.05 LARGE-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +1V/V) DIFFERENTIAL GAIN AND PHASE (RL = 1kΩ) MAX4357 toc70 DIFFERENTIAL GAIN (%) DIFFERENTIAL GAIN AND PHASE (RL = 150Ω) 0.15 0.05 INPUT 1V/div DIFFERENTIAL PHASE (°) -0.05 DIFFERENTIAL PHASE (°) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers 0.25 0.15 0.05 -0.05 0.25 0.15 0.05 -0.05 10 20 30 40 50 60 70 80 90 100 10 IRE 20 30 40 50 60 70 80 90 100 IRE OUTPUT 1V/div 20ns/div MEDIUM-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +2V/V) MEDIUM-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +1V/V) LARGE-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF, AV = +2V/V) MAX4357 toc75 MAX4357 toc74 MAX4357 toc73 INPUT 500mV/div INPUT 100mV/div INPUT 50mV/div OUTPUT 1V/div OUTPUT 100mV/div OUTPUT 100mV/div 20ns/div 22 20ns/div ______________________________________________________________________________________ 20ns/div 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers GAIN VS. TEMPERATURE 0.10 10 1 MAX4357 toc77 0.15 100m AV = +2V/V 0.05 RESET DELAY (s) NORMALIZED GAIN (dB) RESET DELAY vs. RESET CAPACITANCE MAX4357 toc76 0.20 0 -0.05 -0.10 AV = +1V/V 10m 1m 100μ 10μ 1μ -0.15 100n -0.20 -50 -25 0 25 50 TEMPERATURE (°C) 75 100 10n 1p 10p 100p 1n 10n 100n 1μ 10μ 100μ CRESET (F) ______________________________________________________________________________________ 23 MAX4357 Typical Operating Characteristics—Dual Supplies ±3V (continued) (VCC = +3V and VEE = -3V, VDD = +3V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics—Single Supply +5V (VCC = +5V and VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) -3 -4 1 -1 -2 -3 -4 0 -1 -2 -3 -4 -5 -5 -5 -6 -6 -6 -7 -7 10 100 -7 0.1 1 10 100 0.1 1000 LARGE-SIGNAL FREQUENCY RESPONSE MEDIUM-SIGNAL FREQUENCY RESPONSE SMALL-SIGNAL FREQUENCY RESPONSE -3 -4 3 1 0 -1 -2 -3 -4 1 0 -1 -2 -3 -4 -5 -5 -5 -6 -6 -6 -7 -7 1 10 100 1000 -7 0.1 1 FREQUENCY (MHz) 0.1 1000 0.5 0.4 0.3 0.2 0.5 0.4 0.3 0.2 0.1 0 -0.1 1000 0 CL = 15pF -1 -2 -3 -4 -5 -0.3 -6 -0.1 -0.4 FREQUENCY (MHz) CL = 45pF 1 0.0 1000 CL = 30pF 2 -0.2 100 100 3 MAX4357 toc85 RL = 1kΩ 0.1 10 10 LARGE-SIGNAL FREQUENCY RESPONSE (AV = +1V/V) NORMALIZED GAIN (dB) 0.6 1 1 FREQUENCY (MHz) 0.6 NORMALIZED GAIN (dB) 0.7 100 LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY MAX4357 toc84 0.8 10 FREQUENCY (MHz) LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY 0.9 RL = 1kΩ 2 NORMALIZED GAIN (dB) -2 RL = 1kΩ 1000 MAX4357 toc83 3 2 NORMALIZED GAIN (dB) -1 24 100 FREQUENCY (MHz) 0 0.1 10 FREQUENCY (MHz) 1 0.1 1 FREQUENCY (MHz) RL = 1kΩ 2 1000 MAX4357 toc82 3 1 MAX4357 toc86 -2 0 RL = 150Ω 2 NORMALIZED GAIN (dB) -1 0.1 NORMALIZED GAIN (dB) 1 NORMALIZED GAIN (dB) 0 MAX4357 toc81 NORMALIZED GAIN (dB) 1 RL = 150Ω 2 3 MAX4357 toc79 RL = 150Ω 2 3 MAX4357 toc78 3 SMALL-SIGNAL FREQUENCY RESPONSE MEDIUM-SIGNAL FREQUENCY RESPONSE MAX4357 toc80 LARGE-SIGNAL FREQUENCY RESPONSE NORMALIZED GAIN (dB) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers -7 0.1 1 10 FREQUENCY (MHz) 100 1000 0.1 1 10 FREQUENCY (MHz) ______________________________________________________________________________________ 100 1000 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers CL = 30pF 3 2 CL = 15pF 1 -70 -75 -80 -40 -60 -85 -70 -90 -80 -95 -90 -100 10 100 100k 1000 1M 10M 100M ENABLED OUTPUT IMPEDANCE vs. FREQUENCY DISABLED OUTPUT IMPEDANCE vs. FREQUENCY 10k 1k 100 1000 -80 -90 -120 0.1 1 10 100 100k 1000 VOLTAGE NOISE (NV/√Hz) 1000 -65 100M 1G MAX4357 toc95 INPUT 1V/div 100 OUTPUT 1V/div -70 -75 10M LARGE-SIGNAL PULSE RESPONSE MAX4357 toc94 MAX4357 toc93 INPUT VOLTAGE NOISE vs. FREQUENCY -60 1M FREQUENCY (Hz) FREQUENCY (MHz) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY -55 -70 -110 FREQUENCY (MHz) -50 -60 -100 1 100 -50 OFF ISOLATION (dB) OUTPUT IMPEDANCE (Ω) 100k 0.1 10 100M OFF-ISOLATION vs. FREQUENCY 10 1 10M -40 MAX4357 toc91 MAX4357 toc90 1M 1 0.1 1M FREQUENCY (Hz) FREQUENCY (Hz) 10 100k 1G FREQUENCY (MHz) 100 3rd HARMONIC -50 -100 1 2nd HARMONIC -30 0 1000 PSRR (dB) -20 -1 0.1 OUTPUT IMPEDANCE (Ω) -65 -10 MAX4357 toc92 5 4 -60 CROSSTALK (dB) NORMALIZED GAIN (dB) 6 -55 DISTORTION (dBc) CL = 45pF 7 0 MAX4357 toc88 8 DISTORTION vs. FREQUENCY CROSSTALK vs. FREQUENCY -50 MAX4357 toc87 9 MAX4357 toc89 MEDIUM-SIGNAL FREQUENCY RESPONSE (AV = +1V/V) 10 10k 100k 1M FREQUENCY (Hz) 10M 100M 10 100 1k 10k 100k 1M 10M 20ns/div FREQUENCY (Hz) ______________________________________________________________________________________ 25 MAX4357 Typical Operating Characteristics—Single Supply +5V (continued) (VCC = +5V and VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics—Single Supply +5V (continued) (VCC = +5V and VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) SWITCHING TIME MEDIUM-SIGNAL PULSE RESPONSE MAX4357 toc97 MAX4357 toc96 VUPDATE 5V/div INPUT 100mV/div VOUT 500mV/div OUTPUT 100mV/div 20ns/div 20ns/div SWITCHING TRANSIENT (GLITCH) OFFSET VOLTAGE HISTOGRAM MAX4357 toc98 250 MAX4357 toc99 MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers 200 VUPDATE 5V/div 150 100 VOUT 25mV/div 50 0 20ns/div -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 OFFSET VOLTAGE (mV) DIFFERENTIAL GAIN AND PHASE (RL = 150Ω) DIFFERENTIAL GAIN AND PHASE (RL = 1kΩ) MAX4357 toc100 0.25 0.20 0.15 DIFFERENTIAL GAIN (%) 0.10 0.05 0 -0.05 0.04 DIFFERENTIAL 0.03 0.02 GAIN (%) 0.01 0 -0.01 0 10 20 30 40 50 60 70 80 90 100 0.30 0.25 0.20 DIFFERENTIAL 0.15 PHASE (%) 0.10 0 -0.05 -0.10 0 10 20 30 40 50 60 70 80 90 100 0.10 0.08 0.06 DIFFERENTIAL 0.04 PHASE (%) 0.02 0 -0.02 10 20 30 40 50 60 70 80 90 100 IRE 26 MAX4357 toc101 10 20 30 40 50 60 70 80 90 100 IRE ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers LARGE-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF) MEDIUM-SIGNAL PULSE RESPONSE WITH CAPACITIVE LOAD (CL = 30pF) MAX4357 toc102 MAX4357 toc103 INPUT 1V/div INPUT 100mV/div INPUT 1V/div OUTPUT 100mV/div 20ns/div 20ns/div RESET DELAY vs. RESET CAPACITANCE GAIN vs. TEMPERATURE 10 1 RESET DELAY (s) 0.10 0.05 0 -0.05 MAX4357 toc105 0.15 NORMALIZED GAIN (dB) 100 MAX4357 toc104 0.20 100m 10m 1m 100μ 10μ -0.10 1μ -0.15 100n 10n -0.20 -50 -25 0 25 50 TEMPERATURE (°C) 75 100 1p 10p 100p 1n 10n 100n 1μ 10μ 100μ CRESET (F) ______________________________________________________________________________________ 27 MAX4357 Typical Operating Characteristics—Single Supply +5V (continued) (VCC = +5V and VEE = 0, VDD = +5V, AGND = DGND = 0, VIN_ = 0, RL = 150Ω to AGND, AV = +1V/V, and TA = +25°C, unless otherwise noted.) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Pin Description PIN NAME FUNCTION 1, 69, 73, 77, 81, 85, 89, 93, 97 VEE 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 65, 66, 100, 102, 103, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128 AGND 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 37, 39, 41, 43, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127 IN0–IN31 35, 67, 71, 75, 79, 83, 87, 91, 95, 99 VCC 45 DGND Digital Ground 46 AOUT Address Recognition Output. AOUT drives low after successful chip address recognition. 47–50 A3–A0 Address Programming Inputs. Connect to DGND or VDD to select the address for Individual Output Address Mode (Table 3). 51 DOUT Serial Data Output. In Complete Matrix Mode, data is clocked through the 112-bit Matrix Control Shift register. In Individual Output Address Mode, data at DIN passes directly to DOUT. 52 SCLK Serial Clock Input 53 CE Negative Analog Supply. Bypass each pin with a 0.1µF capacitor to AGND. Connect a single 10µF capacitor from one VEE pin to AGND. Analog Ground Buffered Analog Inputs Positive Analog Supply. Bypass each pin with a 0.1µF capacitor to AGND. Connect a single 10µF capacitor from one VCC pin to AGND. Clock Enable Input. Drive low to enable the serial data interface. MODE Serial Interface Mode Select Input. Drive high for Complete Matrix Mode (Mode 1), or drive low for Individual Output Address Mode (Mode 0). 55 RESET Asynchronous Reset Input/Output. Drive RESET low to initiate hardware reset. All matrix settings are set to power-up defaults and all analog outputs are disabled. Additional power-on reset delay may be set by connecting a small capacitor from RESET to DGND. 56 UPDATE 57 DIN 58–63, 101 N.C. No Connection. Not internally connected. Connect to AGND. 64 VDD Digital Logic Supply. Bypass VDD with a 0.1µF capacitor DGND. 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98 OUT0–OUT15 54 28 Update Input. Drive UPDATE low to transfer data from mode registers to the matrix switch. Serial Data Input. Data is clocked in on the falling edge of SCLK. Buffered Analog Outputs. Gain is individually programmable for AV = +1V/V or AV = +2V/V through the serial interface. Outputs may be individually disabled (high impedance). On power-up, or assertion of RESET, all outputs are disabled. ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers MAX4357 AV* IN1 A V* 32 x 16 SWITCH MATRIX IN2 A V* IN31 A V* POWER-ON RESET RESET THERMAL SHUTDOWN DISABLE ALL OUTPUTS 512 16 OUT0 ENABLE/DISABLE IN0 SERIAL INTERFACE OUT2 OUT15 16 VCC VEE AGND VDD DGND DECODE LOGIC DIN SCLK UPDATE CE OUT1 LATCHES MATRIX REGISTER 112 BITS DOUT UPDATE REGISTER 16 BITS AOUT *AV = +1V/V OR +2V/V A0-A3 MODE Detailed Description The MAX4357 is a highly integrated 32  16 nonblocking video crosspoint switch matrix. All inputs and outputs are buffered, with all outputs able to drive standard 75Ω reverse-terminated video loads. A 3-wire interface programs the switch matrix and initializes with a single update signal. The unique serial interface operates in one of two modes, Complete Matrix Mode (Mode 1) or Individual Output Address Mode (Mode 0). The signal path of the MAX4357 is from the buffered inputs (IN0–IN31), through the switching matrix, buffered by the output amplifiers, and presented at the outputs (OUT0–OUT15) ( Functional Diagram ). The other functional blocks are the serial interface and control logic. Each of the functional blocks is described in detail in the sections following. Analog Outputs The MAX4357 outputs are high-speed amplifiers capable of driving 150Ω (75Ω back-terminated) loads. The gain, AV = +1V/V or +2V/V, is selectable through programming bit 5 of the serial control word. Amplifier compensation is automatically optimized to maximize the bandwidth for each gain selection. Each output can be individually enabled and disabled via bit 6 of the serial control word. When disabled, the output is high impedance presenting typically 4kΩ load, and 3pF output capacitance, allowing multiple outputs to be connected together for building large arrays. On power-up (or asynchronous RESET) all outputs are initialized in the disabled state to avoid output conflicts in large array configurations. The programming and operation of the MAX4357 is output referred. Outputs are configured individually to connect to any one of the 32 analog inputs, programmed to the desired gain (AV = +1V/V or +2V/V), and enabled or disabled in a high-impedance state. ______________________________________________________________________________________ 29 MAX4357 Functional Diagram MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Table 1. Operation Truth Table CE UPDATE SCLK DIN DOUT MODE AOUT RESET 1 X X X X X X 1 No change in logic. 0 1 ↓ Di Di-112 1 1 1 Data at DIN is clocked on negative edge of SCLK into 112-bit Complete Matrix Mode register. DOUT supplies original data in 112 SCLK pulses later. 0 0 X X X 1 1 1 Data in serial 112-bit Complete Matrix Mode register is transferred into parallel latches, which control the switching matrix. 1 Data at DIN is routed to Individual Output Address Mode shift register. DIN is also connected directly to DOUT so that all devices on the serial bus may be addressed in parallel. 0 1 ↓ Di Di 0 1 OPERATION/COMMENTS 0 0 X Di Di 0 0 1 4-bit chip address A3–A0 is compared to D14–D11. If equal, remaining 11 bits in Individual Output Address Mode register are decoded, allowing reprogramming for a single output. AOUT signals successful individual matrix update. X X X X X X X 0 Asynchronous reset. All outputs are disabled. Other logic remains unchanged. Note: "X" = Don’t Care Analog Inputs The MAX4357 offers 32 analog input channels. Each input is buffered before the crosspoint matrix switch, allowing one input to cross-connect up to 16 outputs. The input buffers are voltage feedback amplifiers with high-input impedance and low-input bias current. This allows the use of very simple input clamp circuits. Switch Matrix The MAX4357 has 512 individual T-switches making a 32  16 switch matrix. The switching matrix is 100% nonblocking, which means that any input may be routed to any output. The switch matrix programming is output referred. Each output may be connected to any one of the 32 analog inputs. Any one input can be routed to all 16 outputs with no signal degradation. Digital Interface The digital interface consists of the following pins: DIN, DOUT, SCLK, AOUT, UPDATE, CE, A3–A0, MODE, and RESET. DIN is the serial-data input, DOUT is the serialdata output. 30 SCLK is the serial-data clock which clocks data into the data input registers (Figure 3). Data at DIN is loaded in at each falling edge of SCLK. DOUT is the data shifted out of the 112-bit Complete Matrix Mode register (Mode = 1). DIN passes directly to DOUT when in Individual Output Address Mode (Mode = 0). The falling edge of UPDATE latches the data and programs the matrix. When using Individual Output Address Mode, the address recognition output AOUT drives low when control-word bits D14 to D11 match the address programming inputs (A3–A0) and UPDATE is low (Table 1). Table 1 is the operation truth table. Programming the Matrix The MAX4357 offers two programming modes: Individual Output Address Mode and Complete Matrix Mode. These two distinct programming modes are selected by toggling a single MODE pin high or low. Both modes operate with the same physical board layout. This flexibility allows initial programming of the IC by daisy-chaining and sending one long data word while still being able to immediately address and update individual outputs in the matrix. ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers MAX4357 4 A0–A3 CHIP ADDRESS SCLK CE MODE 4 16-BIT INDIVIDUAL OUTPUT ADDRESS MODE REGISTER SCLK CE MODE MODE S A DATA ROUTING GATE B 11 DIN 112-BIT COMPLETE MATRIX MODE REGISTER 112 11 OUTPUT ADDRESS DECODE DOUT MODE 7 MODE 112 1 AOUT UPDATE EN 7 112-BIT PARALLEL LATCH 112 SWITCH DECODE 512 SWITCH MATRIX 16 OUTPUT ENABLE Figure 2. Serial Interface Block Diagram Individual Output Address Mode (MODE = 0) Drive MODE to logic low to select Mode 0. Individual outputs are programmed via the serial interface with a single 16-bit control word. The control word consists of a don’t care MSB, the chip address bits, output address bits, an output enable/disable bit, an output gain-set bit, and input address bits (Table 2 through Table 6, and Figure 2). the last 7-bit control word (LSBs) programs output 0 (Table 7 and Figures 4 and 5). Data clocked into the 112-bit Complete Matrix Mode register is latched on the falling edge of UPDATE, and the outputs are immediately updated. Complete Matrix Mode (MODE = 1) Initialization String Complete Matrix Mode (Mode = 1) is convenient for programming the matrix at power-up. In a large matrix consisting of many MAX4357s, all the devices can be programmed by sending a single bit stream equal to n x 112 bits where n is the number of MAX4357 devices on the bus. The first 112-bit data word programs the last MAX4357 in line (see Matrix Programming section). Drive MODE to logic high to select Mode 1. A single 112-bit control word, consisting of sixteen 7-bit control words, programs all outputs. The 112-bit control word’s first 7-bit control word (MSBs) programs output 15, and The MAX4357 features an asynchronous bidirectional RESET with an internal 20kΩ pullup resistor to VDD. When RESET is pulled low either by internal circuitry, or In Mode 0, data at DIN passes directly to DOUT through the data routing gate (Figure 3). In this configuration, the 16-bit control word is simultaneously sent to all chips in an array of up to 16 addresses. RESET ______________________________________________________________________________________ 31 MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Table 2. 16-Bit Serial Control Word Bit Assignments (Mode 0: Individual Output Address Mode) BIT NAME 15 (MSB) X FUNCTION 14 IC Address A3 MSB of selected chip address 13 IC Address A2 MSB of selected chip address 12 IC Address A1 MSB of selected chip address 11 IC Address A0 LSB of selected chip address 10 Output Address B3 MSB of output buffer address 9 Output Address B2 MSB of output buffer address 8 Output Address B1 MSB of output buffer address 7 Output Address B0 LSB of output buffer address 6 Output Enable Don’t care Enable bit for output, 0 = disable, 1 = enable 5 Gain Set 4 Input Address 4 MSB of input channel select address Gain select for output buffer, 0 = gain of +1V/V, 1 = gain of +2V/V 3 Input Address 3 MSB of input channel select address 2 Input Address 2 MSB of input channel select address 1 Input Address 1 MSB of input channel select address 0 (LSB) Input Address 0 LSB of input channel select address driven externally, the analog output buffers are latched into a high-impedance state. After RESET is released, the output buffers remain disabled. The outputs may be enabled by sending a new 112-bit data word or a 16-bit individual output address word. A reset is initiated from any of three sources. RESET can be driven low by external circuitry to initiate a reset, or RESET can be pulled low by internal circuitry during power-up (poweron reset) or thermal shutdown. Since driving RESET low only clears the output-bufferenable bit in the matrix control latches, RESET can be used to disable all outputs simultaneously. If no new data has been loaded into the 112-bit Complete Matrix Mode register, a single UPDATE restores the previous matrix control settings. Power-On Reset The power-on reset ensures all output buffers are in a disabled state when power is initially applied. A VDD voltage comparator generates the power-on reset. When the voltage at VDD is less than 2.5V, the poweron-reset comparator pulls RESET low via internal circuitry. As the digital-supply voltage ramps up crossing 2.5V, the MAX4357 holds RESET low for 40ns (typ). Connecting a small capacitor from RESET to DGND extends the power-on-reset delay. (see the RESET Delay vs. RESET Capacitance graph in the Typical Operating Characteristics). 32 Thermal Shutdown The MAX4357 features thermal shutdown protection with temperature hysteresis. When the die temperature exceeds 150°C, the MAX4357 pulls RESET low, disabling the output buffer. When the die cools by 20°C, the RESET pulldown is deasserted, and output buffers remain disabled until the device is programmed again. Applications Information Building Large Video-Switching Systems The MAX4357 can be easily used to create larger switching matrices. The number of ICs required to implement the matrix is a function of the number of input channels, the number of outputs required, and whether the array needs to be nonblocking. The most straightforward technique for implementing nonblocking matrices is to arrange the building blocks in a grid. The inputs connect to each vertical bank of devices in parallel with the other banks. The outputs of each building block in a vertical column connect together in a wired-OR configuration. Figure 6 shows a 128-input, 32-output, nonblocking array using eight MAX4357 crosspoint devices. ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers MAX4357 16-BIT INDIVIDUAL OUTPUT ADDRESS MODE: FIRST BIT IS A DON'T CARE BIT, LAST 15 BITS CLOCKED INTO DIN WHEN MODE = 0, CREATES ADDRESS WORD; IC ADDRESS A3–A0 IS COMPARED TO DIN14–DIN11 WHEN UPDATE IS LOW; IF EQUAL, ADDRESSED OUTPUT IS UPDATED. UPDATE tSuMd tHdMd MODE SCLK IC ADDRESS = 2 OUTPUT ADDRESS = 9 INPUT ADDRESS 0 (LSB) = 0 INPUT ADDRESS 1 = 0 INPUT ADDRESS 2 = 0 INPUT ADDRESS 3 = 0 INPUT ADDRESS 4 (MSB) = 1 GAIN SET = +1V/V OUTPUT ENABLE OUTPUT ADDRESS B0 OUTPUT ADDRESS B1 OUTPUT ADDRESS B2 OUTPUT ADDRESS B3 IC ADDRESS A0 IC ADDRESS A1 IC ADDRESS A2 IC ADDRESS A3 DON'T CARE X DIN OUTPUT (i) ENABLED, AV = +1V/V, CONNECTED TO INPUT 16 EXAMPLE OF 16-BIT SERIAL CONTROL WORD FOR OUTPUT CONTROL IN INDIVIDUAL OUTPUT ADDRESS MODE Figure 3. Mode 0, Individual Output Address Mode Timing and Programming Example The wired-OR connection of the outputs shown in the diagram is possible because the outputs of the IC devices can be placed in a disabled, or high-impedance-output state. This disable state of the output buffers is designed for a maximum impedance vs. frequency while maintaining a low-output capacitance. These characteristics minimize the adverse loading effects from the disabled outputs. Larger arrays are constructed by extending this connection technique to more devices. Driving a Capacitive Load Figure 6 shows an implementation requiring many outputs to be wired together. This creates a situation where each output buffer sees not only the normal load impedance, but also the disabled impedance of all the other outputs. This impedance has a resistive and a capacitive component. The resistive components reduce the total effective load for the driving output. Total capacitance is the sum of the capacitance of all the disabled outputs and is a function of the size of the matrix. Also, as the size of the matrix increases, the length of the PC board traces increases, adding more capacitance. The output buffers have been designed to drive more than 30pF of capacitance while still maintaining a good AC response. Depending on the size of the array, the capacitance seen by the output can exceed this amount. There are several ways to improve the situation. The first is to use more building-block crosspoint devices to reduce the number of outputs that need to be wired together (Figure 7). In Figure 7, the additional devices are placed in a second bank to multiplex the signals. This reduces the number of wired-OR connections. Another solution is to put a small resistor in series with the output before the capacitive load to limit excessive ringing and oscillations. Figure 8 shows the Optimal Isolation Resistor vs. Capacitive Load. A lowpass filter is created from the series resistor and parasitic capacitance to ground. ______________________________________________________________________________________ 33 MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers tMnLCk tMnHCk SCLK tSuDi tHdDi DIN tSuHUd tMnLUd tPdDo UPDATE DOUT SCLK EXAMPLE OF 7-BIT SERIAL CONTROL WORD FOR OUTPUT CONTROL NEXT CONTROL WORD INPUT ADDRESS 0 (LSB) = 0 INPUT ADDRESS 1 = 0 INPUT ADDRESS 2 = 1 INPUT ADDRESS 3 = 1 INPUT ADDRESS 4 (MSB) = 1 ENABLE OUTPUT OUTPUT (i) ENABLED, AV = +1V/V, CONNECTED TO INPUT 28 GAIN SET = +1V/V DIN Figure 4. 7-Bit Control Word and Programming Example (Mode 1: Complete Matrix Mode) UPDATE 1 0 MODE DIN 1 7-BIT CONTROL WORD OUT2 0 OUT1 OUT0 TIME MOST SIGNIFICANT BITS OF THE 7-BIT CONTROL WORD ARE SHIFTED IN FIRST; I.E., OUT15, THEN OUT14, ETC. LAST 7 BITS SHIFTED IN PRIOR TO UPDATE FALLING EDGE PROGRAM OUT0. Figure 5. Mode 1: Complete Matrix Mode Programming 34 ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers IC ADDRESS BIT ADDRESS A3 (MSB) A2 A1 A0 (LSB) CHIP ADDRESS (HEX) CHIP ADDRESS (DECIMAL) 0 0 0 0 0h 0 0 0 0 1 1h 1 0 0 1 0 2h 2 0 0 1 1 3h 3 0 1 0 0 4h 4 0 1 0 1 5h 5 0 1 1 0 6h 6 0 1 1 1 7h 7 1 0 0 0 8h 8 1 0 0 1 9h 9 1 0 1 0 Ah 10 1 0 1 1 Bh 11 1 1 0 0 Ch 12 1 1 0 1 Dh 13 1 1 1 0 Eh 14 1 1 1 1 Fh 15 Table 4. Chip Address A3–A0 Pin Programming PIN ADDRESS CHIP ADDRESS (HEX) CHIP ADDRESS (DECIMAL) A3 A2 A1 A0 DGND DGND DGND DGND 0h 0 DGND DGND DGND VDD 1h 1 DGND DGND VDD DGND 2h 2 DGND DGND VDD VDD 3h 3 DGND VDD DGND DGND 4h 4 DGND VDD DGND VDD 5h 5 DGND VDD VDD DGND 6h 6 DGND VDD VDD VDD 7h 7 VDD DGND DGND DGND 8h 8 VDD DGND DGND VDD 9h 9 VDD DGND VDD DGND Ah 10 VDD DGND VDD VDD Bh 11 VDD VDD DGND DGND Ch 12 VDD VDD DGND VDD Dh 13 VDD VDD VDD DGND Eh 14 VDD VDD VDD VDD Fh 15 ______________________________________________________________________________________ 35 MAX4357 Table 3. Chip Address Programming for 16-Bit Control Word (Mode 0: Individual Output Address Mode) MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Table 5. Output Selection Programming OUTPUT ADDRESS BIT INPUTS (0–31) INPUTS (32–63) INPUTS (64–95) INPUTS (96–127) B2 B1 B0 (LSB) 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 0 0 0 8 1 0 0 1 9 1 0 1 0 10 1 0 1 1 11 1 1 0 0 12 1 1 0 1 13 1 1 1 0 14 1 1 1 1 15 32 16 IN MAX4357 OUT 32 16 IN MAX4357 OUT 32 16 IN MAX4357 OUT 32 16 IN MAX4357 OUT 32 16 MAX4357 IN OUT 32 16 MAX4357 IN OUT 32 16 IN MAX4357 OUT 32 16 IN MAX4357 OUT OUTPUTS (0–15) OUTPUTS (16–31) Figure 6. 128 x 32 Nonblocking Matrix Using 32 x 16 Crosspoint Devices 36 SELECTED OUTPUT B3 (MSB) A single R-C does not affect the performance at video frequencies, but in a very large system there may be many R-Cs cascaded in series. The cumulative effect is a slight rolling off of the high frequencies causing a "softening" of the picture. There are two solutions to achieve higher performance. One way is to design the PC board traces associated with the outputs such that they exhibit some inductance. By routing the traces in a repeating "S" configuration, the traces that are nearest each other exhibit a mutual inductance increasing the total inductance. This series inductance causes the amplitude response to increase or peak at higher frequencies, offsetting the rolloff from the parasitic capacitance. Another solution is to add a small-value inductor to the output. Crosstalk and Board Routing Issues Improper signal routing causes performance problems. The MAX4357 has a typical crosstalk rejection of -62dB at 6MHz. A bad PC board layout degrades the crosstalk rejection by 20dB or more. To achieve the best crosstalk performance: 1. Place ground isolation between long critical signal PC board trace runs. These traces act as a shield to potential interfering signals. Crosstalk can be degraded from parallel traces as well as directly above and below on adjoining PC board layers. ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers INPUTS (0–31) 32 INPUT ADDRESS BIT 16 MAX4357 OUT IN SELECTED INPUT B4 (MSB) B3 B2 B1 B0 (LSB) 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 2 0 0 0 1 1 3 0 0 1 0 0 4 0 0 1 0 1 5 0 0 1 1 0 6 0 0 1 1 1 7 0 1 0 0 0 8 0 1 0 0 1 9 Figure 7. 128 x 16 Nonblocking Matrix with Reduced Capacitive Loading 0 1 0 1 0 10 0 1 0 1 1 11 OPTIMAL ISOLATION RESISTANCE vs. CAPACITIVE LOAD 0 1 1 0 0 12 0 1 1 0 1 13 0 1 1 1 0 14 0 1 1 1 1 15 1 0 0 0 0 16 1 0 0 0 1 17 1 0 0 1 0 18 1 0 0 1 1 19 1 0 1 0 0 20 1 0 1 0 1 21 1 0 1 1 0 22 1 0 1 1 1 23 1 1 0 0 0 24 1 1 0 0 1 25 1 1 0 1 0 26 1 1 0 1 1 27 1 1 1 0 0 28 1 1 1 0 1 29 1 1 1 1 0 30 1 1 1 1 1 31 INPUTS (32–63) 32 16 MAX4357 OUT IN INPUTS (64–95) 32 IN 16 MAX4357 OUT INPUTS (96–127) 32 16 IN 16 IN 16 OUTPUTS (0–15) MAX4357 OUT 16 MAX4357 OUT IN ISOLATION RESISTANCE (Ω) 30 25 20 15 10 5 0 0 100 200 300 400 500 CAPACITIVE LOAD (pF) Figure 8. Optimal Isolation Resistor vs. Capacitive Load 2. Maintain controlled-impedance traces. Design as many of the PC board traces as possible to be 75Ω transmission lines. This lowers the impedance of the traces reducing a potential source of crosstalk. More power dissipates due to the output buffer driving a lower impedance. 3. Minimize ground current interaction by using a good ground plane strategy. In addition to crosstalk, another key issue of concern is isolation. Isolation is the rejection of undesirable feedthrough from input to output with the output disabled. The MAX4357 achieves a -110dB isolation at 6MHz by selecting the pinout configuration such that the inputs and outputs are on opposite sides of the package. Coupling through the power supply is a function of the quality and location of the supply bypassing. Use appropriate low-impedance components and locate them as close as possible to the IC. Avoid routing the inputs near the outputs. ______________________________________________________________________________________ 37 MAX4357 Table 6. Input Selection Programming MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Table 7. 7-Bit Serial Control Word Bit Assignments (Mode 1: Complete Matrix Mode Programming) BIT NAME 6 (MSB) Output Enable FUNCTION Enable bit for output, 0 = disable, 1 = enable. 5 Gain Set 4 Input Address 4 MSB of input channel select address Gain select for output buffer, 0 = gain of +1V/V, 1 = gain of +2V/V. 3 Input Address 3 MSB of input channel select address 2 Input Address 2 MSB of input channel select address 1 Input Address 1 MSB of input channel select address 0 (LSB) Input Address 0 LSB of input channel select address Power-Supply Bypassing The MAX4357 operates from a single +5V or dual ±3V to ±5V supplies. For single-supply operation, connect all VEE pins to ground and bypass all power-supply pins with a 0.1µF capacitor to ground. For dual-supply systems, bypass all supply pins to ground with 0.1µF capacitors. Power in Large Systems The MAX4357 has been designed to operate with split supplies down to ±3V or a single supply of +5V. Operating at the minimum supply voltages reduces the power dissipation by as much 40% to 50%. At +5V, the MAX4357 consumes 220mW (0.43mW/point). Driving a PC-Board Interconnect or Cable (AV = +1V/V or +2V/V) The MAX4357 output buffers can be programmed to either AV = +1V/V or +2V/V. The +1V/V configuration is typically used when driving short-length (less than 3cm), high-impedance "local" PC-board traces. To drive a cable or a 75Ω transmission line trace, program the gain of the output buffer to +2V/V and place a 75Ω resistor in series with the output. The series termination resistor and the 75Ω load impedance act as a voltage divider that divides the video signal in half. Set the gain to +2V/V to transmit a standard 1V video signal down a cable. The series 75Ω resistor is called the back-match, reverse termination, or series termination. This 75Ω resistor reduces reflections and provides isolation, increasing the output-capacitive-driving capability. Matrix Programming The MAX4357’s unique digital interface simplifies programming multiple MAX4357 devices in an array. Multiple devices are connected with DOUT of the first device connecting to DIN of the second device, and so on (Figure 9). Two distinct programming modes, 38 Individual Output Address Mode (MODE = 0) and Complete Matrix Mode (MODE = 1) are selected by toggling a single MODE control pin high or low. Both modes operate with the same physical board layout. This allows initial programming of the IC by daisychaining and sending one long data word while still being able to immediately address and update individual locations in the matrix. Individual Output Address Mode (Mode = 0) In Individual Output Address Mode, the devices are connected in a serial-bus configuration, with the data routing gate (Figure 3) connecting DIN to DOUT, making each device a virtual node on the serial bus. A single 16-bit control word is sent to all devices simultaneously. Only the device with the corresponding chip address responds to the programming word and updates its output. In this mode, the chip address is set via hardware pin strapping of A3–A0. The host communicates with the device by sending a 16-bit word consisting of 1 don’t care bit, 4-chip address bits, 11 bits of data to make the word exactly two bytes in length. The 11 data bits are broken down into 4 bits to select the output to be programmed; 1 bit to set the output enable; 1 bit to set gain; and 5 bits to select the input to be connected to that output. In this method, the matrix is programmed one output at a time. Complete Matrix Mode (Mode = 1) In Complete Matrix Mode, the devices are connected in a daisy-chain fashion where n  112 bits are sent to program the entire matrix, where n = the number of MAX4357 devices connected in series. The data word is structured such that the first bit is the LSB of the last device in the chain and the last data bit is the MSB of the first device in the chain. The total length of the data word is equal to the number of crosspoint devices to be ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers DIN HOST CONTROLLER DOUT MAX4357 A3 SCLK CHIP ADDRESS = 1 DIN CHIP ADDRESS = 2 DOUT DIN MAX4357 A3 SCLK CE A2 CE A2 MODE A1 MODE UPDATE A0 UPDATE MAX4357 CHIP ADDRESS = 0 DOUT MAX4357 A3 SCLK CE A2 A1 MODE A1 A0 UPDATE A0 VDD NEXT DEVICE VDD VIRTUAL SERIAL BUS (MODE 0: INDIVIDUAL OUTPUT ADDRESS MODE) Figure 9. Matrix Mode Programming programmed in series times 112 bits per crosspoint device. This programming method is most often used at start-up to initially configure the switching matrix. Operating at +5V Single-Supply with AV = +1V/V or +2V/V The MAX4357 guarantees operation with a single +5V supply and a gain of +1V/V for standard video-input signals (1VP-P). To implement a complete video matrix switching system capable of gain = +2V/V while operating with a +5V single supply, combine the MAX4357 crosspoint switch with Maxim’s low-cost, high-performance video amplifiers optimized for single +5V supply operation (Figure 10). The MAX4450 single and MAX4451 dual op amps are unity-gain-stable devices that combine high-speed performance with rail-to-rail outputs. The common-mode input voltage range extends beyond the negative power-supply rail (ground in single-supply applications). The MAX4450 is available in the ultra-small 5-pin SC70 package, while the MAX4451 is available in a space-saving 8-pin SOT23 package. The MAX4383 is a quad op amp available in a 14-pin TSSOP package. The MAX4380/MAX4381/ MAX4382 and MAX4384 offer individual high-impedance output disable making these amplifiers suitable for wired-OR connections. ______________________________________________________________________________________ 39 MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers +5V +5V VCC OUT0 1Vp-p Z0 = 75 2Vp-p U2 IN0 OUT1 75 IN1 MONITOR 0 220 F 75 OUT15 500 IN31 500 MAX4357 AGND U2 = MAX4450 OR 1/4 MAX4383 VEE Figure 10. Typical Single +5V Supply Application Package Information Chip Information PROCESS: BiCMOS 40 For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 128 TQFP C128-1 21-0086 ______________________________________________________________________________________ 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers 103 AGND 104 AGND 105 IN0 106 AGND 107 IN1 109 IN2 108 AGND 110 AGND 111 IN3 112 AGND 113 IN4 114 AGND 115 IN5 116 AGND 117 IN6 118 AGND 119 IN7 120 AGND 121 IN8 122 AGND 123 IN9 124 AGND 125 IN10 126 AGND 127 IN11 128 AGND TOP VIEW VEE 1 102 AGND AGND 2 101 N.C. IN12 3 100 AGND AGND 4 99 VCC IN13 5 98 OUT0 AGND 6 97 VEE IN14 7 96 OUT1 AGND 8 95 VCC IN15 9 94 OUT2 AGND 10 93 VEE IN16 11 92 OUT3 AGND 12 91 VCC IN17 13 90 OUT4 89 VEE AGND 14 IN18 15 88 OUT5 AGND 16 87 VCC IN19 17 86 OUT6 AGND 18 85 VEE MAX4357 IN20 19 84 OUT7 AGND 20 83 VCC IN21 21 82 OUT8 AGND 22 81 VEE IN22 23 80 OUT9 AGND 24 79 VCC IN23 25 78 OUT10 AGND 26 77 VEE IN24 27 76 OUT11 AGND 28 75 VCC IN25 29 74 OUT12 73 VEE AGND 30 IN26 31 72 OUT13 AGND 32 71 VCC IN27 33 70 OUT14 AGND 34 69 VEE VCC 35 68 OUT15 AGND 36 67 VCC 55 56 57 58 59 60 61 62 63 64 RESET UPDATE DIN N.C. N.C. N.C. N.C. N.C. N.C. VDD 50 A0 54 49 A1 MODE 48 A2 53 47 A3 CE 46 AOUT 52 45 DGND SLCK 44 AGND 51 43 IN31 DOUT 42 AGND AGND 41 65 IN30 38 40 AGND AGND 39 66 IN29 37 AGND IN28 TQFP ______________________________________________________________________________________ 41 MAX4357 Pin Configuration MAX4357 32 x 16 Nonblocking Video Crosspoint Switch with I/O Buffers Revision History REVISION NUMBER REVISION DATE 0 10/01 Initial release — 1 5/09 Corrected CE waveform in Figure 1 13 DESCRIPTION PAGES CHANGED Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 42 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.