19-2751; Rev 0; 1/03
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
The MAX4821 features a 4-bit (A0, A1, A2, LVL) parallel-input interface. The first three bits (A0, A1, A2) determine the output address, and the fourth bit (LVL)
determines whether the selected output is switched on
or off. Data is latched to the outputs when CS transitions from low to high.
Both devices feature separate set and reset functions
that allow the user to turn on or turn off all outputs simultaneously with a single control line. Built-in hysteresis
(Schmidt trigger) on all digital inputs allows this device
to be used with slow rising and falling signals, such as
those from optocouplers or RC power-up initialization
circuits. The MAX4820/MAX4821 are available in 20-pin
TSSOP and space-saving 20-pin thin QFN packages.
Applications
Central Office
Features
♦ 8 Independent Output Channels
♦ Built-In Inductive Kickback Protection
♦ Drive +3V and +5V Relays
♦ Guaranteed 70mA (min) Coil Drive Current
♦ SET Function to Turn On All Outputs
Simultaneously
♦ RESET Function to Turn Off All Outputs
Simultaneously
♦ SPI-/QSPI-/MICROWIRE-Compatible Serial
Interface (MAX4820)
♦ Serial Digital Output for Daisy Chaining
(MAX4820)
♦ Parallel Interface (MAX4821)
♦ Low 50µA (max) Quiescent Supply Current
♦ Space-Saving 20-Pin Thin QFN Package
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX4820ETP*
-40°C to +85°C
20 Thin QFN-EP
MAX4820EUP*
-40°C to +85°C
20 TSSOP
MAX4821ETP*
-40°C to +85°C
20 Thin QFN-EP
MAX4821EUP*
-40°C to +85°C
20 TSSOP
*For maximum heat dissipation, packages have an exposed pad
(EP) on the bottom. Solder exposed pad to GND.
Pin Configurations
ATE
DSL, ADSL Line Cards
Pin Configurations continued at end of data sheet.
VCC
OUT1
OUT2
PGND
19
18
17
16
E1/T1 Redundancy
SET
TOP VIEW
20
Industrial Equipment
RESET
1
15
OUT3
CS
2
14
OUT4
13
COM
DIN
3
Typical Application Circuits and Functional Diagrams
SCLK
4
12
OUT5
appear at end of data sheet.
DOUT
5
11
OUT6
MICROWIRE is a trademark of National Semiconductor Corp.
7
8
9
10
GND
OUT7
PGND
SPI and QSPI are trademarks of Motorola, Inc.
OUT8
N.C.
6
MAX4820
THIN QFN
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4820/MAX4821
General Description
The MAX4820/MAX4821 8-channel relay drivers offer
built-in kickback protection and drive +3.3V/+5V nonlatching or dual-coil-latching relays. These devices are
especially useful when driving +3V relays. Each independent open-drain output features a 2Ω on-resistance
and is guaranteed to sink 70mA (min) of load current.
Both devices consume less than 50µA (max) quiescent
current and have 1µA output off-leakage current.
The MAX4820 features an SPI™-/QSPI™-/MICROWIRE™compatible serial interface. Input data is shifted into an 8bit shift register and latched to the outputs when CS
transitions from low to high. Each data bit in the shift register corresponds to a specific output, allowing independent control of all outputs.
MAX4820/MAX4821
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
VCC, COM..............................................................-0.3V to +6.0V
OUT_........................................................-0.3V to (VCOM + 0.3V)
CS, SCLK, DIN, SET, RESET, A0, A1, A2, LVL......-0.3V to +6.0V
DOUT..........................................................-0.3V to (VCC + 0.3V)
Continuous OUT_ Current (all outputs turned on) ............150mA
Continuous OUT_ Current (single output turned on) ........300mA
Continuous Power Dissipation (TA = +70°C)
20-Lead Thin QFN
(derate 16.9mW/°C above +70°C) .................................1350mW
θJA .........................................................................59.3°C/W
20-Pin TSSOP
(derate 21.7mW/°C above +70°C) .................................1739mW
θJA ............................................................................46°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Soldering Temperature (10s) ...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3V to +5.5V, VCOM = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Operating Voltage
Quiescent Current
SYMBOL
CONDITIONS
VCC
IQ
MIN
TYP
2.3
IOUT_ = 0,
logic inputs = 0 or VCC
MAX
UNITS
5.5
V
VCC = 3.6V
15
50
VCC = 5.5V
20
70
Thermal Shutdown
160
Power-On Reset
0.8
Power-On Reset Hysteresis
1.5
µA
°C
2.2
140
V
mV
DIGITAL INPUTS (SCLK, DIN, CS, LVL, A0, A1, A2, RESET, SET)
Input Logic High Voltage
VIH
Input Logic Low Voltage
VIL
Input Logic Hysteresis
VHYST
Input Leakage Currents
ILEAK
CIN Input Capacitance
CIN
VCC = 3.3V
2.0
VCC = 5V
2.4
V
VCC = 3.3V
0.6
VCC = 5V
0.8
150
Input voltages = 0 or 5.5V
-1.0
0.01
V
mV
+1.0
5
µA
pF
DIGITAL OUTPUT (DOUT)
DOUT Low Voltage
VOL
ISINK = 6mA
DOUT High Voltage
VOH
ISOURCE = 0.5mA
0.4
VCC - 0.5
V
V
RELAY OUTPUT DRIVERS (OUT1–OUT8)
OUT_ Drive Current
OUT_ On-Resistance
RON
VCC = 2.7V
70
VCC = 4.5V
70
VCC = 2.7V
OUT_ Voltage
VOUT_
VCC = 3.0V, IOUT_ = 70mA
IOUT Off-Leakage Current
ILEAK
VOUT_ = VCC, all outputs off
Kickback Diode Forward Voltage
2
VFORW
mA
2
-1
IOUT_ = 150mA (Note 2)
_______________________________________________________________________________________
6
Ω
0.4
V
+1
µA
1.5
V
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
(VCC = +3V to +5.5V, VCOM = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING (MAX4821)
Turn-On Time (OUT_)
tON
From rising edge of CS, RL = 50Ω,
CL = 50pF
1.0
µs
Turn-Off Time (OUT_)
tOFF
From rising edge of CS, RL = 50Ω,
CL = 50pF
1.0
µs
2.1
MHz
SCLK Frequency
fSCLK
0
tCH + tCL
480
ns
CS Fall to SCLK Rise Setup
tCSS
240
ns
CS Rise to SCLK Hold
tCSH
240
ns
SCLK High Time
tCH
190
ns
SCLK Low Time
tCL
190
ns
Data Setup Time
tDS
100
ns
Data Hold Time
tDH
0
ns
Cycle Time
SCLK Fall to DOUT Valid
tDO
50% of SCLK to 10% of DOUT,
CL = 50pF
Rise Time (DIN, SCLK, CS, SET,
RESET)
tSCR
Fall Time (DIN, SCLK, CS,
RESET, SET)
tSCF
RESET Min Pulse Width
tRW
70
ns
SET Min Pulse Width
tSW
70
ns
85
120
ns
20% of VCC to 70% of VCC, CL = 50pF
2
µs
20% of VCC to 70% of VCC, CL = 50pF
2
µs
PARALLEL TIMING (MAX4820)
Turn-On Time
tON
From rising edge of CS, RL = 50Ω,
CL = 50pF
1
µs
Turn-Off Time
tOFF
From rising edge of CS, RL = 50Ω,
CL = 50pF
1
µs
LVL Setup Time
tLS
100
ns
LVL Hold Time
tLH
0
ns
Address to CS Setup Time
tAH
100
ns
Address to CS Hold Time
tAS
0
ns
Rise Time (A2, A1, A0, LVL)
tSCR
20% of VCC to 70% of VCC, CL = 50pF
2
Fall Time (A2, A1, A0, LVL)
tSCF
20% of VCC to 70% of VCC, CL = 50pF
RESET Pulse Width
tRW
70
ns
SET Pulse Width
tSW
70
ns
2
µs
µs
Note 1: Specifications at -40°C are guaranteed by design and not production tested.
Note 2: After relay turn-off, inductive kickback may momentarily cause the voltage at OUT_ to exceed VCOM. This is considered part
of normal operation and will not damage the device.
_______________________________________________________________________________________
3
MAX4820/MAX4821
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VCOM = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
20
SUPPLY CURRENT (µA)
20
15
10
VCC = 5.5V
VCC = 5V
15
10
VCC = 3.3V
VCC = 2.3V
5
5
0
0
1000
ALL LOGIC INPUTS
CONNECTED
900
800
SUPPLY CURRENT (µA)
ALL LOGIC INPUTS = 0
MAX4820 toc02
25
MAX4820 toc01
25
SUPPLY CURRENT (µA)
SUPPLY CURRENT
vs. INPUT LOGIC VOLTAGE
SUPPLY CURRENT
vs. TEMPERATURE
MAX4820 toc03
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
700
600
VCC = 5V
500
400
VCC = 3.3V
300
200
100
3.1
3.5
3.9
4.3
4.7
5.1
5.5
-15
10
35
60
5
4
ON-RESISTANCE
vs. TEMPERATURE
POWER-ON RESET VOLTAGE
vs. TEMPERATURE
IOUT_SINK = 70mA
VCC = 3.3V
VCC = 2.3V
2.5
RON (Ω)
1.5
1.5
1.0
1.0
0.5
0.5
VCC = 5V
VCC = 5.5V
0
2.00
1.75
3.5
3.9
4.3
4.7
5.1
5.5
1.50
1.25
1.00
0.75
0.50
0.25
0
0
3.1
MAX4820 toc06
MAX4820 toc04
3.0
2.0
-40
-15
10
35
60
-15
-40
85
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT OFF-LEAKAGE CURRENT
vs. SUPPLY VOLTAGE
OUTPUT OFF-LEAKAGE CURRENT
vs. TEMPERATURE
OUT_ TURN-ON/TURN-OFF DELAY TIMES
vs. SUPPLY VOLTAGE
0.7
0.6
0.5
0.4
0.3
0.2
VCC = 5.5V
1.50
1.25
1.00
VCC = 5V
0.75
VCC = 2.3V
0.50
0
VCC = 3.3V
0
2.7
3.1
3.5
3.9
4.3
SUPPLY VOLTAGE (V)
4.7
5.1
5.5
60
50
tOFF
40
30
0.25
0.1
RL = 50Ω
CL = 50pF
70
tON/tOFF DELAY TIME (ns)
1.75
OUTPUT OFF-LEAKAGE (nA)
0.8
80
MAX4820 toc08
2.00
MAX4820 toc07
0.9
-40
-15
10
35
TEMPERATURE (°C)
MAX4820 toc09
SUPPLY VOLTAGE (V)
1.0
2.3
3
ON-RESISTANCE
vs. SUPPLY VOLTAGE
2.0
2.7
2
INPUT LOGIC VOLTAGE (V)
2.5
2.3
1
TEMPERATURE (°C)
IOUT_SINK = 70mA
4
0
85
SUPPLY VOLTAGE (V)
3.0
RON (Ω)
0
-40
POWER-ON RESET VOLTAGE (V)
2.7
MAX4820 toc05
2.3
OUTPUT OFF-LEAKAGE (nA)
MAX4820/MAX4821
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
tON
20
60
85
2.3
2.7
3.1
3.5
3.9
4.3
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
4.7
5.1
5.5
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
INPUT LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
BACK EMF CLAMPING
WITH STANDARD 3V RELAY
MAX4820 toc11
MAX4820 toc10
2.50
INPUT LOGIC THRESHOLD (V)
2.25
2.00
VCS
5V/div
0
1.75
1.50
1.25
OUT_
1V/div
1.00
0
0.75
OUT_ TURNS OFF
VCC = 3.3V
0.50
2.3
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
200µs/div
SUPPLY VOLTAGE (V)
Pin Description
PIN
MAX4820
MAX4821
THIN
QFN
TSSOP
THIN
QFN
TSSOP
1
3
1
3
NAME
FUNCTION
RESET
Reset Input. Drive RESET low to clear all latches and registers (all outputs
are turned off). RESET overrides all other inputs. If RESET and SET are pulled
low at the same time, then RESET takes precedence.
CS
Chip-Select Input.
MAX4820: Drive CS low to select the device. When CS is low, data at DIN is
clocked into the 8-bit shift register on SCLK’s rising edge. Drive CS from low
to high to latch the data to the registers and activate the appropriate relays.
MAX4821: Drive CS low to select the device and set level on LVL. Drive CS
from low to high to latch the address and level data to the output.
2
4
2
4
3
5
—
—
DIN
Serial Data Input
4
6
—
—
SCLK
Serial Clock Input
5
7
—
—
DOUT
Serial Data Output. DOUT is the output of the 8-bit shift register. This output
can be used to daisy chain multiple MAX4820s. The data at DOUT appears
synchronous to SCLK’s falling edge.
6
8
—
—
N.C.
7
9
7
9
GND
Ground
No Connection
8
10
8
10
OUT8
Open-Drain Output 8. Connect OUT8 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
9
11
9
11
OUT7
Open-Drain Output 7. Connect OUT7 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
10, 16
12, 18
10, 16
12, 18
PGND
Power Ground. PGND is a return for the output sinks. Connect PGND pins
together and to GND.
11
13
11
13
OUT6
Open-Drain Output 6. Connect OUT6 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
_______________________________________________________________________________________
5
MAX4820/MAX4821
Typical Operating Characteristics (continued)
(VCOM = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
MAX4820/MAX4821
Pin Description (continued)
PIN
MAX4820
THIN
QFN
MAX4821
NAME
FUNCTION
TSSOP
THIN
QFN
TSSOP
12
14
12
14
OUT5
Open-Drain Output 5. Connect OUT5 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
13
15
13
15
COM
Common Free-Wheeling Diodes. Connect COM to VCC. COM can also be
connected to a separate supply that is higher than VCC. In that case, bypass
VCC to GND with a 0.1µF capacitor.
14
16
14
16
OUT4
Open-Drain Output 4. Connect OUT4 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
15
17
15
17
OUT3
Open-Drain Output 3. Connect OUT3 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
17
19
17
19
OUT2
Open-Drain Output 2. Connect OUT2 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
18
20
18
20
OUT1
Open-Drain Output 1. Connect OUT1 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
19
1
19
1
VCC
Input Supply Voltage. Bypass VCC to GND with a 0.1µF capacitor.
20
2
20
2
SET
Set Input. Drive SET low to set all latches and registers high (all outputs are
turned on). SET overrides all parallel and serial control inputs. RESET
overrides SET under all conditions.
—
—
3
5
LVL
Level Input. LVL determines whether the selected address is switched on or
off. A logic high on LVL switches on the addressed output. A logic low on
LVL switches off the addressed output.
—
—
4
6
A0
Digital Address “0” Input. (See Table 2 for address mapping.)
—
—
5
7
A1
Digital Address “1” Input. (See Table 2 for address mapping.)
—
—
6
8
A2
Digital Address “2” Input. (See Table 2 for address mapping.)
—
—
—
—
EP
Exposed Pad. Solder exposed pad to GND.
Detailed Description
The MAX4820/MAX4821 8-channel relay drivers offer
built-in kickback protection and drive +3.3V/+5V nonlatching or dual-coil-latching relays. These devices are
especially useful when driving +3V relays. Each independent open-drain output features a 2Ω on-resistance
and is guaranteed to sink 70mA (min) load current. Both
devices consume less than 50µA (max) quiescent current and feature 1µA (min) output off-leakage current.
The MAX4820 features an SPI/QSPI/MICROWIRE-compatible serial interface. Input data is shifted into an 8-bit
shift register and latched to the outputs when CS transitions from low to high. Each data bit in the shift register
corresponds to a specific output, allowing independent
control of all outputs.
6
The MAX4821 features a 4-bit (A0, A1, A2, LVL) parallel
input interface. The three bits (A0, A1, A2) determine
the output address, and LVL determines whether the
selected output is switched on or off. Data is latched to
the outputs when CS transitions from low to high.
Both devices feature separate set and reset functions
that allow the user to turn on or turn off all outputs
simultaneously with a single control line. Built-in hysteresis (Schmidt trigger) on all digital inputs allows this
device to be used with slow rising and falling signals,
such as those from optocouplers or RC power-up initialization circuits. The MAX4820/MAX4821 are available in 20-pin TSSOP and space-saving 20-pin thin
QFN packages.
_______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
MAX4820/MAX4821
CS
tCSW
tCL
tCSS
tCSO
tCSH
tCH
SCLK
tDH
tDS
DIN
D6
D7
D0
D1
tDO
DOUT
tON,
tOFF
OUT_
Figure 1. 3-Wire Serial-Interface Timing Diagram (MAX4820 only)
Table 1. Serial Input Address Map (MAX4820 Only)
DIN
OUT_
D0
D1
D2
D3
D4
D5
D6
D7
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Digital Interface
Serial Interface (MAX4820)
The serial interface consists of an 8-bit shift register
and parallel latch controlled by SCLK and CS. The
input to the shift register is an 8-bit word. Each data bit
controls one of the eight outputs, with the most significant bit (D7) corresponding to OUT8 and the least significant bit (D0) corresponding to OUT1 (see Table 1).
When CS is low (device is selected), data at DIN is
clocked into the shift register synchronously with
SCLK’s rising edge. Driving CS from low to high latches
the data in the shift register to the parallel latch.
DOUT is the output of the shift register. Data appears
on DOUT synchronously with SCLK’s falling edge and
is identical to the data at DIN delayed by eight clock
cycles. When shifting the input data, D7 is the first bit in
and out of the shift register.
While CS is low, the switches always remain in their previous state. Drive CS high after 8 bits of data have been
shifted in to update the output state and inhibit further
data from entering the shift register. When CS is high,
transitions at DIN and SCLK have no effect on the output, and the first input bit (D7) is present at DOUT.
If the number of data bits entered while CS is low is
greater or less than 8, the shift register contains only
the last 8 data bits, regardless of when they were
entered.
The 3-wire serial interface is compatible with SPI, QSPI,
and MICROWIRE standards. The latch that drives the
analog switch is updated on the rising edge of CS,
regardless of SCLK’s state.
Parallel Interface (MAX4821)
The parallel interface consists of three address bits
(A0, A1, A2) and one level selector bit (LVL). The
address bits determine which output is updated, and
the level bit determines whether the addressed output
is switched on (LVL = high) or off (LVL = low). When CS
is high, the address and level bits have no effect on the
state of the outputs. Driving CS from low to high latches
the address and level data to the parallel register and
updates the state of the outputs. Address data entered
after CS is pulled low is not reflected in the state of the
outputs following the next low-to-high transition on CS
(Figure 2).
_______________________________________________________________________________________
7
MAX4820/MAX4821
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Table 2. Parallel Interface Address Map
(MAX4821 Only)
CS
tAS
tAH
A_
tLH
tLS
A2
A1
A0
OUTPUT
Low
Low
Low
OUT1
Low
Low
High
OUT2
Low
High
Low
OUT3
Low
High
High
OUT4
High
Low
Low
OUT5
High
Low
High
OUT6
High
High
Low
OUT7
High
High
High
OUT8
LVL
Applications Information
tON,
tOFF
Daisy Chaining
The MAX4820 features a digital output, DOUT, that provides a simple way to daisy chain multiple devices. This
feature allows the user to drive large banks of relays
using only a single serial interface. To daisy chain multiple devices, connect all CS pins together, and connect
the DOUT of one device to the DIN of another device
(see Figure 3). During operation, a stream of serial data
is shifted through all the MAX4820s in series. When CS
goes high, all outputs update simultaneously.
The MAX4820 can also be used in a slave configuration
that allows the user to address individual devices.
Connect all the DIN pins together, and use the CS input
to address one device at a time. Drive CS low to select
a slave and input the data into the shift register. Drive
CS high to latch the data and turn on the appropriate
outputs. Typically, in this configuration only one slave is
addressed at a time.
VOUT
Figure 2. Parallel Interface Timing Diagram (MAX4821 only)
SET/RESET Functions
The MAX4820/MAX4821 feature set and reset inputs that
allow the user to simultaneously turn all outputs on or off
using a single control line. Drive SET low to set all latches and registers to 1 and turn all outputs on. SET overrides all serial/parallel control inputs. Drive RESET low to
clear all latches and registers and turn all outputs off.
RESET overrides all other inputs, including SET.
VCC
VCC
0.1µF
VCC
DIN
DIN
MAX4820 OUT1
SCLK
SCLK
CS
OUT8
GND
PGND
DOUT
DIN
MAX4820 OUT1
SCLK
SCLK
CS
OUT8
GND
PGND
DOUT
MAX4820 OUT1
SCLK
SCLK
CS
OUT8
GND
CS
Figure 3. Daisy-Chain Configuration
8
0.1µF
VCC
VCC
DOUT
DIN
VCC
0.1µF
_______________________________________________________________________________________
PGND
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
flow back to the supply. Connect the common cathode
(COM) of the internal protection diodes to VCC.
COM also can be connected to a higher voltage than
VCC (+6V max) for faster kickback recovery. In this configuration, bypass COM to PGND with a 0.1µF capacitor.
Relay Manufacturers
COMPANY
PHONE
WEBSITE
Aromat Corp.
310-524-9862 www.aromat.com
CP Clare Corp.
978-524-6700 www.crouzet.com
Coto Techonology
401-943-2686 www.cotorelay.com
Deustch Relays,
Inc.
516-499-6000 www.deutschrelays.com
Fujitsu
Takamisawa
408-745-4900 www.fujitsufta.com
Hella KG Hueck
734-414-0970 www.hella.com
COMPANY
PHONE
WEBSITE
NEC Electronics,
Inc.
800-366-9782 www.nec-global.com
Omron
Electronics, Inc.
847-843-7900 www.oeiweb.omron.com
Rockwell/AllenBradley
414-382-2000 www.ab.com
Siemens
Electromechanical
Component, Inc.
770-371-3000 www.sec.siemens.com
Teledyne Relays
213-777-0077 www.teledynerelays.com
Typical Application Circuits
0.1µF
VCC
VCC
RESET
0.1µF
RELAY
COIL 1
COM
OUT1
VCC
VCC
RESET
RELAY
COIL 1
COM
OUT1
SET
SET
A0
CLK
MAX4820
MAX4821
VCC
VCC
A1
CS
A2
RELAY
COIL 8
DIN
DOUT
OUT8
GND
PGND
RELAY
COIL 8
CS
OUT8
LVL
GND
PGND
_______________________________________________________________________________________
9
MAX4820/MAX4821
Inductive Kickback Protection
The MAX4820/MAX4821 feature built-in inductive kickback protection to reduce the voltage spike on OUT_
generated by a relay’s coil inductance when the output
is suddenly switched off. Internal diodes connected
from each output to COM allow the inductor current to
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
MAX4820/MAX4821
Functional Diagrams
COM
VCC
MAX4820
OUT1
RESET
OUT2
SET
OUT3
OUT4
DIN
DOUT
8-BIT
SHIFT
REGISTER
OUT5
PARALLEL
REGISTER
OUT6
OUT7
OUT8
SCLK
CS
PGND
GND
COM
VCC
MAX4821
OUT1
RESET
OUT2
SET
OUT3
OUT4
LVL
A2
OUT5
PARALLEL
LATCH
OUT6
4-TO-8
DECODER
OUT7
A1
OUT8
A0
CS
GND
10
PGND
______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
SET
VCC
OUT1
OUT2
PGND
20
19
18
17
16
TOP VIEW
RESET
1
15
OUT3
CS
2
14
OUT4
LVL
3
13
COM
A0
4
12
OUT5
A1
5
11
OUT6
7
8
9
10
GND
OUT8
OUT7
PGND
A2
6
MAX4821
THIN QFN
VCC 1
20 OUT1
VCC 1
20 OUT1
SET 2
19 OUT2
SET 2
19 OUT2
RESET 3
18 PGND
RESET 3
18 PGND
CS 4
17 OUT3
CS 4
17 OUT3
16 OUT4
LVL 5
SCLK 6
15 COM
A0 6
15 COM
DOUT 7
14 OUT5
A1 7
14 OUT5
DIN 5
MAX4820
MAX4821
16 OUT4
N.C. 8
13 OUT6
A2 8
13 OUT6
GND 9
12 PGND
GND 9
12 PGND
OUT8 10
11 OUT7
OUT8 10
11 OUT7
TSSOP
TSSOP
Chip Information
TRANSISTOR COUNT: 1301
PROCESS: BiCMOS
______________________________________________________________________________________
11
MAX4820/MAX4821
Pin Configurations (continued)
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
MAX4820/MAX4821
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
12
A
______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
TSSOP, 4.0,EXP PADS.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX4820/MAX4821
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
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