19-3979; Rev 0; 2/06
Overvoltage-Protection Controllers with
Status FLAG
The MAX4838A/MAX4840A/MAX4842A are overvoltageprotection ICs that protect low-voltage systems against
voltages of up to +28V. If the input voltage exceeds the
overvoltage trip level, the MAX4838A/MAX4840A/
MAX4842A turn off the low-cost external n-channel
FET(s) to prevent damage to the protected components.
An internal charge pump eliminates the need for external
capacitors and drives the FET gate for a simple,
robust solution.
The MAX4838A has a 7.4V overvoltage threshold, and
the MAX4840A has a 5.8V overvoltage threshold. The
MAX4842A has a 4.7V overvoltage threshold. The
MAX4838A/MAX4840A have an undervoltage-lockout
(UVLO) threshold of 3.25V, while the MAX4842A has a
UVLO of 2.5V. In addition to the single FET configuration, the devices can be configured with back-to-back
external FETs to prevent currents from being back-driven into the adapter.
On power-up, the device waits for 50ms before driving
GATE high. FLAG is held low for an additional 50ms
after GATE goes high before deasserting. The
MAX4838A/MAX4840A/MAX4842A have an open-drain
FLAG output. The FLAG output asserts immediately to
an overvoltage fault.
Additional features include a ±15kV (HBM) ESD-protected input (when bypassed with a 1µF capacitor) and
a shutdown pin (EN) to turn off the device.
All devices are offered in a small 6-pin SC70 and 6-pin
1.5mm x 1.0mm µDFN packages and are specified
over the -40°C to +85°C extended temperature range.
Features
♦ Overvoltage Protection Up to +28V
♦ Preset 7.4V, 5.8V, or 4.7V Overvoltage Trip Level
♦ Drives Low-Cost nMOS FET
♦ Internal 50ms Startup Delay
♦ Internal Charge Pump
♦ Undervoltage Lockout
♦ ±15kV ESD-Protected Input
♦ Voltage Fault FLAG Indicator
♦ 6-Pin SC70 and µDFN Packages
♦ Lead Free
Ordering Information
PINPACKAGE
PART
TOP
MARK
PKG
CODE
MAX4838AEXT+T
6 SC70
ACY
X6S-1
MAX4838AELT+
6 µDFN
KU
L611-1
MAX4840AEXT+T
6 SC70
ACZ
X6S-1
L611-1
MAX4840AELT+
6 µDFN
KV
MAX4842AEXT+T
6 SC70
ADA
X6S-1
MAX4842AELT+*
6 µDFN
KW
L611-1
Note: All devices specified for the -40°C to +85°C extended
temperature range.
*Future product—contact factory for availability.
+Denotes lead-free package.
Applications
Cell Phones
Typical Operating Circuit
Digital Still Cameras
PDAs and Palmtop Devices
INPUT
+1.2V TO +28V
MP3 Players
OUTPUT
NMOS
1
Selector Guide
PART
OV
UVLO
TRIP
EN
THRESHOLD
LEVEL INPUT
(V)
(V)
FLAG
OUTPUT
3.25
7.4
Yes
Open-Drain
MAX4840A
3.25
5.8
Yes
Open-Drain
MAX4842A
2.50
4.7
Yes
Open-Drain
GATE
4
1µF
VIO
MAX4838A
MAX4840A
MAX4842A
6
EN
2
MAX4838A
IN
GND
FLAG
3
NOTE: EN AND PULLUP
RESISTOR
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4838A/MAX4840A/MAX4842A
General Description
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
ABSOLUTE MAXIMUM RATINGS
IN to GND ..............................................................-0.3V to +30V
GATE to GND ........................................................-0.3V to +12V
EN, FLAG to GND ....................................................-0.3V to +6V
Continuous Power Dissipation (TA = +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C) .............245mW
6-Pin µDFN (derate 2.1mW/°C above +70°C) ............477mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .................................................... +150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +5V (MAX4838A/MAX4840A), VIN = +4V (MAX4842A), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA
= +25°C.) (Note 1)
PARAMETER
Input Voltage Range
Undervoltage-Lockout Threshold
SYMBOL
CONDITIONS
VIN
UVLO
MIN
1.2
OVLO
IIN
UVLO Supply Current
IUVLO
GATE Voltage
VGATE
GATE Pulldown Current
FLAG Output Low Voltage
IPD
VOL
FLAG Output High Leakage
IOH
EN Input High Voltage
VIH
EN Input Low Voltage
VIL
EN Input Leakage
2
UNITS
28.0
V
3.0
3.25
3.5
MAX4842A
2.3
2.5
2.7
VIN rising
MAX4838A
7.0
7.4
7.8
VIN rising
VIN rising
MAX4840A
MAX4842A
5.5
4.4
5.8
4.7
6.1
5.0
VIN falling
50
Overvoltage Trip Level Hysteresis
IN Supply Current
MAX
MAX4838A/MAX4840A
Undervoltage-Lockout Hysteresis
Overvoltage Trip Level
TYP
ILKG
mV
MAX4838A
MAX4840A
MAX4842A
100
80
50
No load, EN = GND or 5V,
VIN = 5V (MAX4838A/MAX4840A)
80
200
No load, EN = GND or 4.0V,
VIN = 4V (MAX4842A)
75
160
µA
30
VIN = 2.2V (MAX4842A)
22
MAX4838A/MAX4840A
MAX4842A
9
10
7.5
8.0
VIN > VOVLO, VGATE = 5.5V
FLAG asserted
V
mV
VIN = 2.9V (MAX4838A/MAX4840A)
IGATE sourcing 1µA
V
27
µA
V
mA
1.2V ≤ VIN < UVLO,
ISINK = 50µA
0.4
VIN ≥ OVLO, ISINK =
1mA
0.4
V
VFLAG = 5.5V, FLAG deasserted
1
µA
0.4
V
1
µA
1.5
EN = GND or 5.5V
_______________________________________________________________________________________
V
Overvoltage-Protection Controllers with
Status FLAG
(VIN = +5V (MAX4838A/MAX4840A), VIN = +4V (MAX4842A), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING
Startup Delay
tSTART
VIN > VUVLO, VGATE > 0.3V, Figure 1
20
50
80
ms
FLAG Blanking Time
tBLANK
VGATE > 0.3V, VFLAG > 2.4V, Figure 1
20
50
80
ms
GATE Turn-On Time
tGON
VGATE = 0.3V to 8V (MAX4838A/MAX4840A),
VGATE = 0.3V to 6V (MAX4842A),
CGATE = 1500pF, Figure 1
10
tGOFF
VIN increasing from 5V to 8V at 3V/µs
(MAX4838A/MAX4840A), VIN increasing
from 4V to 6V at 3V/µs (MAX4842A),
VGATE = 0.3V, CGATE = 1500pF, Figure 2
6
tFLAG
VIN increasing from 5V to 8V at 3V/µs
(MAX4838A/MAX4840A), VIN increasing
from 4V to 6V at 3V/µs (MAX4842A),
VFLAG = 0.4V, Figure 2
5.8
µs
Initial Overvoltage Fault Delay
tOVP
VIN increasing from 0 to 8V
(MAX4838A/MAX4840A), VIN increasing
from 0V to 6V (MAX4842A), IGATE = 80% of
IPD, Figure 3
1.5
µs
Disable Time
tDIS
VEN = 2.4V, VGATE = 0.3V, Figure 4
2
µs
GATE Turn-Off Time
FLAG Assertion Delay
ms
20
µs
Note 1: All parts are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and
correlation.
Typical Operating Characteristics
(VIN = +5V (MAX4838A/MAX4840A), VIN = +4V (MAX4842A); Si9936DY external MOSFET in back-to-back configuration; TA = +25°C,
unless otherwise noted.)
REVERSE CURRENT
vs. OUTPUT VOLTAGE
300
200
9
100
GATE VOLTAGE (V)
400
12
MAX4838A toc02
SINGLE MOSFET
REVERSE CURRENT (µA)
500
SUPPLY CURRENT (µA)
1000
MAX4838A toc01
600
MAX4838A/MAX4840A
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838A toc03
SUPPLY CURRENT vs. INPUT VOLTAGE
10
1
6
MAX4840A
MAX4838A
3
BACK-TO-BACK MOSFETS
100
0
0
0.1
0
5
10
15
20
INPUT VOLTAGE (V)
25
30
3.5
4.0
4.5
5.0
OUTPUT VOLTAGE (V)
5.5
3
4
5
6
7
8
INPUT VOLTAGE (V)
_______________________________________________________________________________________
3
MAX4838A/MAX4840A/MAX4842A
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics (continued)
(VIN = +5V (MAX4838A/MAX4840A), VIN = +4V (MAX4842A); Si9936DY external MOSFET in back-to-back configuration; TA = +25°C,
unless otherwise noted.)
MAX4842A
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838A/MAX4840A
POWER-UP RESPONSE
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838A toc06
MAX4838A toc05
11.0
MAX4838A toc04
12
IGATE = 0
9
10.5
MAX4842A
GATE VOLTAGE (V)
GATE VOLTAGE (V)
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
6
3
5V
0V
IGATE = 4µA
10V
IGATE = 8µA
10.0
OUT
5V
0V
5V
ROUT = ∞
COUT = 0
FLAG
9.0
0
1
2
3
4
5
6
7
8
5.0
INPUT VOLTAGE (V)
5.1
5.2
5.3
5.4
5.5
20ms/div
INPUT VOLTAGE (V)
MAX4838A/MAX4840A
POWER-UP RESPONSE
MAX4842A
POWER-UP RESPONSE
MAX4842A
POWER-UP RESPONSE
MAX4838A toc07
MAX4838A toc09
MAX4838A toc08
5V
IN
0V
4V
IN
GATE
0V
IIN
0A
GATE
0V
4V
OUT
0V
4V
0V
ROUT = 5Ω
IN
GATE
0V
1A
4V
0V
8V
0V
8V
10V
5V
GATE
0V
9.5
0
IN
ROUT = ∞
COUT = 0
FLAG
FLAG
800mA
IIN
0A
4V
0V
ROUT = 5Ω
FLAG
0V
20ms/div
OVERVOLTAGE RESPONSE
MAX4838A toc12
MAX4838A toc11
IN
5V
8V
10V
0V
GATE
0V
POWER-DOWN RESPONSE
POWER-UP OVERVOLTAGE RESPONSE
MAX4838A toc10
8V
20ms/div
20ms/div
IN
RLOAD = 50Ω
RFLAG = 100kΩ TO +5V
5V
10V
5V
GATE
0V
40mA
GATE
0V
5V
50mA
IGATE
IGATE
0A
5V
0V
FLAG
400ns/div
4
0A
OUT
0V
5V
CGATE = 1500pF
IN
0V
GATE PULLED UP
TO IN WITH 100Ω
FLAG
0V
5V
FLAG
0V
1µs/div
10ms/div
_______________________________________________________________________________________
Overvoltage-Protection Controllers with
Status FLAG
PIN
NAME
FUNCTION
1
IN
Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN to GND with
a 1µF capacitor or larger.
2
GND
Ground
3
FLAG
Fault Indication Output, Open-Drain, Active Low. FLAG is asserted low during undervoltagelockout and overvoltage-lockout conditions. FLAG is deasserted during normal operation.
4
GATE
Gate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN < VOVLO,
GATE is driven high to turn on the external n-channel MOSFET(s).
5
N.C.
No Connection. Not internally connected for µDFN package. Connected to ground for SC70
6-pin package; connect to ground or leave unconnected.
6
EN
Device Enable Input, Active Low. Drive EN low or connect to ground to allow normal device
operation. Drive EN high to turn off the external MOSFET.
Timing Diagrams
5V (4V)
VIN
VOVLO
5V (4V)
tGON
0V
8V (6V)
VIN
VUVLO
tFLAG
tGOFF
8V (6V)
tSTART
VGATE
VGATE
0.3V
0.3V
tBLANK
2.4V
VFLAG
VFLAG
0.4V
( ) MAX4842A
( ) MAX4842A
Figure 1. Startup Timing Diagram
VIN
Figure 2. Shutdown Timing Diagram
8V (6V)
VOVLO
VEN
1.5V
0V
tOVP
tDIS
80%
VGATE
IGATE
0.3V
( ) MAX4842A
Figure 3. Power-Up Overvoltage Timing Diagram
Figure 4. Disable Timing Diagram
_______________________________________________________________________________________
5
MAX4838A/MAX4840A/MAX4842A
Pin Description
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
IN
5.5V
REGULATOR
2x CHARGE
PUMP
GATE DRIVER
GATE
GND
UVLO AND
OVLO
DETECTOR
EN
CONTROL
LOGIC AND TIMER
FLAG
MAX4838A
MAX4840A
MAX4842A
Figure 5. Functional Diagram
Detailed Description
The MAX4838A/MAX4840A/MAX4842A provide up to
+28V overvoltage protection for low-voltage systems.
When the input voltage exceeds the overvoltage trip level,
the MAX4838A/MAX4840A/MAX4842A turn off a low-cost
external n-channel FET(s) to prevent damage to the protected components. An internal charge pump (Figure 5)
drives the FET gate for a simple, robust solution.
Undervoltage Lockout (UVLO)
The MAX4838A/MAX4840A have a fixed 3.25V typical
undervoltage-lockout level (UVLO) while the MAX4842A
has a 2.5V typical UVLO. When VIN is less than the
UVLO, the GATE driver is held low and FLAG is asserted.
Overvoltage Lockout (OVLO)
The MAX4838A has a 7.4V typical overvoltage threshold
(OVLO), and the MAX4840A has a 5.8V typical overvoltage threshold. The MAX4842A has a 4.7V typical overvoltage threshold. When VIN is greater than OVLO, the
GATE driver is held low and FLAG is asserted.
FLAG Output
The FLAG output is used to signal the host system
there is a fault with the input voltage. FLAG asserts
immediately to an overvoltage fault. FLAG is held low
for 50ms after GATE turns on before deasserting.
All devices have an open-drain FLAG output. Connect
a pullup resistor from FLAG to the logic I/O voltage of
the host system.
EN Enable Input
EN is an active-low enable input. Drive EN low or connect to ground to enable normal device operation.
Drive EN high to force the external MOSFET(s) off. EN
does not override an OVLO or UVLO fault.
6
GATE Driver
An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOSFETS.
The charge pump operates from the internal 5.5V
regulator.
The actual GATE output voltage tracks approximately
two times VIN until VIN exceeds 5.5V or the OVLO trip
level is exceeded, whichever comes first. The
MAX4838A has a 7.4V typical OVLO; therefore GATE
remains relatively constant at approximately 10.5V for
5.5V < VIN < 7.4V. The MAX4840A has a 5.8V typical
OVLO, but this can be as low as 5.5V. The MAX4840A
in practice may never actually achieve the full 10.5V
GATE output. The MAX4842A has a 4.7V (typ) OVLO,
and the GATE output voltage is 2x the input voltage.
The GATE output voltage as a function of input voltage
is shown in the Typical Operating Characteristics.
Device Operation
The MAX4838A/MAX4840A/MAX4842A have an onboard state machine to control device operation. A
flowchart is shown in Figure 6. On initial power-up, if
VIN < UVLO or if VIN > OVLO, GATE is held at 0V, and
FLAG is low.
If UVLO < VIN < OVLO and EN is low, the device enters
startup after a 50ms internal delay. The internal charge
pump is enabled, and GATE begins to be driven above
VIN by the internal charge pump. FLAG is held low during startup until the FLAG blanking period expires, typically 50ms after the GATE starts going high. At this
point the device is in its on state.
At any time if VIN drops below UVLO, FLAG is driven
low and GATE is driven to ground.
_______________________________________________________________________________________
Overvoltage-Protection Controllers with
Status FLAG
IN
GATE
4
1µF
TIMER STARTS
COUNTING
VIN < UVLO
6
t = 50ms
EN
2
OVLO CHECK
GATE = 0
FLAG = LOW
VIN < OVLO
STARTUP
GATE DRIVEN HIGH
FLAG = LOW
VIO
MAX4838A
MAX4840A
MAX4842A
VIN > OVLO
t = 50ms
ON
GATE HIGH
FLAG = HIGH
Figure 6. State Diagram
Applications Information
MOSFET Configuration
The MAX4838A/MAX4840A/MAX4842A can be used
with either a single MOSFET configuration as shown in
the Typical Operating Circuit, or can be configured with
a back-to-back MOSFET as shown in Figure 7. The
back-to-back configuration has almost zero reverse
current when the input supply is below the output.
If reverse current leakage is not a concern, a single
MOSFET can be used. This approach has half the loss
of the back-to-back configuration when used with similar MOSFET types, and is a lower cost solution. Note
that if the input is actually pulled low, the output is
pulled low as well due to the parasitic body diode in the
MOSFET. If this is a concern, then the back-to-back
configuration should be used.
MOSFET Selection
The MAX4838A/MAX4840A/MAX4842A are designed for
use with either a single n-channel MOSFET or dual backto-back n-channel MOSFETs. In most situations,
MOSFETs with RDS(ON) specified for a VGS of 4.5V work
well. If the input supply is near the UVLO maximum of
FLAG
GND
3
NOTE: EN AND PULLUP
RESISTOR ON MAX4838A/
MAX4840A/MAX4842A ONLY.
Figure 7. Back-to-Back External MOSFET Configuration
3.5V, consider using a MOSFET specified for a lower
VGS voltage. Also, the VDS should be 30V for the MOSFET to withstand the full 28V IN range of all devices.
Table 1 shows a selection of MOSFETs appropriate for
use with the MAX4838A/MAX4840A/MAX4842A.
IN Bypass Considerations
For most applications, bypass IN to GND with a 1µF
ceramic capacitor. If the power source has significant
inductance due to long lead length, take care to prevent overshoots due to the LC tank circuit and provide
protection if necessary to prevent exceeding the 30V
absolute maximum rating on IN.
The MAX4838A/MAX4840A/MAX4842A provide protection against voltage faults up to 28V, but this does not
include negative voltages. If negative voltages are a concern, connect a Schottky diode from IN to GND to clamp
negative input voltages.
ESD Test Conditions
ESD performance depends on a number of conditions.
The MAX4838A/MAX4840A/MAX4842A are specified
for ±15kV typical ESD resistance on IN when IN is
bypassed to ground with a 1µF ceramic capacitor.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Human Body Model
Figure 8 shows the Human Body Model, and Figure 9
shows the current waveform it generates when discharged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a
1.5kΩ resistor.
_______________________________________________________________________________________
7
MAX4838A/MAX4840A/MAX4842A
1
VIN > UVLO
OUTPUT
NMOS
INPUT
0 TO 28V
STANDBY
GATE = 0
FLAG = LOW
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
Table 1. MOSFET Suggestions
CONFIGURATION/
PACKAGE
VDS MAX (V)
RON AT 4.5V
(mΩ)
Si5902DC
Dual/1206-8
30
143
Si1426DH
Single/SC70-6
30
115
PART
FDC6305N
Dual/SSOT-6
20
80
FDC6561AN
Dual/ SSOT-6
30
145
FDG315N
Single/SC70-6
30
160
IEC 61000-4-2
Since January 1996, all equipment manufactured and/or
sold in the European community has been required to
meet the stringent IEC 61000-4-2 specification. The IEC
61000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically
refer to integrated circuits. The MAX4838A/MAX4840A/
MAX4842A help users design equipment that meets
Level 3 of IEC 61000-4-2, without additional ESD-protection components.
MANUFACTURER
Vishay Silconix
www.vishay.com
402-563-6866
Fairchild Semiconductor
www.fairchildsemi.com
207-775-8100
the ESD-withstand voltage measured to this standard is
generally lower than that measured using the Human
Body Model. Figure 11 shows the current waveform for
the ±8kV IEC 61000-4-2 Level 4 ESD Contact
Discharge test. The Air-Gap test involves approaching
the device with a charger probe. The Contact
Discharge method connects the probe to the device
before the probe is energized.
The main difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2. Because series resistance is
lower in the IEC 61000-4-2 ESD test model (Figure 10),
RC
1MΩ
CHARGE-CURRENTLIMIT RESISTOR
RD
1.5kΩ
IP 100%
90%
DISCHARGE
RESISTANCE
Ir
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
AMPERES
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
36.8%
10%
0
0
Figure 8. Human Body ESD Test Model
8
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 9. Human Body Model Current Waveform
_______________________________________________________________________________________
Overvoltage-Protection Controllers with
Status FLAG
RD
330Ω
RC
50Ω to 100Ω
Cs
150pF
I PEAK
DISCHARGE
RESISTANCE
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
90%
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
10%
t r = 0.7ns to 1ns
t
30ns
60ns
Figure 10. IEC 61000-4-2 ESD Test Model
Figure 11. IEC 61000-4-2 ESD Generator Current
Chip Information
Pin Configurations
PROCESS: BiCMOS
TOP VIEW
+
IN 1
MAX4838A
MAX4840A
MAX4842A
GND 2
FLAG 3
6
EN
5
N.C.
4
GATE
SC70
TOP VIEW
+
IN 1
GND 2
6
EN
MAX4838A
MAX4840A 5 N.C.
MAX4842A
FLAG 3
4
GATE
µDFN
_______________________________________________________________________________________
9
MAX4838A/MAX4840A/MAX4842A
I
100%
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
6L UDFN.EPS
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
Translation Table for Calendar Year Code
TABLE1
Calendar Year
Legend:
2005
2006
Marked with bar
2007
2008
2009
2010
2011
2012
2013
42-47
48-51
52-05
2014
Blank space - no bar required
Translation Table for Payweek Binary Coding
TABLE2
Payweek
Legend:
06-11
12-17
Marked with bar
18-23
24-29
30-35
36-41
Blank space - no bar required
TITLE:
PACKAGE OUTLINE, 6L uDFN, 1.5x1.0x0.8mm
APPROVAL
-DRAWING NOT TO SCALE-
10
DOCUMENT CONTROL NO.
21-0147
REV.
D
2
2
______________________________________________________________________________________
Overvoltage-Protection Controllers with
Status FLAG
SC70, 6L.EPS
PACKAGE OUTLINE, 6L SC70
21-0077
C
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11
© 2006 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
MAX4838A/MAX4840A/MAX4842A
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
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