19-5126; Rev 0; 1/10
TION KIT
EVALUA BLE
IL
AVA A
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
The MAX4952B dual-channel redriver is designed to
redrive one full lane of SAS or SATA signals up to
6.0Gbps and operates from a single +3.3V supply.
The MAX4952B is designed for commercial SAS or
SAS/SATA applications, such as servers.
The MAX4952B features independent output boost and
enhances signal integrity at the receiver by re-establishing
full output levels. SAS/SATA out-of-band (OOB) signaling
is supported using high-speed amplitude detection on
the inputs and squelch on the corresponding outputs.
Inputs and outputs are all terminated in 50I internally
and exhibit excellent return loss.
The MAX4952B is available in a small, 20-pin, 4.0mm x
4.0mm TQFN package with flow-through traces for ease
of layout. This device is specified over the 0NC to +70NC
operating temperature range.
Applications
Servers
Features
S Single +3.3V Supply Operation
S Low Power-Down Current (350µA typ) for Power-
Sensitive Applications
S Supports SAS I/II/III P 6.0Gbps
S Excellent Return Loss
Exceeds SAS/SATA Return Loss Mask (Better
Than 8dB Up to 3GHz)
S Supports SAS/SATA OOB-Level Signaling
Very Fast Entry and Exit Time of 5ns (Max)
Programmable SAS/SATA Threshold
S Independent Output-Boost Selection
Two Levels: 0dB, 6dB
S On-Chip 50I Input/Output Terminations
S In-Line Signal Traces for Flow-Through Layout
S Space-Saving, 4.0mm x 4.0mm TQFN Package
S ESD Protection on All Pins: ±5.5kV (Human Body
Model)
Ordering Information
Data Storage
PART
TEMP RANGE
PIN-PACKAGE
MAX4952BCTP+
0NC to +70NC
20 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed Pad.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX4952B
General Description
MAX4952B
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
VCC. ......................................................................-0.3V to +4.0V
All Other Pins (Note 1).............................. -0.3V to (VCC + 0.3V)
Short-Circuit Output Current DAP, DAM, HBM, HBP..........90mA
Continuous Power Dissipation (TA = +70NC)
20-Pin TQFN (derate 25.6mW/NC above +70NC)........2051mW
Junction-to-Case Thermal Resistance (BJC) (Note 2)
20-Pin TQFN....................................................................6NC/W
Junction-to-Ambient Thermal Resistance (BJA) (Note 2)
20-Pin TQFN..................................................................39NC/W
Operating Temperature Range.............................. 0NC to +70NC
Junction Temperature......................................................+150NC
Storage Temperature Range............................. -55NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Note 1: All I/O pins are clamped by internal diodes.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, CCL = 10nF coupling capacitor on each output, RL = 50I on each output, TA = 0NC to +70NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC PERFORMANCE
Power-Supply Range
VCC
Power-Down Current
IPWRDN
EN = GND
ICC
EN = VCC
Supply Current
Input Impedance, Differential
Output Impedance, Differential
ZRX-DIFFDC
ZTX-DIFFDC
3.0
BA = BB = VCC
BA = BB = GND
3.6
V
0.35
2
mA
100
130
85
100
mA
DC
85
100
115
I
DC
85
100
115
I
AC PERFORMANCE
Input Return Loss, Differential
(Note 4)
Input Return Loss,
Common Mode (Note 4)
RLRX-DIFF
RLRX-CM
0.1GHz < f P 0.3GHz
-18
0.3GHz < f P 0.6GHz
-14
0.6GHz < f P 1.2GHz
-10
1.2GHz < f P 2.4GHz
-8
2.4GHz < f P 3.0GHz
-8
3.0GHz < f P 6.0GHz
-1
0.1GHz < f P 0.3GHz
-6
0.3GHz < f P 0.6GHz
-5
0.6GHz < f P 1.2GHz
-5
1.2GHz < f P 2.4GHz
-5
2.4GHz < f P 3.0GHz
-5
3.0GHz < f P 6.0GHz
-1
2 _______________________________________________________________________________________
dB
dB
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
(VCC = +3.0V to +3.6V, CCL = 10nF coupling capacitor on each output, RL = 50I on each output, TA = 0NC to +70NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Note 3)
PARAMETER
Output Return Loss, Differential
(Note 4)
Output Return Loss,
Common Mode (Note 4)
SYMBOL
RLTX-DIFF
RLTX-CM
CONDITIONS
MIN
TYP
-14
0.3GHz < f P 0.6GHz
-8
0.6GHz < f P 1.2GHz
-8
1.2GHz < f P 2.4GHz
-8
2.4GHz < f P 3.0GHz
-8
3.0GHz < f P 6.0GHz
-1
0.1GHz < f P 0.3GHz
-8
0.3GHz < f P 0.6GHz
-5
0.6GHz < f P 1.2GHz
-5
1.2GHz < f P 2.4GHz
-5
2.4GHz < f P 3.0GHz
-5
SATA 1.5Gbps, 3Gbps, 6Gbps, M = GND
OOB Squelch Threshold
Differential Output-Voltage
Swing
Propagation Delay
VRX-DFF-PP SAS 1.5Gbps, 3Gbps, M = VCC
SAS 6.0Gbps, M = VCC
VSQ-DIFF
225
1600
275
1600
300
1600
SATA OOB, M = GND
50
150
SAS OOB, M = VCC
120
220
BA = BB = GND
450
650
BA = BB = VCC
900
1300
VTX-DIFF-PP f = 750MHz, 1.5GHz
tPD
Output Rise/Fall Time
tTX-RISEFALL
UNITS
dB
dB
-1
3.0GHz < f P 6.0GHz
Differential Input Signal Range
MAX
0.1GHz < f P 0.3GHz
300
Figure 1 (Notes 4, 5)
40
mVP-P
mVP-P
mVP-P
ps
40
ps
Deterministic Jitter
tTX-DJ-DD
Up to 6.0Gbps (Notes 4, 6)
15
psP-P
Random Jitter
tTX-RJ-DD
Up to 6.0Gbps (Notes 4, 6)
1.4
psRMS
5
ns
OOB Output Startup/Shutdown
Time
tOOB
(Note 7)
3
Differential Offset Delta
DVOOB,DIFF
Difference between OOB and active-mode
output offset
-80
+80
mV
Common-Mode Delta
DVOOB,CM
Difference between OOB and active-mode
output VCM
-50
+50
mV
0.6
V
CONTROL LOGIC
Input Logic-Level Low
VIL
Input Logic-Level High
VIH
Input Logic Hysteresis
VHYST
100
mV
Input Pulldown Resistor
RDOWN
70
kI
±5.5
kV
1.4
V
ESD PROTECTION
All Pins
Note
Note
Note
Note
Note
3:
4:
5:
6:
7:
Human Body Model
This device is 100% production tested at TA = +70°C. Specifications for all temperature limits are guaranteed by design.
Guaranteed by design.
Rise and fall times are measured using 20% and 80% levels.
DJ measured using K28.5 pattern; RJ measured using D10.2 pattern.
Total time for OOB detection circuit to enable/squelch the output.
_______________________________________________________________________________________ 3
MAX4952B
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VCC = +3.3V, M = GND, TA = +25NC; all eye diagrams measured using K28.5 pattern, unless otherwise noted.)
VIN = 225mVP-P, 1.5Gbps, B_ = 0
300
200
200
200
100
100
100
100mV/div
300
0
0
0
-100
-100
-100
-200
-200
-200
-300
-300
-300
-400
-600
-400
-200
0
200
400
600
-300
-200
-100
200ps/div
0
100
200
-400
300
-150
400
400
200
200
200
200mV/div
400
200mV/div
600
0
-200
-200
-400
-400
-400
-600
-600
-600
0
200
400
600
-300
-200
-100
0
100
200
300
-150
VIN = 1600mVP-P, 1.5Gbps, B_ = 0
200
200
100
100
100
100mV/div
200
100mV/div
300
0
-100
-100
-200
-200
-200
-300
-300
-300
-400
-200
0
200ps/div
200
400
600
50
100
150
MAX4952B toc09
0
-100
-400
0
400
300
-400
-50
VIN = 1600mVP-P, 6Gbps, B_ = 0
MAX4952B toc08
400
300
0
150
50ps/div
VIN = 1600mVP-P, 3Gbps, B_ = 0
MAX4952B toc07
-600
-100
100ps/div
400
100
0
-200
200ps/div
50
MAX4952B toc06
600
0
0
VIN = 225mVP-P, 6Gbps, B_ = 1
MAX4952B toc05
600
-200
-50
50ps/div
VIN = 225mVP-P, 3Gbps, B_ = 1
MAX4952B toc04
-400
-100
100ps/div
VIN = 225mVP-P, 1.5Gbps, B_ = 1
-600
MAX4952B toc03
400
300
100mV/div
100mV/div
MAX4952B toc02
400
-400
200mV/div
VIN = 225mVP-P, 6Gbps, B_ = 0
VIN = 225mVP-P, 3Gbps, B_ = 0
MAX4952B toc01
400
100mV/div
MAX4952B
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
-400
-300
-200
-100
0
100ps/div
100
200
300
-150
-100
-50
0
50ps/div
4 _______________________________________________________________________________________
50
100
150
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
VIN = 1600mVP-P, 1.5Gbps, B_ = 1
VIN = 1600mVP-P, 3Gbps, B_ = 1
VIN = 1600mVP-P, 6Gbps, B_ = 1
MAX4952B toc11
MAX4952B toc12
600
400
400
400
200
200
200
0
200mV/div
600
200mV/div
600
0
0
-200
-200
-200
-400
-400
-400
-600
-600
-600
0
200
400
600
-300
-200
200ps/div
-100
0
100
200
300
-100
-50
0
EC TABLE LIMIT
-10
-15
0
50
100
150
50ps/div
DIFFERENTIAL INPUT RETURN LOSS
vs. FREQUENCY
-5
-150
100ps/div
DIFFERENTIAL OUTPUT RETURN LOSS
vs. FREQUENCY
MAX4952B
-20
-25
-30
-35
-40
0
-5
MAX4952B toc14
-200
DIFFERENTIAL OUTPUT RETURN LOSS (dB)
-400
MAX4952B toc13
-600
DIFFERENTIAL INPUT RETURN LOSS (dB)
200mV/div
MAX4952B toc10
EC TABLE LIMIT
-10
MAX4952B
-15
-20
-25
-30
-35
-40
0
2
4
FREQUENCY (GHz)
6
0
2
4
6
FREQUENCY (GHz)
_______________________________________________________________________________________ 5
MAX4952B
Typical Operating Characteristics (continued)
(VCC = +3.3V, M = GND, TA = +25NC; all eye diagrams measured using K28.5 pattern, unless otherwise noted.)
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
DAM
GND
DBM
DBP
TOP VIEW
DAP
MAX4952B
Pin Configuration
15
14
13
12
11
VCC 16
10
VCC
GND 17
9
BA
8
BB
7
EN
6
VCC
MAX4952B
GND 18
M 19
3
4
5
HBM
HBP
2
GND
1
HAM
+
HAP
VCC 20
*EP
TQFN
*CONNECT EXPOSED PAD (EP) TO GND.
Pin Description
PIN
NAME
1
HAP
Noninverting Input from Host Channel A. HAP must be capacitively coupled (see note).
FUNCTION
2
HAM
Inverting Input from Host Channel A. HAM must be capacitively coupled (see note).
3, 13, 17, 18
GND
Ground
4
HBM
Inverting Output to Host Channel B. HBM must be capacitively coupled (see note).
5
HBP
Noninverting Output to Host Channel B. HBP must be capacitively coupled (see note).
6, 10, 16, 20
VCC
Power-Supply Input. Bypass VCC to GND with low-ESR 0.01FF and 4.7FF capacitors in parallel as
close to the device as possible; recommended for each VCC pin.
7
EN
Enable Input. Drive EN low for low-power standby mode. Drive EN high for normal operation. EN is
internally pulled down by a 70kI (typ) resistor.
8
BB
Channel B Boost-Enable Input. Drive BB high to enable channel B +6dB output boost. Drive BB low
for standard SAS/SATA output level. BB is internally pulled down by a 70kI (typ) resistor.
9
BA
Channel A Boost-Enable Input. Drive BA high to enable channel A +6dB output boost. Drive BA low
for standard SAS/SATA output level. BA is internally pulled down by a 70kI (typ) resistor.
11
DBP
Noninverting Input from Device Channel B. DBP must be capacitively coupled (see note).
12
DBM
Inverting Input from Device Channel B. DBM must be capacitively coupled (see note).
14
DAM
Inverting Output to Device Channel A. DAM must be capacitively coupled (see note).
15
DAP
Noninverting Output to Device Channel A. DAP must be capacatively coupled (see note).
19
M
OOB-Mode Logic Input. M is internally pulled down by a 70kI (typ) resistor. Drive M low or leave
unconnected for SATA OOB threshold. Drive M high for SAS OOB threshold.
—
EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane for proper thermal
and electrical operation. Not intended as an electrical connection point.
Note: For proper operation, Maxim recommends the use of low-ESR, X7R, 10nF, 0402-sized capacitors for all redriver inputs and
outputs.
6 _______________________________________________________________________________________
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
MAX4952B
RISE/FALL TIME
COMPLIANCE POINT
eSATA CONNECTOR
2in (5cm) MINIMUM
CONTROLLED
IMPEDANCE
MAX4952B
Figure 1. Circuit for Measuring tR/F for MAX4952B (refer to the SATA specifications for compliance measurement)
Functional Diagram/Truth Table
VCC
VCC
50Ω
VCC
MAX4952B
50Ω
50Ω
50Ω
HAP
DAP
HAM
DAM
VCC
50Ω
VCC
50Ω
50Ω
EN
BA
BB
CHANNEL A
OUTPUT LEVEL
CHANNEL B
OUTPUT LEVEL
0
X
X
Power-Down
Power-Down
1
0
0
No Boost
No Boost
1
0
1
No Boost
Boost
1
1
0
Boost
No Boost
1
1
1
Boost
Boost
X = Don’t care.
M
OOB THRESHOLD
0
SATA
1
SAS
50Ω
HBM
DBM
HBP
DBP
CONTROL LOGIC
GND
EN
M
BA
BB
_______________________________________________________________________________________ 7
MAX4952B
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
+3.3V
4.7μF
10nF (X7R)
Tx
10nF (X7R)
VCC
HAP
0.01μF
DAP
10nF (X7R)
10nF (X7R)
HAM
Rx
DAM
MAX4952B
SAS HOST
CONTROLLER
10nF (X7R)
Rx
SAS DEVICE
CONNECTOR
10nF (X7R)
HBM
DBM
HBP
DBP
10nF (X7R)
10nF (X7R)
EN
M
GPIO
BA
Tx
BB GND
GPIO
Figure 2. Typical Application Circuit
SAS CABLE
BACKPLANE
SAS/SATA HDD
MIDPLANE
8in BOARD
TRACES
MAX4952B
MAIN BOARD
8in BOARD
TRACES
Figure 3. MAX4952B Driving a SAS Cable
8 _______________________________________________________________________________________
SAS
CONTROLLER
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
The MAX4952B dual-channel redriver is designed to
redrive one full lane of SAS/SATA signals up to 6.0Gbps
while operating from a single +3.3V supply.
The MAX4952B features independent output boost and
enhances signal integrity at the receiver by re-establishing full output levels. SAS/SATA OOB signaling is
supported using high-speed amplitude detection on the
inputs and squelch on the corresponding outputs.
Input/Output Terminations
Inputs and outputs are internally 50I terminated to VCC
(see the Functional Diagram/Truth Table) and must be
AC-coupled using low-ESR, X7R, 10nF capacitors to the
SAS/SATA controller IC and SAS/SATA device for proper
operation.
Enable Input (EN)/Power-Down Mode
The MAX4952B features an active-high enable input,
EN, which has an internal pulldown resistor of 70kI
(typ). When EN is driven low or left unconnected, the
MAX4952B enters power-down mode and squelches the
output. Drive EN high for normal operation.
SAS/SATA Mode Input (M)
The MAX4952B supports both SAS and SATA OOB levels.
When in SAS mode, the OOB threshold is 120mVP-P (min),
and when in SATA mode, the OOB threshold is 50mVP-P
(min). Signals below the OOB threshold are squelched
to prevent unwanted noise from being redriven at the
output. Drive M low or leave unconnected to set SATA
OOB levels. Drive M high to set SAS OOB levels. See
the Functional Diagram/Truth Table. M has an internal
pulldown resistor of 70kI (typ).
Output Boost-Selection Inputs (BA, BB)
The MAX4952B has two digital control logic inputs, BA
and BB. BA and BB have internal pulldown resistors of
70kI (typ). BA and BB control the boost level of their
corresponding redrivers (see the Functional Diagram/
Truth Table). Drive BA or BB low or leave unconnected
for standard SAS/SATA output levels. Drive BA or BB
high to boost the output.
Applications Information
Layout
Circuit board layout and design can significantly affect
the performance of the MAX4952B. Use good, high-fre-
quency design techniques, including minimizing ground
inductance and using controlled-impedance transmission lines on data signals. Place low-ESR 0.01FF and
4.7FF power-supply bypass capacitors in parallel as
close to VCC as possible, or, as recommended, on each
VCC pin. Always connect VCC to a power plane. The
MAX4952B requires coupling capacitors for all redriver
inputs and outputs. Maxim recommends high-quality,
low-ESR, X7R, 10nF, 0402-sized capacitors.
Exposed-Pad Package
The exposed-pad, 20-pin TQFN package incorporates
features that provide a very low-thermal resistance
path for heat removal from the IC. The exposed pad on
the MAX4952B must be soldered to the circuit board
ground plane for proper thermal and electrical performance. For more information on exposed-pad packages, refer to Application Note 862: HFAN-08.1: Thermal
Considerations of QFN and Other Exposed-Paddle
Packages.
ESD Protection
As with all Maxim devices, ESD protection structures are
incorporated on all pins to protect against electrostatic
discharges encountered during handling and assembly.
The MAX4952B is protected against ESD up to Q5.5kV
(Human Body Model) without damage. The ESD structures withstand Q5.5kV in all states (normal operation
and powered down). After an ESD event, the MAX4952B
continues to function without latchup.
Human Body Model
The MAX4952B is characterized for Q5.5kV ESD protection using the Human Body Model (MIL-STD-883,
Method 3015). Figure 4 shows the Human Body Model
and Figure 5 shows the current waveform it generates
when discharged into low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of
interest that is then discharged into the device through
a 1.5kI resistor.
Power-Supply Sequencing
Caution: Do not exceed the absolute maximum
ratings because stresses beyond the listed ratings
can cause permanent damage to the device.
Proper power-supply sequencing is recommended for
all devices. Always apply GND then VCC before applying signals, especially if the signal is not current limited.
_______________________________________________________________________________________ 9
MAX4952B
Detailed Description
MAX4952B
Dual 1.5/3.0/6.0Gbps SAS/SATA Redriver
RC
1MΩ
CHARGE-CURRENT
LIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
CS
100pF
RD
1500Ω
IP 100%
90%
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Ir
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
AMPS
DEVICE
UNDER
TEST
Figure 4. Human Body ESD Test Model
36.8%
10%
0
0
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 5. Human Body Current Waveform
Chip Information
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
20 TQFN-EP
T2044+2
21-0139
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
10
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