EVALUATION KIT AVAILABLE
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
●● Industrial
MAX5096AATE+
-40°C to +125°C
16 TQFN-EP*
MAX5096BATE+
-40°C to +125°C
16 TQFN-EP*
MAX5096AAUP+
-40°C to +125°C
20 TSSOP-EP*
MAX5096BAUP+
-40°C to +125°C
20 TSSOP-EP*
MAX5097AATE+
-40°C to +125°C
16 TQFN-EP*
MAX5097BATE+
-40°C to +125°C
16 TQFN-EP*
MAX5097AAUP+
-40°C to +125°C
20 TSSOP-EP*
Pin Configurations
TOP VIEW
+
PGND
Dual Mode is a trademark of Maxim Integrated Products, Inc.
16
15
14
13
TOP VIEW
IN 1
1
12 EN
SGND
2
11 OUT
RESET
3
BP
4
MAX5096
MAX5097
10 ADJ
9
5
6
7
8
TQFN
19-0603; Rev 4; 1/15
PIN-PACKAGE
MAX5097BAUP+
-40°C to +125°C 20 TSSOP-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
LX
Applications
TEMP RANGE
LX
The MAX5096/MAX5097 operate over the -40°C to
+125°C automotive temperature range and are available
in thermally enhanced 20-pin TSSOP or 16-pin TQFN
packages.
PART
COMP
The MAX5096/MAX5097 feature an enable input that
shuts down the device, reducing the current consumption to 6μA (typ). Additional features include a power-onreset output with a capacitor-adjustable timeout period,
programmable soft-start, output tracking, output overload,
short-circuit, and thermal-shutdown protections.
Ordering Information
IN
In LDO mode, the MAX5096/MAX5097 operate from a 4V
to 40V input voltage. The LDO mode operation is intended
for a lower output load current of up to 100mA. The quiescent current at 100μA load in LDO mode is only 41μA (typ).
●● High-Efficiency Switcher Mode (Buck Mode) or LowQuiescent-Current Linear Regulator (LDO Mode)
Operation
●● Wide Operating Input Voltage Range
• +5V to +40V Buck Mode
• +4V to +40V LDO Mode
●● Fixed 3.3V or 5V and Adjustable (1.24V to 11V)
Output Voltage Versions
●● 6μA (typ) Shutdown Current
●● Fixed 135kHz or 330kHz Switching Frequency
●● External Frequency Synchronization
●● Programmable Soft-Start
●● Integrated Microprocessor-Reset (RESET) Circuit
with Programmable Timeout Period
●● Thermal and Short-Circuit Protection
●● -40°C to +125°C Automotive Temperature Range
●● Thermally Enhanced Package Dissipates 2.6W at
TA = +70°C (16-Pin TQFN) and 1.7W at TA = +70°C
(20-Pin TSSOP)
CT
In Buck mode, the MAX5096/MAX5097 operate from a
5V to 40V input voltage range and deliver up to 600mA
of load current with excellent load and line regulation.
The fixed-switching frequency versions of 135kHz and
330kHz are available. The MAX5096/MAX5097 DC-DC
internal oscillator can be synchronized to an external
clock. External compensation and a current-mode control
scheme make it easy to design with.
Features
IN
The MAX5096/MAX5097 easy-to-use, Dual Mode™,
DC-DC converters operate as LDO (low dropout) or
switch-mode buck converters. At a high output load,
the converters operate as high-efficiency pulse-width
modulated (PWM) switch-mode converters and reduce
the power dissipation. The devices switch to a lowquiescent-current (IQ) LDO mode of operation at light
load. During the key-off condition, the system’s microcontroller drives the LDO/BUCK input on the fly and forces
the MAX5096/MAX5097 into LDO mode, thereby reducing the quiescent current significantly.
SS
General Description
SYNC
MAX5096/MAX5097
LDO/BUCK
+
20 LX
IN 2
19 LX
IN 3
PGND 4
SGND 5
18 N.C.
MAX5096
MAX5097
17 EN
16 OUT
RESET 6
15 ADJ
BP 7
14 N.C.
13 LDO/BUCK
N.C. 8
SYNC 9
12 COMP
SS 10
11 CT
TSSOP
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Absolute Maximum Ratings
(All voltages referenced to PGND, unless otherwise noted.)
IN (transient, 1ms)..................................................-0.3V to +45V
SGND....................................................................-0.3V to +0.3V
LX...................................................................-1V to (VIN + 0.3V)
LX Current................................................................................2A
EN...............................................................-0.3V to (VIN + 0.3V)
BP, SYNC, LDO/BUCK, RESET to SGND.............-0.3V to +12V
BP, RESET Output Current.................................................25mA
CT, SS, ADJ, COMP to SGND...................-0.3V to (VBP + 0.3V)
OUT........................................................................ -0.3V to +11V
OUT Short-Circuit Duration........................................Continuous
Continuous Power Dissipation (TA = +70°C)*
16-Pin TQFN (derate 33.3mW/°C above +70°C) ......2666mW
20-Pin TSSOP (derate 21.7mW/°C above +70°C) ....1739mW
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -60°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
*As per JEDEC 51 Standard—Multilayer Board.
Package Thermal Characteristics (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θJA)..........30.0°C/W
Junction-to-Case Thermal Resistance (θJC)...................1.7°C/W
TSSOP
Junction-to-Ambient Thermal Resistance (θJA)..........46.0°C/W
Junction-to-Case Thermal Resistance (θJC)......................2°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VIN = +14V, IOUT = 1mA, CIN = 100μF, COUT = 22μF, L = 22μH, CBP = 1μF, VEN = +2.4V, SGND = PGND = 0V, TA = TJ =
-40°C to +125°C, unless otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SYSTEM INPUT
Input Voltage Range (LDO Mode)
Input Voltage Range
(Buck Mode)
VIN_LDO
LDO/BUCK = high
4
40
V
VIN_BUCK
LDO/BUCK = low
5
40
V
3.9
V
Internal Input Undervoltage
Lockout
VUVLO
VBP rising
Internal Input UndervoltageLockout Hysteresis
VUVLO_HYS
VBP rising
BP (Internal Regulator) Output
Voltage
VIN = +4.5V, IBP = 100μA
IQ
LDO/BUCK = high,
measured at input supply
return, VOUT = 5V,
IOUT = 100μA
TA = -40°C
to +125°C
IQ
LDO/BUCK = high,
measured at input supply
return, VOUT = 5V,
IOUT = 100mA
TA = -40°C
to +125°C
Shutdown Supply Current
www.maximintegrated.com
IQ_BUCK
ISHDN
3.75
V
4
4.20
38
70
V
µA
VIN = 14V, VOUT = 5V, IOUT = 0
VEN = 0V, measured from
VIN
3.65
0.2
VBP
Quiescent Supply Current
(LDO Mode)
Buck Converter No-Load Supply
Current
3.5
44
100
680
TA = -40°C to
+125°C
6
TA = -40°C to
+125°C
6
µA
19
µA
12
Maxim Integrated │ 2
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Electrical Characteristics (continued)
(VIN = +14V, IOUT = 1mA, CIN = 100μF, COUT = 22μF, L = 22μH, CBP = 1μF, VEN = +2.4V, SGND = PGND = 0V, TA = TJ =
-40°C to +125°C, unless otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BUCK MODE
Supply Current
(Buck Converter On)
IS
LDO/BUCK = low,
VADJ = 1.4V, MAX5096,
no switching
135kHz
version
693
980
µA
Supply Current
(Buck Converter On)
IS
LDO/BUCK = low,
VADJ = 1.4V, MAX5097,
no switching
330kHz
version
720
1000
µA
Fixed Output Voltage
VOUT
5V version, 5.5V ≤ VIN ≤ 40V, no load
4.85
5
5.12
3.3V version, 5.5V ≤ VIN ≤ 40V, no load
3.196
3.3
3.391
ADJ Set Point
VFB
50% duty cycle, no load
ADJ Input Bias Current
IFB
VADJ = 1.5V
Dual Mode ADJ Threshold
125
VADJTH_F
ADJ rising
62
100
VADJ = 0.5V
Error-Amplifier Transconductance
GmEA
VCOMP = VADJ, ICOMP = ±10μA
Adjustable Output Voltage Range
VADJ
Minimum Output Current
IOUT
VIN = 6V to 40V
Internal Switch On-Resistance
RDS(ON)
Switching Frequency
η
fSW
136
1.235
ISW_LIM
ISW_L
55
VIN = 6.5V to 40V
Switch Current Limit
Efficiency
5
ADJ rising
DMAX
Switch Leakage Current
V
VADJTH_R
Maximum Duty Cycle
100
mV
%
210
µS
11.000
600
1.15
nA
mA
1.5
1.90
A
VIN = 14V, IDRAIN = 100mA
0.9
2.1
Ω
VEN = 0V
0.05
3
µA
VIN = 14V, VOUT = 5V, IOUT = 400mA
85
VIN = 14V, VOUT = 3.3V, IOUT = 400mA
81
%
MAX5096
120
135
148
kHz
MAX5097
300
330
350
kHz
MAX5096
120
500
kHz
MAX5097
300
500
kHz
2.0
Synchronization SYNC Input
fSYNC
SYNC Input High Threshold
VSYNCH
VBP = 4V
SYNC Input Low Threshold
VSYNCL
VBP = 4V
V
0.8
SYNC Input Minimum High Pulse
Width
250
SYNC Input Leakage
V
VSYNC = 11V
V
ns
1
µA
LDO MODE
Guaranteed Output Current
www.maximintegrated.com
IOUT
(Note 2)
100
mA
Maxim Integrated │ 3
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Electrical Characteristics (continued)
(VIN = +14V, IOUT = 1mA, CIN = 100μF, COUT = 22μF, L = 22μH, CBP = 1μF, VEN = +2.4V, SGND = PGND = 0V, TA = TJ =
-40°C to +125°C, unless otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 1)
PARAMETER
Output Voltage
ADJ Set Point
ADJ Input Bias Current
SYMBOL
VOUT
VADJ
IFB
MIN
TYP
MAX
UNITS
5V version, MAX5096B/MAX5097B,
5.5V ≤ VIN ≤ 40V, IOUT = 10mA
CONDITIONS
4.89
5
5.09
V
3.3V version, MAX5096A/MAX5097A,
4V ≤ VIN ≤ 40V, IOUT = 10mA
3.219
3.3
3.378
V
IOUT = 10mA
1.21
1.2375
1.26
V
0.5
100
nA
11.000
V
0.37
V
VADJ = 4V
Adjustable Output Voltage Range
VADJ
IOUT = 10mA
Dropout Voltage
ΔVDO
IOUT = 100mA,
VOUT = 0.98 x VOUT (nominal) (5V
version only), MAX5096B/MAX5097B
Rising edge of EN to
VOUT = 10% VOUT (nominal),
RL = 500Ω, VADJ = SGND,
VLDO/BUCK = 4V, CSS = 2nF
Startup Response Time
Line Regulation
Load Regulation
Power-Supply Rejection Ratio
Short-Circuit Current
1.237
ΔVOUT/
ΔVIN
ΔVOUT/
ΔIOUT
PSRR
ISC
300
5V version, +5.5V ≤ VIN ≤ +40V,
IOUT = 100mA
0.125
3.3V version, +4V ≤ VIN ≤ +40V,
IOUT = 100mA
0.093
µs
mV/V
5V version,
IOUT = 100μA to
100mA, VIN = 14V
TJ = +25°C
0.242
0.374
TJ = -40°C to +125°C
0.242
1
3.3V version,
IOUT = 100μA to
100mA, VIN = 14V
TJ = +25°C
0.164
0.237
TJ = -40°C to +125°C
0.164
1
IOUT = 10mA, f = 100Hz, 500mVP-P,
VOUT = +5V, VIN = +14V
VIN = 6V
LDO/BUCK High Threshold
60
150
330
mV/mA
dB
500
2.0
mA
V
LDO/BUCK Low Threshold
0.8
V
1
µA
LDO/BUCK Input Leakage
VLDO/BUCK = 11V
Transition Timing from LDO Mode
to Buck Mode
Falling edge of LDO/BUCK to buck
converter on
32
Clock
Periods
Transition Timing from Buck Mode
to LDO Mode
Rising edge of LDO/BUCK to LDO
operation
100
µs
SOFT-START, ENABLE (EN) AND RESET
Soft-Start Charge Current
Soft-Start Reference Voltage
EN High-Voltage Threshold
www.maximintegrated.com
ISS
VSS-REF
VENH
VSS = 0.1V
3
5
7
µA
VOUT = VOUT (nominal) - 20%
0.9
0.99
1.1
V
EN = high, regulator on
1.4
V
Maxim Integrated │ 4
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Electrical Characteristics (continued)
(VIN = +14V, IOUT = 1mA, CIN = 100μF, COUT = 22μF, L = 22μH, CBP = 1μF, VEN = +2.4V, SGND = PGND = 0V, TA = TJ =
-40°C to +125°C, unless otherwise noted. Typical values are at TA = TJ = +25°C.) (Note 1)
PARAMETER
EN Low-Voltage Threshold
SYMBOL
VENL
EN Input Pulldown
CONDITIONS
MIN
TYP
Regulator off
VEN = 2V, VLDO/BUCK = 4V
MAX
UNITS
0.4
V
0.5
µA
RESET Voltage Threshold High
VRESET_H
VOUT rising
89
92
94
% VOUT
RESET Voltage Threshold Low
VRESET_L
VOUT falling
97
90
92
% VOUT
RESET Output Low Voltage
VRL
ISINK = 1mA
0.2
V
RESET Output High Leakage
Current
IRH
VRESET = 5V, VADJ = 1.5V
1
µA
RESET Output Minimum Timeout
Period
CCT = 0
25
µs
VOUT to RESET Delay
VOUT falling 10mV/μs, CCT = 0
6
µs
Delay Comparator Threshold
VCT_TH
VCT rising
1.18
Delay Comparator Threshold
Hysteresis
CT Charge Current
CT Discharge Current
1.2374
1.29
100
ICH
IDISCH
0.74
1
V
mV
1.20
µA
VCT = 1V
13.8
mA
Temperature rising
+165
°C
20
°C
THERMAL SHUTDOWN
Thermal-Shutdown Temperature
Thermal-Shutdown Hysteresis,
TJ(SHDN)
ΔTJ(SHDN)
Note 1: Limits to -40°C are guaranteed by design.
Note 2: The continuous maximum output current from LDO is limited by package power dissipation.
www.maximintegrated.com
Maxim Integrated │ 5
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Typical Operating Characteristics
(VIN = +14V, VEN = +2.4V, MAX5097AATE+, Figures 2 and 4, TA = +25°C, unless otherwise specified.)
1.5
1.0
0.5
IOUT = 10mA
MAX5096 toc02
VEN = 0V
VIN = 14V
-40 -25 -10 5 20 35 50 65 80 95 110 125
12
10
8
6
4
2
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
710
NO-LOAD SUPPLY CURRENT (µA)
IOUT = 100µA
14
MAX5096 toc05
MAX5096 toc06
VOUT = 3.3V
VIN = 14V
VOUT = 3.3V
700
690
680
670
660
650
640
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT VOLTAGE
vs. TEMPERATURE (BUCK MODE)
DROPOUT VOLTAGE
vs. OUTPUT CURRENT (LDO MODE)
EFFICIENCY vs. LOAD CURRENT
(VOUT = 3.3V)
IOUT = 100µA
IOUT = 100mA
IOUT = 600mA
3.28
3.26
0.14
0.12
0.10
0.08
0.06
TEMPERATURE (°C)
www.maximintegrated.com
0
80
70
60
50
VIN = 24V
VIN = 40V
VIN = 5V
40
VIN = 14V
30
0.04
20
0.02
-40 -25 -10 5 20 35 50 65 80 95 110 125
fSW = 330kHz
90
EFFICIENCY (%)
3.34
VOUT = 5V
0.16
100
MAX5096 toc08
0.18
MAX5096 toc07
VOUT = 3.3V
MAX5096 toc03
10
NO-LOAD SUPPLY CURRENT
vs. TEMPERATURE (BUCK MODE)
3.36
OUTPUT VOLTAGE (V)
20
SHUTDOWN CURRENT
vs. TEMPERATURE
3.1
3.24
IOUT = 100mA
30
0
100
IOUT = 0
40
OUTPUT VOLTAGE vs. TEMPERATURE
(LDO MODE)
3.2
3.30
50
TEMPERATURE (°C)
3.3
3.32
10
1
IOUT = 100mA
60
INPUT VOLTAGE (V)
IOUT = 10mA
3.38
IOUT = 600mA
VIN = 14V
VOUT = 3.3V
INPUT VOLTAGE (V)
3.4
3.0
1.0
0
100
SHUTDOWN CURRENT (µA)
OUTPUT VOLTAGE (V)
3.5
10
1.5
0.5
IOUT = 50mA
1
2.0
70
MAX5096 toc04
2.0
2.5
80
MAX5096 toc09
2.5
3.0
QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE (LDO MODE)
QUIESCENT SUPPLY CURRENT (µA)
OUTPUT VOLTAGE (V)
3.0
OUTPUT VOLTAGE vs. INPUT VOLTAGE
(BUCK MODE)
3.5
DROPOUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3.5
0
4.0
MAX5096 toc01
4.0
OUTPUT VOLTAGE vs. INPUT VOLTAGE
(LDO MODE)
10
0
20
40
60
OUTPUT CURRENT (mA)
80
100
0
0.01
0.1
1
LOAD CURRENT (A)
Maxim Integrated │ 6
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Typical Operating Characteristics (continued)
(VIN = +14V, VEN = +2.4V, MAX5097AATE+, Figures 2 and 4, TA = +25°C, unless otherwise specified.)
LOAD-TRANSIENT RESPONSE
(LDO MODE)
EFFICIENCY vs. LOAD CURRENT
(VOUT = 5V)
MAX5096 toc11
MAX5096 toc10
100
90
EFFICIENCY (%)
80
50
40
VIN = 14V
VIN = 5.5V
MAX5096 toc12
VIN = 14V
IOUT = 100µA to 50mA
70
60
LOAD-TRANSIENT RESPONSE
(BUCK MODE)
IOUT
50mA/div
IOUT
200mA/div
VOUT
50mV/div
VOUT
AC-COUPLED
100mV/div
VIN = 24V
VIN = 40V
30
20
VIN = 14V
ISTEP = 300mA to 600mA
10
0
0.01
0.1
2ms/div
1
1ms/div
LOAD CURRENT (A)
VIN STARTUP RESPONSE
(LDO MODE)
ENABLE STARTUP RESPONSE
(LDO MODE)
VIN = 14V
IOUT = 0A
CCT = 0.047µF
VIN STARTUP RESPONSE
(BUCK MODE)
MAX5096 toc14
MAX5096 toc13
VIN
10V/div
VIN = 14V
IOUT = 100mA
CCT = 0.047µF
MAX5096 toc15
VIN
10V/div
VIN = 14V
IOUT = 0A
CCT = 0.047µF
VEN
10V/div
VEN
5V/div
VEN
5V/div
VOUT
2V/div
VOUT
2V/div
VOUT
2V/div
RESET
5V/div
RESET
5V/div
RESET
5V/div
10ms/div
10ms/div
10ms/div
ENABLE STARTUP RESPONSE
(BUCK MODE)
SHUTDOWN RESPONSE THROUGH
VIN (LDO MODE)
SHUTDOWN RESPONSE THROUGH
VIN (BUCK MODE)
MAX5096 toc16
VIN = 14V
IOUT = 600mA
CCT = 0.047µF
10ms/div
www.maximintegrated.com
VIN
10V/div
MAX5096 toc17
IOUT = 50mA
VIN
10V/div
MAX5096 toc18
IOUT = 50mA
VIN
10V/div
VIN
10V/div
VEN
5V/div
VEN
10V/div
VEN
10V/div
VOUT
2V/div
VOUT
2V/div
VOUT
2V/div
RESET
5V/div
RESET
5V/div
RESET
5V/div
100ms/div
100ms/div
Maxim Integrated │ 7
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Typical Operating Characteristics (continued)
(VIN = +14V, VEN = +2.4V, MAX5097AATE+, Figures 2 and 4, TA = +25°C, unless otherwise specified.)
LX VOLTAGE AND INDUCTOR CURRENT
LX VOLTAGE, SYNC INPUT,
AND INDUCTOR CURRENT
LX VOLTAGE AND INDUCTOR CURRENT
MAX5096 toc20
MAX5096 toc19
MAX5096 toc21
IOUT = 600mA
IOUT = 0A
VLX
10V/div
VLX
10V/div
VLX
5V/div
SYNC INPUT
5V/div
INDUCTOR
CURRENT
500mA/div
INDUCTOR
CURRENT
200mA/div
2µs/div
INDUCTOR
CURRENT
500mA/div
1µs/div
TRANSITION FROM BUCK
MODE TO LDO MODE
1µs/div
TRANSITION FROM LDO MODE
TO BUCK MODE
MAX5096 toc22
MAX5096 toc23
LDO/BUCK
5V/div
LDO/BUCK
3V/div
VOUT
AC-COUPLED
200mV/div
VOUT
AC-COUPLED
200mV/div
IOUT
100mA/div
IOUT
100mA/div
VIN = 14V
IOUT = 100mA
VIN = 14V
IOUT = 100mA
400µs/div
www.maximintegrated.com
100µs/div
Maxim Integrated │ 8
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Pin Description
PIN
NAME
FUNCTION
TQFN
TSSOP
1
4
PGND
Power Ground. Return path for p-channel power MOSFET driver. Connect the input
capacitor return, freewheeling diode anode, and output capacitor return terminals to
PGND.
2
5
SGND
Signal Ground. Connect SGND to PGND near the input bypass capacitor return terminal.
Open-Drain, Active-Low Reset Output. RESET asserts low when OUT drops below the
reset threshold. When output rises above 92% of the programmed level, RESET becomes
high impedance after the reset timeout period. Connect a pullup resistor from RESET to
the converter output to create a logic output.
3
6
RESET
4
7
BP
5
9
SYNC
6
10
SS
Soft-Start Timer Input. Connect an external capacitor from SS to SGND to adjust the softstart timeout period (see the Soft-Start (SS) section).
7
11
CT
Reset Timeout Period. Connect a capacitor from CT to SGND to set the reset-timeout
period (see the Power-On Reset Output RESET section).
8
12
COMP
Buck Converter (Buck Mode) Control-Loop Compensation. See the Compensation
Network section for compensation network design. LDO mode does not need external
compensation.
4V Internal Regulator Output. Bypass BP to SGND with a 1μF or greater ceramic
capacitor.
Synchronization Input. Connect SYNC to an external clock for synchronization. Connect
SYNC to SGND when not used.
9
13
LDO/BUCK
LDO Mode/Buck Mode Select. Drive LDO/BUCK low to select the buck mode. The buck
mode activates after 32 internal/external clock cycles. Force the LDO/BUCK high (> 2V),
to select LDO mode. The buck mode stops and LDO mode is activated with a 100μs
delay.
10
15
ADJ
Regulator Output-Feedback Point. Connect ADJ to SGND for a fixed 3.3V (MAX5096A/
MAX5097A) or 5V (MAX5096B/MAX5097B). For adjustable output voltage, use an
external resistive divider to set VOUT. VADJ regulating set point is 1.237V.
11
16
OUT
Converter Output. OUT must always be connected to the regulator output. Connect at
least a 22μF low-ESR (equivalent series resistance) capacitor from OUT to PGND for
stable operation.
12
17
EN
Enable Input. EN is internally pulled to ground. Drive EN high to turn on the regulator.
Force EN low or leave unconnected to place the device in shutdown mode.
13, 14
19, 20
LX
Drain Connection of Internal p-Channel High-Side Switch
15, 16
1, 2, 3
IN
Regulator Input. Bypass IN to PGND with a parallel combination of low-ESR ceramic and
aluminum capacitor to handle the input ripple current.
—
8, 14, 18
N. C.
EP
EP
EP
www.maximintegrated.com
No Connection. Not internally connected.
Exposed Pad. Connect externally to a large ground plane (SGND) for improved heat
dissipation. Do not use EP as an electrical ground connection.
Maxim Integrated │ 9
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
IN
CIN
VOUT
INTERNAL
4V LDO
CURRENT
SENSE
OSCILLATOR
AND RAMP
GENERATOR
BP
CBP
- +
DC
CURRENT
LIMITER
VIN
DC-DC ENABLE
PWM
PWM
COMPARATOR
+
gm -
CP
+
-
SYNCRO
SYNC
CC
MODE
SELECTOR
LDO/BUCK
LDO/BUCK
SELECTOR
FB
CSS
MAX5096
MAX5097
VOUT
COUT
SS
VREF
+
R1
ADJ
-
FB
OUT
+
SS
VREF
FEEDBACK
SELECTOR
LDO MODE
AMPLIFIER
R2
0.12V
RPU
EN
SS
L
LX
BUCK MODE GM
AMPLIFIER
COMP
RC
0.9Ω
GATE
DRIVER
MUX
BIAS SOFTSTART
INTERNAL
BANDGAP
UVLO
THERMAL
PROTECTION
RESET
RESET
CT
SGND
PGND
CCT
Figure 1. Simplified Diagram
www.maximintegrated.com
Maxim Integrated │ 10
MAX5096/MAX5097
Detailed Description
The MAX5096/MAX5097 are easy-to-use, high-efficiency,
PWM current-mode, step-down switching converters
in normal operation. The MAX5096/MAX5097 have an
internal high-side p-channel 0.9Ω switch and use a low
forward-drop freewheeling diode for rectification. In buck
mode, the p-channel switches at the 135kHz or 330kHz
frequency. Buck mode uses a current-mode control architecture that offers excellent line-transient response, easier frequency compensation, and cycle-by-cycle current
limiting. The buck converter is compensated externally
for a selected value/type of output inductor and capacitor.
The internal p-channel switch acts as a pass element
when operating in the low-quiescent-current LDO mode.
The LDO mode can be selected on the fly through the
LDO/BUCK input. During the key-off condition, the system’s microcontroller drives the LDO/BUCK input high
and forces the MAX5096/MAX5097 into LDO mode,
reducing the quiescent current to 1μA (typ). When in LDO
mode, the device is capable of delivering up to 100mA,
which may be limited by the device power dissipation. The
LDO and switcher share the same pass element and the
reference; however, the error amplifiers are different with
their own compensation schemes.
The MAX5096/MAX5097 include an integrated microprocessor reset circuit with an adjustable reset timeout
period. The internal reset circuit monitors the regulator
output voltage and asserts RESET low when the regulator
output falls below the reset threshold voltage. Other features include an enable input, externally programmable
soft-start, optimized current-limit protection in both LDO
and buck modes, and thermal shutdown.
Enable Input (EN)
EN is a logic-level enable input that turns the device on
or off. The logic-high and logic-low voltages for the EN
input are 1.4V and 0.4V, respectively. Drive EN high to
turn on the device, and drive it low to place the device in
shutdown. Leaving EN unconnected disables the device
since the EN is internally pulled low with a 0.5μA current,
however, a forced pulldown of EN improves the noise
immunity. The MAX5096/MAX5097 draw 6μA (typ) of supply current when in shutdown. EN withstands up to +40V,
allowing EN to be connected directly to IN for always-on
operation. The converter may be turned on and off while
www.maximintegrated.com
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
in both buck and LDO modes. Each time the EN is toggled, the output rises with a programmed soft-start period.
Internal Regulator (BP)/Undervoltage Lockout
The MAX5096/MAX5097 include an internal 4V auxiliary
regulator to power internal circuitry. Bypass the auxiliary
regulator output (BP) to SGND with a 1μF ceramic capacitor physically located close to the device. The regulator
is not intended to supply the external circuit other than
pulling up the LDO/BUCK input or RESET. Do not load
BP externally by more than 2mA. The regulator output
is regulated to 4V with 7% accuracy during steady state.
During turn-on, the BP voltage stabilizes after 250μs with
a 1μF capacitor at BP. Drive EN high to turn on the internal regulator. The internal UVLO with hysteresis ensures
stable operation, resulting in the monotonic rise of the
output voltage. The UVLO circuit monitors the output of
the regulator. The rising UVLO threshold is internally set
to 3.65V (BP rising) with a 185mV hysteresis (BP falling).
The 3.65V UVLO at the no-load BP output guarantees
operation at VIN lower than 4V.
Soft-Start (SS)
Soft-start provides for the monotonic, glitch-free turnon of the converter. Soft-start limits the input inrush
current which may cause a glitch, especially if the source
impedance is high. The soft-start period required also
depends on the output capacitance and the closed-loop
bandwidth of converter. The soft-start period for the
MAX5096/MAX5097 is externally programmable using a
single capacitor (CSS). The soft-start is achieved by the
controlled ramping up of the error amplifier reference
input. At startup, after VIN is applied and the UVLO
threshold is reached, the device enters soft-start. During
soft-start, 5μA is sourced into the capacitor (CSS) connected from SS to SGND (Figure 2) causing the reference
voltage to ramp up slowly. When VSS reaches 1.237V, the
output becomes fully active. Set the soft-start time (tSS)
using following equation:
=
t SS
VSS
× C SS
I SS
where VSS is 1.237V, ISS is 5μA, tSS is in seconds, and
CSS is in Farads.
Pulling EN low quickly discharges the CSS capacitor,
making it ready for the next soft-start period.
Maxim Integrated │ 11
MAX5096/MAX5097
VIN
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
VIN
CIN
100µF
BP
EN
22µH
LDO/BUCK
LX
SYNC
CP
22pF
COMP
RC
100kΩ
1.0µF
MAX5096
MAX5097
+
D1*
COUT
B260/
22µF
MURS105 (CER.)
VOUT
ADJ
CC
1.2nF
OUT
100kΩ
SS
CSS
0.047µF
CT
CCT
0.01µF
RESET
RESET
GND
PGND
*USE MURS105 IN APPLICATIONS
WHERE LDO MODE QUIESCENT
CURRENT IS CRITICAL.
Figure 2. Fixed Output-Voltage Configuration
Output-Voltage Tracking/Sequencing
The output voltages of multiple MAX5096/MAX5097
converters can be made to track by using the SS pin
during turn-on and turn-off (see Figure 3). SS is pulled
up using a 5μA current source and connecting SS of
multiple MAX5096/MAX5097s, raising the references
with the same slope. Tracking the converters reduces
the differential voltages between the core and I/O voltages during turn-on, turn-off, and brownout. If any one
converter output drops due to shutdown or an overloadfault situation, the SS drops, pulling down all the converters simultaneously. The rate of fall of output voltages,
however, depends on the output capacitance and load of
the individual converter.
Multiple voltage sequencing can be done by daisychaining several MAX5096/MAX5097s. The RESET of
the first converter can be connected to EN of the second
converter. This allows the first converter to come up first
every time the system is powered up.
Power-On-Reset Output (RESET)
A supervisor circuit is integrated in the MAX5096/
MAX5097. RESET is an open-drain output. RESET pulls
low as soon as VOUT drops below 90% of its nominal
regulation voltage. Once the output voltage rises above
www.maximintegrated.com
92% of the set output voltage, the RESET output enters
a high-impedance state after the active timeout period
(tRP). The active timeout period is externally programmable using a single capacitor from CT to ground. Use
the following equation to calculate the required timeout
period for the power-on reset:
=
t RP
VCT −TH
× C CT
I CH
where VCT-TH is 1.237V, ICH is 1μA, tRP is in seconds,
and CCT is in Farads.
To obtain a logic-voltage output, connect a pullup
resistor from RESET to a logic-supply voltage. The
internal open-drain MOSFET can sink 1mA while providing a TTL logic-low signal. If unused, ground RESET or
leave it unconnected.
The power-on-reset behavior is the same in both the LDO
and buck modes of operation.
Oscillator/Synchronization Input (SYNC)
The MAX5096/MAX5097 internal oscillator generates a
factory-preset frequency of either 135kHz (MAX5096)
or 330kHz (MAX5097). The 135kHz version keeps the
maximum fundamental frequency below 150kHz, which
keeps the third harmonic below 450kHz and under the
Maxim Integrated │ 12
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Applications Information
VOUT3
Output Voltage Selection
VOUT2
VOUT1
SOFT-START
STOP
RATIOMETRIC TRACKING OUTPUTS
VOUT1
VOUT2
VOUT3
STOP
SOFT-START
SEQUENCED OUTPUTS
Figure 3. Output Voltage Tracking/Sequencing
lower end of the AM band. The MAX5096 is suitable for
noise-sensitive applications like AM radio power supply.
For an application where size is more important, use the
MAX5097, which runs at 330kHz frequency. The highfrequency operation reduces the size and cost of the
external inductor and capacitor. The MAX5096/MAX5097
can be synchronized using an external signal. The
MAX5096 can be synchronized from 120kHz to 500kHz,
while the MAX5097 is capable of synchronizing from
300kHz to 500kHz. The external synchronization feature
makes frequency hopping possible depending on the
selected AM channel. Connect SYNC to ground, if not
used.
Thermal Protection
When the junction temperature exceeds TJ = +165°C,
an internal thermal sensor signals the shutdown logic,
which turns off the regulator (both in buck mode and LDO
mode), and discharges the soft-start capacitor allowing
the IC to cool. The thermal sensor turns the regulator
on again after the IC’s junction temperature cools by
20°C, resulting in a cycled output during continuous
thermal-overload conditions. The thermal hysteresis and
a soft-start period limit the average power dissipation
into the device during continuous fault condition. During
operation, do not exceed the absolute maximum junction
temperature rating of TJ = +150°C.
www.maximintegrated.com
The MAX5096/MAX5097 can be configured as either
a preset fixed-output voltage or an adjustable-output
voltage device. Connect ADJ to ground to select the
factory-preset output-voltage option (Figure 2). The
MAX5096A/MAX5097A and MAX5096B/MAX5097B
provide a fixed-output voltage equal to 3.3V and 5V,
respectively (see the Selector Guide). The MAX5096/
MAX5097 become an adjustable version as soon as the
devices detect about 125mV at the ADJ pin. The resistordivider at ADJ increases the ADJ voltage above 125mV
and also adjusts the output voltage depending upon the
resistor values. In adjustable mode, select an output
between +1.273V and +11V using two external resistors
connected as a voltage-divider to ADJ (Figure 4). Set the
output voltage using the following equation:
R1
VOUT
= V ADJ × 1+
R2
where VADJ = 1.273V and R2 is chosen to be approximately 100kΩ.
Connect ADJ to GND if adjustable mode is not used.
Inductor Selection
Three key inductor parameters must be specified for
proper operation with the MAX5096/MAX5097: inductance value (L), peak inductor current (IPEAK), and
inductor saturation current (ISAT). The minimum required
inductance is a function of operating frequency, input-tooutput-voltage differential, and the peak-to-peak inductor
current (ΔIP-P). Higher ΔIP-P allows for a lower inductor
value, while a lower ΔIP-P requires a higher inductor
value. A lower inductor value minimizes size and cost
and improves large-signal and transient response, but
reduces efficiency due to higher peak currents and higher
peak-to-peak output-voltage ripple for the same output
capacitor. On the other hand, higher inductance increases
efficiency by reducing the ripple current. Resistive losses
due to extra wire turns can exceed the benefit gained
from lower ripple-current levels, especially when the
inductance is increased while keeping the dimension of
the inductor constant. A good compromise is to choose
ΔIP-P equal to 40% of the full load current. Calculate the
inductor value using the following equation:
L=
VOUT (VIN − VOUT )
VIN × f SW × ∆IP−P
Maxim Integrated │ 13
MAX5096/MAX5097
5V TO 40V
VIN
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
VIN
CIN
100µF
BP
22µH
LDO/BUCK
LX
SYNC
COMP
CP
1.0µF
EN
RC
MAX5096
MAX5097
D1*
COUT
B260/
MURS105 22µF
+
VOUT
R1
ADJ
R2
CC
OUT
RPU
SS
CSS
CT
RESET
RESET
GND
*USE MURS105 IN APPLICATIONS
WHERE LDO MODE QUIESCENT
CURRENT IS CRITICAL.
PGND
CCT
Figure 4. Adjustable Output Voltage Configuration
Use typical values of VIN and fSW so that efficiency is optimum for typical conditions. The switching
frequency (fSW) is fixed at 135kHz (MAX5096) and
330kHz (MAX5097). fSW can also be varied from 120kHz
to 500kHz (MAX5096) and from 300kHz to 500kHz
(MAX5097) when synchronized to an external clock (see
the Oscillator/Synchronization Input (SYNC) section). The
peak-to-peak inductor current, which reflects the peak-topeak output ripple, is worst at the maximum input voltage.
See the Output Capacitor Selection section to verify that
the worst-case output ripple is acceptable. The inductor saturating current (ISAT) is also important to avoid
runaway current during continuous output short circuit.
Select an inductor with an ISAT specification higher than
the maximum peak current limit of 1.9A.
The buck mode operation determines the inductor and
output capacitor values. However, the values of the
inductor, its DCR, and the output capacitance/ESR affect
the closed-loop-transfer function both in buck and LDO
modes. The internal compensation of the MAX5096/
MAX5097 in LDO mode limits the values of these external components. Make sure that the combination of
output inductor, capacitor, and ESR falls within the range
specified in Table 1.
www.maximintegrated.com
Table 1. Inductor/Output Capacitor
Selection
INDUCTOR
OUTPUT CAPACITOR (COUT)
22μF, ESR = 5mΩ to 20mΩ (ceramic)
22μH
47μF, ESR = 40mΩ to 150mΩ
100μF, ESR = 30mΩ to 100mΩ
470μF/ESR = 60Ω to 400mΩ
22μF, ESR = 5mΩ to 20mΩ (ceramic)
47μH
47μF/ESR = 40mΩ to 150mΩ
100μF/ESR = 30mΩ to 100mΩ
470μF/ESR = 60mΩ to 400mΩ
22μF, ESR = 5mΩ to 20mΩ (ceramic)
100μH
47μF/ESR = 40mΩ to 150mΩ
100μF/ESR = 30mΩ to 100mΩ
470μF/ESR = 60mΩ to 400mΩ
Output Capacitor Selection
The allowable output-voltage ripple and the maximum
deviation of the output voltage during load steps determine the output capacitance and its ESR. The output
Maxim Integrated │ 14
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
ripple is mainly composed of ΔVQ (caused by the
capacitor discharge) and ΔVESR (caused by the voltage
drop across the ESR of the output capacitor). Normally,
a good approximation of the output-voltage ripple is
ΔVRIPPLE ≈ ΔVESR + ΔVQ. If using ceramic capacitors,
assume the contribution to the output-voltage ripple from
the ESR and the capacitor discharge to be equal to 20%
and 80%, respectively. If using aluminum electrolyte
capacitors, assume the contribution to the output-voltage
ripple from the ESR and the capacitor discharge to be
equal to 90% and 10%, respectively.
Use the following equations for calculating the output
capacitance and its ESR for required peak-to-peak
output-voltage ripple.
C OUT =
∆IP−P
16 × ∆VQ × f SW
ESR =
∆VESR
∆IP−P
ΔIP-P is the peak-to-peak inductor current and fSW is the
converter’s switching frequency.
The allowable deviation of the output voltage during
fast-load transients also determines the output capacitance, its ESR, and its equivalent series inductance
(ESL). The output capacitor supplies the load current
during a load step until the controller responds with a
greater duty cycle. The response time (tRESPONSE)
depends on the closed-loop bandwidth of the converter
(see the Compensation Network section). The resistive drop across the output capacitor’s ESR, the drop
across the capacitor’s ESL, and the capacitor discharge,
causes a voltage drop during the load step. Use a combination of low-ESR tantalum/aluminum electrolytic and
ceramic capacitors for better transient-load and voltageripple performance. Nonleaded capacitors and/or multiple
parallel capacitors help reduce the ESL. Keep the
maximum output-voltage deviation below the tolerable
limits of the electronics being powered. Use the following equations to calculate the required ESR, ESL, and
capacitance value during a load step:
ESR =
∆VESR
∆I STEP
I
×t
C OUT = STEP RESPONSE
∆VQ
ESL =
www.maximintegrated.com
∆VESL × t STEP
I STEP
where ISTEP is the load step, tSTEP is the rise time of the
load step, and tRESPONSE is the response time of the
controller. The response time of the converter is approximately one third of the inverse of its closed-loop bandwidth and also depends on the phase margin.
Rectifier Selection
The MAX5096/MAX5097 require an external Schottky/
fast-recovery diode rectifier as a freewheeling diode.
Connect this rectifier close to the device using short
leads and short PCB traces. Choose a rectifier with
a continuous current rating greater than the highest
output current-limit threshold (1.9A) and with a voltage
rating greater than the maximum expected input voltage, VIN. Use a low forward-voltage-drop Schottky rectifier to limit the negative voltage at LX. Avoid higher than
necessary reverse-voltage Schottky rectifiers that have
higher forward-voltage drops. Use a 60V (max) Schottky
rectifier with a 2A current rating. The Schottky rectifier
leakage current at high temperature significantly increases the quiescent current in LDO mode. In applications
where LDO mode quiescent current is important, use an
ultra-fast switching diode to limit the leakage current. In
this type of application, use MURS105, MURS120 for
their fast-switching and low-leakage features.
Input Capacitor Selection
The discontinuous input current of the buck converter
causes large input-ripple currents and therefore, the input
capacitor must be carefully chosen to keep the input
voltage ripple within design requirements. The input voltage ripple is comprised of ΔVQ (caused by the capacitor
discharge) and ΔVESR (caused by the ESR of the input
capacitor). The total voltage ripple is the sum of ΔVQ
and ΔVESR. Calculate the input capacitance and ESR
required for a specified ripple using the following equations (continuous mode):
∆VESR
ESR =
∆IP−P
I OUT_MAX + 2
I OUT_MAX × D(1 − D)
C IN =
∆VQ × f SW
where
(VIN − VOUT ) × VOUT
∆IP−P =
and
VIN × f SW × L
D=
VOUT
VIN
IOUT_MAX is the maximum output current and D is the
duty cycle.
Maxim Integrated │ 15
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Compensation Network
The MAX5096/MAX5097 in LDO mode are compensated
internally with a compensation network around the LDO
error amplifier. When in buck mode, the DC-DC gM amplifier must be externally compensated using a network
connected from COMP to ground. The current-mode
control architecture reduces the compensation network
to a single pole-zero. The RC and C network, connected
from the internal transconductance amplifier output to
SGND, can provide a single pole-zero pair. Choose all
the power components like the inductor, output capacitor, and ESR first and design the compensation network
around them. Choose the closed-loop bandwidth (fC) to
be approximately 1/10 of the switching frequency. See
the following equations to calculate the compensation
values for the low-ESR output capacitor with ESR zero
frequency, approximately a decade higher than fC.
Calculate the dominant pole due to the output capacitor
(COUT) and the load (ROUT):
f PO =
1
2 × π × C OUT × R OUT
where ROUT = VOUT/ILOAD
Calculate the RC using following equation:
RC =
VO × f C
g MC × R OUT × g m × V ADJ × f PO
where gMC is the control to output gain of the MAX5096/
MAX5097 buck converter and is equal to 1.06. VADJ is
the feedback set point equal to 1.237V and gm (transconductance amplifier gain) is equal to 136μS. See Figure 2.
Place a zero (fZ) at 0.9 x fPO:
1
CC =
2 × π × R C × fPO
Finally, place a high-frequency pole at the frequency
equal to 1/2 of the converter switching frequency (fSW).
www.maximintegrated.com
CP =
1
π × R C × f SW
Place the compensation network physically close to the
MAX5096/MAX5097.
Switching Between LDO Mode
and Buck Mode
The MAX5096/MAX5097 switch between the buck mode
and LDO mode on the fly. However, care must be taken
to reduce output glitch or overshoot during the switching.
Buck Mode to LDO Mode
The LDO mode is intended for the low 100mA output
current while the buck converter delivers up to 600mA
output current. It is important to first reduce the output
load below 100mA before switching to the LDO mode.
If the output load is higher than 100mA, the MAX5096/
MAX5097 can go into the current limit and the output
drops significantly. Whenever the mode is changed,
output is expected to glitch because the loop dynamics
change due to different error amplifiers when operating in
the LDO and buck modes. The output-voltage undershoot
can be minimized by reducing the output load during
switching and using larger output capacitance.
LDO Mode to Buck Mode
When switching from the LDO mode to buck mode, a
fixed amount of delay (32 cycles) is applied so that the
buck converter control loop and oscillator reach their
steady-state conditions. The 32-cycle delay translates to
approximately 250μs and 100μs for 150kHz and 330kHz
switching frequency versions, respectively. It is recommended that the output load of 600mA must be delayed
by at least this amount of time to allow the MAX5096/
MAX5097 to switch to high-current buck mode. This
ensures that the output does not drop due to the LDO
current-limit protection mechanism.
Maxim Integrated │ 16
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
PCB Layout Guidelines
1) Proper PCB layout is essential. Minimize ground noise
by connecting the anode of the freewheeling rectifier,
the input bypass capacitor ground lead, and the output
filter capacitor ground lead to a large PGND plane.
2) Minimize lead lengths to reduce stray capacitance,
trace resistance, and radiated noise. In particular,
place the Schottky/fast recovery rectifier diode right
next to the device.
3) Connect the exposed pad of the IC to the SGND
plane. Do not make a direct connection between the
exposed pad plane and SGND (pin 2) under the IC.
Connect the exposed pad and pin 2 to the SGND
plane separately. Connect the ground connection of
the feedback resistive divider, the soft-start capacitor,
the adjustable reset timeout capacitor, and the compensation network to the SGND plane. Connect the
SGND plane and PGND plane at one point near the
input bypass capacitor at VIN.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 TQFN
T1655+2
21-0140
90-0072
20 TSSOP
U20E+4
21-0108
90-0115
4) Use the large SGND plane as a heatsink for the
MAX5096/MAX5097. Use large PGND and LX planes
as heatsinks for the rectifier diode and the inductor.
Selector Guide
PART
OUTPUT
VOLTAGE
(V)
SWITCHING
FREQUENCY
(kHz)
MAX5096A_ _ _
+3.3/Adjustable
135
MAX5096B_ _ _
+5.0/Adjustable
135
MAX5097A_ _ _
+3.3/Adjustable
330
MAX5097B_ _ _
+5.0/Adjustable
330
www.maximintegrated.com
Maxim Integrated │ 17
MAX5096/MAX5097
40V, 600mA Buck Converters with LowQuiescent-Current Linear Regulator Mode
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
7/06
Initial release
1
6/07
Updated Electrical Characteristics table
2
9/07
Removed future product asterisks from Ordering Information table, Updated
Electrical Characteristics table and TSSOP package outline
3
5/14
No /V OPNs; removed automotive reference from Applications section
4
1/15
Removed incorrect reference to Figure 2 in Electrical Characteristics globals
DESCRIPTION
—
1–3, 5, 20
1, 4, 18, 19, 20
1
2–5
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2015 Maxim Integrated Products, Inc. │ 18
