19-1260; Rev 1; 9/02
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
The MAX551/MAX552 are available in an 8-pin DIP
package or a space-saving 10-pin µMAX package. The
µMAX package provides an asynchronous clear (CLR)
input that clears all DAC registers when pulled to GND,
setting the output voltage to 0V.
________________________Applications
Automatic Calibration
Gain Adjustment
Transducer Drivers
Process-Control I/O Boards
Digitally Controlled Filters
Motion-Controlled Systems
µP-Controlled Systems
Programmable Amplifiers/Attenuators
____________________________Features
♦ Single-Supply Operation:
+4.5V to +5.25V (MAX551)
+2.7V to +3.6V (MAX552)
♦ 12.5MHz 3-Wire Serial Interface
♦ SPI/QSPI and MICROWIRE Compatible
♦ Power-On Reset Clears DAC Output to Zero
♦ Asynchronous Clear Input Clears DAC Output
to Zero
♦ Voltage Mode or Bipolar Mode Operation with
a Single Power Supply
♦ Schmitt-Trigger Digital Inputs for Direct
Optocoupler Interface
♦ 0.4µA Supply Current
♦ 10-Pin µMAX Package
______________Ordering Information
PINPACKAGE
LINEARITY
(LSB)
PART
TEMP RANGE
MAX551ACPA
0°C to +70°C
8 Plastic DIP
±1/2
MAX551BCPA
MAX551ACUB
MAX551BCUB
0°C to +70°C
0°C to +70°C
0°C to +70°C
8 Plastic DIP
10 µMAX
10 µMAX
±1
±1/2
±1
MAX551AEPA
MAX551BEPA
MAX551AEUB
MAX551BEUB
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
8 Plastic DIP
8 Plastic DIP
10 µMAX
10 µMAX
±1/2
±1
±1/2
±1
Ordering Information continued at end of data sheet.
________________Functional Diagram
_________________Pin Configurations
REF
RFB
RFB
OUT
AGND*
12-BIT
D/A CONVERTER
VDD
CLR*
LOAD
12-BIT
DAC REGISTER
MAX551
MAX552
POWER-ON
RESET
SCLK
12-BIT
SHIFT REGISTER
*µMAX PACKAGE ONLY
GND
DIN
TOP VIEW
OUT 1
GND 2
VDD 3
MAX551
MAX552
8 RFB
OUT 1
7 REF
AGND 2
GND 3
6
SCLK
10 RFB
9 REF
MAX551
MAX552
VDD 4
LOAD 4
5 DIN
7 SCLK
LOAD 5
DIP
8 CLR
6 DIN
µMAX
SPI and QSPI are trademarks of Motorola Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX551/MAX552
_______________General Description
The MAX551/MAX552 are 12-bit, current-output, 4-quadrant multiplying digital-to-analog converters (DACs).
These devices are capable of providing unipolar or
bipolar outputs when operating from either a single +5V
(MAX551) or +3V (MAX552) power supply. An internal
power-on-reset circuit clears all DAC registers on
power-up, setting the DAC output voltage to 0V.
The SPI™/QSPI™ and MICROWIRE™-compatible 3wire serial interface saves board space and reduces
power dissipation compared with parallel-interface
devices. The MAX551/MAX552 feature double-buffered
interface logic with a 12-bit input register and a 12-bit
DAC register. Data in the DAC register sets the DAC
output voltage. Data is loaded into the input register
through the serial interface. The LOAD input transfers
data from the input register to the DAC register, updating the DAC output voltage.
MAX551/MAX552
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
ABSOLUTE MAXIMUM RATINGS
VDD to GND..............................................................................6V
REF, RFB to GND.................................................................±12V
Digital Inputs (SCLK, DIN, LOAD, CLR)
to GND .....................................................................-0.3V to 6V
OUT to GND ...............................................-0.3V to (VDD + 0.3V)
AGND to DGND ..................................................................±0.3V
Continuous Power Dissipation (TA = +70°C)
Plastic DIP (derate 9.09mW/°C above +70°C) .............727mW
µMAX (derate 5.60mW/°C above +70°C) .....................444mW
Operating Temperature Ranges
MAX55_ _C_ _......................................................0°C to +70°C
MAX55_ _E_ _ ...................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX551
(VDD = +4.5V to +5.25V, VREF = 5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC PERFORMANCE
Resolution
N
12
Bits
MAX551A
±1/2
MAX551B
±1
Guaranteed monotonic over
temperature
MAX551A
±1/2
MAX551B
±1
Gain Error
Using internal feedback
resistor (RFB)
MAX551A
±1
MAX551B
±2
Gain Tempco
(∆Gain/∆Temp)
Using internal feedback resistor (RFB)
(Note 2)
Integral Nonlinearity
INL
Differential Nonlinearity
DNL
Power-Supply Rejection
PSR
±0.2
∆VDD = +5%, -10%
LSB
LSB
LSB
±1
ppm/°C
2
ppm/%
DYNAMIC PERFORMANCE (Note 3)
TA = +25°C, to 1/2LSB, OUT load is
100Ω||13pF, DAC register alternately loaded
with 1s and 0s
0.08
1
µs
Digital-to-Analog Glitch
VREF = 0V, OUT load is 100Ω||13pF, DAC
register alternately loaded with 1s and 0s
0.65
20
nV-s
AC Feedthrough at OUT
VREF = 5VP-P at 10kHz, DAC register loaded
with all 0s
0.3
1
mVP-P
VREF = 6VRMS at 1kHz, DAC register loaded
with all 1s
-85
10Hz to 100kHz, measured between RFB and
OUT
13
Current Settling Time
Total Harmonic Distortion
Output Noise-Voltage Density
2
tS
THD
_______________________________________________________________________________________
dB
15
nV/√Hz
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
(VDD = +4.5V to +5.25V, VREF = 5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
11
15
UNITS
REFERENCE INPUT
Input Resistance
RREF
Measured between REF and OUT
7
Input Resistance Tempco
Reference -3dB Bandwidth
BW
VOUT = 0.31VP-P, RL = 50Ω, code = full-scale
kΩ
6.5
ppm/°C
725
kHz
ANALOG OUTPUT
DAC register loaded
with all 0s
OUT Leakage Current
OUT Capacitance
COUT
TA = +25°C
±0.15
TA = TMIN to TMAX
±5
±25
Code = zero scale (Note 2)
14
20
Code = full scale (Note 2)
20
30
nA
pF
DIGITAL INPUTS
Input High Voltage
VIH
Input Low Voltage
VIL
Input Hysteresis
HYST
Input Leakage Current
IIN
2.4
0.8
LOAD, CLR, DIN, and SCLK, VDD = 5V
CLR
SCLK, LOAD, DIN
Input Capacitance
CIN
V
156
V CLR = VDD
V
mV
±1
V CLR = 0V
18
Inputs at 0V or VDD
100
µA
±1
Inputs at 0V or VDD (Note 2)
8
pF
SWITCHING CHARACTERISTICS
SCLK Pulse Width High
tCH
25
ns
SCLK Pulse Width Low
tCL
25
ns
DIN Data to SCLK Setup
tDS
15
ns
DIN Data to SCLK Hold
tDH
15
ns
LOAD Pulse Width
tLD
20
ns
LSB SCLK to LOAD
tSL
0
ns
LOAD High to SCLK
tLC
15
ns
CLR Pulse Width
tCLR
20
ns
Supply Voltage
VDD
4.50
Supply Current
IDD
POWER SUPPLY
5.25
V
All digital inputs at VIL or VIH, CLR = VDD
0.5
1.5
mA
All digital inputs at 0V or VDD, CLR = VDD
0.4
5
µA
_______________________________________________________________________________________
3
MAX551/MAX552
ELECTRICAL CHARACTERISTICS—MAX551 (continued)
MAX551/MAX552
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
ELECTRICAL CHARACTERISTICS—MAX552
(VDD = +2.7V to +3.6V, VREF = 2.5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC PERFORMANCE
Resolution
N
12
Bits
MAX552A
±1/2
MAX552B
±1
Guaranteed monotonic over
temperature
MAX552A
±1/2
MAX552B
±1
Gain Error
Using internal feedback
resistor (RFB)
MAX552A
±1
MAX552B
±2
Gain Tempco
(∆Gain/∆Temp)
Using internal feedback resistor (RFB)
(Note 2)
Integral Nonlinearity
INL
Differential Nonlinearity
DNL
Power-Supply Rejection
PSR
±0.3
∆VDD = +20%, -10%
LSB
LSB
LSB
±1
ppm/°C
1
ppm/%
DYNAMIC PERFORMANCE (Note 3)
TA = +25°C, to 1/2LSB, OUT load is
100Ω||13pF, DAC register alternately loaded
with 1s and 0s
0.12
1
µs
Digital-to-Analog Glitch
VREF = 0V, OUT load is 100Ω||13pF, DAC
register alternately loaded with 1s and 0s
0.6
20
nV-s
AC Feedthrough at OUT
VREF = 3VP-P at 10kHz, DAC register loaded
with all 0s
0.2
0.6
mVP-P
VREF = 6VRMS at 1kHz, DAC register loaded
with all 1s
-85
10Hz to 100kHz, measured between RFB and
OUT
13
15
nV/√Hz
11
15
kΩ
Current Settling Time
Total Harmonic Distortion
tS
THD
Output Noise-Voltage Density
dB
REFERENCE INPUT
Input Resistance
RREF
Measured between REF and OUT
Input Resistance Tempco
Reference -3dB Bandwidth
BW
VOUT = 0.31VP-P, RL = 50Ω, code = full-scale
7
7.5
ppm/°C
725
kHz
ANALOG OUTPUT
DAC register loaded
with all 0s
OUT Leakage Current
OUT Capacitance
4
COUT
TA = +25°C
±0.13
±5
nA
TA = TMIN to TMAX
±25
Code = zero code (Note 2)
14
20
Code = full scale (Note 2)
20
30
_______________________________________________________________________________________
pF
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
(VDD = +2.7V to +3.6V, VREF = 2.5V, VOUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS
Input High Voltage
VIH
Input Low Voltage
VIL
Input Hysteresis
HYST
Input Leakage Current
IIN
Input Capacitance
CIN
2.1
V
0.6
LOAD, CLR, DIN, and SCLK, VDD = 3V
CLR
SCLK, LOAD, DIN
135
V CLR = VDD
V
mV
±1
V CLR = 0V
12
Inputs at 0V or VDD
75
µA
±1
Inputs at 0V or VDD (Note 2)
8
pF
SWITCHING CHARACTERISTICS
SCLK Pulse Width High
tCH
40
ns
SCLK Pulse Width Low
tCL
40
ns
DIN Data to SCLK Setup
tDS
15
ns
DIN Data to SCLK Hold
tDH
15
ns
LOAD Pulse Width
tLD
30
ns
LSB SCLK to LOAD
tSL
0
ns
LOAD High to SCLK
tLC
15
ns
CLR Pulse Width
tCLR
30
ns
Supply Voltage
VDD
2.7
Supply Current
IDD
POWER SUPPLY
3.6
V
All digital inputs at VIL or VIH, CLR = VDD
0.1
0.5
mA
All digital inputs at 0V or VDD, CLR = VDD
0.07
5
µA
Note 1: AGND and CLR are for µMAX only.
Note 2: Guaranteed by design. Not subject to production testing.
Note 3: Parametric limits are provided for design guidance, and are not production tested.
_______________________________________________________________________________________
5
MAX551/MAX552
ELECTRICAL CHARACTERISTICS—MAX552 (continued)
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
MAX551
INL vs. REFERENCE VOLTAGE
0.3
0.2
0.6
VDD = 5.0V
0.4
-0.3
-0.4
0
0
1
0.1
1
3
4
-0.5
5
4.7
LOGIC INPUT VOLTAGE, VIN (V)
FREQUENCY (MHz)
0.5
MAX551/MAX552 TOC2A
VDD = 5.25V
0.3
0.2
VDD = 3.6V
0.4
0.3
0.2
INL (LSB)
0.1
0
0.1
0.2
0
0
-0.2
-0.2
-0.3
-0.3
-0.4
-0.4
-0.4
-0.5
-0.5
5.1
5.2
2.3
2.4
2.5
2.6
2.7
2.8
GAIN (dB)
2.5
2.6
-1
-2
-3
-4
-5
-50
REFERENCE AC FEEDTHROUGH (dB)
MAX551 OR MAX552
VREF = 0.31VP-P, RL = 50Ω
INPUT CODE = ALL 1s
OUTPUT AMPLIFIER = MAX4166
2.4
REFERENCE AC FEEDTHROUGH
vs. FREQUENCY
MAX551/552 toc2
3
0
2.3
REFERENCE VOLTAGE (V)
MULTIPLYING FREQUENCY RESPONSE
1
2.2
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
2
-0.1
-0.5
2.2
5.3
MAX551 OR MAX552
VREF = 0.31VP-P, RL = 50Ω
INPUT CODE = ALL 0s
OUTPUT AMPLIFIER = MAX4166
-60
-70
-80
-90
-6
-100
-7
0.01
0.1
1
FREQUENCY (MHz)
6
5.3
0.1
-0.3
5.0
5.2
0.3
-0.2
4.9
5.1
VDD = 3.6V
0.4
-0.1
4.8
5.0
0.5
-0.1
4.7
4.9
MAX552
DNL vs. REFERENCE VOLTAGE
DNL (LSB)
0.5
4.8
REFERENCE VOLTAGE (V)
MAX552
INL vs. REFERENCE VOLTAGE
MAX551
DNL vs. REFERENCE VOLTAGE
0.4
2
MAX551/MAX552 TOC3A
0.01
MAX551/MAX5452 TOC4A
0.001
0
-0.2
VDD = 3.3V
VDD = 2.7V
-100
0.1
-0.1
0.2
-80
VDD = 5.25V
0.4
INL (LSB)
SUPPLY CURRENT (mA)
-60
0.5
MAX551/MAX552 TOC1A
VIN AT DIN, SCLK, AND LOAD
CLR = VDD
0.8
-40
MAX551/552 toc4
1.0
MAX551/552 toc3
OUTPUT AMPLIFIER = MAX4166
1st 5 HARMONICS
VREF = 0.42VP-P, RL = 50Ω
INPUT CODE = ALL 1s
-20
THD + N (dB)
SUPPLY CURRENT
vs. LOGIC INPUT VOLTAGE
MAX4551/552 TOC1
MAX551
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
0
DNL (LSB)
MAX551/MAX552
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
10
0.01
0.1
FREQUENCY (MHz)
_______________________________________________________________________________________
1
2.7
2.8
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
PIN
NAME
FUNCTION
DIP
µMAX
1
1
OUT
—
2
AGND
2
3
GND
Digital Ground. Also Analog Ground for DIP package.
3
4
VDD
Supply Voltage
4
5
LOAD
5
6
DIN
6
7
SCLK
—
8
CLR
Clear DAC Input. Clears the DAC register. Tie to VDD or float if not used.
7
9
REF
Reference Input
8
10
RFB
Feedback Resistor
DAC Current Output
Analog Ground
Active-Low Load DAC Input. Driving this asynchronous input low transfers the contents
of the input register to the DAC register.
Serial-Data Input
Serial-Clock Input. The serial input data is clocked in on SCLK’s rising edge.
R
R
R
R
VREF
2R
2R
2R
2R
2R
2R
RFB*
RFB
OUT
AGND
D11
(MSB)
D10
D9
D1
DO
(LSB)
RFB* = R
Figure 1. MAX551/MAX552 Simplified Circuit
_______________________________________________________________________________________
7
MAX551/MAX552
______________________________________________________________Pin Description
MAX551/MAX552
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
DIN
BIT 11
MSB
BIT 10
BIT 0
LSB
BIT 1
tDH
tDS
1
2
tCH
11
tCL
SCLK
LOAD SERIAL DATA INTO INPUT REGISTER
tLC
tSL
tLD
LOAD
CLR
tCLR
Figure 2. Write-Cycle Timing Diagram
Detailed Description
The MAX551/MAX552 digital-to-analog converter (DAC)
circuits consist of a laser-trimmed, thin-film R-2R resistor array with NMOS current switches (Figure 1).
Binary-weighted currents are switched to either OUT or
AGND, depending on the status of each input data bit.
Although the currents at OUT and AGND depend on
the digital input code, the sum of the two output currents is always equal to the input current at REF.
The output current (IOUT) can be converted into a voltage by adding an external output amplifier (Figure 3).
The REF input accepts a wide range of signals, including fixed and time-varying voltage or current inputs. If a
current source is used at the reference input, use a
low-tempco, external feedback resistor in place of the
Table 1. Unipolar Binary-Code Table
for Circuit of Figure 3
MSB
1111
1000
0000
0000
DIGITAL INPUT
LSB
1111
0000
0000
0000
1111
0000
0001
0000
internal feedback resistor (RFB) to minimize gain variation with temperature.
The internal feedback resistor (RFB) is compensated
with an NMOS switch that matches the NMOS switches
used in the R-2R array, resulting in excellent supply
rejection and gain-temperature coefficient.
The OUT pin output capacitance (C OUT ) is code
dependent. COUT is typically 14pF at 000hex and 20pF
at FFFhex.
Serial Interface
The MAX551/MAX552 serial interface is compatible
with the SPI/QSPI and MICROWIRE serial-interface
standards. These devices accept serial clocks up to
12.5MHz (50% duty cycle). If the SCLK input is not
+5V (+3V)
VREF
R1
100Ω
REF
ANALOG OUTPUT
4095
−VREF
4096
2048
VREF
−VREF
= −
2
4096
1
−VREF
4096
0
VDD
R2
50Ω
DIN
RFB
SCLK
MAX551
OUT
MAX552
LOAD
GND
C1
15pF
2
6
3
AGND
( ) ARE FOR MAX552
Figure 3. Unipolar Operation
8
_______________________________________________________________________________________
VOUT
+3V/+5V, 12-Bit, Serial, Multiplying DACs
in 10-Pin µMAX Package
MAX551/MAX552
R4
20kΩ
R2
50Ω
+5V (+3V)
C1
33pF
RFB
VDD
OUT
VREF
REF
MAX551
MAX552
SCLK
LOAD
R1
100Ω
R5
20kΩ
R3
10kΩ
AGND
GND
DIN
VOUT
( ) ARE FOR MAX552
Figure 4. Bipolar Operation
Table 2. Offset Binary-Code Table
for Circuit of Figure 4
MSB
DIGITAL INPUT
LSB
ANALOG OUTPUT
1111
1111
1111
2047
+ VREF
2048
1000
0000
0001
1
+ VREF
2048
1000
0000
0000
0111
1111
1111
1
−VREF
2048
0000
0000
0000
2048
−VREF
2048
0
symmetrical, then the clock signal used must meet the
t CH and t CL requirements given in the Electrical
Characteristics.
Figure 2 shows the MAX551/MAX552 timing diagram.
The most significant bit (MSB) is always loaded first on
SCLK’s rising edge. When all data is shifted into the
input register, the DAC register is loaded by driving the
LOAD signal low. The DAC register is transparent when
LOAD is low and latched when LOAD is high. The
MAX551/MAX552 digital inputs are compatible with
CMOS logic levels. The MAX551’s inputs are also compatible with TTL logic.
Unipolar Operation
Figure 3 shows the MAX551/MAX552’s basic application. This circuit is used for unipolar operation or 2quadrant multiplication. The code table for this mode is
given in Table 1. Note that the output’s polarity is the
opposite of the reference voltage polarity.
In many applications the gain accuracy is sufficient and
gain adjustment is not necessary. In these cases, resistors R1 and R2 in Figure 3 can be omitted. If the gain is
trimmed and the DAC is operated over a wide temperature range, use low-tempco (
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