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MAX6470UT33AD3+

MAX6470UT33AD3+

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOT23-6

  • 描述:

    IC REG LIN POS ADJ 300MA SOT23-6

  • 数据手册
  • 价格&库存
MAX6470UT33AD3+ 数据手册
19-2532; Rev 6; 2/11 KIT ATION EVALU E L B AVAILA 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit The MAX6469–MAX6484 are low-dropout linear regulators with a fully integrated microprocessor reset circuit. Each is available with preset output voltages from +1.5V to +3.3V in 100mV increments and delivers up to 300mA of load current. These devices consume only 82µA of supply current. The low supply current, low dropout voltage, and integrated reset functionality make these devices ideal for battery-powered portable equipment. The MAX6469–MAX6484 include a reset output that indicates when the regulator output drops below standard microprocessor supply tolerances (-7.5% or -12.5% of nominal output voltage). This eliminates the need for an external microprocessor supervisor, while ensuring that supply voltages and clock oscillators have stabilized before processor activity is enabled. Push-pull and opendrain active-low reset outputs are available, with reset timeout periods of 2.5ms, 20ms, 150ms, or 1200ms (min). The MAX6469/MAX6470/MAX6473–MAX6478/MAX6481– MAX6484 also have a shutdown feature that reduces the supply current to 0.1µA (typ). The MAX6471–MAX6474/ MAX6479–MAX6482 offer a manual reset input to assert a microprocessor reset while the regulator output is within specification. The MAX6475/MAX6476/MAX6483/ MAX6484 feature a remote feedback sense pin for use with an external NPN transistor for higher-current applications. The MAX6469–MAX6476 are available in 6-pin SOT23 and 8-pin TDFN packages. The MAX6477– MAX6484 are available in a 3 × 3 chip-scale package (UCSP™). All devices are specified for operation from -40°C to +85°C. Applications Handheld Instruments (PDAs, Palmtops) PCMCIA Cards/USB Devices Cellular/Cordless Telephones CD/DVD Drives Notebook Computers Digital Cameras Bluetooth Modules/Wireless LAN UCSP is a trademark of Maxim Integrated Products, Inc. Pin Configurations appear at end of data sheet. Typical Operating Circuits appear at end of data sheet. Features o 3  3 UCSP, 6-Pin SOT23, and 8-Pin TDFN Packages o Preset +1.5V to +3.3V Output (100mV Increments) o SET Pin for Adjustable Output Voltage o 75µVRMS LDO Output Voltage Noise (MAX6477–MAX6484) o ±2.0% Accuracy Over Temperature o Guaranteed 300mA Output Current o Low Dropout Voltage 55mV at 150mA 114mV at 300mA o 82µA Supply Current, 0.1µA Shutdown Current o Input Reverse Current, Thermal and Short-Circuit Protection o Microprocessor Reset with Four Timeout Options o Push-Pull or Open-Drain RESET o Manual Reset Input o Remote Feedback Sense Ordering Information TEMP RANGE PINPACKAGE MAX6469UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6469TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** MAX6470UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6470TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** PART* Ordering Information continued at end of data sheet. *Devices are also available in a lead(Pb)-free/RoHS-compliant packages. Specify lead(Pb)-free by substituting a +T instead of a -T when ordering. **Future product—contact factory for availability. ***EP = Exposed pad. Note: The first “_ _” are placeholders for the output voltage levels of the devices. Desired output voltages are set by the suffix found in the Output Voltage Suffix Guide (Table 1). The third “_” is a placeholder for the reset threshold accuracy. Desired reset threshold accuracy is set by the suffix found in the Reset Threshold Accuracy Guide (Table 2). The “_” following the D is a placeholder for the reset timeout delay time. Desired reset timeout delay time is set by the suffix found in the Reset Timeout Delay Guide (Table 3). For example, the MAX6481BL30BD4-T has a 3.0V output voltage, 12.5% reset threshold tolerance, and a 1200ms (min) reset timeout delay. Sample stock is generally available on standard versions only (Table 4). Standard versions require a minimum order increment of 2.5k units. Nonstandard versions must be ordered in 10k-unit increments. Contact factory for availability. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6469–MAX6484 General Description MAX6469–MAX6484 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) IN, SHDN, OUT, FB ..................................................-0.3V to +7V MR, SET .......................................................-0.3V to (VIN + 0.3V) RESET (push-pull) ...................................-0.3V to (VOUT + 0.3V) RESET (open drain)..................................................-0.3V to +7V OUT Short Circuit .......................................................Continuous Input/Output Current (all pins except IN and OUT) ............20mA Continuous Power Dissipation (TA = +70°C) 3 x 3 UCSP (derate 10.5mW/°C above +70°C) ............840mW 6-Pin SOT23 (derate 9.1mW/°C above +70°C).............727mW 8-Pin TDFN (derate 24.4mW/°C above +70°C) ..........1951mW Operating Temperature Range ..........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) Lead(Pb)-free packages...............................................+260°C Packages containing lead(Pb)......................................+240°C Note 1: The MAX6477–MAX6484 are constructed using a unique set of packaging techniques that impose a limit on the thermal profile the devices can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and Convection reflow. Pre-heating is required. Hand or wave soldering is not allowed. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF, TA = -40°C to +85°C. Typical specifications are at TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER Input Voltage Range Input Undervoltage Lockout Supply Current (Ground Current) Shutdown Supply Current SYMBOL CONDITIONS VIN VUVLO IQ ISHDN VIN falling IOUT = 0A IOUT = 300mA Output Voltage Accuracy (Fixed Output Voltage Operation, Table 1) MAX6477–MAX6484 Adjustable Output Voltage Range SET Reference Voltage SET Dual ModeTM Threshold SET Input Leakage Current 82 96 0.1 UNITS 5.5 2.47 136 V V 1 300 -1.3 -2.3 +1.3 +2.3 1mA ≤ IOUT ≤ 300mA, TA = -40°C to +85°C -2.7 +2.7 2mA ≤ IOUT ≤ 100mA, TA = +25°C -1.1 +1.1 2mA ≤ IOUT ≤ 100mA, TA = -40°C to +85°C -2.0 +2.0 2mA ≤ IOUT ≤ 300mA, TA = -40°C to +85°C (Note 3) -2.5 +2.5 VSET 1.200 VSET = 0V, +1.2V (Note 3) µA µA mA 1.229 185 ±20 Dual Mode is a trademark of Maxim Integrated Products, Inc. 2 MAX 1mA ≤ IOUT ≤ 150mA, TA = +25°C 1mA ≤ IOUT ≤ 150mA, TA = -40°C to +85°C VSET ISET TYP 2.5 2.25 TA = +25°C REGULATOR CIRCUIT Output Current Output Voltage Accuracy (Fixed Output Voltage Operation, Table 1) MAX6469–MAX6476 MIN _______________________________________________________________________________________ 5.0 1.258 ±100 % % V V mV nA 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit (VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF, TA = -40°C to +85°C. Typical specifications are at TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS VOUT = +3.3V (fixed output operation) VOUT = +3.0V (fixed output operation) Dropout Voltage (Notes 3, 4) ∆VDO VOUT = +2.8V (fixed output operation) VOUT = +2.5V (fixed output operation) Output Current Limit VIN ≥ 2.5V (Note 3) Input Reverse Leakage Current (OUT to IN Leakage Current) VIN = 4V, VOUT = 5.5V, SHDN deasserted Startup Time Response Rising edge of VIN or SHDN to VOUT within specification, RL = 68Ω, SET = GND, IOUT = 10mA SHDN Input Low Voltage VIL SHDN Input High Voltage VIH SHDN Input Current Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis MIN IOUT = 50mA IOUT = 150mA IOUT = 300mA IOUT = 50mA IOUT = 150mA IOUT = 300mA IOUT = 50mA IOUT = 150mA IOUT = 300mA IOUT = 50mA IOUT = 150mA IOUT = 300mA TYP MAX UNITS 23 55 114 25 61 114 26 65 137 30 75 158 32 90 180 40 100 190 50 110 210 60 150 250 mV 450 mA 0.01 1.5 20 µs 0.3 × VIN V +1 µA 0.7 × VIN VSHDN = VIN or VGND -1 TSHDN ∆TSHDN µA V 0.1 180 °C 20 °C Line Regulation VOUT = 1.5V, 2.5V ≤ VIN ≤ 5.5V, IOUT = 10mA 0.09 %/V Load Regulation VOUT = 1.5V, VIN = 2.5V, 1mA ≤ IOUT ≤ 150mA 0.2 % Output Voltage Noise 10Hz to 100kHz, CIN = 0.1µF, IOUT = 100mA, VOUT = 1.5V MAX6469–MAX6476 150 MAX6477–MAX6484 75 µVRMS RESET CIRCUIT VOUT Reset Threshold (VFB for MAX6475/MAX6476/ MAX6483/MAX6484) (Note 5) VTHOUT MAX64_ _ _ _ _ _ A 90 92.5 95 MAX64_ _ _ _ _ _ B 85 87.5 90 VOUT to Reset Delay (VFB for MAX6475/MAX6476/ MAX6483/MAX6484) Reset Timeout Period (Note 6) 35 tRP %VOUT µs D1 2.5 3.75 D2 20 30 5.0 40 D3 150 225 300 D4 1200 1800 2400 ms _______________________________________________________________________________________ 3 MAX6469–MAX6484 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF, TA = -40°C to +85°C. Typical specifications are at TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL MR Input Low Voltage VIL MR Input High Voltage VIH CONDITIONS MIN TYP MAX UNITS 0.3 × VOUT V 0.7 × VOUT (Note 3) MR Minimum Input Pulse V 1 µs MR Glitch Rejection 120 ns MR to Reset Delay 200 ns MR Pullup Resistance MR to OUT RESET Output Voltage (Open Drain) VOL VOUT ≥ 1.0V, ISINK = 50µA, RESET asserted 0.3 VOUT ≥ 1.5V, ISINK = 3.2mA, RESET asserted 0.4 Open-Drain Reset Output Leakage Current ILKG 40 70 V µA 0.3 VOUT ≥ 1.5V, ISINK = 3.2mA, RESET asserted 0.4 VOUT ≥ 2.0V, ISOURCE = 500µA, RESET deasserted VOH kΩ 1 VOUT ≥ 1.0V, ISINK = 50µA, RESET asserted RESET Output Voltage Push-Pull Note 2: Note 3: Note 4: Note 5: Note 6: 25 (Note 3) VOL 0.8 × VOUT V All devices are 100% production tested at +25°C and are guaranteed by correlation for TA = TMIN to TMAX. Guaranteed by design. Dropout voltage is defined as (VIN - VOUT) when VOUT is 2% below the value of VOUT for VIN = VOUT(NOM) + 1V. MAX6473/MAX6474/MAX6481/MAX6482 are guaranteed by design for VOUT < 2.5V. Select the reset timeout period using the Reset Timeout Delay Guide (Table 3). Insert the appropriate suffix in the part number when ordering. Typical Operating Characteristics (VIN = 5V, VOUT = 3.3V, COUT = 3.3µF, TA = +25°C, unless otherwise noted.) 60 40 20 1 2 3 4 INPUT VOLTAGE (V) 5 6 150 MAX6469 toc02 80 60 +25°C -40°C 40 125 RESET ASSERTS ABOVE THIS LINE 100 75 50 25 0 0 4 +85°C 20 0 MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE PULSE DURATION (µs) -40°C 80 100 GROUND CURRENT (µA) +85°C +25°C 100 120 MAX6469 toc01 120 GROUND CURRENT vs. INPUT VOLTAGE (300mA LOAD) MAX6469 toc03 GROUND CURRENT vs. INPUT VOLTAGE (NO LOAD) GROUND CURRENT (µA) MAX6469–MAX6484 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit 0 0 1 2 3 4 INPUT VOLTAGE (V) 5 6 10 1 RESET THRESHOLD OVERDRIVE (mV) _______________________________________________________________________________________ 100 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit DROPOUT VOLTAGE vs. LOAD CURRENT -10 VOUT = 3.3V COUT = 3.3µF ILOAD = 30mA PSRR (dB) 50 4 COUT ESR (Ω) -20 75 -30 MAX6469 toc06 100 5 MAX6469 toc05 VOUT = 3.3V COUT = 3.3µF 3 COUT = 4.7µF 2 COUT = 3.3µF -40 25 1 -50 STABLE REGION 0 0 -60 50 100 150 200 250 300 0.01 0.1 OUTPUT NOISE MAX6469 toc07 100 1000 0 50 100 150 200 LOAD CURRENT (mA) OUTPUT NOISE vs. FREQUENCY SHUTDOWN RESPONSE VIN = 2.5V VOUT = 1.5V IOUT = 100mA 80 100µV/div 10 250 300 MAX6469 toc09 100 VIN = 4.5V VOUT = 3.3V ILOAD = 100mA 1 FREQUENCY (kHz) LOAD CURRENT (mA) MAX6469 toc08 0 VRMS (µV) DROPOUT VOLTAGE (mV) 0 MAX6469 toc04 125 REGION OF STABLE COUT ESR vs. LOAD CURRENT PSRR vs. FREQUENCY MAX6469–MAX6484 Typical Operating Characteristics (continued) (VIN = 5V, VOUT = 3.3V, COUT = 3.3µF, TA = +25°C, unless otherwise noted.) VSHDN 5V/div 60 40 VOUT 2V/div 20 ILOAD = 50mA 0 10 500µs/div 100 1k 10k 100k 20ms/div FREQUENCY (Hz) STARTUP RESPONSE MAX6469 toc10 MAX6469 toc12 MAX6469 toc11 VIN 2V/div VIN = 5V VOUT = 3.3V ILOAD = 100mA VIN = 5V VOUT = 3.3V ILOAD = 10mA TO 300mA VOUT 5mV/div VOUT 20mV/div VOUT 2V/div 10µs/div LOAD-TRANSIENT RESPONSE NEAR DROPOUT LOAD-TRANSIENT RESPONSE 100µs/div 10µs/div _______________________________________________________________________________________ 5 Typical Operating Characteristics (continued) (VIN = 5V, VOUT = 3.3V, COUT = 3.3µF, TA = +25°C, unless otherwise noted.) LINE-TRANSIENT RESPONSE RESET RESPONSE TO MR RESET DELAY RESPONSE MAX6469 toc13 MAX6469 toc15 MAX6469 toc14 5V 4.5V VIN 500mV/div VIN 1V TO 4V 2V/div MR 2V/div RESET 2V/div RESET 2V/div VOUT 20mV/div AC-COUPLED VOUT = 3.3V ILOAD = 10mA 100µs/div 200ns/div 200ms/div MAX6469 toc16 1.012 RESET 2V/div VOUT 2V/div VIN 5V/div MAX6469 toc17 NORMALIZED OUTPUT VOLTAGE vs. TEMPERATURE RESET RESPONSE TO VIN RISING NORMALIZED OUTPUT VOLTAGE MAX6469–MAX6484 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit NORMALIZED TO +25°C 1.006 ILOAD = 10mA 1.000 0.994 ILOAD = 150mA ILOAD = 300mA 0.988 200ms/div -40 -15 10 35 60 TEMPERATURE (°C) 6 _______________________________________________________________________________________ 85 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit PIN BUMP MAX6469/MAX6470 MAX6477/MAX6478 SOT23 TDFN-EP UCSP 1 1, 2 A1 NAME IN FUNCTION Regulator Input. Bypass IN to GND with a 0.1µF capacitor. 2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 3 4 A3 SHDN Active-Low Shutdown Input. Connect SHDN to VIN for normal operation. 4 5 C3 RESET Active-Low Reset Output. RESET remains low while VOUT is below the reset threshold. RESET remains low for the duration of the reset timeout period after the reset conditions are terminated. RESET is available in open-drain and push-pull configurations. 5 6 C2 SET Feedback Input for Externally Setting the Output Voltage. Connect SET to GND to select the preset output voltage. Connect SET to an external resistor-divider network for adjustable output operation. 6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR capacitor. — — — EP Exposed Paddle (TDFN Only). EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal-resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. MAX6471/MAX6472/MAX6479/MAX6480 Pin Description PIN BUMP MAX6471/MAX6472 MAX6479/MAX6480 SOT23 TDFN-EP UCSP 1 1, 2 A1 2 3 3 4 A2 A3 NAME IN GND MR Active-Low Reset Output. RESET remains low while VOUT is below the reset threshold or while MR is held low. RESET remains low for the duration of the reset timeout period after the reset conditions are terminated. RESET is available in open-drain and push-pull configurations. 5 C3 RESET 5 6 C2 SET 6 7, 8 C1 OUT — — Regulator Input. Bypass IN to GND with a 0.1µF capacitor. Ground. This pin also functions as a heatsink. Solder to large pads or the circuit-board ground plane to maximize thermal dissipation. Active-Low Manual Reset Input. The reset output is asserted while MR is pulled low and remains asserted for the duration of the reset timeout period after MR transitions from low to high. Leave MR unconnected or connect to VOUT if not used. MR has an internal pullup resistor of 40kΩ (typ) to VOUT. 4 — FUNCTION EP Feedback Input for Externally Setting the Output Voltage. Connect SET to GND to select the preset output voltage. Connect SET to an external resistor-divider network for adjustable output operation. Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR capacitor. Exposed Paddle (TDFN Only). EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal-resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. _______________________________________________________________________________________ 7 MAX6469–MAX6484 MAX6469/MAX6470/MAX6477/MAX6478 Pin Description 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit MAX6469–MAX6484 MAX6473/MAX6474/MAX6481/MAX6482 Pin Description PIN BUMP MAX6473/MAX6474 MAX6481/MAX6482 NAME FUNCTION SOT23 TDFN-EP UCSP 1 1, 2 A1 IN 2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 3 4 A3 SHDN Active-Low Shutdown Input. Connect SHDN to VIN for normal operation. RESET Active-Low Reset Output. RESET remains low while VOUT is below the reset threshold or while MR is held low. RESET remains low for the duration of the reset timeout period after the reset conditions are terminated. RESET is available in open-drain and push-pull configurations. Active-Low Manual Reset Input. The reset output is asserted while MR is pulled low and remains asserted for the duration of the reset timeout period after MR transitions from low to high. Leave MR unconnected or connect to VOUT if not used. MR has an internal pullup resistor of 40kΩ (typ) to VOUT. 4 5 C3 Regulator Input. Bypass IN to GND with a 0.1µF capacitor. 5 6 C2 MR 6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF (min) low-ESR capacitor. EP Exposed Paddle (TDFN Only). EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal-resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. — — — MAX6475/MAX6476/MAX6483/MAX6484 Pin Description PIN BUMP MAX6475/MAX6476 MAX6483/MAX6484 FUNCTION TDFN-EP UCSP 1 1, 2 A1 IN 2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or the circuit-board ground plane to maximize thermal dissipation. 3 4 A3 SHDN Active-Low Shutdown Input. Connect SHDN to VIN for normal operation. Regulator Input. Bypass IN to GND with a 0.1µF capacitor. 4 5 C3 RESET Active-Low Reset Output. RESET remains low while FB is below the reset threshold. RESET remains low for the duration of the reset timeout period after the reset conditions are terminated. RESET is available in open-drain and push-pull configurations. 5 6 C2 FB Feedback Input for Linear Regulator Controller or Remote Sense Applications. Connect FB to the external load (VCC) to obtain the fixed output voltage. 6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR capacitor. — 8 NAME SOT23 — — EP Exposed Paddle (TDFN Only). EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal-resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND. _______________________________________________________________________________________ 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit 2.5V TO 5.5V IN OUT MAX6469–MAX6472 MAX6477–MAX6480 SET (MR) MANUAL RESET R1 COUT GND R2 Regulator The regulator core operates with +2.5V to +5.5V input voltage range. The output voltage is offered in 100mV increments between +1.5V and +3.3V (contact factory for other output voltage options). The MAX6469– MAX6472/MAX6477–MAX6480 offer an adjustable output voltage implemented with an external resistordivider network between OUT, SET, and GND (Figure 1). SET must be connected to either GND for fixed VOUT or to an external divider for adjustable VOUT. The MAX6469–MAX6472/MAX6477–MAX6480 automatically determine the feedback path depending on the connection of SET. The Typical Operating Circuit shows a typical connection for the MAX6469. OUT is an internally regulated low-dropout (LDO) linear regulator that powers a microprocessor. Reset Circuit The reset supervisor circuit is fully integrated in the MAX6469–MAX6484 and uses the same reference voltage as the regulator. Two supply tolerance reset thresholds, -7.5% and -12.5%, are provided for each type of device. -7.5% Reset: Reset does not assert until the regulator output voltage is at least -5% out of tolerance and always asserts before the regulator output voltage is -10% out of tolerance. -12.5% Reset: Reset does not assert until the regulator output voltage is at least -10% out of tolerance and always asserts before the regulator output voltage is -15% out of tolerance. RESET Output A µP’s reset input starts the µP in a known state. The MAX6469–MAX6484 µP supervisory circuits assert RESET during power-up, power-down, and brownout conditions. RESET asserts when the input voltage is below the undervoltage lockout threshold. RESET asserts when VOUT is below the reset threshold and remains asserted for at least the minimum selected reset timeout period (tRP, Table 3) after VIN rises above the undervoltage lockout threshold and VOUT rises above ( ) ARE FOR MAX6471/MAX6472/MAX6479/MAX6480 ONLY Figure 1. Adjustable Output Voltage Configuration the reset threshold. RESET asserts when MR is pulled low (MAX6471–MAX6474/MAX6479–MAX6482). RESET asserts when SHDN is pulled low (MAX6469/ MAX6470/MAX6473–MAX6478/MAX6481–MAX6484). Shutdown (MAX6469/MAX6470/MAX6473–MAX6478/MAX6481– MAX6484 only) SHDN allows the regulator to shut down, thereby reducing the total IIN consumption of the device. SHDN provides a digitally controlled active-low shutdown. In shutdown mode, the pass transistor, control circuit, and reference turn off to reduce the supply current to below 0.1µA. Connect SHDN to IN for normal operation. Manual Reset Input (MAX6471–MAX6474/MAX6479–MAX6482 only) Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR asserts reset while the regulator output voltage is still within tolerance. Reset remains asserted while MR is low and for the reset timeout period (tRP) after MR returns high. The MR input has an internal pullup of 40kΩ (typ) to OUT. MR can be driven with TTL/CMOS logic levels or with open-drain/collector outputs. Connect a normally open switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. Feedback Input (MAX6475/MAX6476/MAX6483/MAX6484 only) The feedback input (FB) connects to an internal resistordivider network (Functional Diagram). FB is not internally connected to VOUT, and as a result can be used to _______________________________________________________________________________________ 9 MAX6469–MAX6484 Detailed Description The MAX6469–MAX6484 are ultra-low, quiescent current, low-dropout linear regulators with an integrated microprocessor reset circuit. These devices guarantee 300mA (min) drive capabilities and are available with preset output voltages in 100mV increments between +1.5V and +3.3V. The internal reset circuit monitors the regulator output voltage and asserts the reset output when the regulator output is below the microprocessor supply tolerance. MAX6469–MAX6484 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit remotely sense the output voltage of the device. Using FB with an external npn transistor, the current drive capability can be increased according to the following equation (Figure 2): IOUT(TOTAL) = IOUT  (β+1) The external npn pass transistor must meet specifications for current gain, power dissipation, and collector current. The beta influences the maximum output current the circuit can deliver. The largest guaranteed output current is given by ILOAD (max) = 300mA × beta (min). The transistor’s rated power dissipation must exceed the actual power dissipated in the transistor. The power dissipated (PD) equals the maximum load current (ILOAD (max)) times the maximum input-to-output voltage differential: PD = ILOAD (max) × (VIN (max) V OUT ). The rated transistor collector current must exceed the maximum load current. Reverse Leakage Protection Reverse OUT to IN Current An internal circuit monitors the MAX6469–MAX6484 input and output voltages. When the output voltage is greater than the input voltage, the internal IN-to-OUT pass transistor and parasitic diode turn off. An external voltage applied to OUT does not reverse charge a battery or power source applied to IN (the leakage path from OUT to IN is 0.01µA typ). When the output voltage exceeds the input voltage, OUT powers the device and shutdown must be logic high (greater than 0.7  VOUT). RESET asserts until IN exceeds OUT and OUT is above the specified VTHOUT threshold (based on the selected or adjusted regulator OUT nominal voltage). OUT-to-GND current through the LDO is 40µA (typ). The regulator output can be held up with an external super capacitor or backup battery at OUT until the IN battery is replaced. The RESET output is asserted while the IN battery is removed to place the system in a low-power mode. Volatile memory content is maintained until the super capacitor or battery voltage drops below RAM standby specifications. RESET deasserts when the IN battery has been replaced and OUT exceeds the desired reset threshold. For nonrechargeable backup battery applications, place a reverse diode between OUT and the backup battery (to prevent battery charging). The external diode does not affect the regulator’s dropout voltage because it is not between the LDO output and the processor/memory VCC supply. The diode can be replaced with a current-limiting resistor for rechargeable backup battery applications. Current Limit The MAX6469–MAX6484 include an internal currentlimit circuit that monitors and controls the pass transistor’s gate voltage, limiting the output current to 450mA (min). The output can be shorted to ground indefinitely without damaging the part. Thermal Shutdown When the junction temperature (TJ) exceeds +180°C (typ), the thermal sensor signals the shutdown logic, turning off the pass transistor and allowing the IC to REMOVABLE LITHIUM ION OR 3-CELL ALKALINE IN Reverse OUT to Ground Current The MAX6469–MAX6484 maintain a low OUT-to-GND reverse-current flow when the IN power source is removed. When IN floats (input battery removed) and SHDN is pulled up to VOUT (by an external diode), the OUT MAX6469– MAX6484 3.3µF 3.0V LITHIUM µP MEMORY µP MEMORY SHDN 5.0V 1A TOTAL CURRENT IN VCC = 3.3V REMOVABLE LITHIUM ION OR 3-CELL ALKALINE OUT IN OUT MAX6475/MAX6476 MAX6483/MAX6484 330Ω 3.3µF 0.1µF MAX6469– MAX6484 RPULLUP FB µP 3.3µF SUPERCAP SHDN GND RESET Figure 2. High-Current, External Transistor Application 10 Figure 3. Battery Backup ______________________________________________________________________________________ 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit Operating Region and Power Dissipation The MAX6469–MAX6484’s maximum power dissipation depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and the ambient air, and the rate of airflow. The power dissipation across the device is: P = IOUT (VIN - VOUT) The maximum power dissipation is: PMAX = (TJ - TA) / (ØJB + ØBA) where TJ - TA is the temperature difference between the die junction and the surrounding air, ØJB (or ØJC) is the thermal resistance of the package, and ØBA is the thermal resistance through the PC board, copper traces, and other materials to the surrounding air. The MAX6469–MAX6476 TDFN package ØJC = 41°C/W, and the MAX6469–MAX6476 SOT package Ø JC = 110°C/W. The MAX6469–MAX6484’s ground pin (GND) performs the dual function of providing an electrical connection to the system ground and channeling heat away. Connect GND to the system ground using a large pad or ground plane. For continuous operation, do not exceed the absolute maximum junction temperature rating of TJMAX = +150°C. Applications Information Choose R2 = 50kΩ to maintain stability, accuracy and high-frequency power-supply rejection. Avoid selecting resistor values greater than 100kΩ. In preset voltage mode, the impedance between SET and ground should always be less than 50kΩ. In most applications, connect SET directly to ground. Low-Noise UCSP Output MAX6477–MAX6484 UCSP products include internal filtering to yield low output noise without an additional external bypass capacitor. The devices yield 75µVRMS (typ) output noise (for VOUT = 3.0V) and 150µVRMS (for V OUT = 3.3V). This low-noise feature makes the MAX6477–MAX6484 ideal for audio applications. Capacitor Selection and Regulator Stability For stable operation over the full temperature range and with load currents up to 300mA, use a 3.3µF (min) ceramic output capacitor with an ESR
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