MAX6730–MAX6735
General Description
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
The MAX6730–MAX6735 single/dual/triple-voltage microprocessor (μP) supervisors feature a watchdog timer and
manual reset capability. The MAX6730–MAX6735 offer
factory-set reset thresholds for monitoring voltages from
+0.9V to +5V and an adjustable reset input for monitoring
voltages down to +0.63V. The combination of these features
significantly improves system reliability and accuracy when
compared to separate ICs or discrete components.
The active-low reset output asserts and remains asserted
for the reset timeout period after all the monitored voltages
exceed their respective thresholds. Multiple factory-set reset
threshold combinations reduce the number of external
components required. The MAX6730/MAX6731 monitor a
single fixed voltage, the MAX6732/MAX6733 monitor two
fixed voltages, and the MAX6734/MAX6735 monitor two
fixed voltages and one adjustable voltage. All devices are
offered with six minimum reset timeout periods ranging from
1.1ms to 1120ms.
The MAX6730–MAX6735 feature a watchdog timer with
an independent watchdog output. The watchdog timer
prevents system lockup during code execution errors. A
watchdog startup delay of 54s after reset asserts allows
system initialization during power-up. The watchdog operates
in normal mode with a 1.68s delay after initialization. The
MAX6730/MAX6732/MAX6734 provide an active-low,
open-drain watchdog output. The MAX6731/MAX6733/
MAX6735 provide an active-low, push-pull watchdog
output.
Other features include a manual reset input (MAX6730/
MAX6731/MAX6734/MAX6735) and push-pull reset output
(MAX6731/MAX6733/MAX6735) or open-drain reset
output (MAX6730/MAX6732/MAX6734). The MAX6730–
MAX6733 are offered in a tiny SOT23-6 package. The
MAX6734/MAX6735 are offered in a space-saving
SOT23-8 package. All devices are fully specified over the
extended -40°C to +85°C temperature range.
Benefits and Features
●● VCC1 (Primary Supply) Reset Threshold Voltages
from +1.575V to +4.63V
●● VCC2 (Secondary Supply) Reset Threshold Voltages
from +0.79V to +3.08V
●● Adjustable RSTIN Threshold for Monitoring Voltages
Down to +0.63V (MAX6734/MAX6735 Only)
●● Six Reset Timeout Options
●● Watchdog Timer with Independent Watchdog Output
• 35s (min) Initial Watchdog Startup Period
• 1.12s (min) Normal Watchdog Timeout Period
●● Manual Reset Input
(MAX6730/MAX6731/MAX6734/MAX6735)
●● Guaranteed Reset Valid down to
VCC1 or VCC2 = +0.8V
●● Push-Pull RESET or Open-Drain RESET Output
●● Immune to Short VCC Transients
●● Low Supply Current: 14μA (typ) at +3.6V
●● Small 6-Pin and 8-Pin SOT23 Packages
●● AEC-Q100 Qualified: MAX6734KATGD3/V+T,
MAX6734KALTD3/V+T
Pin Configurations appear at end of data sheet.
Typical Operating Circuit
Multivoltage Systems
Telecom/Networking Equipment
Computers/Servers
Portable/Battery-Operated Equipment
Industrial Equipment
Printer/Fax
Set-Top Boxes
19-2629; Rev 9; 10/17
+3.3V
VCC1
VCC2
RSTIN
RST
MAX6734
MAX6735 WDI
Applications
●●
●●
●●
●●
●●
●●
●●
+1.8V
+0.9V
VCORE
PUSHBUTTON
SWITCH
WDO
VCC
(I/O)
VDD
(MEMORY)
RESET
I/O
µP
NMI
MR
GND
GND
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Absolute Maximum Ratings
VCC1, VCC2, RSTIN, MR, WDI to GND...................-0.3V to +6V
RST, WDO to GND (open drain)..............................-0.3V to +6V
RST, WDO to GND (push-pull)............... -0.3V to (VCC1 + 0.3V)
Input Current/Output Current (all pins)................................20mA
Continuous Power Dissipation (TA = +70°C)
6-Pin SOT23-6 (derate 4.3mW/°C above +70°C).....347.8mW
8-Pin SOT23-8 (derate 5.6mW/°C above +70°C).....444.4mW
Operating Temperature Range............................ -40°C to +85°C
Storage Temperature Range............................. -65°C to +150°C
Junction Temperature.......................................................+150°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)
Lead (Pb)-free packages.............................................+260°C
Package containing lead (Pb) .....................................+240°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
6 SOT23
Junction-to-Ambient Thermal Resistance (θJA).........230°C/W
Junction-to-Case Thermal Resistance (θJC)................76°C/W
8 SOT23
Junction-to-Ambient Thermal Resistance (θJA).........180°C/W
Junction-to-Case Thermal Resistance (θJC)................60°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VCC1 = VCC2 = +0.8V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
Supply Voltage
SYMBOL
VCC1,
VCC2
ICC1
Supply Current
ICC2
VCC1 Reset Threshold
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CONDITIONS
VTH1
MIN
TYP
0.8
MAX
UNITS
5.5
V
VCC1 < +5.5V, all I/O connections
open, outputs not asserted
15
39
VCC1 < +3.6V, all I/O connections
open, outputs not asserted
10
28
VCC2 < +3.6V, all I/O connections
open, outputs not asserted
4
11
VCC2 < +2.75V, all I/O connections
open, outputs not asserted
3
9
µA
L (falling)
4.500
4.625
4.750
M (falling)
4.250
4.375
4.500
T (falling)
3.000
3.075
3.150
S (falling)
2.850
2.925
3.000
R (falling)
2.550
2.625
2.700
Z (falling)
2.250
2.313
2.375
Y (falling)
2.125
2.188
2.250
W (falling)
1.620
1.665
1.710
V (falling)
1.530
1.575
1.620
V
Maxim Integrated │ 2
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Electrical Characteristics (continued)
(VCC1 = VCC2 = +0.8V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
VCC2 Reset Threshold
SYMBOL
VTH2
CONDITIONS
MIN
TYP
MAX
T (falling)
3.000
3.075
3.150
S (falling)
2.850
2.925
3.000
R (falling)
2.550
2.625
2.700
Z (falling)
2.250
2.313
2.375
Y (falling)
2.125
2.188
2.250
W (falling)
1.620
1.665
1.710
V (falling)
1.530
1.575
1.620
I (falling)
1.350
1.388
1.425
H (falling)
1.275
1.313
1.350
G (falling)
1.080
1.110
1.140
F (falling)
1.020
1.050
1.080
E (falling)
0.810
0.833
0.855
D (falling)
0.765
0.788
0.810
Reset Threshold Tempco
Reset Threshold Hysteresis
VHYST
VCC_ to RST Output Delay
tRD
Reset Timeout Period
tRP
UNITS
V
20
ppm/°C
Referenced to VTH typical
0.5
%
VCC1 = (VTH1 + 100mV) to
(VTH1 - 100mV) or
VCC2 = (VTH2 + 75mV) to
(VTH2 - 75mV)
45
µs
D1
1.1
1.65
2.2
D2
8.8
13.2
17.6
D3
140
210
280
D5
280
420
560
D6
560
840
1120
D4
1120
1680
2240
626.5
ms
ADJUSTABLE RESET COMPARATOR INPUT (MAX6734/MAX6735)
RSTIN Input Threshold
VRSTIN
611
RSTIN Input Current
IRSTIN
-25
RSTIN Hysteresis
RSTIN to Reset Output Delay
tRSTIND
VRSTIN to (VRSTIN - 30mV)
642
mV
+25
nA
3
mV
22
µs
MANUAL RESET INPUT (MAX6730/MAX6731/MAX6734/MAX6735)
MR Input Threshold
VIL
VIH
0.3 x VCC1
0.7 x VCC1
1
MR Minimum Pulse Width
MR Glitch Rejection
MR to Reset Output Delay
MR Pullup Resistance
www.maximintegrated.com
tMR
25
V
µs
100
ns
200
ns
50
80
kΩ
Maxim Integrated │ 3
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Electrical Characteristics (continued)
(VCC1 = VCC2 = +0.8V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
35
54
72
1.12
1.68
2.24
UNITS
WATCHDOG INPUT
Watchdog Timeout Period
WDI Pulse Width
WDI Input Voltage
WDI Input Current
tWD-L
First watchdog period after reset
timeout period
tWD-S
Normal mode
tWDI
(Note 3)
50
VIL
IWDI
ns
0.3 x VCC1
VIH
0.7 x VCC1
WDI = 0 or VCC1
-1
s
+1
V
µA
RESET/WATCHDOG OUTPUT
RST/WDO Output Low Voltage
(Push-Pull or Open Drain)
RST/WDO Output High Voltage
(Push-Pull Only)
RST/WDO Output Open-Drain
Leakage Current
VOL
VOH
VCC1 or VCC2 ≥ +0.8V,
ISINK = 1µA, output asserted
0.3
VCC1 or VCC2 ≥ +1.0V,
ISINK = 50µA, output asserted
0.3
VCC1 or VCC2 ≥ +1.2V,
ISINK = 100µA, output asserted
0.3
VCC1 or VCC2 ≥ +2.7V,
ISINK = 1.2mA, output asserted
0.3
VCC1 or VCC2 ≥ +4.5V,
ISINK = 3.2mA, output asserted
0.4
VCC1 ≥ +1.8V, ISOURCE = 200µA,
output not asserted
0.8 x VCC1
VCC1 ≥ +2.7V, ISOURCE = 500µA,
output not asserted
0.8 x VCC1
VCC1 ≥ +4.5V, ISOURCE = 800µA,
output not asserted
0.8 x VCC1
Output not asserted
V
V
0.5
µA
Note 2: Devices tested at TA = +25°C. Overtemperature limits are guaranteed by design and not production tested.
Note 3: Parameter guaranteed by design.
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Maxim Integrated │ 4
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Typical Operating Characteristics
(VCC1 = +5V, VCC2 = +3.3V, TA = +25°C, unless otherwise noted.)
10
8
6
ICC2
4
2
TOTAL
12
10
8
ICC1
6
4
16
ICC2
2
-15
10
35
60
0
85
-40
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
16
14
12
TOTAL
8
6
ICC1
4
2
0
-15
10
35
60
ICC2
-40
-15
10
35
TEMPERATURE (°C)
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8
ICC1
6
4
ICC2
0
85
-40
60
85
-15
10
35
60
85
TEMPERATURE (°C)
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +1.8V, VCC2 = +1.2V)
10
TOTAL
10
TEMPERATURE (°C)
MAX6730-35 toc04
18
12
1.010
NORMALIZED THRESHOLD VOLTAGE
vs. TEMPERATURE
MAX6730-35 toc05
-40
14
2
NORMALIZED THRESHOLD VOLTAGE
0
14
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +2.5V, VCC2 = +1.8V)
MAX6730-35 toc03
16
18
SUPPLY CURRENT (µA)
ICC1
12
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +3.3V, VCC2 = +2.5V)
MAX6730-35 toc02
TOTAL
14
18
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
16
MAX6730-35 toc01
18
SUPPLY CURRENT vs. TEMPERATURE
(VCC1 = +5V, VCC2 = +3.3V)
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990
-40
-15
10
35
60
85
TEMPERATURE (°C)
Maxim Integrated │ 5
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Typical Operating Characteristics (continued)
(VCC1 = +5V, VCC2 = +3.3V, TA = +25°C, unless otherwise noted.)
1.0035
1.0030
1.0025
1.0020
1.0015
1.0010
1.0005
1.0000
0.9995
10
35
60
85
RST
2V/div
10
1
MAX6730-35 toc09
VCC_ TO RESET OUTPUT DELAY (µs)
10
100
1000
VCC_ TO RESET OUTPUT DELAY
vs. TEMPERATURE (100mV OVERDRIVE)
70
65
60
55
50
45
-45
-15
10
35
TEMPERATURE (°C)
www.maximintegrated.com
MR
2V/div
RESET THRESHOLD OVERDRIVE (mV)
75
40
MAX6730-35 toc08
100
TEMPERATURE (°C)
80
MR TO RESET OUTPUT DELAY
60
85
40ns/div
RSTIN TO RESET OUTPUT DELAY
vs. TEMPERATURE
30
MAX6730-35 toc10
-15
-40
RST ASSERTS
ABOVE THIS LINE
1000
RSTIN TO RESET OUTPUT DELAY (µs)
0.9990
10,000
MAXIMUM VCC_ TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6730-35 toc07
MAX6730-35 toc06
NORMALIZED TIMEOUT PERIOD
1.0040
MAXIMUM VCC_ TRANSIENT DURATION (ms)
NORMALIZED TIMEOUT PERIOD
vs. TEMPERATURE
28
26
24
22
20
18
16
14
12
10
-45
-15
10
35
60
85
TEMPERATURE (°C)
Maxim Integrated │ 6
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Pin Configurations
TOP VIEW
RST 1
GND 2
+
MAX6730
MAX6731
WDO 3
SOT23-6
6
VCC1
RST 1
5
WDI
GND 2
4
MR
WDO 3
+
MAX6732
MAX6733
6
VCC1
5
WDI
4
VCC2
RST 1
GND 2
WDI
3
+
MAX6734
MAX6735
WDO 4
SOT23-6
8
VCC1
7
RSTIN
6
VCC2
5
MR
SOT23-8
Pin Description
MAX6730
MAX6731
PIN
MAX6732
MAX6733
MAX6734
MAX6735
NAME
1
1
1
RST
2
2
2
GND
FUNCTION
Active-Low Reset Output. The MAX6730/MAX6732/MAX6734 provide an open-drain
output. The MAX6731/MAX6733/MAX6735 provide a push-pull output. RST asserts
low when any of the following conditions occur: VCC1 or VCC2 drops below its
preset threshold, RSTIN drops below its reset threshold, or MR is driven low. Opendrain versions require an external pullup resistor.
Ground
Active-Low Watchdog Output. The MAX6730/MAX6732/MAX6734 provide an
open-drain WDO output. The MAX6731/MAX6733/MAX6735 provide a push-pull
WDO output. WDO asserts low when no low-to-high or high-to-low transition occurs
on WDI within the watchdog timeout period (tWD) or if an undervoltage lockout
condition exists for VCC1, VCC2, or RSTIN. WDO deasserts without a timeout period
when VCC1, VCC2, and RSTIN exceed their reset thresholds, or when the manual
reset input is asserted. Open-drain versions require an external pullup resistor.
3
3
4
4
—
5
MR
5
5
3
WDI
6
6
8
VCC1
Primary Supply-Voltage Input. VCC1 provides power to the device when it is greater
than VCC2. VCC1 is the input to the primary reset threshold monitor.
—
4
6
VCC2
Secondary Supply-Voltage Input. VCC2 provides power to the device when it is
greater than VCC1. VCC2 is the input to the secondary reset threshold monitor.
7
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance
comparator input for the adjustable reset monitor. RST asserts low if the voltage
RSTIN at RSTIN drops below the 626mV internal reference voltage. Connect a resistive
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect RSTIN to
VCC1 or VCC2 if unused.
—
—
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WDO
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains
asserted as long as MR is low and for the reset timeout period after MR releases
high. MR has a 50kΩ pullup resistor to VCC1; leave MR open or connect to VCC1 if
unused.
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period, the internal watchdog timer expires and the watchdog output asserts low.
The internal watchdog timer clears whenever RST asserts or a rising or falling edge
on WDI is detected. The watchdog has an initial watchdog timeout period (35s min)
after each reset event and a short timeout period (1.12s min) after the first valid WDI
transition. Leaving WDI unconnected does not disable the watchdog timer function.
Maxim Integrated │ 7
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Table 1. Reset Voltage Threshold Suffix
Guide**
VCC1 NOMINAL
VOLTAGE
THRESHOLD(V)
VCC2 NOMINAL
VOLTAGE
THRESHOLD (V)
LT
4.625
3.075
MS
4.375
2.925
MR
4.375
2.625
TZ
3.075
2.313
SY
2.925
2.188
PART NO. SUFFIX
RY
2.625
2.188
TW
3.075
1.665
SV
2.925
1.575
RV
2.625
1.575
TI
3.075
1.388
SH
2.925
1.313
RH
2.625
1.313
TG
3.075
1.110
SF
2.925
1.050
RF
2.625
1.050
TE
3.075
0.833
SD
2.925
0.788
RD
2.625
0.788
ZW
2.313
1.665
YV
2.188
1.575
ZI
2.313
1.388
YH
2.188
1.313
ZG
2.313
1.110
YF
2.188
1.050
ZE
2.313
0.833
YD
2.188
0.788
WI
1.665
1.388
VH
1.575
1.313
WG
1.665
1.110
VF
1.575
1.050
WE
1.665
0.833
VD
1.575
0.788
Table 2. Reset Timeout Period Suffix
Guide
ACTIVE TIMEOUT PERIOD
TIMEOUT PERIOD
SUFFIX
MIN (ms)
MAX (ms)
D1
1.1
2.2
D2
8.8
17.6
D3
140
280
D5
280
560
D6
560
1120
D4
1120
2240
Detailed Description
Supply Voltages
The MAX6730–MAX6735 microprocessor (μP) supervisors
maintain system integrity by alerting the μP to fault conditions.
The MAX6730–MAX6735 monitor one to three supply
voltages in μP-based systems and assert an active-low
reset output when any monitored supply voltage drops
below its preset threshold. The output state remains valid
for VCC1 or VCC2 greater than +0.8V.
Threshold Levels
The two-letter code in the Reset Voltage Threshold Suffix
Guide (Table 1) indicates the threshold level combinations
for VCC1 and VCC2.
Reset Output
The MAX6730–MAX6735 feature an active-low reset output (RST). RST asserts when the voltage at either VCC1
or VCC2 falls below the voltage threshold level, VRSTIN
drops below its threshold, or MR is driven low (Figure 1).
RST remains low for the reset timeout period (Table 2) after
VCC1, VCC2, and RSTIN increase above their respective
thresholds and after MR releases high. Whenever VCC1,
VCC2, or RSTIN go below the reset threshold before the
end of the reset timeout period, the internal timer restarts.
The MAX6730/MAX6732/ MAX6734 provide an opendrain RST output, and the MAX6731/MAX6733/MAX6735
provide a push-pull RST output.
**Standard versions are shown in bold and are available in a D3
timeout option only. Standard versions require 2500-piece order
increments and are typically held in sample stock. There is a
10,000-piece order increment on nonstandard versions.
Other threshold voltages may be available; contact factory
for availability.
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Maxim Integrated │ 8
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Manual Reset Input
Many μP-based products require manual reset capability,
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. A logic low on MR asserts the
reset output, clears the watchdog timer, and deasserts
the watchdog output. Reset remains asserted while MR is
low and for the reset timeout period (tRP) after MR returns
high. An internal 50kΩ pullup resistor allows MR to be left
open if unused. Drive MR with TTL or CMOS-logic levels
or with open-drain/collector outputs. Connect a normally
open momentary switch from MR to GND to create a
manual reset function; external debounce circuitry is not
required. Connect a 0.1μF capacitor from MR to GND to
provide additional noise immunity when driving MR over
long cables or if the device is used in a noisy environment.
Adjustable Input Voltage (RSTIN)
The MAX6734/MAX6735 provide an additional highimpedance comparator input with a 626mV threshold to
monitor a third supply voltage. To monitor a voltage higher
than 626mV, connect a resistive-divider to the circuit as
shown in Figure 2 to establish an externally controlled
threshold voltage, VEXT_TH.
VEXT_TH = 626mV ×
VCC1,
VCC2
RSTIN
VCC
(MIN)
RST
VEXT_TH
R1
MAX6734
MAX6735
RSTIN
R2
GND
Figure 2. Monitoring a Third Voltage
(R1+ R2)
R2
VTH
tRP
tRP
WDO
MR
Figure 1. RST, WDO, and MR Timing Diagram
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Maxim Integrated │ 9
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
The RSTIN comparator derives power from VCC1, and
the input voltage must remain less than or equal to VCC1.
Low leakage current at RSTIN allows the use of largevalued resistors, resulting in reduced power consumption
of the system.
Watchdog
The watchdog feature monitors μP activity through the
watchdog input (WDI). A rising or falling edge on WDI
within the watchdog timeout period (tWD) indicates normal
μP operation. WDO asserts low if WDI remains high or
low for longer than the watchdog timeout period. Leaving
WDI unconnected does not disable the watchdog timer.
The devices include a dual-mode watchdog timer to monitor
μP activity. The flexible timeout architecture provides a
long-period initial watchdog mode, allowing complicated
systems to complete lengthy boots, and a short-period
normal watchdog mode, allowing the supervisor to provide
quick alerts when processor activity fails. After each reset
event (VCC power-up, brownout, or manual reset), there
is a long initial watchdog period of 35s (min). The long
watchdog period mode provides an extended time for the
system to power up and fully initialize all μP and system
components before assuming responsibility for routine
watchdog updates.
VCC1,
VCC2
RSTIN
VCC
(MIN)
The usual watchdog timeout period (1.12s min) begins
after the initial watchdog timeout period (tWD-L) expires or
after the first transition on WDI (Figure 3). During normal
operating mode, the supervisor asserts the WDO output
if the μP does not update the WDI with a valid transition
(high to low or low to high) within the standard timeout
period (tWD-S) (1.12s min).
Connect MR to WDO to force a system reset in the event
that no rising or falling edge is detected at WDI within
the watchdog timeout period. WDO asserts low when no
edge is detected by WDI, the RST output asserts low, the
watchdog counter immediately clears, and WDO returns
high. The watchdog counter restarts, using the long
watchdog period, when the reset timeout period ends
(Figure 4).
Ensuring a Valid RESET
Output Down to VCC = 0V
The MAX6730–MAX6735 guarantee proper operation
down to VCC = +0.8V. In applications that require valid
reset levels down to VCC = 0V, use a 100kΩ pulldown
resistor from RST to GND. The resistor value used is
not critical, but it must be large enough not to load the
reset output when VCC is above the reset threshold.
For most applications, 100kΩ is adequate. Note that this
configuration does not work for the open-drain outputs of
MAX6730/MAX6732/MAX6734.
VTH
RST
tRP
WDO
WDI
< tWD-L
< tWD-S
< tWD-S
> tWD-S
< tWD-S
< tWD-S
tWD-S
Figure 3. Watchdog Input/Output Timing Diagram (MR and WDO Not Connected)
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Maxim Integrated │ 10
MAX6730–MAX6735
VCC1,
VCC2
RSTIN
VCC
(MIN)
RST
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
VTH
tRP
tRP
WDO
WDI
< tWD-L
< tWD-S
> tWD-S
< tWD-L
MR
tMR
Figure 4. Watchdog Input/Output Timing Diagram (MR and WDO Connected)
Applications Information
Interfacing to μPs with Bidirectional
Reset Pins
Microprocessors with bidirectional reset pins can interface
directly with the open-drain RST output options. However,
conditions might occur in which the push-pull output versions experience logic contention with the bidirectional
reset pin of the μP. Connect a 10kΩ resistor between
RST and the μP’s reset I/O port to prevent logic contention (Figure 5).
VCC2 VCC1
VCC1
MAX6731
MAX6733
MAX6735 RST
RESET TO
OTHER
SYSTEM
COMPONENTS
10kΩ
RESET
µP
VCC2
Falling VCC Transients
The devices μP supervisors are relatively immune to
short-duration falling VCC_ transients (glitches). Small
glitches on VCC_ are ignored by the MAX6730–MAX6735,
preventing undesirable reset pulses to the μP. The Typical
Operating Characteristics show Maximum Transient
Duration vs. Reset Threshold Overdrive, for which reset
www.maximintegrated.com
GND
GND
Figure 5. Interfacing to μPs with Bidirectional Reset I/O
Maxim Integrated │ 11
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
pulses are not generated. The graph was produced using
falling VCC_ pulses, starting above VTH and ending below
the reset threshold by the magnitude indicated (reset
threshold overdrive). The graph shows the maximum
pulse width that a falling VCC transient typically might
have without causing a reset pulse to be issued. As the
amplitude of the transient increases (i.e., goes further
below the reset threshold), the maximum allowable pulse
width decreases. A 0.1μF bypass capacitor mounted
close to VCC_ provides additional transient immunity.
Watchdog Software Considerations
Setting and resetting the watchdog input at different
points in the program rather than “pulsing” the watchdog
input high-low-high or low-high-low helps the watchdog
timer closely monitor software execution. This technique
avoids a “stuck” loop, in which the watchdog timer continues
to be reset within the loop, preventing the watchdog from
timing out. Figure 6 shows an example flow diagram in
which the I/O driving the watchdog input is set high at
the beginning of the program, set low at the beginning of
every subroutine or loop, and then set high again when
the program returns to the beginning. If the program
“hangs” in any subroutine, the I/O continually asserts low
(or high), and the watchdog timer expires, issuing a reset
or interrupt.
Functional Diagram
VCC1
MR
MAX6730–
MAX6735
VCC1
VCC2
VREF
RESET
TIMEOUT
PERIOD
VCC1
MR
PULLUP
VCC1
VCC2
RESET
OUTPUT
DRIVER
RST
VCC1
WATCHDOG
TIMER
RSTIN
WDO
WDI
VCC1
REF
VREF / 2
GND
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
HANG IN
SUBROUTINE
SUBROUTINE
COMPLETED
RETURN
Figure 6. Watchdog Flow Diagram
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Maxim Integrated │ 12
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Selector Guide
PART NUMBER
VOLTAGE
MONITORS
RST OUTPUT
MANUAL RESET
WATCHDOG
INPUT
WATCHDOG
OUTPUT
MAX6730
1
Open Drain
√
√
Open Drain
MAX6731
1
Push-Pull
√
√
Push-Pull
MAX6732
2
Open Drain
—
√
Open Drain
MAX6733
2
Push-Pull
—
√
Push-Pull
MAX6734
3
Open Drain
√
√
Open Drain
MAX6735
3
Push-Pull
√
√
Push-Pull
Ordering Information
PART*
MAX6730UT_D_ +T
MAX6731UT_D_ +T
MAX6732UT_ _D_ +T
MAX6733UT_ _D_ -T
MAX6734KA_ _D_ -T
MAX6734KA_ _ D_+T
MAX6734KA_ _D_ /V+T
MAX6734KATGD3/V+T
MAX6734KALTD3/V+T
MAX6735KA_ _D_ +T
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
Package Information
PIN-PACKAGE
6 SOT23
6 SOT23
6 SOT23
6 SOT23
8 SOT23
8 SOT23
8 SOT23
8 SOT23
8 SOT23
8 SOT23
*Insert the threshold level suffixes for VCC1 and VCC2 (Table 1)
after “UT” or “KA.” For the MAX6730/MAX6731, insert only the
VCC1 threshold suffix after the “UT.” Insert the reset timeout delay
(Table 2) after “D” to complete the part number. For example, the
MAX6732UTLTD3+T provides a VCC1 threshold of +4.625V, a
VCC2 threshold of +3.075V, and a 210ms reset timeout period.
Sample stock is generally held on standard versions only.
Standard versions have an order increment requirement of 2500
pieces. Nonstandard versions have an order increment requirement
of 10,000 pieces. Contact factory for availability.
+Denotes Lead(Pb)-free packages and - denotes leaded packages.
Not all MAX6734KA_ _D_ options are available with leaded (-T)
packages. See https://www.maximintegrated.com for available
leaded options.
Some devices are available in both leaded and lead(Pb)-free/
RoHS compliant packaging.
For top mark information, please go to https://www.maximintegrated.com/en/design/packaging/topmark/
/V denotes an automotive qualified part.
www.maximintegrated.com
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
LAND
OUTLINE
NO.
PATTERN NO.
PACKAGE
TYPE
PACKAGE
CODE
6 SOT23
U6+1, U6-1
(MAX6733 only)
21-0058
90-0175
8 SOT23
K8SN-1 (MAX6734
only), K8SN+1
21-0078
90-0176
Chip Information
PROCESS: BiCMOS
Maxim Integrated │ 13
MAX6730–MAX6735
Single/Dual/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
0
10/02
Initial release.
—
1
12/02
Released MAX6730/MAX6731.
1
DESCRIPTION
2
1/03
Released MAX6733.
1
3
3/04
Updated Typical Operating Circuit.
14
4
12/05
Added lead-free notation to Ordering Information.
5
3/09
Updated Pin Description and added Package Table.
6
11/11
7
4/13
8
12/15
9
10/17
1
7, 14
Added automotive-qualified part information
1
Added Package Thermal Characteristics and corrected power dissipation errors
and package code for 8 SOT23
Added lead-free part numbers to Ordering Information table, updated Package
Information table, and removed Standard Versions table.
Added AEC qualfication statement to Benefits and Features section and updated
Ordering Information table
2–4, 14
1, 13, 14
1, 13
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2017 Maxim Integrated Products, Inc. │ 14
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