MAX7328AAP+

I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 General Description The MAX7328/MAX7329 are 2-wire serial-interfaced peripherals with eight I/O ports. Any port can be used as a logic input or an open-drain output. All input ports are continuously monitored for state changes (transition detection). Transitions are alerted through the open-drain, 5.5V-tolerant INT output. The MAX7328 and MAX7329 versions differ only by their slave ID address ranges. The MAX7328 has a slave ID range of 0100xxx (0x20 to 0x27). The MAX7329 has a slave ID range of 0111xxx (0x38 to 0x3F). For a similar part with overvoltage-protected I/Os and a bus RST input that clears the I2C serial interface, refer to the MAX7321 data sheet. The MAX7328/MAX7329 are members of a family of pin-compatible port expanders with a choice of input ports, open-drain I/O ports, and push-pull output ports (see the Selector Guide). Applications ●● ●● ●● ●● Typical Application Circuit 47nF TEMP RANGE MAX7328AWE -40°C to +125°C 16 Wide SO MAX7328AAP -40°C to +125°C 20 SSOP MAX7328AUP* -40°C to +125°C 20 TSSOP MAX7329AWE -40°C to +125°C 16 Wide SO MAX7329AAP -40°C to +125°C 20 SSOP MAX7329AUP* -40°C to +125°C 20 TSSOP TOP VIEW AD0 1 SCL MAX7328 SDA MAX7329 INT P0 P1 P2 P3 P4 P5 AD0 AD1 AD2 GND PIN-PACKAGE Pin Configurations V+ µC INT Ordering Information *Future product—contact factory for availability. Devices are available in both leaded and lead-free packaging. Specify lead free by adding the + symbol at the end of the part number when ordering. +2.5V TO +5.5V SDA ●● 100kHz, 5.5V-Tolerant, I2C-Compatible Serial Interface ●● 2.5V to 5.5V Operating Supply Voltage Range ●● Low-Standby-Current Consumption of 10μA (max) ●● I2C Bus-to-Parallel-Port Expander ●● Open-Drain Interrupt Output INT ●● 8-Bit Remote I/O Port for the I2C Bus ●● Latched Outputs with High-Current-Drive Capability for Directly Driving LEDs ●● Address by Three Hardware Address Pins for Use of Up to Eight Devices (Up to 16 Using Both MAX7328/ MAX7329) ●● Second Sources to PCF8574 and PCF8574A PART RAID Servers Notebooks Industrial SCL Features P6 P7 I/O I/O I/O I/O I/O I/O I/O I/O + 16 V+ AD1 2 AD2 3 P0 4 15 SDA MAX7328 MAX7329 14 SCL 13 INT P1 5 12 P7 P2 6 11 P6 P3 7 10 P5 GND 8 9 P4 WIDE SO Pin Configurations continued at end of data sheet. 19-3829; Rev 1; 4/14 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 Absolute Maximum Ratings (Voltage with respect to GND.) V+, SCL, SDA, AD0, AD1, AD2, INT ........................-0.3V to +6V P0–P7 ...........................................................-0.3V to (V+ + 0.3V) P0–P7, SDA, INT Output Sink Current ................................25mA SCL, SDA, AD0, AD1, AD2, INT, P0–P7 Input Current .......20mA Total V+ Current................................................................100mA Total GND Current ............................................................100mA Continuous Power Dissipation (TA = +70°C) 16-Pin Wide SO (derate 9.5mW/°C over +70°C).........762mW 20-Pin SSOP (derate 8mW/°C over +70°C).................640mW 20-Pin TSSOP (derate 11mW/°C over +70°C).............879mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Operating Supply Voltage V+ Supply Current (Interface Running) I+ fSCL = 100kHz, other digital inputs at V+ or GND Standby Current (Interface Idle) I+ SCL, SDA, and other digital inputs at V+ or GND Power-On Reset Voltage VIL Input High Voltage SDA, SCL, AD0, AD1, AD2, P0–P7 VIH IPPROT Output Low Current SDA IOLSDA VSDA = 0.4V Input Leakage Current SDA, SCL, AD0, AD1, AD2, P0–P7 IIH, IIL Pin at V+ or GND 40 100 µA 1 10 µA 1.3 2.4 V 0.3 x V+ V V Pin at GND (Note 2) 10 Ports Output-High Output Current P0–P7 IOH VOH = GND 30 Output-High Transient Pullup Current P0–P7 IOHt Sources during acknowledge, VOH = GND, V+ = 2.5V Input Capacitance P0–P7 CP (Note 2) VOLINT = 0.4V +0.25 µA 7 pF 25 mA 300 1 µA mA 10 1.6 µA mA -0.25 VOL = 1V, V+ = 5V www.maximintegrated.com V 3 IOL IOLINT UNITS 5.5 ±400 Port Output-Low Output Current P0–P7 Interrupt Output-Low Current INT MAX 0.7 x V+ Maximum Allowed Input Current through Protection Diode P0–P7 CI2C TYP 2.5 VPOR Input Low Voltage SDA, SCL, AD0, AD1, AD2, P0–P7 Input Capacitance SDA, SCL, AD0, AD1, AD2 MIN pF mA Maxim Integrated │  2 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 Port And Interrupt INT Timing Characteristics (Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4 µs Port Output Data Valid tPPV CL ≤ 100pF Port Input Setup Time tPSU CL ≤ 100pF 0 µs Port Input Hold Time tPH CL ≤ 100pF 4 µs INT Input Data Valid Time tIV CL ≤ 100pF 4 µs INT Reset Delay Time from Acknowledge tIR CL ≤ 100pF 4 µs Timing Characteristics (Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 100 kHz 100 ns Serial Clock Frequency fSCL Tolerable Spike Width on Bus tSP Bus Free Time between STOP and START tBUF 4.7 µs START or Repeated START Setup Time tSU, STA 4.7 µs START or Repeated START Hold Time tHD, STA 4 µs SCL Clock Low Period tLOW 4.7 µs SCL Clock High Period tHIGH 4 µs (Note 2) SDA and SCL Rise Time tR (Note 2) 1 µs SDA and SCL Fall Time tF (Note 2) 300 ns Data Setup Time tSU, DAT Data Hold Time tHD, DAT (Note 3) 0.9 µs SCL Low to Data-Out Valid tVD, DAT SCL low to SDA output valid 3.4 µs STOP Condition Setup Time tSU, STO 400 pF Capacitive Load for Each Bus Line Cb 250 ns 4 (Note 2) µs Note 1: All parameters are tested at TA = +25°C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge the undefined region of SCL’s falling edge. www.maximintegrated.com Maxim Integrated │  3 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 Pin Description PIN NAME FUNCTION SO SSOP/TSSOP 1, 2, 3 6, 7, 9 AD0, AD1, AD2 4–7, 9–12 10, 11, 12, 14, 16, 17, 19, 20 P0–P7 8 15 GND 13 1 INT Interrupt Output. INT is an open-drain output rated at 5.5V. 14 2 SCL I2C-Compatible Serial-Clock Input 15 4 SDA I2C-Compatible Serial-Data I/O 16 5 V+ — 3, 8, 13, 18 N.C. Address Inputs. AD0, AD1, and AD2 set device slave address. Connect AD0, AD1, and AD2 to either GND or V+. See Tables 1 and 2. Input/Output Ports. P0–P7 are open-drain I/Os. Ground Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitor. No Connection. Internally not connected. V+ WRITE PULSE 100µA DATA FROM SHIFT REGISTER D MAX7328 MAX7329 Q FF CLK POWER-ON RESET READ PULSE DATA TO SHIFT REGISTER S P0–P7 D Q FF CLK GND S TO INTERRUPT LOGIC Figure 1. Block Diagram www.maximintegrated.com Maxim Integrated │  4 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 Table 1. MAX7328 Slave ID Address Selection PIN CONNECTION DEVICE ADDRESS PORTS POWER-UP DEFAULT AD2 AD1 AD0 A6 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0 GND GND GND 0 1 0 0 0 0 0 1 1 1 1 1 1 1 1 GND GND V+ 0 1 0 0 0 0 1 1 1 1 1 1 1 1 1 GND V+ GND 0 1 0 0 0 1 0 1 1 1 1 1 1 1 1 GND V+ V+ 0 1 0 0 0 1 1 1 1 1 1 1 1 1 1 V+ GND GND 0 1 0 0 1 0 0 1 1 1 1 1 1 1 1 V+ GND V+ 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1 V+ V+ GND 0 1 0 0 1 1 0 1 1 1 1 1 1 1 1 V+ V+ V+ 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 Table 2. MAX7329 Slave ID Address Selection PIN CONNECTION DEVICE ADDRESS PORTS POWER-UP DEFAULT AD2 AD1 AD0 A6 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0 GND GND GND 0 1 1 1 0 0 0 1 1 1 1 1 1 1 1 GND GND V+ 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 GND V+ GND 0 1 1 1 0 1 0 1 1 1 1 1 1 1 1 GND V+ V+ 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1 V+ GND GND 0 1 1 1 1 0 0 1 1 1 1 1 1 1 1 V+ GND V+ 0 1 1 1 1 0 1 1 1 1 1 1 1 1 1 V+ V+ GND 0 1 1 1 1 1 0 1 1 1 1 1 1 1 1 V+ V+ V+ 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Detailed Description Functional Overview The MAX7328/MAX7329 are general-purpose port expanders operating from a 2.5V to 5.5V supply that provide eight open-drain input/output ports with a 20mA sink capability. The devices are rated to sink up to 100mA at once, from any combination of ports. The port outputs can drive loads connected to any voltage up to the MAX7328/ MAX7329’s supply voltage. The MAX7328 is set to one of eight I2C slave addresses 0x20 to 0x27, and the MAX7329 is set to one of eight I2C slave addresses, 0x38 to 0x3F, using the address inputs AD2, AD1, and AD0. The parts are accessed over an I2C serial interface up to 100kHz. Any port can be configured as a logic input by setting the port output logic-high. The MAX7328/MAX7329 do not distinguish between a port used as an input and a port used as an output that happens to be high. When a MAX7328 or MAX7329 is read through the serial interface, the actual logic levels at the port pins are read back. www.maximintegrated.com When an I/O port is high, an internal pullup to V+ is active. The pullup is enabled only when the output is high, and is turned off when the output is low to reduce quiescent current. An additional strong pullup to V+ allows fast-rising edges into heavily loaded outputs. These strong pullups turn on when an output is written high, and are switched off by the falling edge of SCL (Figure 2). The MAX7328/MAX7329 provide an open-drain output (INT). An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time, tIV, the signal INT is valid. Resetting and reactivating the interrupt circuit is achieved when data on the port is changed to the original setting or data is read from or written to the port that generated the interrupt. Resetting occurs as follows: ● In the READ mode at the acknowledge bit after the rising edge of the SCL signal ● In the WRITE mode at the acknowledge bit after the HIGH-to-LOW transition of the SCL signal Maxim Integrated │  5 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 SLAVE ADDRESS DATA TO PORT S SDA 0 START CONDITION SCL 1 2 3 A 5 6 7 A 1 R/W ACKNOWLEDGE FROM SLAVE 4 DATA TO PORT A 0 P3 P P3 8 P3 OUTPUT VOLTAGE IOH P3 PULLUP OUTPUT CURRENT IOHt Figure 2. Repeated Write Operation Showing Transient Pullup Current SDA tSU, STA tSU, DAT tLOW tHD, DAT tHD, STA tBUF tSU, STO tHIGH SCL tHD, STA tR tF START CONDITION tVD, DAT REPEATED START CONDITION STOP CONDITION START CONDITION Figure 3. 2-Wire Serial-Interface Timing Details Interrupts that occur during the acknowledge clock pulse may be lost (or very short) due to the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and, after the next rising clock edge, is transmitted as INT. MAX7328/MAX7329 Initial Power-Up On power-up, the power-up default states of the eight I/O ports are high, and therefore, can be used as inputs or outputs. The interrupt output INT is reset, and INT goes high (high impedance if an external pullup resistor is not fitted). Serial Interface Serial Addressing The MAX7328/MAX7329 operate as slave devices that send and receive data through an I2C-compatible, 2-wire interface. The interface uses a serial-data line (SDA) and a serial-clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master initiates all data transfers to and from the MAX7328 or MAX7329, and generates the SCL clock that synchronizes the data transfer (Figure 3). The MAX7328 or MAX7329 SDA line operates as both an input and an open-drain output. A pullup resistor, www.maximintegrated.com Maxim Integrated │  6 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 Each transmission consists of a START condition (Figure 4) sent by a master, followed by the MAX7328 or MAX7329 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition (Figure 4). SDA SCL S P START CONDITION STOP CONDITION START and STOP Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 4). Figure 4. START and STOP Conditions SDA Bit Transfer SCL One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 5). DATA LINE STABLE;CHANGE OF DATA DATA VALID ALLOWED Acknowledge Figure 5. Bit Transfer CLOCK PULSE FOR ACKNOWLEDGEMENT START CONDITION SCL SDA BY TRANSMITTER SDA BY RECEIVER The acknowledge bit is a clocked ninth bit, which the recipient uses to handshake receipt of each byte of data (Figure 6). Thus, each byte transferred effectively requires 9 bits. The master generates the ninth clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, so the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX7328 or MAX7329, the MAX7328 or MAX7329 generates the acknowledge bit because the MAX7328 or MAX7329 is the recipient. When the MAX7328 or MAX7329 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. 1 2 8 9 S Figure 6. Acknowledge typically 4.7kΩ, is required on SDA. The MAX7328 or MAX7329 SCL line operates only as an input. A pullup resistor, typically 4.7kΩ, is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. SDA A6 MSB A5 A4 A3 Slave Address The MAX7328/MAX7329 have a 7-bit long slave address (Figure 7). The eighth bit, following the 7-bit slave address, is the R/W bit. It is low for a write command, high for a read command. A2 A1 A0 R/W ACK LSB SCL Figure 7. Slave Address www.maximintegrated.com Maxim Integrated │  7 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 A multibyte read repeatedly returns the input port data. The first (A6), second (A5), third (A4), and fourth (A3) bits of the MAX7328 slave address are always 0, 1, 0, and 0. Slave address bits A2, A1, and A0 are selected by the address inputs AD2, AD1, and AD0. These pins can be connected to GND or V+. The MAX7328 has eight possible slave addresses (Table 1), and therefore, a maximum of eight MAX7328 devices can be controlled independently from the same interface. Input port data is sampled during the preceding I2C acknowledge bit, which is the acknowledge bit for the I2C slave address in the case of a single-byte or 2-byte read. A single-byte write to the MAX7328 or MAX7329 sets the eight ports to high or low, depending on the data byte content. Bit locations of a write byte, corresponding to ports intended for input usage, contain high values. The first (A6), second (A5), third (A4), and fourth (A3) bits of the MAX7329 slave address are always 0, 1, 1, and 1. Slave address bits A2, A1, and A0 are selected by the address inputs AD2, AD1, and AD0. These pins can be connected to GND or V+. The MAX7329 has eight possible slave addresses (Table 2), and therefore, a maximum of eight MAX7329 devices can be controlled independently from the same interface. A multibyte write to the MAX7328 or MAX7329 repeatedly sets the logic state of all eight I/O ports. Reading from the MAX7328 and MAX7329 A read from the MAX7328 or MAX7329 starts with the master transmitting the MAX7328’s or MAX7329’s slave address with the R/W bit set high. The MAX7328 or MAX7329 acknowledges the slave address, and samples the input ports (takes a snapshot) during acknowledge. Because the MAX7328 has a different range of slave address selections than the MAX7329, a total of eight MAX7328 devices and eight MAX7329 devices can be connected to the same bus and independently controlled. Typically, the master reads 1 or 2 bytes from the MAX7328 or MAX7329, each byte being acknowledged by the master on reception, with exception of the last byte. Reading and Writing the MAX7328 and MAX7329 The master can read 1 byte from the MAX7328 or MAX7329 and then issue a STOP condition (Figure 8). In this case, the MAX7328 or MAX7329 transmits the current port data, and restarts the transition detection. INT goes high (high impedance if an external pullup resistor is not fitted) during the port data-byte acknowledge. The new snapshot data is the current port data transmitted to the master, and therefore, any port changes that occur during the transmission are detected. INT always remains high until a STOP condition. I2C interface access to the MAX7328/MAX7329 is as follows: A single-byte read from the MAX7328 or MAX7329 returns the status of the eight ports (with output ports read back as inputs), and clears the INT output. A 2-byte read from the MAX7328 or MAX7329 returns the status of the eight ports (with output ports read back as inputs) and clears the INT output. P7 PORT SNAPSHOT DATA S MAX7328/MAX7329 SLAVE ADDRESS R/W 1 A P6 D7 P5 D6 D5 P4 P3 DATA 1 D4 PORT SNAPSHOT TAKEN D3 P2 D2 P1 D1 P0 D0 N P PORT SNAPSHOT TAKEN SCL tPH PORT INPUT DATA DATA 1 tIV DATA 2 tIR tIV DATA 3 tPSU tIR INT OUTPUT S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 8. Reading from the MAX7328/MAX7329 (1 Data Byte) www.maximintegrated.com Maxim Integrated │  8 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 P7 PORT SNAPSHOT DATA P6 P5 P4 P3 DATA 1 P2 P1 P0 P7 P6 P5 P4 P3 DATA 4 P2 P1 D7 D6 D5 D4 D2 D1 D0 PORT SNAPSHOT DATA P0 ACKNOWLEDGE FROM MAX7328/MAX7329 S MAX7328/MAX7329 SLAVE ADDRESS1 A D7 D6 D5 D4 PORT SNAPSHOT TAKEN R/W D3 D2 D1 D0 A D3 ACKNOWLEDGE FROMPORT SNAPSHOT TAKEN MASTER PORT SNAPSHOT TAKEN A P ACKNOWLEDGE FROM MASTER SCL PORT INPUT DATA tIV tPH DATA 1 INT OUTPUT tIR DATA 2 DATA 3 DATA 4 tIV tPSU tIR S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 9. Reading from the MAX7328/MAX7329 (2 Data Bytes) The master can read 2 bytes from the MAX7328 or MAX7329 and then issues the STOP condition (Figure 9). In this case, the MAX7328 or MAX7329 transmits the current port data repeatedly. INT goes high during the port data-byte acknowledge. The new snapshot data is the current port data transmitted to the master; therefore, any port transitions that occur during the transmission are detected. INT remains high until the STOP condition. Writing to the MAX7328/MAX7329 A data write to the MAX7328 or MAX7329 comprises the transmission of the MAX7328’s or MAX7329’s slave address with the R/W bit set to zero, followed by one or more bytes of data. The MAX7328 or MAX7329 acknowledges the slave address and any subsequent bytes of data until the master issues a STOP condition (Figure 10). Applications Information Hot Insertion higher than V+ or lower than GND, the appropriate protection diode clamps the output to a diode drop above V+ or below GND. When a MAX7328 or MAX7329 is powered down (V+ = 0V), each output port’s protection diodes to V+ and GND continue to appear as a diode clamp from each output to GND (Figure 1). Power-Supply Considerations The MAX7328/MAX7329 operate with a 2.5V to 5.5V power-supply voltage over the -40°C to +125°C temperature range. Bypass the power supply to GND with a ceramic capacitor of at least 0.047μF as close to the device as possible. Chip Information PROCESS: BiCMOS The MAX7328/MAX7329’s SDA, SCL, AD0, AD1, AD2, RST, and P0–P7 I/Os remain high impedance with up to +6V asserted on them when the MAX7328 or MAX7329 is powered down (V+ = 0V). The MAX7328/MAX7329 can therefore be used in hot-swap applications. Each of the I/O ports P0–P7 has protection diodes to V+ and GND. When a port output is back driven to a voltage www.maximintegrated.com Maxim Integrated │  9 I2C Port Expanders with Eight I/O Ports MAX7328/MAX7329 1 SCL 2 3 4 5 6 7 8 DATA TO PORT SLAVE ADDRESS SDA S 0 START CONDITION A DATA TO PORT DATA 1 A DATA 2 A ACKNOWLEDGE FROM SLAVE R/W ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE INTERNAL WRITE TO PORT DATA OUT FROM PORT DATA 1 VALID tPV DATA 2 VALID tPV Figure 10. Writing to the MAX7328/MAX7329 Selector Guide INPUTS LATCHING INTERRUPT OPEN-DRAIN OUTPUTS PUSH-PULL OUTPUTS SECOND SOURCE Yes 8 Yes — — — Yes — Yes — 8 — MAX7321 Yes Up to 8 Yes Up to 8 — — MAX7322 Yes 4 Yes — 4 — MAX7323 Yes Up to 4 Yes Up to 4 4 — MAX7328 — Up to 8 — Up to 8 — PCF8574 MAX7329 — Up to 8 — Up to 8 — PCF8574A PART I2C BUS RST MAX7319 MAX7320 Pin Configurations (continued) TOP VIEW INT 1 + 20 P7 SCL 2 19 P6 N.C. 3 18 N.C. SDA 4 V+ 5 MAX7328 MAX7329 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. 17 P5 16 P4 A0 6 15 GND A1 7 14 P3 N.C. 8 Package Information 13 N.C. A2 9 12 P2 P0 10 11 P1 PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 SO W16-1 21-0042 90-0107 20 SSOP A20-5 21-0056 90-0094 20 TSSOP — 21-0066 — TSSOP/SSOP www.maximintegrated.com Maxim Integrated │  10 MAX7328/MAX7329 I2C Port Expanders with Eight I/O Ports Revision History REVISION NUMBER REVISION DATE 0 10/05 Initial release — 1 5/14 Updated Applications 1 DESCRIPTION PAGES CHANGED For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2014 Maxim Integrated Products, Inc. │  11