19-0600; Rev 1; 5/08
KIT
ATION
EVALU
LE
B
A
IL
A
AV
Full-Bridge Controller for
Piezoelectric Transformers
PART
TEMP RANGE
PIN-PACKAGE
MAX8785AETI+
-40°C to +85°C
28 Thin QFN*
+Denotes lead-free package.
*EP = Exposed pad.
RATE
VCC
SEL
OLF
LX1
GH1
TOP VIEW
GND
Pin Configuration
28
27
26
25
24
23
22
1
21
BST1
20
VDD1
+
SHDN
2
CNTL
3
19
GL1
LSYNC
4
18
PGND
MAX8785A
GL2
6
16
VDD2
HF
7
15
BST2
8
9
10
11
12
13
14
LX2
17
GH2
5
VFB
FLT
TFLT
IFB
LCD TVs and Monitors
Ordering Information
COMP
Notebook LCDs
o
PCOMP
Applications
o
o
o
o
o
o
Resonant, All n-Channel, Full-Bridge Topology
Wide Input-Voltage Range (4.5V to 28V)
Frequency Sweeping Guarantees CCFL Striking
Feed-Forward Control Provides Excellent LineTransient Response
Programmable Maximum Switching Frequency
Analog or Digital DPWM
Lamp-Out Detection with Adjustable Timeout
Fault Protection with Adjustable Timeout
Primary Current Limit with RDS(ON) Sensing
Strong Gate Drivers Support Large
External MOSFETs
28-Pin Thin QFN Package
BATT
The MAX8785A gate drivers can drive large power
MOSFETs typically used in high-power CCFL applications. An internal 5.35V linear regulator powers the
MOSFET drivers and most of the internal circuitry. The
MAX8785A is available in a low-profile, 28-pin thin QFN
package and operates over the -40°C to +85°C temperature range.
o
o
o
o
LF
Liquid-crystal display (LCD) enclosures and cold-cathode
fluorescent lamps (CCFL) used in notebook computer
and portable electronic displays are becoming increasingly narrow, generating the need for a low-profile
CCFL power supply. Recent advances in piezoelectric
transformers (PZTs) have made it possible to develop
smaller, more efficient, and safer backlight inverters for
portable displays. Piezoelectric transformers have
shown better performance than magnetic transformers
with respect to efficiency, EMI requirements, human
safety, and form factor. The MAX8785A is a full-bridge
CCFL controller for piezoelectric transformer-based
backlight power supplies. The full-bridge topology provides a high-spectral purity sinusoidal drive that helps
the PZT convert electrical energy to mechanical and
back to electrical energy efficiently.
The MAX8785A employs a feed-forward control architecture that provides excellent line-and-load regulation while
maintaining relatively constant switching frequency.
The MAX8785A provides protection against open-lamp,
secondary short-circuit, lamp arcing, and secondary
overvoltage with adjustable timeout periods.
The MAX8785A guarantees lamp striking by sweeping
the switching frequency from high to low until the lamp
is struck. The MAX8785A achieves 10:1 dimming range
using a digital pulse-width modulation (DPWM) method.
CCFL brightness can be set with an analog voltage on
the CNTL pin or through an external signal at LSYNC.
The maximum switching frequency and DPWM frequency can be adjusted with external resistors.
Features
THIN QFN
Simplified Operating Circuit appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX8785A
General Description
MAX8785A
Full-Bridge Controller for
Piezoelectric Transformers
ABSOLUTE MAXIMUM RATINGS
COMP, HF, LF, PCOMP, SEL,
TFLT to GND............................................-0.3V to (VCC + 0.3V)
IFB, VFB, OLF to GND.................................................-6V to +6V
PGND to GND .......................................................-0.3V to +0.3V
Continuous Power Dissipation (TA = +70°C)
28-Pin Thin QFN (derate 21.3mW/°C above +70°C)...1702.1mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
BATT, RATE, LX1, LX2 to GND .............................-0.3V to +30V
BST1, BST2 to GND ...............................................-0.3V to +36V
BST1 to VDD1, BST2 to VDD2 ..................................-0.3V to +30V
BST1 to LX1..............................................................-0.3V to +6V
BST2 to LX2..............................................................-0.3V to +6V
VCC, VDD1, VDD2, CNTL, LSYNC, SHDN,
FLT to GND...........................................................-0.3V to +6V
GH1 to LX...............................................-0.3V to (VBST1 + 0.3V)
GH2 to LX2.............................................-0.3V to (VBST2 + 0.3V)
GL1 to GND ..............................................-0.3V to (VDD1 + 0.3V)
GL2 to GND ..............................................-0.3V to (VDD2 + 0.3V)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VBATT = 12V, VDD1 = VDD2 = VSHDN = 5.35V, RRATE = 190kΩ, TA = 0°C to +85°C, unless otherwise noted. See Figure 1. Typical values
are at TA = +25°C.)
PARAMETER
BATT Input Voltage Range
CONDITIONS
MIN
TYP
MAX
VCC = VDD1 = VDD2 = open
5.5
28.0
VCC = VDD1 = VDD2 = BATT
4.5
5.5
UNITS
V
BATT Quiescent Current
VBATT = 28V
1.5
6
mA
BATT Quiescent Current, Shutdown
VSHDN = 0, VBATT = 28V
10
25
µA
VCC Output Voltage, Normal Operation
6V < VBATT < 28V, 0 < ILOAD < 20mA
5.20
5.35
5.50
V
VCC Output Voltage, Shutdown
VSHDN = 0, no load
3.5
4.6
5.5
V
VCC Undervoltage-Lockout Threshold
VCC rising (leaving lockout)
VCC falling (entering lockout)
4.5
4.0
VCC Undervoltage-Lockout Hysteresis
150
V
mV
GH1, GH2, GL1, and GL2
On-Resistance, Low State
ITEST = 10mA
1
3
Ω
GH1, GH2, GL1, and GL2
On-Resistance, High State
ITEST = 10mA
4
8
Ω
BST1, BST2 Leakage Current
VBST1 = 24V, VLX1 = 19V; VBST2 = 24V, VLX2
= 19V, VBATT = 28V
5
µA
LX1, LX2 Leakage Current
VBATT = 28V
5
µA
240
370
500
ns
VBATT = 8V, RRATE = 190kΩ, RHF = 100kΩ
22
25
28
VBATT = 16V, RRATE = 190kΩ, RHF = 100kΩ
10.8
12.50
14.2
VBATT = 24V, RRATE = 190kΩ, RHF = 100kΩ
7.5
8.5
9.5
Minimum On-Time
Duty Cycle
VBATT = 12V, RRATE = 150kΩ, RHF = 100kΩ
14
VBATT = 12V, RRATE = 300kΩ, RHF = 100kΩ
25
Maximum Duty Cycle
%
45
%
370
400
430
mV
Current-Limit Leading-Edge Blanking
240
370
500
ns
IFB Regulation Point
760
800
840
mV
Current-Limit Threshold
IFB Input Bias Current
2
LX1 - PGND, LX2 - PGND
0 < VIFB < +3V
-2
-3V < VIFB < 0
-225
_______________________________________________________________________________________
+2
µA
Full-Bridge Controller for
Piezoelectric Transformers
(VBATT = 12V, VDD1 = VDD2 = VSHDN = 5.35V, RRATE = 190kΩ, TA = 0°C to +85°C, unless otherwise noted. See Figure 1. Typical values
are at TA = +25°C.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
mV
IFB Lamp-Out Threshold
Reject 1µs glitches
720
800
880
IFB-to-COMP Transconductance
1V < VCOMP < 3V
50
100
150
COMP Output Impedance
10
COMP Maximum Voltage Threshold
COMP Discharge Current During Overvoltage
VIFB = 800mV, VVFB = 2.5V, VCOMP = 2V
Initial Startup COMP Charging Current
3.15
3.25
3.35
V
0.5
1.0
2.0
mA
7
9
11
µA
PCOMP Impedance
1
VFB Input Bias Current
-4V < VVFB < +4V
VFB Overvoltage Threshold
VFB rising
2.05
VFB Short-Circuit Threshold
VFB rising
200
OLF Input Bias Current
-4V < VOLF < +4V
-2
OLF Trip Threshold
OLF rising
1.1
RHF = 100kΩ, VCOMP = 0.0V
58.0
Main Oscillator Frequency
-2
DPWM Chopping Frequency
DPWM Dimming Resolution
2.45
V
230
260
mV
+2
µA
1.2
1.3
V
60.0
62.0
RHF = 150kΩ, VCOMP = 0.0V
40.0
RHF = 150kΩ, VCOMP = 3.0V
33.3
RHF = 75kΩ, VCOMP = 0.0V
80.0
208
300
RLF = 315kΩ
100
Guaranteed monotonic
CNTL Maximum Duty-Cycle Threshold
0 < VCNTL < 2.0V
0.23
1.9
2.0
-0.1
0 < VLSYNC < 5.5V
LSYNC Input Frequency Range
RLF = 150kΩ
LSYNC Minimum Duty Cycle
2.1
V
+0.1
µA
0.8
V
mV
-1
+1
µA
120
280
Hz
10
%
0.8
SEL Input High Voltage
2.1
SEL Input Hysteresis
V
V
200
0 < VSEL < 5.5V
V
V
SEL Input Low Voltage
-1
SHDN Input Low Voltage
SHDN Input Hysteresis
Bits
0.26
200
LSYNC Input Bias Current
SHDN Input High Voltage
Hz
2.1
LSYNC Input Hysteresis
SEL Input Bias Current
214
8
0.20
LSYNC Input Low Voltage
LSYNC Input High Voltage
kHz
66.6
202
RLF = 103kΩ
CNTL Minimum Duty-Cycle Threshold
CNTL Input Current
µA
2.25
50
RHF = 75kΩ, VCOMP = 3.0V
MΩ
+2
RHF = 100kΩ, VCOMP = 3.0V
RLF = 150kΩ
µs
MΩ
2.1
mV
+1
µA
0.8
V
V
100
mV
_______________________________________________________________________________________
3
MAX8785A
ELECTRICAL CHARACTERISTICS (continued)
MAX8785A
Full-Bridge Controller for
Piezoelectric Transformers
ELECTRICAL CHARACTERISTICS (continued)
(VBATT = 12V, VDD1 = VDD2 = VSHDN = 5.35V, RRATE = 190kΩ, TA = 0°C to +85°C, unless otherwise noted. See Figure 1. Typical values
are at TA = +25°C.)
PARAMETER
SHDN Input Bias Current
CONDITIONS
0 < VSHDN < 5.5V
VVFB > 2.4V or VIFB < 720mV;
VOLF < 1.1V; VTFLT = 2.0V
MIN
TYP
-1
MAX
UNITS
+1
µA
0.60
0.75
0.90
-1
-0.75
-0.5
VVFB < 200mV or VOLF > 1.3V;
VTFLT = 2.0V
2.24
2.8
3.36
TFLT Trip Threshold
TFLT rising
2.90
3.0
3.10
V
TFLT Sink Current
VTFLT = 2.0V
80
135
160
mA
FLT Sink Current
VTFLT = 3.1V, VFLT = 0.4V
1
FLT Leakage Current
VTFLT = 0, VFLT = 5.5V
TFLT Charging Current
VVFB < 2.05V and VIFB > 880mV;
VOLF < 1.1V; VTFLT = 2.0V
µA
mA
mA
1
µA
MAX
UNITS
ELECTRICAL CHARACTERISTICS
(VBATT = 12V, VDD1 = VDD2 = VSHDN, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
BATT Input Voltage Range
CONDITIONS
MIN
TYP
VCC = VDD1 = VDD2 = open
5.5
28.0
VCC = VDD1 = VDD2 = BATT
4.5
5.5
V
BATT Quiescent Current
VSHDN = 5.5V, VBATT = 28V
6
mA
BATT Quiescent Current, Shutdown
VSHDN = 0
25
µA
VCC Output Voltage, Normal Operation
VSHDN = 5.5V, 6V < VBATT < 28V,
0 < ILOAD < 20mA
5.20
5.50
V
VCC Output Voltage, Shutdown
VSHDN = 0, no load
3.5
5.5
V
VCC Undervoltage-Lockout Threshold
VCC rising (leaving lockout)
VCC falling (entering lockout)
4.5
3.95
V
GH1, GH2, GL1, and GL2 On-Resistance,
Low State
ITEST = 10mA
3
Ω
GH1, GH2, GL1, and GL2 On-Resistance,
High State
ITEST = 10mA
8
Ω
BST1, BST2 Leakage Current
VBST1 = 24V, VLX1 = 19V;
VBST2 = 24V, VLX2 = 19V; VBATT = 28V
5
µA
LX1, LX2 Leakage Current
VBATT = 28V
5
µA
ns
Minimum On-Time
Duty Cycle
210
420
VBATT = 8V, RRATE = 190kΩ, RHF = 100kΩ
22
28
VBATT = 16V, RRATE = 190kΩ, RHF = 100kΩ
10.8
14.2
VBATT = 24V, RRATE = 190kΩ, RHF = 100kΩ
7.50
9.50
45
%
LX1 - PGND, LX2 - PGND
370
430
mV
Maximum Duty Cycle
Current-Limit Threshold
4
_______________________________________________________________________________________
%
Full-Bridge Controller for
Piezoelectric Transformers
(VBATT = 12V, VDD1 = VDD2 = VSHDN, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current-Limit Leading-Edge Blanking
240
500
ns
IFB Regulation Point
760
840
mV
+2
IFB Input Bias Current
IFB Lamp-Out Threshold
0 < VIFB < +3V
-2
-3V < VIFB < 0
-225
Reject 1µs glitches
720
880
µA
mV
IFB-to-COMP Transconductance
1V < VCOMP < 3V
50
150
µs
COMP Discharge Current During Overvoltage
VIFB = 800mV, VVFB = 2.5V, VCOMP = 2V
0.5
2.0
mA
7
11
µA
3.15
3.35
V
-2
+2
µA
Initial Startup COMP Charging Current
COMP Maximum Voltage Threshold
VFB Input Bias Current
-4V < VVFB < +4V
VFB Overvoltage Threshold
VFB rising
2.05
2.45
V
VFB Short-Circuit Threshold
VFB rising
200
260
mV
-4
+4
V
-4V < VOLF < +4V
-2
+2
µA
OLF Trip Threshold
OLF rising
1.1
1.3
V
Main Oscillator Frequency
RHF = 100kΩ, VCOMP = 0V
57
63
kHz
DPWM Chopping Frequency
RLF = 150kΩ
198
218
Hz
CNTL Minimum Duty-Cycle Threshold
0.20
0.26
V
CNTL Maximum Duty-Cycle Threshold
1.9
2.1
V
0.8
V
280
Hz
OLF Input Voltage Range
OLF Input Bias Current
LSYNC Input Low Voltage
LSYNC Input High Voltage
2.2
LSYNC Input Frequency Range
120
LSYNC Minimum Duty Cycle
10
SEL Input Low Voltage
%
0.8
SEL Input High Voltage
2.2
SHDN Input Low Voltage
2.2
0.60
0.90
VVFB < 2.05V and VIFB > 880mV;
VOLF < 1.1V; VTFLT = 2.0V
-1.0
-0.5
VVFB < 200mV or VOLF > 1.3V;
VTFLT = 2.0V
2.24
3.36
80
190
2.90
3.10
VTFLT = 2.0V
TFLT Trip Threshold
TFLT rising
FLT Sink Current
VTFLT = 3.1V; VFLT = 0.4V
1
V
V
VVFB > 2.4V or VIFB < 720mV;
VOLF < 1.1V; VTFLT = 2.0V
TFLT Sink Current
V
V
0.8
SHDN Input High Voltage
TFLT Charging Current
V
µA
mA
V
mA
Note 1: -40°C specifications are guaranteed by design, not production tested.
_______________________________________________________________________________________
5
MAX8785A
ELECTRICAL CHARACTERISTICS (continued)
MAX8785A
Full-Bridge Controller for
Piezoelectric Transformers
Typical Operating Characteristics
(Circuit of Figure 1. VIN = 12V, TA = +25°C, unless otherwise noted.)
LOW INPUT-VOLTAGE OPERATION
(VIN = 12V)
HIGH INPUT-VOLTAGE OPERATION
(VIN = 24V)
MAX8785A toc01
LINE-TRANSIENT RESPONSE
MAX8785A toc03
MAX8785A toc02
IFB
IFB
LX
LX
IFB
24V
VFB
VIN
12V
VFB
VCNTL = 2.0V
SEL = GND
VCNTL = 2.0V
SEL = GND
10μs/div
40μs/div
10μs/div
CH1: 10V/div
CH2: 2V/div
CH3: 1V/div
CH2: 2V/div
CH4: 10V/div
CH1: 20V/div
CH2: 2V/div
CH3: 1V/div
MINIMUM BRIGHTNESS OPERATION
AND STARTUP WAVEFORM
LSYNC OPERATION
MAX8785A toc05
MAX8785A toc04
SHDN
LSYNC
COMP
IFB
IFB
LX
VFB
4ms/div
CH1: 2V/div
CH2: 5V/div
1ms/div
CH3: 5V/div
CH4: 2V/div
CH1: 2V/div
CH3: 5V/div
CH4: 10V/div
LAMP-OUT VOLTAGE LIMITING
AND TIMEOUT
SECONDARY SHORT-CIRCUIT
PROTECTION AND TIMEOUT
MAX8785A toc06
MAX8785A toc07
VFB
VFB
TFLT
TFLT
400μs/div
200μs/div
200ms/div
CH1: 2V/div
CH2: 2V/div
6
CH1: 2V/div
CH2: 1V/div
_______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
MAXIMUM SWITCHING FREQUENCY
vs. RHF
DPWM FREQUENCY vs. RLF
350
DPWM FREQUENCY (Hz)
80
60
40
MAX8785A toc09
400
MAX8785A toc08
MAXIMUM SWITCHING FREQUENCY (kHz)
100
300
250
200
150
100
50
20
0
60
80
100
120
140
160
50
100
150
200
RHF (kΩ)
350
0.15
VCC REGULATION (%)
5.360
5.359
5.358
5.357
5.356
5.355
MAX8785A toc11
0.20
MAX8785A toc10
5.361
VCC (V)
300
VCC LOAD REGULATION
VCC LINE REGULATION
5.362
0.10
0.05
0
-0.05
-0.10
5.354
-0.15
5.353
-0.20
5.352
10
12
14
16
18
20
22
0
24
8
4
12
16
20
ILOAD (mA)
VIN (V)
VCC vs. TEMP
SWITCHING FREQUENCY vs. VIN
5.365
56.8
5.360
fSW (kHz)
5.355
5.350
MAX8785A toc13
57.0
MAX8785A toc12
5.370
VCC (V)
250
RLF (kΩ)
56.6
56.4
5.345
5.340
56.2
5.335
5.330
56.0
-40
-15
10
35
TEMPERATURE (°C)
60
85
12
14
16
18
20
22
24
VIN (V)
_______________________________________________________________________________________
7
MAX8785A
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VIN = 12V, TA = +25°C, unless otherwise noted.)
Full-Bridge Controller for
Piezoelectric Transformers
MAX8785A
Pin Description
8
PIN
NAME
FUNCTION
1
RATE
Duty Ratio Ramp Adjustment Input. Connect a feed-forward network between BATT and RATE to adjust the
slope of the internal ramp that adjusts the H-bridge duty cycle with input voltage.
2
SHDN
Shutdown Control Input. The IC shuts down when SHDN is pulled to GND.
3
CNTL
Brightness Control Input. The usable brightness control range is from 0 to 2V. VCNTL = 0 represents the
minimum brightness (10% DPWM duty cycle), VCNTL = 2V represents the full brightness (100% DPWM duty
cycle). For details, see the Dimming Control section.
4
LSYNC
DPWM Sync Input. DPWM frequency can be synchronized with an external signal on LSYNC. When SEL is
connected to VCC, the duty cycle of the LSYNC signal determines the brightness. For details, see the
Dimming Control section.
5
FLT
Fault Status Output. FLT is an open-drain output and requires a pullup resistor between VCC and FLT. Under
normal conditions, the FLT output is high impedance. FLT pulls low when a fault condition occurs; FLT is
reset on either power or SHDN cycle.
6
TFLT
Fault Time-Out Setting. Connect a capacitor from TFLT to GND to set the time out period. For details, see
the Setting the Fault Delay Time section.
7
HF
Maximum Switching Frequency Adjustment Input. Connect a resistor from HF to GND to set the maximum
sweeping frequency of the main oscillator.
8
LF
DPWM Frequency Adjustment Input. Connect a resistor from LF to GND to set the DPWM oscillator
9
PCOMP
10
COMP
11
IFB
Lamp Current-Feedback Input. IFB regulates the average lamp-current feedback to 800mV (typ) by
controlling the switching frequency. For details, see the Lamp-Current Regulation section.
12
VFB
Secondary Voltage-Feedback Input. A resistive voltage-divider between the high-voltage terminal of the
transformer and GND sets the maximum peak lamp voltage during striking and lamp-out fault. Add 1nF
capacitor from VFB to GND for noise rejection. For details, see the Lamp-Out Detection and Overvoltage
Protection section.
13
LX2
GH2 Gate-Driver Return. LX2 is the input to the primary current-limit comparator. The controller senses the
voltage across the low-side MOSFET (LX2 - PGND) for primary overcurrent condition.
14
GH2
High-Side MOSFET Gate-Driver Output
15
BST2
GH2 Gate-Driver Supply Input. Connect a 0.1μF capacitor from LX2 to BST2.
16
VDD2
GL2 Low-Side Gate-Driver Supply Input. Connect VDD2 to VCC. Bypass VDD2 with a 1μF capacitor to PGND.
17
GL2
Low-Side MOSFET Gate-Driver Output
18
PGND
Phase-Lock Loop (PLL) Compensation Pin. Connect a capacitor between PCOMP and GND to compensate
the PLL.
Transconductance Error-Amplifier Output. The COMP voltage controls the voltage-controlled oscillator to
adjust the switching frequency. Connect a capacitor from COMP to GND.
Power Ground. PGND is the return of GL1 and GL2 gate drivers.
19
GL1
Low-Side MOSFET Gate-Driver Output
20
VDD1
GL1 Low-Side Gate-Driver Supply Input. Connect VDD1 to VCC. Bypass VDD1 with a 1μF capacitor to PGND.
21
BST1
GH1 Gate-Driver Supply Input. Connect a 0.1μF capacitor from LX1 to BST1.
22
GH1
High-Side MOSFET Gate-Driver Output
23
LX1
GH1 Gate-Driver Return. LX1 is the input to the primary current-limit comparator. The controller senses the
voltage across the low-side MOSFET (LX1 - PGND) for primary overcurrent condition.
_______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
PIN
NAME
FUNCTION
24
OLF
Arc Fault-Detection Input. When the peak voltage on OLF rises above the internal threshold of 1.2V (typ), an
internal current source starts charging the TFLT capacitor. The MAX8785A sets the fault latch and disables the
gate drivers after the TFLT voltage reaches 3V. For details, see Setting the Arc Protection Threshold section.
25
SEL
Brightness Control Select Input. Brightness can be adjusted with an analog voltage on CNTL or with an
external signal at LSYNC. Connect SEL to GND to enable analog control. Connect SEL to VCC to enable
external synchronization control.
26
VCC
5.35V/20mA Linear-Regulator Output. Supply voltage for the device. Bypass VCC with a 1μF ceramic
capacitor to GND.
27
GND
System Ground
28
BATT
Supply Input. Input to the internal 5.35V linear regulator that powers the device. Bypass BATT to ground
with a 0.22μF ceramic capacitor.
29
PAD
Backside Exposed Pad. PAD is internally connected to GND. Connect the exposed pad to a ground plane
through a thermally enhanced via.
_______________________________________________________________________________________
9
MAX8785A
Pin Description (continued)
Full-Bridge Controller for
Piezoelectric Transformers
MAX8785A
Typical Operating Circuit
VIN
2A
VCC
C11
10μF, 25V
GND
VDD1
BATT
C2
0.22μF
GND
VDD2
VCC
C8
1.0μF
C7
1.0μF
VCC
C3
1.0μF
R10
280kΩ
R13
100kΩ
FLT
L1, 27μH
SEL
GH1
3.6V
NH1
BST1
RATE
C9
0.1μF
LX1
ON/OFF
SHDN
DIMMING
CNTL
LX2
MAX8785A
GL1
R11
90kΩ
T1
C10
0.1μF
BST2
R9
200kΩ
NL1
LSYNC
LSYNC
NH2
NL2
R8
200kΩ
PGND
R7
200kΩ
GL2
R12
150kΩ
LF
CCFL
HF
R6
200kΩ
GH2
OLF
C4
47nF
COMP
R3
200kΩ
R4
200kΩ
R5
200kΩ
VFB
C5
10nF
C6
0.22μF
PCOMP
R2
1.56kΩ
C12
1.0nF
C1
6.8nF
R14
100kΩ
TFLT
IFB
R1
150kΩ
Figure 1. Typical Operating Circuit
10
______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
VCC
SHDN
LF
BATT
4.12V
LINEAR
REGULATOR
1.6V
UVLO
COMPARATOR
GND
BIAS
SUPPLY
PLL AND
DPWM OSC
EN
EN
LSYNC
PCOMP
SEL
VDC
PWM
COMPARATOR
RATE
RAMP
DIMMING
CONTROL
LOGIC
HF
VCO
IFB
. . F.W.
RECT
CNTL
VDD1
BST1
800mV
ERROR
AMPLIFIER
GH1
LX1
VDD2
1-SHOT
BST2
COMP
PWM CONTROL LOGIC
1mA
3.25V
GATEDRIVER
CONTROL
STATE
MACHINE
GH2
VDD1
LX2
GL1
PGND
2.25V
OVERVOLTAGE
COMPARATOR
GL2
VFB
VDD2
230mV
800mV
IFB
1.2V
OLF
SHORT-CIRCUIT
COMPARATOR
FAULT
DELAY
BLOCK
LX1
MUX
LX2
OPEN-LAMP
COMPARATOR
400mV
PRIMARY
CURRENT-LIMIT
COMPARATOR
OLF
COMPARATOR
MAX8785A
TFLT
FLT
Figure 2. MAX8785A Block Diagram
Detailed Description
The MAX8785A is a full-bridge CCFL controller for piezoelectric transformer-based CCFL inverters. The fullbridge topology provides a high-spectral purity
sinusoidal drive to help efficiently operate the piezoelectric transformer. The MAX8785A uses feed-forward
control to adjust the duty cycle that effectively regulates
lamp current during line transients and maintains relatively constant switching frequency. The rate of the feedforward ramp signal can be adjusted with an external
resistor to accommodate different input voltage ranges
and different types of piezoelectric transformers.
______________________________________________________________________________________
11
MAX8785A
Block Diagram
MAX8785A
Full-Bridge Controller for
Piezoelectric Transformers
L
1
PRIMARY
C
R
1:n
3
SECONDARY
VOUT
VIN
FORCE
VIN
CCFL
VIN
CINPUT
COUT
2
RLOAD
4
VOUT
Figure 4. Electrical Model of Piezoelectric Transformer
t
VOLTAGE
RATIO
CCFL MAXIMUM PERMISSIBLE
APPLIED VOLTAGE
Figure 3. Typical Multilayer PZT in Longitudinal Mode
The MAX8785A can achieve 10:1 dimming range with
the DPWM method. CCFL brightness can be adjusted
using analog or digital dimming control. Analog voltage
on CNTL controls duty ratio of DPWM and an external
resistor on LF (RLF) controls the frequency of DPWM.
The digital signal on LSYNC controls the duty ratio and
frequency of DPWM.
The MAX8785A guarantees lamp striking by sweeping
the switching frequency from high to low until the lamp
strikes. The maximum switching frequency can be
adjusted with an external resistor. The MAX8785A voltage-controlled oscillator changes the switching frequency to regulate the lamp current.
The MAX8785A provides protection against lamp arc,
open lamp, secondary short circuit, and primary overcurrent. The MAX8785A includes an adjustable fault delay
timer and an open-drain fault indicator. The MAX8785A
has primary current limiting by using lossless current
sensing to prevent overstressing the power MOSFETs.
Piezoelectric Transformer
(PZT) Background
Piezoelectric transformers transfer energy from primary
to secondary through use of mechanical force. Figure 3
shows that when electric potential is applied to the primary of the piezoelectric material, the electrical energy is
converted into mechanical vibrations (reverse piezoelectric effect). These mechanical vibrations are coupled into
the secondary piezoelectric material, and then the piezoelectric material converts the mechanical vibrations to
electrical energy (direct piezoelectric effect).
A piezoelectric transformer has a voltage gain from primary to secondary. The voltage gain of the transformer
changes with the excitation frequency of the primary. A
simplified electrical model that predicts the gain of a
12
OPERATING
POINT B
CCFL MINIMUM
STARTING VOLTAGE
OPERATING
POINT D
OUTPUT VOLTAGE
CURVE WITH NO LOAD
OPERATING
POINT A
OPERATING POINT C
OUTPUT VOLTAGE
CURVE IN OPERATION
FREQUENCY
OPERATING
FREQUENCY
RESONANCE FREQUENCY
WITH NO LOAD
Figure 5. Voltage Ratio vs. Frequency for Resonant Tank
piezoelectric transformer is shown in Figure 4. Terminals
1 and 2 are the primary and terminals 3 and 4 are the
secondary of the transformer. Many PZT manufacturers
provide component values for the model based on measurements taken at various frequencies and output loads.
Figure 5 shows the variation of voltage gain with frequency. During startup, the lamp is not ionized, and
therefore, has a no-load condition, so the piezoelectric
transformer operates on a high-gain, high-impedance
load line. Since the exact strike voltage and operating
frequency are not known, the MAX8785A applies a relatively low voltage to the lamp by operating at the maximum-programmed operational frequency. This is
shown as Point A. As the operating frequency is
decreased, the piezoelectric transformer gain moves
up the no-load curve until the CCFL strike voltage is
reached. This is shown as operating Point B. At Point B,
______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
Variable Frequency Operation
The MAX8785A includes a voltage-controlled oscillator
(VCO) that sets the switching frequency of the
H-bridge. The VCO is controlled by the output of a
transconductance error amplifier that integrates the difference between the full-wave, rectified lamp-current
feedback signal (IFB) and an internal reference voltage
(800mV typ). As the lamp current-feedback signal
changes with respect to the reference, the error amplifier
sources and sinks current, which appropriately adjusts
COMP, and equivalently, the VCO frequency.
To strike the CCFL, a frequency sweep is initiated by
linearly ramping the COMP capacitor. As the COMP
voltage rises, the VCO sweeps the switching frequency
from the maximum value (set by the RHF resistor) to the
point where the gain of resonant tank is enough to
strike the lamp. The frequency sweep range is 15% of
the maximum switching frequency.
Connect a resistor between BATT and RATE to set DMAX:
RRATE = DMAX (%) × RHF (kΩ) × VMIN (V)
where RHF is the resistor that sets the maximum switching
frequency and VMIN is the minimum input voltage of
operation. The feed-forward network required is dependent upon the PZT used in the application. Further
improvements in the performance at higher input voltages can be achieved by adding a zener diode in
series with the RATE resistor. The MAX8785A has builtin protection to limit the maximum duty cycle to 45%.
Dimming Control
The MAX8785A has both analog and digital inputs to
control brightness.
Analog Dimming Control
Connect SEL to GND to enable analog control mode.
The voltage at CNTL controls DPWM duty cycle. The
DPWM frequency is externally set by the resistor at LF
(RLF). In analog control mode, the adjustment range is
10% to 100%. CNTL has a voltage range of 0 to 2V with
256 brightness levels. Figure 6 shows the response of
DPWM duty cycle to the CNTL voltage. When VCNTL is
between 0V and 0.23V, the DPWM duty cycle is fixed at
10%. When VCNTL is 0.23V to 2V, the DPWM duty cycle
changes linearly with CNTL. When the CNTL voltage is
above 2V, the DPWM duty cycle is fixed at 100%.
BRIGHTNESS vs. VCNTL
100
80
The MAX8785A has feed-forward control, which maintains tight control of the lamp current over the entire
input voltage range. The feed-forward control adjusts
the on-time (tON) by varying the slope of internal ramp.
The current into RATE determines the slope of the internal ramp. Connect a passive network between VIN and
RATE to change the duty ratio with input voltage. The
RATE pin allows the user to adjust the maximum duty
ratio (DMAX) to achieve the optimum performance of
the PZT used in the application.
BRIGHTNESS (%)
Feed-Forward Control
60
40
20
0
0
0.4
0.8
1.2
1.6
2.0
VCNTL (V)
Figure 6. Brightness vs. VCNTL
______________________________________________________________________________________
13
MAX8785A
the CCFL strike voltage is reached and the lamp impedance begins to decrease. The operating frequency
continues to decrease as the lamp impedance drops
until the correct operating point is reached, somewhere
between Points C and D. Figure 5 shows the Q of resonant tank is very high. If the operating frequency is
close to resonant frequency, then the high Q gives a
very high efficiency for the converter. However, due to
the high Q, the frequency of operation has to be very
close to the resonant frequency, and this reduces the
range of the switching frequency for the inverter. To
ensure optimal performance, careful selection of external components is required.
MAX8785A
Full-Bridge Controller for
Piezoelectric Transformers
The frequency of the internal DPWM oscillator is
adjustable through a resistor connected between LF
and GND. The DPWM frequency is given by:
f DPWM ≈ 208Hz × 150kΩ / RLF
The adjustable range of the DPWM frequency is 100Hz
< fDPWM < 300Hz, with a corresponding programming
resistance of 103kΩ < RLF < 315kΩ.
External Digital (DPWM) Control
Connect SEL to VCC and an external digital signal at
LSYNC to enable digital control mode. DPWM duty ratio
and frequency are the same as LSYNC duty ratio and
frequency. The frequency range of the digital signal is
120Hz to 280Hz. The range of duty ratio for LSYNC is
10% to 100%, and for correct lamp operation, the duty
cycle should always be above 10%. When the duty
ratio of LSYNC is 100%, the CCFL is at full brightness.
A phase-lock loop (PLL) is used to synchronize the
internal DPWM signal with the externally applied digital
signal at LSYNC. PLL is a feedback system that operates on the excess phase of a periodic signal. Connect
a capacitor from PCOMP to GND to stabilize the PLL.
To ensure fast response of the PLL, connect a 10nF
capacitor from PCOMP to GND.
the MAX8785A overrides the external DPWM setting
and forces 100% brightness setting until the lamp
strikes and the lamp current reaches regulation. After
the current reaches regulation, the MAX8785A switches
to normal DPWM operation using the brightness control
mode defined by the SEL pin.
Secondary Short-Circuit Protection
The MAX8785A provides protection against short circuit at the high-voltage terminal of the PZT or excessive
leakage from a high-voltage terminal to ground. The
MAX8785A senses secondary voltage through the VFB
pin (see Figure 1). If the sensed voltage stays below
the 230mV threshold for more than the fault time set by
the TFLT cap, the MAX8785A disables the gate drivers
to avoid excessive output current. The fault time is
determined by charging the TFLT capacitor with a
2.8mA current to 3V. When the TFLT fault latch is set,
the MAX8785A stops switching and FLT is pulled low.
UVLO
The MAX8785A includes a VCC undervoltage-lockout
(UVLO) feature. If VCC is below 4.12V (typ), the highside and low-side switch gate drivers are disabled and
the fault latch is set.
Lamp-Current Regulation
Low-Power Shutdown
The MAX8785A uses a lamp-current control loop to regulate the CCFL current. The control loop is a transconductance amplifier as shown in Figure 2. The AC lamp
current is sensed with a sense resistor connected in
series with the low-voltage terminal of the lamp. The IFB
input is internally full-wave rectified. The transconductance error amplifier compares the average value of the
rectified IFB voltage with 800mV (typ) internal reference.
The output of the transconductance error amplifier
VCOMP controls a VCO, which sets the switching frequency of the inverter.
When VSHDN < 0.8V, all functions of the IC are turned off
except the VCC. In shutdown, the linear-regulator output
voltage is 4.6V (typ) and the supply current is 10µA
(typ). While in shutdown, the arc protection, lamp-out
detection, and short-circuit detection latches are reset.
Lamp Startup
A CCFL is a gas-discharged lamp that is normally driven in the avalanche mode. To start ionization in a nonionized lamp, the applied voltage (striking voltage) must
be increased to the level required to start the flow of
current. For example, the normal running voltage of a
typical CCFL is approximately 650VRMS, but the striking
voltage can be as high as 1800VRMS.
The MAX8785A’s control architecture ensures striking of
the lamp. As the COMP voltage rises, the VCO sweeps
the switching frequency from the switching frequency
(set by the RHF resistor) to the point where the gain of
resonant tank is sufficient to strike the lamp. At startup,
14
Lamp-Out Detection and
Overvoltage Protection
The IFB pin monitors the lamp current to detect faulty or
open CCFL lamps. If the peak IFB voltage is less than
800mV, a fault is detected and the MAX8785A charges
the TFLT capacitor with a 0.75µA current source. If the
voltage on TFLT exceeds 3V, the fault latch is set.
During the lamp-out detection period, the MAX8785A
decreases the switching frequency in an effort to strike
the lamp. This can result in very high secondary voltage.
To address this problem, the MAX8785A includes an
overvoltage-protection circuit. The lamp voltage is
sensed at the VFB pin, and once the secondary voltage
exceeds the overvoltage threshold of 2.25V (typ), an
internal 1.0mA current source discharges the COMP
node. When COMP discharges, the inverter’s switching
frequency increases, thereby reducing the gain of the
resonant tank and limiting the secondary voltage.
______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
Primary Side Current Limit
The MAX8785A senses the voltage across both lowside MOSFETs at LX1 and LX2. If the voltage exceeds
the internal 400mV (typ) current-limit threshold, the
MAX8785A turns off the respective MOSFET to prevent
the transformer primary current from increasing further.
Applications Information
MOSFETs
The MAX8785A requires four external n-channel power
MOSFETs to form a full-bridge inverter circuit to drive the
transformer primary. When selecting the MOSFET, focus
on the voltage rating, current rating, on-resistance
(RDS(ON)), total gate charge, and power dissipation.
Select a MOSFET with a voltage rating at least 25% higher than the maximum input voltage of the inverter. For
example, if the maximum input voltage is 24V, the voltage
rating of the MOSFET should be 30V or higher. The current rating of the MOSFET should be higher than the
peak primary current at the minimum input voltage and
full brightness. Use the following equation to estimate
the primary peak current IPEAK_PRI:
IPEAK _ PRI =
2 × POUT _ MAX
VIN _ MIN × η
where P OUT_MAX is the maximum output power,
VIN_MIN is the minimum input voltage, and η the estimated efficiency at the minimum input voltage, assuming the full bridge drives one CCFL and maximum
output power of 4.5W. If the minimum input voltage is
8V and the estimated efficiency is 75% at that input, the
peak primary current is approximately 1.1A. Therefore,
power MOSFETs with a DC current rating of 1.4A or
greater are sufficient.
Since the regulator senses the on-state, drain-to-source
voltage of both MOSFETs to detect the transformer
primary current, the lower the MOSFET RDS(ON), the
higher the current limit would be. Therefore, the user
should select n-channel MOSFETs with low RDS(ON) to
minimize conduction loss, and keep the primary current
limit at a reasonable level. Use the following equation to
estimate the maximum and minimum values of the primary current limit:
ILIM _ MIN =
370mV
RDS(ON)_ MAX
ILIM _ MAX =
430mV
RDS(ON)_ MIN
Both MOSFETs must be able to dissipate the conduction
losses, as well as the switching losses at both VIN_MIN
and VIN_MAX. Calculate both terms. Ideally, the losses at
V IN(MIN) should be roughly equal to the losses at
VIN(MAX), with lower losses in between. If the losses at
V IN(MIN) are significantly higher than the losses at
VIN(MAX), consider increasing the size of the MOSFETs.
Conversely, if the losses at VIN(MAX) are significantly
higher than the losses at VIN(MIN), consider choosing
MOSFETs with lower parasitic capacitance. If VIN does
not vary over a wide range, the minimum power dissipation occurs where the conduction losses equal the
switching losses.
Calculate the total conduction power dissipation of the
two MOSFETs using the following equation:
PDCONDUCT = IPRI2 × RDS(ON)
where IPRI is the primary current calculated using the following equation and RDS(ON) is MOSFET on-resistance:
IPRI =
POUT _ MAX
η × VIN
where POUT_MAX is the output power of the lamp.
Both MOSFETs turn on with the ZVS condition, as the
switching frequency is the same as the resonance frequency of the tank, so there is no switching power dissipation associated with high-side MOSFET. However,
the current is at peak when the MOSFET is turned off.
Calculate the total turn-off switching power dissipation
of the two MOSFETs using the following equation:
PDSWTICH =
2 × CRSS × VIN2 × fSW × IPRI
IGATE
where CRSS is the reverse transfer capacitance of the
MOSFETs, and IGATE is the peak gate-drive sink current when the MOSFET is being turned off.
______________________________________________________________________________________
15
MAX8785A
Open PZT Protection
The MAX8785A has protection against faulty connections
of PZT to the PC board. The OLF pin is used to detect
high-voltage conditions on the secondary side of the
transformer. When the OLF voltage exceeds 1.2V (typ), a
2.8mA current source starts charging the TFLT capacitor.
When VTFLT exceeds the threshold of 3V, the fault latch is
set and the MAX8785A stops switching. For details, see
the Setting the Arc Protection Threshold section.
MAX8785A
Full-Bridge Controller for
Piezoelectric Transformers
Setting the Lamp Current
The MAX8785A senses the lamp current flowing through
resistor R1 (Figure 1) connected between the low-voltage
terminal of the lamp and ground. The voltage across R1
is fed to IFB and is internally full-wave rectified. The
MAX8785A controls the desired lamp current by regulating the average of the rectified IFB voltage. To set the
RMS lamp current, select R1 as follows:
R1 =
π × 800mV
2 2 × ILAMP(RMS)
where ILAMP(RMS) is the desired RMS lamp current,
and 800mV is the typical value of the IFB regulation
point. To set the RMS lamp current to 6mA, the value of
R1 should be 148Ω. The closest standard 1% resistors
are 147Ω and 150Ω. The precise shape of the lampcurrent waveform depends on lamp parasitics. The
resulting waveform is an imperfect sinusoid waveform,
which has an RMS value that is not easy to predict. A
high-frequency true RMS current meter (such as
Yokogawa 2016) should be used to measure the RMS
current and make final adjustments to R1. Insert this
meter between the sense resistor and the lamp’s lowvoltage terminal to measure the actual RMS current.
Setting the Secondary Voltage Limit
The MAX8785A limits the transformer secondary voltage during lamp-out conditions. The secondary voltage
is sensed through a resistive voltage-divider, as shown
in Figure 1. The voltage at VFB is proportional to the
CCFL voltage. The total resistance from the HV side to
ground should be greater than 1MΩ so that the resistive voltage-divider does not affect normal lamp operation. Resistors R2 and R3 through R9 set the maximum
secondary voltage limit. The resistance of R2 can be
calculated as follows :
R2 =
VFB _ OV × RVFB
VLAMP _ MAX
Assuming the normal lamp operating voltage is 800V
and the resistor voltage rating is 200V, then n = 5.6.
Choose six resistors for the VFB string.
Setting the Arc Protection Threshold
If during normal operation, the PZT loses contact with
the PC board, the MAX8785A stops switching. This feature is referred to as arc protection. During normal
operation when the PZT-to-PC board connection is broken, a very high voltage develops between the terminals, resulting in arcing. The arcing is detected using a
capacitive voltage-divider from the PZT high-voltage
side to the OLF pin. Figure 7 shows an equivalent highvoltage capacitor between the bottom layer of the PZT
and the metal layer of the PC board. The lower layer of
the PZT and metal layer of the PC board creates a highvoltage capacitor. Terminals 1 and 2 are the primary
side of the PZT, terminal 3 is the secondary side, and
terminal 4 is the metal layer of the PC board, which is
the low-voltage side of the capacitor (CPZT).
1
1
3
T1
3
T1
PC BOARD TRACE
2
4
2
4
Figure 7. Arc Protection
CPZT and C1 in Figure 1 form a capacitive voltagedivider to OLF pin. These capacitors set the maximum
secondary voltage for an ARC fault. C1 can be calculated from the following equation:
C1 =
2 × VLAMP(RMS)_ MAX
× CPZT
1.2V
CPZT should be measured on the board. Refer to the
MAX8785A EV Kit data sheet for suggested layout.
COMP Capacitor Selection
where RVFB = R3 + R4 + R5 + R6 + R7 + R8 + R9 =
1.4MΩ and VFB_OV is the overvoltage threshold. To set
the maximum lamp voltage to 2000V with R VFB =
1.4MΩ, R2 must be equal to 1.54kΩ. The voltage across
each resistor during normal operation should not
exceed its voltage rating; hence, the number of resistors
in RVFB can be calculated from the following equation:
n=
16
LampOperatingVoltage ×1.4
VSEC _ MAX
COMP is the output of the transconductance error
amplifier for the lamp-current control loop. Connect a
capacitor between COMP and GND to stabilize the current-control loop. The value of COMP capacitance
determines the response time of the lamp-current control loop. The COMP capacitance also determines the
power-on startup timing. The recommended COMP
capacitance is 47nF.
______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
CTFLT × 3V
0.75μA
C
× 3V
t ARC = TFLT
2.8mA
× 3V
C
t SHORT _ CIRCUIT = TFLT
2.8mA
t OPEN _ LAMP =
Bootstrap Capacitors
The high-side gate drivers are powered using two bootstrap circuits. The MAX8785A integrates the bootstrap
diodes so only two 0.1µF bootstrap capacitors are
needed. Connect the capacitors between LX1 and
BST1 and between LX2 and BST2 to complete the
bootstrap circuits.
Layout Guidelines
Careful PC board layout is important to achieve stable
operation. The high-voltage sections and the switching
section of the circuit require particular attention. The
high-voltage sections of the layout need to be well separated from the control circuit. Follow these guidelines
for good PC board layout:
1) Keep the high-current paths short and wide, especially at the ground terminals. This is essential for
stable, jitter-free operation and high efficiency.
2) Use a star ground configuration for power and analog grounds. The power and analog grounds should
be completely isolated, meeting only at the center of
the star. The center should be placed at the analog
ground pin (GND).
3) Route high-speed switching nodes away from sensitive analog areas (VCC, RATE, HF, LF, COMP,
and TFLT).
4) Mount the decoupling capacitor from VCC to GND as
close as possible to the IC with dedicated traces that
are not shared with other signal paths.
5) The current-sense paths for LX to GND must be
made using Kelvin-sense connections to guarantee
the current-limit accuracy. With 8-pin SO MOSFETs,
this is best done by routing power to the MOSFETs
from outside using the top copper layer, while connecting GND and LX inside (underneath) the 8-pin
SO package.
6) Ensure the feedback connections are short and
direct. To the extent possible, IFB, VFB, and OLF
connections should be far away from the high-voltage
traces and the transformer.
7) To the extent possible, high-voltage trace clearance
on the transformer’s secondary should be widely
separated. The high-voltage traces should also be
separated from adjacent ground planes to prevent
lossy capacitive coupling.
______________________________________________________________________________________
17
MAX8785A
Setting the Fault Delay Time
The TFLT capacitor determines the delay time for both
open-lamp fault and arc fault. The MAX8785A charges
the TFLT capacitor with a 0.75µA current source during
open-lamp fault and charges the TFLT capacitor with a
2.8mA current source during an arc fault and secondary short circuit. The MAX8785A sets the fault latch
when the TFLT voltage reaches 3V. Use the following
equations to calculate the open-lamp fault delay
(tOPEN_LAMP), arc fault (tARC), and secondary short-circuit delay (tSHORT_CIRCUIT):
Full-Bridge Controller for
Piezoelectric Transformers
MAX8785A
Simplified Operating Circuit
VIN
VCC
GND
BATT
VDD1
GND
VDD2
VCC
VCC
FLT
L
SEL
GH1
RATE
BST1
PZT
LX1
SHDN
ON/OFF
LX2
CNTL
DIMMING
MAX8785A
BST2
GL1
LSYNC
LSYNC
PGND
CCFL
HF
GL2
LF
GH2
OLF
COMP
VFB
PCOMP
TFLT
IFB
Package Information
Chip Information
TRANSISTOR COUNT: 6281
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PROCESS: BiCMOS
18
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
28 TQFN
T2855-6
21-0140
______________________________________________________________________________________
Full-Bridge Controller for
Piezoelectric Transformers
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
0
8/06
Initial release
1
6/08
Replacing MAX8785 with A version
PAGES
CHANGED
—
1–19
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
MAX8785A
Revision History
工商网监
湘ICP备2023018690号
