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MAX9595CTM+

MAX9595CTM+

  • 厂商:

    AD(亚德诺)

  • 封装:

    WFQFN48_EP

  • 描述:

    IC AUDIO/VIDEO SWIT DUAL 48TQFN

  • 数据手册
  • 价格&库存
MAX9595CTM+ 数据手册
19-3946; Rev 2; 5/07 KIT ATION EVALU LE B A IL A AV Audio/Video Switch for Dual SCART Connector The MAX9595 dual SCART switch matrix routes audio and video signals between an MPEG encoder and two external SCART connectors under I2C control, and meets the requirements of EN50049-1, IEC 933-1, Canal+, and BSkyB standards. The video and audio channels feature input source selection multiplexers, input buffers, and output buffers for routing all inputs to selected outputs. The MAX9595 provides programmable gain control from +5dB to +7dB in 1dB steps for red, green, and blue component video signals. All other video outputs have a fixed +6dB gain. Additional features include an internal luma and chroma (Y/C) mixer that generates a composite video signal (CVBS) to supply an RF modulator output, and internal video reconstruction lowpass filters with passband ripple between -1dB and +1dB from 100kHz to 5.5MHz. The MAX9595 TV audio channel features clickless switching and programmable volume control from 56dB to +6dB in 2dB steps. The VCR audio output also has programmable gain for -6dB, 0dB, or +6dB. The device also generates monaural audio from left and right stereo inputs. All audio drivers deliver a 3.0VRMS minimum output. The MAX9595 operates with standard 5V and 12V power supplies and supports slow-switching and fast-switching signals. The I2C interface programs the gain and volume control, and selects the input source for routing. The MAX9595 is available in a compact 48-pin thin QFN package and is specified over the 0°C to +70°C commercial temperature range. Applications Features ♦ Video Outputs Drive 2VP-P into 150Ω ♦ Audio Outputs Drive 3VRMS into 10kΩ ♦ Clickless, Popless Audio Gain Control and Switching ♦ Interrupt Output Detects Changes on Slow Switching Input ♦ AC-Coupled Video Inputs with Internal Clamp and Bias ♦ DC-Coupled Video Outputs ♦ Composite Video Signal Created Internally from Y/C Inputs ♦ Internal Video Reconstruction Filters Provide -40dB at 27MHz ♦ Single-Ended Audio Input ♦ Red/Chroma Switch for Bidirectional I/O ♦ I2C-Programmable RGB Gain from +5dB to +7dB ♦ I2C-Programmable Audio Gain Control from +6dB to -56dB ♦ Meets EN50049-1, IEC 933-1, Canal+, and BSkyB Requirements Ordering Information PART TEMP RANGE MAX9595CTM+ 0°C to +70°C Satellite Set-Top Boxes Cable Set-Top Boxes TVs VCRs DVDs PINPACKAGE 48 Thin QFN-EP* (7mm x 7mm) PKG CODE T4877-6 *EP = Exposed paddle. +Denotes lead-free package. Pin Configuration and Typical Application Circuit appear at end of data sheet. System Block Diagram appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9595 General Description MAX9595 Audio/Video Switch for Dual SCART Connector ABSOLUTE MAXIMUM RATINGS VVID to GNDVID........................................................-0.3V to +6V V12 to GNDAUD .....................................................-0.3V to +14V VAUD to GNDAUD ....................................................-0.3V to +6V GNDAUD to GNDVID ............................................-0.1V to +0.1V All Video Inputs, ENCIN_FS, VCRIN_FS, SET to GNDVID......................................-0.3V to (VVID + 0.3V) All Audio Inputs, AUDBIAS to GNDAUD .........................-0.3V to (VAUD + 0.3V) SDA, SCL, DEV_ADDR, INTERRUPT_OUT to GNDVID ..............................-0.3V to +6V All Audio Outputs, TV_SS, VCR_SS to GNDAUD...............................-0.3V to (V12 + 0.3V) INTERRUPT_OUT Current ................................................+50mA All Video Outputs, TVOUT_FS to VVID, VAUD, GNDAUD, GNDVID ................................................Continuous All Audio Outputs to VVID, VAUD, V12, GNDVID, GNDAUD ................................................Continuous Continuous Power Dissipation (TA = +70°C) 48-Pin Thin QFN (derate 27mW/°C above +70°C) .....2105.3mW Operating Temperature Range...............................0°C to +70°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V12 = 12V, VVID = VAUD = 5V; 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100kΩ nominal, RLOAD = 150Ω, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX VVID Supply Voltage Range VVID Inferred from video gain test 4.75 5.0 5.25 VAUD Supply Voltage Range VAUD Inferred from audio gain test 4.75 5.0 5.25 Inferred from slow switching levels 11.4 12.0 12.6 V12 Supply Voltage Range V12 UNITS V VVID Quiescent Supply Current IVID_Q All video output amplifiers are enabled, no load 69 100 mA VVID Standby Supply Current IVID_Q All video output amplifiers are in shutdown, and TV_FS_OUT driver is in shutdown, no load 40 60 mA VAUD Quiescent Supply Current IAUD_Q No load 2.4 6 mA I12_Q No load 3.6 6 mA +5.5 +6.0 +6.5 +4.5 +5.0 +5.5 +5.5 +6.0 +6.5 +6.5 +7.0 +7.5 +1 V12 Quiescent Supply Current VIDEO CHARACTERISTICS CVBS and Y-C, 1VP-P input Voltage Gain G_V RGB, 1VP-P input, (programmable gain control) dB LP Filter Passband Flatness TA = +25°C, f = 5.5MHz, VIN = 1VP-P -1 -0.52 LP Filter Attenuation at 27MHz TA = +25°C, f = 27MHz, VIN = 1VP-P 30 40 dB 16 V/µs Slew Rate Settling Time SR VOUT = 2VP-P tS VOUT = 2VP-P, settle to 0.1% (Note 2) 300 ns Gain Matching AG 1VP-P input, between RGB or Y-C Differential Gain DG 5-step modulated staircase 0.4 % Differential Phase DP 5-step modulated staircase 0.2 degrees 2 -0.5 dB +0.5 _______________________________________________________________________________________ dB Audio/Video Switch for Dual SCART Connector (V12 = 12V, VVID = VAUD = 5V; 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100kΩ nominal, RLOAD = 150Ω, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Signal-to-RMS Noise SYMBOL SNR_V CONDITIONS MIN TYP VIN = 1VP-P 65 f = 0.1MHz to 4.43MHz 8 f = 0.1MHz to 5.5MHz 12 MAX UNITS dB Group Delay Variation ∆GD Sync-Tip Clamp Level V_CLMP RGB, composite, and luma input, no signal, no load 1.21 V Chroma Bias V_BIAS Chroma input only, no signal, no load 1.9 V Droop D Power-Supply Rejection Ratio PSRR_V Input Impedance ZIN Input Clamp Current ICLMP Pulldown Resistance RP Output Pin Bias Voltage VOUT Crosstalk XTLK Mute Suppression Set by input current -2 ns +2 % DC, 0.5VP-P 48 dB CVBS or RGB video inputs, VIN > V_CLMP 4 MΩ Chroma video input. VIN = V_BIAS VIN = 1.75V 11 2.5 Enable VCR_R/C_OUT and TV_R/C_OUT pulldown through I2C, (see registers 7 and 9 for loading register details) 5 kΩ 8.0 µA Ω 10 RGB, composite, and luma, no signal, no load 1.08 Chroma, no signal, no load 2.27 Between any two active inputs, f = 4.43MHz, VIN = 1VP-P -50 dB -50 dB M_SPR_V f = 4.43MHz, VIN = 1VP-P, on one input only V AUDIO CHARACTERISTICS (Note 3) TV or VCR to stereo, gain = 0dB, VIN = 1VP-P Voltage Gain (Measured From Application Input) Gain Matching Between Channels G_A ∆G_A -0.5 0 +0.5 TV or VCR to mono, gain = 0dB, VIN = 1VP-P 2.5 3.0 3.5 ENC to stereo, gain = 0dB, VIN = 1VP-P 3.02 3.52 4.02 ENC to mono, gain = 0dB, VIN = 1VP-P 6.02 6.52 7.02 Gain = 0dB, VIN = 1VP-P -0.5 0 +0.5 dB dB Flatness ∆A f = 20Hz to 20kHz, 0.5VRMS input, gain = 0dB 0.01 dB Frequency Bandwidth BW 0.5VRMS input, frequency where output is -3dB referenced to 1kHz 230 kHz Input DC Level (Excluding Encoder Inputs which are Hi-Z) VIN Gain = 0dB 0.2308 x V12 V _______________________________________________________________________________________ 3 MAX9595 ELECTRICAL CHARACTERISTICS (continued) MAX9595 Audio/Video Switch for Dual SCART Connector ELECTRICAL CHARACTERISTICS (continued) (V12 = 12V, VVID = VAUD = 5V; 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100kΩ nominal, RLOAD = 150Ω, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Input Signal Amplitude (Measured from Application Input) Input Resistance (Measured at Parts Input) Output DC Level SYMBOL VIN_AC RIN VOUT_DC SNR_A Total Harmonic Distortion Plus Noise THD+N Volume Attenuation Step MIN Single-ended inputs, f = 1kHz, THD < 1% Signal-to-Noise Ratio (Measured from Application Input) Output Impedance CONDITIONS ZO ASTEP TYP MAX UNIT 3 VRMS ENC inputs single-ended, f = 1kHz, THD < 1% 1.31 Single ended: VCR_INR, VCR_INL, TV_INR, TV_INL 0.1 Encoder, ENC_INL, ENC_INR 0.1 MΩ VIN = 0V f = 1.0kHz, 1VRMS application input, gain = 0dB, 20Hz to 20kHz 0.5 x V12 V 95 dB RLOAD = 10kΩ, f = 1.0kHz, 0.5VRMS output 0.004 RLOAD = 10kΩ, f = 1.0kHz, 2VRMS output 0.004 f = 1kHz % Ω 1 1.414VP-P input, programmable gain to TV SCART volume control range extends from -56dB to +6dB 1.5 1.414VP-P input, programmable gain to VCR audio extends from -6dB to +6dB 5.5 2 2.5 dB 6 6.5 From V12, f = 1kHz, 0.5VP-P, (CAUD_BIAS = 47µF), gain = 0dB 75 From VAUD, f = 1kHz, 0.5VP-P, VAUD ≥ +4.75V, VAUD ≤ +5.25V, gain = 0dB 75 f = 1kHz, 0.5VRMS input, set through I2C, see register 1 for loading register details 90 dB VCLIP f = 1kHz, 2.5VRMS input, gain = 6dB, THD < 1% 3.6 VRMS Left-to-Right Crosstalk XTLK_LR f = 1kHz, 0.5VRMS input, gain = 0dB 80 dB Crosstalk TV SCART to VCR SCART or VCR SCART XTLK_CC to TV SCART, f = 1kHz, 0.5VRMS input, gain = 0dB 90 dB Power-Supply Rejection Ratio Mute Suppression Audio Clipping Level 4 PSRR_A M_SPR_A dB _______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector (V12 = 12V, VVID = VAUD = 5V; 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100kΩ nominal, RLOAD = 150Ω, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT 0.8 V DIGITAL INTERFACE: SDA and SCL (Note 4) Low-Level Input Voltage VIL 0 High-Level Input Voltage VIH 2.6 Hysteresis of Schmitt Trigger Input SDA Low-Level Output Voltage V 0.2 VOL Output Fall Time for SDA Line V ISINK = 3mA 0.4 ISINK = 6mA 0.6 400pF bus load 250 ns +10 µA Spike Suppression 50 Input Current -10 Input Capacitance ns 5 SCL Clock Frequency Hold Time 0 V pF 400 kHz tHD,STA 0.6 µs Low Period of SCL Clock tLow 1.3 µs High Period of SCL Clock tHIGH 0.6 µs Setup Time for a Repeated Start Condition tSU,STA 0.6 µs Data Hold Time tHD,DAT 0 Data Setup Time tSU,DAT 100 ns Setup Time for Stop Condition tSU,STO 0.6 µs Bus Free Time Between a Stop and Start tBUF 1.3 µs 0.9 µs OTHER DIGITAL PINS (Note 4) DEV_ADDR Low Level 0.8 DEV_ADDR High Level 2.6 INTERRUPT_OUT Low Voltage INTERRUPT_OUT sinking 1mA INTERRUPT_OUT High Leakage Current VINTERRUPT_OUT = 5V V V 0.15 0.4 V 1 10 µA V SLOW SWITCHING SECTION (Note 4) Input Low Level 0 2 Input Medium Level 4.5 7.0 V Input High Level 9.5 V12 V 100 µA Input Current 50 _______________________________________________________________________________________ 5 MAX9595 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (V12 = 12V, VVID = VAUD = 5V; 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100kΩ nominal, RLOAD = 150Ω, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Output Low Level 10kΩ to ground, internal TV, 11.4 < V12 < 12.6 0 1.5 V Output Medium Level 10kΩ to ground, external 16/9, 11.4 < V12 < 12.6 5 6.5 V Output High Level 10kΩ to ground, external 4/3, 11.4 < V12 < 12.6 10 V12 V Input Low Level 0 0.4 V Input High Level 1 3 V µA FAST SWITCHING SECTION (Note 4) Input Current 0 1 10 0.01 0.2 V 0.75 2 V Output Low Level ISINK = 0.5mA Output High Level ISOURCE = 20mA, VVID - VOH Fast Switching Output to RGB Skew (Note 5) 30 ns Fast Switching Output Rise Time 150Ω to ground 30 ns Fast Switching Output Fall Time 150Ω to ground 30 ns Note 1: All devices are 100% tested at TA = +25°C. All temperature limits are guaranteed by design. Note 2: The settling time is measured from the 50% of the input swing to the 0.1% of the final value of the output. Note 3: Maximum load capacitance is 200pF. All the listed parameters are measured at application’s inputs, unless otherwise noted. See the Typical Application Circuits. Note 4: Guaranteed by design. Note 5: Difference in propagation delays of fast-blanking signal and RGB signals. Measured from 50% input transition to 50% output transition. Signal levels to be determined. Typical Operating Characteristics (V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, VVID to GNDVID no load, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) 3 2 100 1 3 2 1 -1 -2 GAIN (dB) DELAY (ns) 80 0 60 40 -3 -4 0 -1 -2 -3 -4 20 -5 -5 0 -6 100k 1M FREQUENCY (Hz) 6 4 MAX9595 toc02 120 MAX9595 toc01 4 Y VIDEO LARGE-SIGNAL BANDWIDTH vs. FREQUENCY GROUP DELAY vs. FREQUENCY MAX9595 toc03 RGB LARGE-SIGNAL BANDWIDTH vs. FREQUENCY GAIN (dB) MAX9595 Audio/Video Switch for Dual SCART Connector 10M -6 100k 1M FREQUENCY (Hz) 10M 100k 1M FREQUENCY (Hz) _______________________________________________________________________________________ 10M Audio/Video Switch for Dual SCART Connector 3 2 3 2 0 -1 -2 0 -1 -2 -3 -3 -4 -4 -5 -5 -6 10M 1M -60 -100 100k 10M 1M 100k 1M FREQUENCY (Hz) AUDIO CROSSTALK vs. FREQUENCY AUDIO LARGE-SIGNAL BANDWIDTH vs. FREQUENCY 2 VIN = 0.5VRMS RL = 10kΩ TO GNDAUD -20 0 MAX9595 toc08 VIN = 0.5VRMS RL = 10kΩ TO GNDAUD AUDIO TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY 0 MAX9595 toc07 4 10M FREQUENCY (Hz) MAX9595 toc09 FREQUENCY (Hz) 3 -40 -80 -6 100k 0.1 0 -1 -2 -3 AMPLITUDE = 3.0VRMS -40 THD+N (%) CROSSTALK (dB) 1 -60 AMPLITUDE = 0.5VRMS 0.01 -80 0.001 -100 AMPLITUDE = 2.0VRMS -5 -6 -120 10 100 0.0001 0.01 1000 0.1 1 10 100 10 100 VVID QUIESCENT SUPPLY CURRENT vs. TEMPERATURE -20 -30 -40 WITH RESPECT TO V12 -60 -70 -80 WITH RESPECT TO VAUD -100 80 VVID QUIESCENT SUPPLY CURRENT (mA) 0 -10 -90 1 FREQUENCY (kHz) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY -50 0.1 0.01 FREQUENCY (kHz) FREQUENCY (kHz) MAX9595 toc10 1 ALL VIDEO OUTPUT AMPLIFIERS ENABLED NO LOAD 75 MAX9595 toc11 -4 PSRR (dB) GAIN (dB) -20 CROSSTALK (dB) 1 GAIN (dB) GAIN (dB) 1 VIDEO CROSSTALK vs. FREQUENCY 0 MAX9595 toc05 4 MAX9595 toc04 4 Y VIDEO SMALL-SIGNAL BANDWIDTH vs. FREQUENCY MAX9595 toc06 RGB SMALL-SIGNAL BANDWIDTH vs. FREQUENCY 70 65 60 55 50 0.01 0.1 1 FREQUENCY (kHz) 10 100 0 25 50 75 TEMPERATURE (°C) _______________________________________________________________________________________ 7 MAX9595 Typical Operating Characteristics (continued) (V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, VVID to GNDVID no load, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) Typical Operating Characteristics (continued) (V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, VVID to GNDVID no load, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) 40 35 30 4.5 4.0 3.5 3.0 2.5 2.0 1.5 4.0 1.0 75 50 25 50 0.5 0 25 50 INPUT CLAMP CURRENT vs. TEMPERATURE 2.3 BIAS 1.9 1.7 1.5 BOTTOM LEVEL CLAMP 0.9 6.0 VIN = 1.75V 5.5 INPUT CLAMP CURRENT (µA) MAX9595 toc15 INPUT CLAMP AND BIAS LEVEL (V) 1.0 TEMPERATURE (°C) 5.0 4.5 4.0 3.5 3.0 2.5 0.7 0.5 2.0 0 25 50 75 0 25 TEMPERATURE (°C) 50 75 TEMPERATURE (°C) INPUT CLAMP CURRENT vs. INPUT VOLTAGE OUTPUT BIAS VOLTAGE vs. TEMPERATURE 3.0 MAX9595 toc17 0.5 0.4 0.3 CHROMA 2.5 OUTPUT BIAS VOLTAGE (V) INPUT CLAMP CURRENT (mA) 1.5 TEMPERATURE (°C) 2.5 1.1 2.0 75 INPUT CLAMP AND BIAS LEVEL vs. TEMPERATURE 1.3 2.5 0 0 TEMPERATURE (°C) 2.1 3.0 MAX9595 toc16 25 3.5 0.2 0.1 0 -0.1 -0.2 -0.3 MAX9595 toc18 0 MAX9595 toc14 5.0 VAUD QUIESCENT SUPPLY CURRENT (mA) 45 VAUD QUIESCENT SUPPLY CURRENT vs. TEMPERATURE MAX9595 toc13 ALL VIDEO OUTPUT AMPLIFIERS DISABLED V12 QUIESCENT SUPPLY CURRENT (mA) 50 V12 QUIESCENT SUPPLY CURRENT vs. TEMPERATURE MAX9595 toc12 VVID STANDBY QUIESCENT SUPPLY CURRENT vs. TEMPERATURE VVID STANDBY QUIESCENT SUPPLY CURRENT (mA) MAX9595 Audio/Video Switch for Dual SCART Connector 2.0 1.5 RGB, LUMA, CVBS 1.0 0.5 -0.4 -0.5 0 0 1 2 3 INPUT VOLTAGE (V) 8 4 5 0 25 50 TEMPERATURE (°C) _______________________________________________________________________________________ 75 75 Audio/Video Switch for Dual SCART Connector PIN NAME FUNCTION I2C 1 SDA Bidirectional Data I/O. 2 SCL Serial Clock Input. I2C -compatible, 2-wire clock interface. -compatible, 2-wire interface data input/output. Output is open drain. 3 DEV_ADDR 4 ENC_INL 5 INTERRUPT_OUT 6 ENC_INR 7 N.C. 8 VCR_INR VCR SCART Right-Channel Audio Input 9 VCR_INL VCR SCART Left-Channel Audio Input 10 TV_INR TV SCART Right-Channel Audio Input 11 TV_INL TV SCART Right-Channel Audio Input 12 GNDAUD Audio Ground 13 AUD_BIAS Audio Input Bias Voltage. Bypass AUD_BIAS with a 47µF capacitor and a 0.1µF capacitor to AUDGND. 14 VAUD 15 VCR_OUTR VCR SCART Right-Channel Audio Output 16 VCR_OUTL VCR SCART Left-Channel Audio Output 17 RF_MONO_OUT 18 TV_OUTL TV SCART Left-Channel Audio Output 19 TV_OUTR TV SCART Right-Channel Audio Output Device Address Set Input. Connect to GNDVID to set write and read addresses of 94h or 95h, respectively. Connect to VVID to set write and read address of 96h or 97h, respectively. Digital Encoder Left-Channel Audio Input Interrupt Output. INTERRUPT_OUT is an open-drain output that goes high impedance to indicate a change in the slow switch lines, TV_SS or VCR_SS. Digital Encoder Right-Channel Audio Input No Connection. Not internally connected. Audio Supply. Connect to a +5V supply. Bypass with a 10µF aluminum electrolytic capacitor in parallel with a 0.47µF low-ESR ceramic capacitor to GNDAUD. RF Modulator Mono Audio Output 20 V12 21 TV_SS 22 VCR_SS 23 SET Filter Cutoff Frequency Set Input. Connect 100kΩ resistor from SET to ground. VVID Video and Digital Supply. Connect to a +5V supply. Bypass with a 0.01µF capacitor to GNDVID. VVID also serves as a digital supply for the I2C interface. 24, 36 +12V Supply. Bypass V12 with a 10µF capacitor in parallel with a 0.1µF capacitor to ground. TV SCART Bidirectional Slow-Switch Signal VCR SCART Bidirectional Slow-Switch Signal 25 VCRIN_FS 26 ENCIN_FS Digital Encoder Fast-Switching Input 27 TVOUT_FS TV SCART Fast-Switching Output. This signal is used to switch the TV to its RGB inputs for onscreen display purposes. 28 GNDVID 29 RF_CVBS_OUT 30 TV_Y/CVBS_OUT 31 TV_R/C_OUT VCR SCART Fast-Switching Input Video Ground RF Modulator Composite Video Output. Internally biased at 1V. TV SCART Luma/Composite Video Output. Internally biased at 1V. TV SCART Red/Chroma Video Output. Internally biased at 1V for red video signal and 2.2V for chroma video signal. _______________________________________________________________________________________ 9 MAX9595 Pin Description Audio/Video Switch for Dual SCART Connector MAX9595 Pin Description (continued) PIN NAME 32 TV_G_OUT TV SCART Green Video Output. Internally biased at 1V. 33 TV_B_OUT TV SCART Blue Video Output. Internally biased at 1V. 34 FUNCTION VCR_Y/CVBS_OUT VCR SCART Luma/Composite Video Output. Internally biased at 1V. VCR SCART Red/Chroma Video Output. Internally biased at 1V for red video signals and 2.2V for chroma video signal. 35 VCR_R/C_OUT 37 TV_R/C_IN 38 TV_Y/CVBS_IN 39 VCR_Y/CVBS_IN 40 VCR_R/C_IN 41 VCR_G_IN VCR SCART Green Video Input. Internally biased at 1.2V. 42 VCR_B_IN VCR SCART Blue Video Input. Internally biased at 1.2V. 43 ENC_Y/CVBS_IN 44 ENC_R/C_IN 45 ENC_G_IN Digital Encoder Green Video Input. Internally biased at 1.2V. 46 ENC_B_IN Digital Encoder Blue Video Input. Internally biased at 1.2V. 47 ENC_Y_IN Digital Encoder Luma Video Input. Internally biased at 1.2V. 48 ENC_C_IN Digital Encoder Chroma Video Input. Internally biased at 1.9V. EP GNDAUD Exposed Paddle. Solder to the circuit board ground (GNDAUD) for proper thermal and electrical performance. TV SCART Red/Chroma Video Input. Internally biased at 1V for red video signals, or 2.2V for chroma video signals. TV SCART Luma/Composite Video Input. Internally biased at 1.2V. VCR SCART Luma/Composite Video Input. Internally biased at 1.2V. VCR SCART Red/Chroma Video Input. Internally biased at 1.2V for red video signals and 1.9V for chroma video signals. Digital Encoder Luma/Composite Video Input. Internally biased at 1.2V. Digital Encoder Red/Chroma Video Input. Internally biased at 1.2V for red video signals, or 1.9V for chroma video signals. Detailed Description The MAX9595 is a switch matrix that routes audio and video signals between different ports using the I 2C interface. The ports consist of the MPEG decoder output, and two SCART connectors for the TV and VCR. Per EN50049 and IEC 933, the encoder can only input a signal to the SCART connector, while TV and VCR SCART connectors are bidirectional. The MAX9595 circuitry consists of four major sections: the video section, the audio section, the slow- and fastswitching section, and the digital interface. The video section consists of clamp and bias circuitry, input buffers, reconstruction filters, a switch matrix, a Y/C mixer, and output buffers. All video inputs are ACcoupled through a 0.1µF capacitor to set an acceptable DC level using clamp or bias networks. The bidirectional red/chroma outputs can be connected to ground 10 using I 2 C control to make them terminations when red/chroma is an input (see the Video Inputs section). The audio section features an input buffer, a switching matrix, volume- or gain-control circuitry, and output drivers. The audio inputs are AC-coupled through a 0.1µF capacitor. The TV output audio path has volume control from -56dB to +6dB in 2dB steps, while the VCR output audio path has volume control from -6dB to +6dB in 6dB steps. The MAX9595 can be configured to switch inputs during a zero-crossing function to reduce clicks. The slow-switching feature allows for bidirectional, trilevel, slow-switching input and output signals at pin VCR_SS and TV_SS, respectively. The slow-switching signals from the VCR set the aspect ratio or video source of the TV screen. If INTERRUPT_OUT is enabled, then INTERRUPT_OUT changes to a high-impedance state if any of the slow-switching inputs change logic levels. See the Slow Switching section. ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector TV_R/C_IN CLAMP/BIAS TV_Y/CVBS_IN CLAMP VCR_B_IN CLAMP VCR_G_IN CLAMP VCR_R/C_IN The MAX9595 switches video signals between an MPEG decoder, TV SCART, and VCR SCART. The video switch includes reconstruction filters, multiplexed video amplifiers, and a Y-C mixer driver for an RF modulator. See Figure 1 for the functional diagram of the video section. While the SCART connector supports RGB, S-video, and composite video formats, RGB, and S-video typically share a bidirectional set of SCART connector pins. FILTER FILTER x2 VCR_Y/CVBS_OUT x2 VCR_R/C_OUT PULLDOWN VCRRCOUT N CLAMP/BIAS VCRIN_FS VGA 5dB, 6dB, OR 7dB 0.7V TV_R/C_OUT FILTER VCR_Y/CVBS_IN CLAMP ENC_Y/CVBS_IN CLAMP ENC_R/C_IN PULLDOWN TVRCOUT VGA 5dB, 6dB, OR 7dB CLAMP/BIAS ENC_G_IN CLAMP ENC_B_IN CLAMP ENC_Y_IN CLAMP N FILTER TV_G_OUT VGA 5dB, 6dB, OR 7dB TV_B_OUT FILTER ENCIN_FS 0.7V ENC_C_IN BIAS BIAS MAX9595 x2 TV_Y/CVBS_OUT x1 TVOUT_FS x2 RF_CVBS_OUT 0V 5V FILTER 2kΩ MIXER 2kΩ V12 TV_SS SW/MONITOR INTERRUPT_OUT VCR_SS Figure 1. MAX9595 Video Section Functional Diagram ______________________________________________________________________________________ 11 MAX9595 SCART Video Switching Fast switching consists of two inputs from the encoder and VCR, and one output to the TV to insert an onscreen display (OSD). Fast switching is used to route video signals from the VCR or from the encoder to the TV. In addition, the fast-switching output can be configured to a high or low voltage. Fast switching is controlled through the I2C interface. The digital block contains the 2-wire interface circuitry, control, and status registers. The MAX9595 can be configured through an I 2 C-compatible interface. DEV_ADDR sets the I2C-compatible address. MAX9595 Audio/Video Switch for Dual SCART Connector 75Ω resistor to ground. Thus, a ground state is provided by an active pulldown to GNDVID on the red/chroma output to support the bidirectional chroma or red I/O, turning the output source resistors into terminations (see Figure 2). The active pulldown also provides the “Mute Output” function, and disables the deselected video outputs. The “Mute Output” state is the default power-on state for video. For high-quality home video, the MPEG decoder, VCR, and TV use the S-video format. The MAX9595 supports S-video signals as an input from the VCR, the MPEG decoder, and the TV, and also as a separately switchable output to the TV and VCR. Because S-video support was not included in the original specifications of the SCART connector, the luma (Y) signal of S-video and the CVBS signal share the same SCART connector pins. If S-video is present, then a composite signal must be created from the Y and C signals to drive the RF_CVBS_OUT pin. For S-video, loop-through is not possible since the chroma SCART port is used for both input and output. Video Inputs All video inputs are AC-coupled with an external 0.1µF capacitor. Either a clamp or bias circuit sets the DC input level of the video signals. The clamp circuit positions the sync tip of the composite (CVBS), the component RGB, or the S-video luma signal. If the signal does not have a sync tip, then the clamp positions the minimum of the signal at the clamp voltage. The bias circuitry is used to position the S-video chroma signal at midlevel of the luma (Y) signal. On the video inputs that can receive either a chroma or a red video signal, the bias or clamp circuit is selected through I2C. See Tables 3–12 for loading register details. The MPEG decoder and VCR uses the RGB format and fast switching to insert an on-screen display (OSD), usually text, onto the TV. The MAX9595 supports RGB as an input from either the VCR or the MPEG decoder and as an output only to the TV. The red video signal of the RGB format and the chroma video signal of the S-VHS format share the same SCART connector pin. Therefore, RGB and S-video signals cannot be present at the same time. Loop-through is possible with a composite video signal but not with RGB signals because the RGB SCART pins are used for both input and output. The MAX9595 supports composite video (CVBS) format, with inputs from the VCR, MPEG decoder, and TV. Full loop-through is possible to the TV and VCR only, since the MPEG decoder SCART connector has separate input and output pins for the CVBS format. In SCART, there is the possibility of a bidirectional use of the red/chroma pin. When using the red/chroma pin as an input port, terminate the red/chroma output with a 0.1µF 0.1µF MAX9595 MAX9595 TV_R/C_OUT N PULLDOWN 75Ω PIN 15 PIN 15 PIN 13 PIN 13 SCART CABLE 75Ω TV_R/C_OUT N PULLDOWN TV_R/C_IN CLAMP/BIAS VIDEO INPUT TV_R/C_IN SCART CONNECTORS CLAMP/BIAS CLAMP Figure 2. Bidirectional SCART Pins 12 ______________________________________________________________________________________ VIDEO INPUT CLAMP Audio/Video Switch for Dual SCART Connector Fast Switching The VCR or MPEG decoder outputs a fast-switching signal to the display device or TV to insert on-screen display (OSD). The fast-switching signal can also be set to a constant high or low output signal through the I 2C interface. The fast-switching output can be set through writing to register 07h. Slow Switching The MAX9595 supports the IEC 933-1, Amendment 1, tri-level slow switching that selects the aspect ratio for the display (TV). Under I2C-compatible control, the MAX9595 sets the slow-switching output voltage level. Table 1 shows the valid input levels of the slow-switching signal and the corresponding operating modes of the display device. Two bidirectional ports are available for slow-switching signals for the TV and VCR. The slow-switching input status is continuously read and stored in register 0Eh. The slow-switching outputs can be set to a logic level or high impedance by writing to registers 07h and 09h. See Tables 8 and 10 for details. When enabled, INTERRUPT_OUT becomes high impedance if the voltage level changes on TV_SS or VCR_SS. Y/C Mixer The MAX9595 includes an on-chip mixer to produce composite video (CVBS) when S-video (Y and C) is present. The composite video drives the RF_CVBS_OUT output pin. The circuit sums Y and C signals to obtain the CVBS component. A +6dB output buffer drives RF_CVBS_OUT. Video Reconstruction Filter The encoder DAC outputs need to be lowpass-filtered to reject the out-of-band noise. The MAX9595 integrates the reconstruction filter. The filter is fourth order, which is composed of two Sallen-Key biquad in cascade, implementing a Butterworth-type transfer function. The internal reconstruction filters feature a 5.5MHz cutoff frequency, and -30dB minimum attenuation at 27MHz. Note that the SET pin is used to set the accuracy of the filter cutoff frequency. Connect a 100kΩ resistor from SET to ground. SCART Audio Switching Audio Inputs The audio block has three stereo audio inputs from the TV, the VCR, and the MPEG decoder SCART. Each input has a 100kΩ resistor connected to an internally generated voltage equal to 0.23 x V12, and is AC-coupled. Table 1. Slow-Switching Modes SET-TOP BOX SLOW-SWITCHING SIGNAL VOLTAGE (V) MAX9595 +5V VIDEO OUTPUT 75Ω BACK TERMINATION RESISTOR TV SCART CABLE 0 to 2 Display device uses an internal source such as a built-in tuner to provide a video signal 4.5 to 7.0 Display device uses a video signal from the SCART connector and sets the display to 16:9 aspect ratio 9.5 to 12.6 Display device uses a signal from the SCART connector and sets the display to 4:3 aspect ratio 0.1µF DC RESTORE 75Ω INPUT TERMINATION RESISTOR 5kΩ MODE Figure 3. Typical TV Input Current ______________________________________________________________________________________ 13 MAX9595 Video Outputs The DC level at the video outputs is controlled so that coupling capacitors are not required, and all of the video outputs are capable of driving a DC-coupled, 150Ω, back-terminated coax load with respect to ground. In a typical television input circuit (see Figure 3), the video output driver on the SCART chip only needs to source current. Users should note that, while the SCART specification states 75Ω impedance, in practice, typical SCART chip implementations assume 75Ω input resistance to ground (and source current from the video output stage). Since some televisions and VCRs use the horizontal sync height for automatic gain control, the MAX9595 accurately reproduces the sync height to within ±2%. MAX9595 Audio/Video Switch for Dual SCART Connector Audio Outputs Both right and left channels have a stereo output for the TV and VCR SCART. The monaural output, which is a mix of the TV right and left channels, drives the RF modulator, RF_MONO_OUT. The monaural mixer, a resistor summer, attenuates the amplitude of each of the two signals by 6dB. A 12.54dB gain block follows the monaural mixer. If the left and right audio channels were completely uncorrelated, then a 9.54dB gain block is used. See Figure 4 for the functional diagram of the audio section. Clickless Switching The TV channel incorporates a zero-crossing detect (ZCD) circuit that minimizes click noise due to abrupt signal level changes that occur when switching between audio signals at an arbitrary moment. AUDIO INPUTS AUDIO OUTPUTS ZCD ENC_INL VOLUME CONTROL BYPASS 9.54dB TV_INL VCR_INL TV_OUTL VOLUME CONTROL +6dB TO -56dB MUTE MUTE 12.54dB Σ/2 ENC_INR RF_MONO_OUT VOLUME CONTROL BYPASS MUTE TV_INR 9.54dB VCR_INR TV_OUTR VOLUME CONTROL +6dB TO -56dB MUTE MUTE GNDAUD I2C 9.54dB -6dB, 0dB, OR +6dB VCR_OUTL MUTE 9.54dB -6dB, 0dB, OR +6dB VCR_OUTR MUTE MUTE IS AN INTERNAL SIGNAL Figure 4. MAX9595 Audio Section Functional Diagram 14 ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector Next, set the appropriate TV switches using register 01h. Finally, clear the mute bit (while leaving the ZCD bit high) using register 00h. The MAX9595 switches the signal out of mute at the next zero crossing. To implement the zero-cross function for TV volume changes, or for TV and phono volume bypass switching, simply ensure the ZCD bit in register 00h is set. Volume Control The TV channel volume control ranges from -56dB to +6dB in 2dB steps. The VCR volume control settings are programmable for -6dB, 0dB, and +6dB. These gain levels are referenced to the application inputs, where some dividers are present. With the ZCD bit set, the TV volume control switches only at zero-crossings, thus minimizing click noise. The TV outputs can bypass the volume control. Likewise, the monaural output signal can be processed by the TV volume control or it can bypass the volume control. Digital Section Serial Interface The MAX9595 uses a simple 2-wire serial interface requiring only two standard microprocessor port I/O lines. The fast-mode I 2C-compatible serial interface allows communication at data rates up to 400kbps or 400kHz. Figure 5 shows the timing diagram of the signals on the 2-wire interface. The two bus lines (SDA and SCL) must be at logic-high when the bus is not in use. The MAX9595 is a slave device and must be controlled by a master device. Pullup resistors from the bus lines to the supply are required when push-pull circuitry is not driving the lines. The logic level on the SDA line can only change when the SCL line is low. The start and stop conditions occur when SDA toggles low/high while the SCL line is high (see Figure 5). Data on SDA must be stable for the duration of the setup time (tSU,DAT) before SCL goes high. Data on SDA is sampled when SCL toggles high with data on SDA stable for the duration of the hold time (tHD,DAT). Note that data is transmitted in an 8-bit byte. A total of nine clock cycles are required to transfer a byte to the MAX9595. The device acknowledges the successful receipt of the byte by pulling the SDA line low during the 9th clock cycle. SDA tSU,DAT tBUF tSU,STA tHD,STA tLOW tSU,STA tHD,DAT SCL tHD,STA tR tF START CONDITION REPEATED START CONDITION STOP CONDITION Figure 5. SDA and SCL Signal Timing Diagram ______________________________________________________________________________________ 15 MAX9595 To implement the zero-crossing function when switching audio signals, set the ZCD bit by loading register 00h through the I2C-compatible interface (if the ZCD bit is not already set). Then set the mute bit low by loading register 00h. Next, wait for a sufficient period of time for the audio signal to cross zero. This period is a function of the audio signal path’s low-frequency 3dB corner (fL3dB). Thus, if fL3dB = 1kHz, the time period to wait for a zero-crossing detect is 0.5kHz or 0.5ms. MAX9595 Audio/Video Switch for Dual SCART Connector Data Format of the I2C Interface Write Mode S Slave Address (Write address) A Register Address A Data A P Read Mode Slave Address S (Write address) A Register A Sr Address Slave Address A Data (Read address) NA P S = Start Condition, A = Acknowledge, NA = Not Acknowledge, Sr = Repeat Start Condition, P = Stop Condition I2C Compatibility The MAX9595 is compatible with existing I2C systems. SCL and SDA are high-impedance inputs. SDA has an open drain that pulls the bus line to a logic-low during the 9th clock pulse. Figure 6 shows a typical I2C interface application. The communication protocol supports the standard I2C 8-bit communications. The MAX9595 address is compatible with the 7-bit I 2C addressing protocol only; 10-bit format is not supported. Digital Inputs and Interface Logic The I2C-compatible, 2-wire interface has logic levels defined as VIL = 0.8V and VIH = 2.0V. All of the inputs include Schmitt-trigger buffers to accept low-transition interfaces. The digital inputs are compatible with 3V CMOS logic levels. µC SDA SCL SCL VVID MAX9595 SDA SCL VDD DEVICE 1 SDA SCL VDD DEVICE 2 SDA Figure 6. Typical I2C Interface Application 16 Programming Connect DEV_ADDR to ground to set the MAX9595 write and read address as shown in Table 2. Table 2. Slave Address Programming ADDRESS PIN STATE WRITE ADDRESS READ ADDRESS VVID 96h 97h GNDVID 94h 95h Data Register Writing and Reading Program the SCART video and audio switches by writing to registers 00h through 0Dh. Registers 00h through 0Eh can also be read, allowing read-back of data after programming and facilitating system debugging. The status register is read-only and can be read from address 0Eh. See Tables 3–12 for register programming information. INTERRUPT_OUT Signal INTERRUPT_OUT is an open-drain output that becomes high impedance when a change in any of the slow-switch signals occurs. Clear INTERRUPT_OUT by setting bit 4 of register 01h low. Applications Information Hot-Plug of SCART Connectors The MAX9595 features high-ESD protection on all SCART inputs and outputs, and requires no external transient-voltage suppressor (TVS) devices to protect against floating chassis discharge. Some set-top boxes have a floating chassis problem in which the chassis is not connected to earth ground. As a result, the chassis can charge up to 500V. When a SCART cable is connected to the SCART connector, the charged chassis can discharge through a signal pin. The equivalent circuit is a 2200pF capacitor charged to 311V connected through less than 0.1Ω to a signal pin. The MAX9595 is soldered on the PC board when it experiences such a discharge. Therefore, the current spike flows through the ESD protection diodes and is absorbed by the supply bypass capacitors, which have high capacitance and low ESR. To better protect the MAX9595 against excess voltages during the cable discharge condition, place an additional 75Ω resistor in series with all inputs and outputs to the SCART connector. For harsh environments where ±15kV protection is needed, the MAX4385E and MAX4386E single and quad high-speed op amps feature the industry’s first integrated ±15kV ESD protection on video inputs and outputs. ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector Layout and Grounding For optimal performance, use controlled-impedance traces for video signal paths and place input termination resistors and output back-termination resistors close to the MAX9595. Avoid routing video traces parallel to high-speed data lines. The MAX9595 provides separate ground connections for video, audio, and digital supplies. For best performance, use separate ground planes for each of the ground returns and connect all three ground planes together at a single point. Refer to the MAX9595 evaluation kit for a proven circuit board layout example. Table 3. Data Format for Write Mode REGISTER ADDRESS (HEXADECIMAL) BIT 7 BIT 6 00h TV volume bypass ZCD 01h VCR volume control BIT 5 BIT 4 BIT 3 Not used Interrupt enable 03h Not used 04h Not used 05h Not used 06h TV_R/C_IN clamp RGB gain TV G and B video switch 07h Not used RF_CVBS_ TV_Y/ OUT switch CVBS_OUT switch TV fast blank (fast switching) 08h VCR_R/ C_IN clamp Not used Not used Not used ENC_R/ C_IN clamp 09h Not used Not used Not used Not used Not used 0Ah Not used 0Bh Not used 0Ch Not used VCR_R/ C_OUT enable TV_R/C_OUT enable TV_G_OUT TV_B_OUT enable enable BIT 0 TV audio output mute VCR audio selection Not used VCR_Y/ CVBS_OUT enable BIT 1 TV volume control 02h 0Dh BIT 2 TV audio selection TV video switch TV_R/C_OUT ground Set function TV VCR video switch VCR_R/C_OUT ground TV_Y/ CVBS_OUT enable Set function VCR TVOUT_ FS enable RF_CVBS_ OUT enable ______________________________________________________________________________________ 17 MAX9595 Power Supplies and Bypassing The MAX9595 features single 5V and 12V supply operation and requires no negative supply. The +12V supply V12 is for the SCART switching function. For pin V 12, place all bypass capacitors as close as possible with a 10µF capacitor in parallel with a 0.1µF ceramic capacitor. Connect all VAUD pins together to +5V and bypass with a 10µF electrolytic capacitor in parallel with a 0.47µF lowESR ceramic capacitor to audio ground. Bypass VAUD pins with a 0.1µF capacitor to audio ground. Bypass AUD_BIAS to audio ground with a 10µF electrolytic in parallel with a 0.1µF ceramic capacitor. Bypass VDIG with a 0.1µF ceramic capacitor to digital ground. Bypass each VVID to video ground with a 0.1µF ceramic capacitor. Connect VVID in series with a 200nH ferrite bead to the +5V supply. MAX9595 Audio/Video Switch for Dual SCART Connector Table 4. Data Format for Read Mode REGISTER ADDRESS (HEXADECIMAL) BIT 7 BIT 6 0Eh Thermal SHDN Power-on reset BIT 5 BIT 4 Not used BIT 3 BIT 2 VCR slow switch input BIT 1 BIT 0 TV slow switch input Table 5. Register 00h: TV Audio Control DESCRIPTION BIT 7 6 5 4 3 2 1 TV Audio Mute TV Volume Control TV Zero-Crossing Detector TV Volume Bypass 18 COMMENTS 0 0 Off 1 On (power-on default) 0 0 0 0 0 +6dB gain 0 0 0 0 1 +4dB gain 0 0 0 1 0 +2dB gain 0 0 0 1 1 0dB gain (power-on default) 0 0 1 0 0 -2dB gain 0 0 1 0 1 -4dB gain 1 1 1 1 0 -54dB gain 1 1 1 1 1 -56dB gain 0 Off 1 On (power-on default) 0 TV audio passes through volume control (power-on default) 1 TV audio bypasses volume control ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector DESCRIPTION BIT 7 6 5 4 3 2 Input Source for TV Audio Input Source for VCR Audio Interrupt Enable VCR Volume Control MAX9595 Table 6. Register 01h: TV/VCR Audio Control COMMENTS 1 0 0 0 Encoder audio 0 1 VCR audio 1 0 TV audio 1 1 Mute (power-on default) 0 0 Encoder audio 0 1 VCR audio 1 0 TV audio 1 1 Mute (power-on default) 0 Clear INTERRUPT_OUT (power-on default) 1 Enable INTERRUPT_OUT 0 0 0dB gain (power-on default) 0 1 +6dB gain 1 0 -6dB gain 1 1 0dB gain ______________________________________________________________________________________ 19 MAX9595 Audio/Video Switch for Dual SCART Connector Table 7. Register 06h: TV Video Input Control DESCRIPTION BIT 7 6 5 4 3 Input Sources for TV Video 1 0 TV_Y/CVBS_OUT TV_R/C_OUT 0 0 0 ENC_Y/CVBS_IN ENC_R/C_IN 0 0 1 ENC_Y_IN ENC_C_IN 0 1 0 VCR_Y/CVBS_IN VCR_R/C_IN 0 1 1 TV_Y/CVBS_IN TV_R/C_IN 1 0 0 Not used Not used 1 0 1 Mute Mute 1 1 0 Mute Mute 1 Mute (power-on default) Mute (power-on default) 1 Input Sources for TV_G_OUT and TV_B_OUT TV_R/C_IN Clamp/Bias 20 1 TV_G_OUT TV_B_OUT 0 0 ENC_G_IN ENC_B_IN 0 1 VCR_G_IN VCR_B_IN 1 0 Mute Mute 1 Mute (power-on default) Mute (power-on default) 1 RGB Gain COMMENTS 2 0 0 6dB (power-on default) 0 1 7dB 1 0 5dB 1 1 5dB 0 DC restore clamp active at input (power-on default) 1 Chrominance bias applied at input ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector BIT DESCRIPTION 7 6 5 4 3 2 Set TV Function Switching 0 0 0 Low (< 2V), internal source (power-on default) 0 1 Medium (4.5V to 7V), external SCART source with 16:9 aspect ratio 1 0 High impedance 1 1 High (> 9.5V), external SCART source with 4:3 aspect ratio 0 Normal operation, pulldown on TV_R/C_OUT is off (power-on default) 1 Ground, pulldown on TV_R/C_OUT is on, the output amplifier driving TV_R/C_OUT is turned off TV_R/C_OUT Ground Fast Blank (Fast Switching) TV_Y/CVBS_OUT Switch COMMENTS 1 0 0 0V (power-on default) 0 1 Same level as ENC_FB_IN 1 0 Same level as VCR_FB_IN 1 1 VVID 0 Composite video from the Y/C mixer is output 1 The TV_Y/CVBS_OUT signal selected in register 06h is output (power-on default) 0 Composite video from the Y/C mixer is output (power-on default) 1 The TV_Y/CVBS_OUT signal selected in register 06h is output RF_CVBS_OUT Switch Table 9. Register 08h: VCR Video Input Control DESCRIPTION BIT 7 6 5 4 3 Input Sources for VCR Video VCR_R/C_IN Clamp/Bias ENC_R/C_IN Clamp/Bias COMMENTS 2 1 0 VCR_Y/CVBS_OUT VCR_R/C_OUT 0 0 0 ENC_Y/CVBS_IN ENC_R/C_IN 0 0 1 ENC_Y_IN ENC_C_IN 0 1 0 VCR_Y/CVBS_IN VCR_R/C_IN 0 1 1 TV_Y/CVBS_IN TV_R/C_IN 1 0 0 Not used Not used 1 0 1 Mute Mute 1 1 0 Mute Mute 1 1 1 Mute (power-on default) Mute (power-on default) 0 DC restore clamp active at input (power-on default) 1 Chrominance bias applied at input 0 DC restore clamp active at input (power-on default) 1 Chrominance bias applied at input ______________________________________________________________________________________ 21 MAX9595 Table 8. Register 07h: TV Video Output Control MAX9595 Audio/Video Switch for Dual SCART Connector Table 10. Register 09h: VCR Video Output Control DESCRIPTION BIT 7 6 5 4 3 2 Set VCR Function Switching COMMENTS 1 0 0 0 Low (< 2V), internal source (power-on default) 0 1 Medium (4.5V to 7V), external SCART source with 16:9 aspect ratio 1 0 High impedance 1 1 High (> 9.5V), external SCART source with 4:3 aspect ratio 0 Normal operation, pulldown on VCR_R/C_OUT is off (power-on default) 1 Ground, pulldown on VCR_R/C_OUT is on, the output amplifier driving VCR_R/C_OUT is turned off VCR_R/C_OUT Ground Table 11. Register 0DH: Output Enable DESCRIPTION BIT 7 6 5 4 3 2 1 RF_CVBS_OUT TVOUT_FS TV_Y/CVBS_OUT 0 TV_B_OUT 1 TV_G_OUT TV_R/C_OUT 0 VCR_R/C_OUT VCR_Y/CVBS_OUT 22 1 COMMENTS 0 0 Off (power-on default) 1 On 0 Off (power-on default) 1 On 0 Off (power-on default) 1 On Off (power-on default) On 0 Off (power-on default) 1 On 0 Off (power-on default) 1 On Off (power-on default) On 0 Off (power-on default) 1 On ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector DESCRIPTION BIT 7 6 5 4 3 2 TV Slow Switch Input VCR Slow Switch Input Power-On Reset Thermal Shutdown COMMENTS 1 0 0 0 0 1 4.5V to 7V, external source with 16:9 aspect ratio 1 0 Not used 1 1 9.5V to 12.6V, external source with 4:3 aspect ratio 0 to 2V, internal source 0 0 0 to 2V, internal source 0 1 4.5V to 7V, external source with 16:9 aspect ratio 1 0 Not used 1 1 9.5V to 12.6V, external source with 4:3 aspect ratio 0 VVID is too low for digital logic to operate 1 VVID is high enough for digital logic to operate 0 The part is in thermal shutdown 1 The temperature is below the TSHD limit ______________________________________________________________________________________ 23 MAX9595 Table 12. Register 0Eh Status Audio/Video Switch for Dual SCART Connector 5 TV_R/C_IN_SC TV_Y/CVBS_IN_SC VCR_R/C_IN_SC VCR_G_IN_SC VCR_B_IN_SC ENC_Y/CVBS_IN_SC ENC_R/C_IN_SC ENC_B_IN_SC ENC_B_IN_SC ENC_Y_IN_SC VCR_Y/CVBS_IN_SC 38 37 VVID 0.1µF TV_R/C_IN 4 39 TV_Y/CVBS_IN DEV_ADDR 40 VCR_Y/CVBS_IN 3 DEV_ADDR 41 VCR_R/C_IN SCL 42 VCR_G_IN 2 43 VCR_B_IN SCL 44 ENC_Y/CVBS_IN SDA 45 ENC_R/C_IN 1 46 ENC_G_IN SDA 47 ENC_B_IN ENC_C_IN 48 ENC_Y_IN ENC_C_IN_SC MAX9595 Typical Application Circuit 10µF VVID 36 VCR_R/C_OUT 35 VCR_R/C_OUT_SC VCR_Y/CVBS_OUT 34 VCR_Y/CVBS_OUT_SC ENC_INL TV_B_OUT 33 TV_B_OUT_SC INTERRUPT_OUT TV_G_OUT 32 4.7kΩ VVID ENC_INL_SC 4.7kΩ 4.7kΩ INTERRUPT_OUT TV_G_OUT_SC 4.7kΩ ENC_INR_SC TV_R/C_OUT 31 TV_Y/CVBS_OUT 30 VCR_INR RF_CVBS_OUT 29 9 VCR_INL GNDVID 28 10 TV_INR TVOUT_FS 27 11 TV_INL ENCIN_FS 26 12 GNDAUD VCRIN_FS 25 6 ENC_INR 7 N.C. 8 TV_R/C_OUT_SC 4.7kΩ MAX9595 TV_Y/CVBS_OUT_SC 6.6kΩ VCR_INR_SC RF_CVBS_OUT_SC 3.3kΩ 6.6kΩ VCR_INL_SC 3.3kΩ 6.6kΩ TV_INR_SC TVOUT_FS_SC 3.3kΩ ENCIN_FS VCR_OUTR VCR_OUTL RF_MONO_OUT TV_OUTL TV_OUTR V12 TV_SS VCR_SS SET 14 15 16 17 18 19 20 21 22 23 13 10µF 10µF 10µF 10µF 10µF TV_SS TV_OUTR_SC TV_OUTL_SC RF_MONO_OUT_SC VCR_OUTL_SC VAUD VCR_OUTR_SC 0.1µF 47µF 10kΩ 10kΩ 100kΩ V12 VVID 0.1µF 0.1µF 10µF VCRIN_FS 24 VCR_SS AUD_BIAS 3.3kΩ VVID VAUD 6.6kΩ TV_INL_SC 10µF 0.1µF 10µF ALL CAPACITORS ARE 0.1µF AND ALL RESISTORS ARE 75Ω, UNLESS OTHERWISE NOTED. 24 ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector V12 VVID VAUD 5V 12V 5V RGB VIDEO ENCODER RGB CVBS, Y-C CVBS, Y-C MAX9595 R/L AUDIO FAST SWITCHING CVBS/Y SWITCHES AND FILTERS AUDIO DAC R/L AUDIO FAST SWITCHING RGB AND CHROMA SWITCHES AND FILTERS ADDRESS SCL µC SLOW SWITCHING RGB CVBS, Y-C SDA AUDIO SWITCHES INTERRUPT_OUT R/L AUDIO VCR SCART CONNECTOR SLOW SWITCHING RF_CVBS RF MOD TV SCART CONNECTOR SLOW AND FAST SWITCHING MONO AUDIO GNDAUD EP FAST SWITCHING GNDVID ______________________________________________________________________________________ 25 MAX9595 System Block Diagram Audio/Video Switch for Dual SCART Connector MAX9595 Pin Configuration VCRIN_FS ENCIN_FS TVOUT_FS GNDVID RF_CVBS_OUT TV_Y/CVBS_OUT TV_R/C_OUT TV_G_OUT TV_B_OUT VCR_R/C_OUT VCR_Y/CVBS_OUT VVID TOP VIEW 36 35 34 33 32 31 30 29 28 27 26 25 TV_R/C_IN 37 24 VVID TV_Y/CVBS_IN 38 23 SET VCR_Y/CVBS_IN 39 22 VCR_SS VCR_R/C_IN 40 21 TV_SS VCR_G_IN 41 20 V12 VCR_B_IN 42 19 TV_OUTR MAX9595 ENC_Y/CVBS_IN 43 18 TV_OUTL ENC_R/C_IN 44 17 RF_MONO_OUT ENC_G_IN 45 16 VCR_OUTL ENC_B_IN 46 15 VCR_OUTR ENC_Y_IN 47 14 VAUD ENC_C_IN 48 13 AUD_BIAS 9 10 11 12 TV_INR GNDAUD 8 TV_INL 7 VCR_INL 6 N.C. DEV_ADDR 5 VCR_INR SCL 4 ENC_INR 3 ENC_INL 2 INTERRUPT_OUT 1 SDA + THIN QFN Chip Information TRANSISTOR COUNT: 13,265 PROCESS: BiCMOS 26 ______________________________________________________________________________________ Audio/Video Switch for Dual SCART Connector DETAIL A 32, 44, 48L QFN.EPS E (NE-1) X e E/2 k e D/2 C L (ND-1) X e D D2 D2/2 b L E2/2 C L k E2 C L C L L L e A1 A2 e A PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm 21-0144 F 1 2 ______________________________________________________________________________________ 27 MAX9595 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) MAX9595 Audio/Video Switch for Dual SCART Connector Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm 21-0144 F 2 2 Revision History Pages changed at Rev 1: 1, 2, 3, 6, 7, 13-16, 20, 21, 28 Pages changed at Rev 2: 1, 16, 25 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
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