0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
MAX9656EVKIT+

MAX9656EVKIT+

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    KIT EVAL FOR MAX9656

  • 数据手册
  • 价格&库存
MAX9656EVKIT+ 数据手册
19-4238; Rev 2; 11/08 KIT ATION EVALU E L B AVAILA Low-Power Video Switches for Dual SCART Connectors Features The MAX9655/MAX9656 dual SCART switches route video signals between a set-top box decoder chip and two external SCART connectors. Under the control of the TV_SEL logic input, the MAX9655 selects whether the CVBS and RGB signals from the encoder or the VCR SCART are routed to the TV SCART. The CVBS signal from the encoder is always routed to the VCR SCART. The MAX9656 is similar to the MAX9655 except that under the control of the VCR_SEL logic input, the MAX9656 selects whether the CVBS signal from the encoder or the TV SCART is routed to the VCR SCART. The MAX9656 also features a low-power shutdown mode, in which quiescent current falls to 35µA. The incoming video signals must be AC-coupled to the inputs, which have sync-tip clamps to set the internal DC level. After the input stages, multiplexers select which video signals are routed to the reconstruction filters and output amplifiers. The reconstruction filters are optimized for standard-definition signals and typically have ±1dB passband flatness out to 9.5MHz and 47dB attenuation at 27MHz. The amplifiers have 2V/V gain, and the outputs can be DC-coupled to a 75Ω load, which is the equivalent of two video loads, or AC-coupled to a 150Ω load. ♦ Dual SCART Support for Video Signals ♦ Supports CVBS Input from TV SCART (MAX9656) ♦ Reconstruction Filters with 9.5MHz Passband and 47dB Attenuation at 27MHz ♦ Fixed Gain of 2V/V ♦ Input Sync-Tip Clamps ♦ 2.7V to 3.6V Single-Supply Operation Ordering Information PIN-PACKAGE TV SCART CVBS RETURN SUPPORT MAX9655AEE+ 16 QSOP No MAX9656AEP+ 20 QSOP Yes PART Note: All devices are specified over the -40°C to +125°C operating temperature range. +Denotes a lead-free/RoHS-compliant package. Pin Configurations and Typical Application Circuits appear at end of data sheet. Applications SCART Set-Top Boxes Functional Diagram VDD TV_SEL MAX9655 0 BUFFER ENC_B_IN LPF 2V/V TV_B_OUT 1 ENC_G_IN CLAMPREF UNKNOWN BIAS 0 ENC_R_IN 300mV BUFFER 1 LPF 2V/V LPF 2V/V LPF 2V/V LPF 2V/V TV_G_OUT ENC_CVBS_IN CLAMPREF 0 VCR_B_IN BUFFER 1 TV_R_OUT VCR_G_IN CLAMPREF 0 BUFFER VCR_R_IN 1 VCR_CVBS_IN TV_CVBS_OUT CLAMPREF BUFFER TV_SEL 0 VCR_CVBS_OUT CLAMPREF GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9655/MAX9656 General Description MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors ABSOLUTE MAXIMUM RATINGS Supply Voltage VDD to GND ...........................................................-0.3V to +4V All Video and Logic Input Pins..................(GND - 0.3V) to +4V Duration of Output Short Circuit to VDD or GND ........Continuous Continuous Input Current All Video and Logic Input Pins .....................................±20mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.3mW/°C above +70°C)............667mW 20-Pin QSOP (derate 9.1mW/°C above +70°C)............727mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = 3.3V, VGND = 0, V SHDN = VDD, VCR_SEL = VDD, TV_SEL = VDD, RL = 150Ω to GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Supply Voltage Range VDD Guaranteed by power-supply rejection test Quiescent Supply Current IDD No load Shutdown Supply Current ISHDN Input Voltage Input Resistance Sync-Tip Clamp Level MIN TYP MAX 2.7 3.3 3.6 V 21 45 mA 35 70 µA VSHDN = TV_SEL = VCR_SEL = GND (MAX9656 only) Unselected input VDD/3 Unselected input 0.23 Sync Crush 0.3 1.05 3.0V ≤ VDD ≤ 3.6V Sync-tip clamp; percentage reduction in sync pulse (0.3VP-P); guaranteed by input clamping current measurement 1.2 Input Clamping Current 1 Maximum Input Source Resistance 300 DC Voltage Gain AV RL = 150Ω to GND (Note 2) VDD = 2.7V, 0V ≤ VIN ≤ 1.05V VDD = 3.0V, 0V ≤ VIN ≤ 1.2V DC Gain Mismatch Guaranteed by output-voltage swing Output Level Measured at output, CIN_ = 0.1µF to GND Output-Voltage Swing 2 kΩ 0.39 2.7V ≤ VDD ≤ 3.6V Guaranteed by outputvoltage swing Input Voltage Range V 222 VCLP UNITS V VP-P 2 % 2 µA Ω 1.96 2 2.04 1.96 2 2.04 V/V -2 0.218 0.3 Measured at output, VDD = 2.7V, VIN = VCLP to (VCLP +1.05V), RL = 150Ω to -0.2V 2.1 Measured at output, VDD = 2.7V, VIN = VCLP to (VCLP +1.05V), RL = 150Ω to VDD/2 2.1 Measured at output, VDD = 3.0V, VIN = VCLP to (VCLP +1.2V), RL = 150Ω to -0.2V 2.4 Measured at output, VDD = 3.0V, VIN = VCLP to (VCLP +1.2V), RL = 150Ω to VDD/2 2.4 Measured at output, VDD = 3.135V, VIN = VCLP to (VCLP +1.05V), RL = 75Ω to -0.2V 2.1 _______________________________________________________________________________________ +2 % 0.39 V VP-P Low-Power Video Switches for Dual SCART Connectors (VDD = 3.3V, VGND = 0, V SHDN = VDD, VCR_SEL = VDD, TV_SEL = VDD, RL = 150Ω to GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL Output Short-Circuit Current Output Resistance ROUT CONDITIONS Standard-Definition Reconstruction Filter TYP 140 Short to VDD (sinking) 70 VOUT = 1.5V, -10mA ≤ ILOAD ≤ +10mA 2.7V ≤ VDD ≤ 3.6V Power-Supply Rejection Ratio MIN Short to GND (sourcing) Ω 64 20 VOUT = 2VP-P, reference frequency is 100kHz, ±1dB passband flatness 9.5 f = 5.5MHz 0.1 f = 9.5MHz -1 f = 10MHz -3 f = 27MHz -47 UNITS mA 0.2 48 f = 1MHz, 100mVP-P VOUT = 2VP-P, reference frequency is 100kHz MAX dB MHz dB Differential Gain DG 5-step modulated staircase of 129mV step size and 286mV peak-to-peak subcarrier amplitude, f = 4.43MHz 0.4 % Differential Phase DP 5-step modulated staircase of 129mV step size and 286mV peak-to-peak subcarrier amplitude, f = 4.43MHz 0.45 deg Group-Delay Distortion 100kHz ≤ f ≤ 5MHz, outputs are 2VP-P 9 ns Peak Signal to RMS Noise 100kHz ≤ f ≤ 5MHz 71 dB 2T Pulse Response 2T = 200ns 0.2 K% 2T Bar Response 2T = 200ns; bar time is 18µs; the beginning 2.5% and the ending 2.5% of the bar time are ignored 0.2 K% 2T Pulse-to-Bar K Rating 2T = 200ns; bar time is 18µs; the beginning 2.5% and the ending 2.5% of the bar time are ignored 0.3 K% Nonlinearity 5-step staircase 0.1 % Output Impedance f = 5.5MHz 8.07 Ω f = 15kHz -82 f = 4.43MHz -78 f = 30MHz -68 All-Hostile Crosstalk Output-to-Input Crosstalk dB dB LOGIC SIGNALS (MAX9655: TV_SEL, MAX9656: TV_SEL, VCR_SEL, SHDN) Logic-Low Threshold VIL TA = +25°C Logic-High Threshold VIH TA = +25°C Logic Input Current IIN TA = +25°C 0.3 x VDD 0.7 x VDD V V 10 µA Note 1: All devices are 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by design. Note 2: Voltage gain (AV) is a two-point measurement in which the output-voltage swing is divided by the input-voltage swing. _______________________________________________________________________________________ 3 MAX9655/MAX9656 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VDD = 3.3V, VGND = 0, V SHDN = VDD, RL = 150Ω to GND, TA = +25°C.) SMALL-SIGNAL GAIN vs. FREQUENCY VIN = 50mVP-P NOTE: GAIN IS NORMALIZED TO 0dB 3 2 1 0 -10 -15 -20 GAIN (dB) -25 -30 -35 -6 -7 10M 1M 10M FREQUENCY (Hz) LARGE-SIGNAL GAIN vs. FREQUENCY LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY VIN = 1VP-P NOTE: GAIN IS NORMALIZED TO 0dB 0 -5 3 2 VIN = 1VP-P NOTE: GAIN IS NORMALIZED TO 0dB 1 100M 0 -10 -15 -20 -25 GAIN (dB) GAIN (dB) 100k 100M FREQUENCY (Hz) MAX9655 toc04 1M MAX9655 toc03 100k -30 -35 -40 -45 -1 -2 -3 -4 -5 -6 -7 -50 1M 10M 1M 10M FREQUENCY (Hz) VIDEO CROSSTALK vs. FREQUENCY VIDEO GROUP DELAY DISTORTION vs. FREQUENCY 120 110 100 90 GROUP DELAY (ns) VIN = 1VP-P NOTE: GAIN IS NORMALIZED TO 0dB -40 -60 ALL-HOSTILE -80 2 ADJACENT CHANNELS -100 -120 1M VIN = 1VP-P NOTE: GAIN IS NORMALIZED TO 0dB 100M 80 70 60 50 40 30 20 10 0 1 ADJACENT CHANNEL 100k 100k 100M FREQUENCY (Hz) MAX9655 toc05 100k 10M FREQUENCY (Hz) 4 -3 -5 -45 -50 -20 -2 -4 -40 0 -1 MAX9655 toc06 GAIN (dB) -5 10 5 VIN = 50mVP-P NOTE: GAIN IS NORMALIZED TO 0dB MAX9655 toc02 SMALL-SIGNAL GAIN FLATNESS vs. FREQUENCY MAX9655 toc01 10 5 0 GAIN (dB) MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors 100M 100k 1M 10M FREQUENCY (Hz) _______________________________________________________________________________________ 100M Low-Power Video Switches for Dual SCART Connectors VOLTAGE GAIN vs. TEMPERATURE VIDEO PSRR vs. FREQUENCY 2.08 2.06 VOLTAGE GAIN (V/V) -30 -40 -50 MAX9655 toc08 VDD = 3.3V + 100mVP-P -20 -60 2.04 2.02 2.00 1.98 1.96 1.94 -70 1.92 1.90 -80 100k 1M -50 100M 10M -25 0 2 3 4 5 0.8 0.6 0.4 0.2 0 -0.2 -0.4 DIFFERENTIAL PHASE (deg) DIFFERENTIAL PHASE f = 3.58MHz 0 1 2 3 2T RESPONSE 100ns/div 4 DIFFERENTIAL GAIN (%) 1 MAX9655 toc09 DIFFERENTIAL GAIN (%) DIFFERENTIAL PHASE (deg) f = 3.58MHz 0 50 75 100 125 DIFFERENTIAL GAIN DIFFERENTIAL GAIN 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 25 TEMPERATURE (°C) FREQUENCY (Hz) 5 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 f = 4.43MHz 0 1 2 3 5 DIFFERENTIAL PHASE 0.8 0.6 0.4 0.2 0 -0.2 -0.4 f = 4.43MHz 0 1 2 3 12.5T RESPONSE MAX9655 toc11 4 MAX9655 toc10 PSRR (dB) 2.10 MAX9655 toc07 0 -10 4 5 MAX9655 toc12 IN 200mV/div IN 200mV/div OUT 400mV/div OUT 400mV/div 400ns/div _______________________________________________________________________________________ 5 MAX9655/MAX9656 Typical Operating Characteristics (continued) (VDD = 3.3V, VGND = 0, V SHDN = VDD, RL = 150Ω to GND, TA = +25°C.) Typical Operating Characteristics (continued) (VDD = 3.3V, VGND = 0, V SHDN = VDD, RL = 150Ω to GND, TA = +25°C.) FIELD SQUARE WAVE NTC-7 VIDEO TEST SIGNAL MAX9655 toc13 IN 500mV/div OUT 1V/div OUT 1V/div 2ms/div VIDEO SYNC-TIP CLAMP CURRENT vs. TEMPERATURE VIDEO SYNC-TIP CLAMP VOLTAGE vs. TEMPERATURE 0.36 0.34 0.32 0.30 MAX4617 toc16 0.38 1.04 SYNC-TIP CLAMP CURRENT (μA) MAX4617 toc15 1.02 1.00 0.98 0.96 0.94 0.92 0.28 0.90 0.26 -25 0 25 50 75 100 -50 125 -25 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) SYNC-TIP CLAMP CURRENT vs. INPUT VOLTAGE QUIESCENT SUPPLY CURRENT vs. TEMPERATURE MAX9655 toc17 500 400 300 200 100 0 23.0 QUIESCENT SUPPLY CURRENT (mA) -50 125 MAX4617 toc18 SYNC-TIP CLAMP VOLTAGE (V) 0.40 22.5 22.0 21.5 21.0 20.5 20.0 -100 0 0.2 0.4 0.6 0.8 1.0 INPUT VOLTAGE (V) 6 MAX9655 toc14 IN 500mV/div 10μs/div SYNC-TIP CLAMP CURRENT (μA) MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) _______________________________________________________________________________________ Low-Power Video Switches for Dual SCART Connectors PIN NAME FUNCTION MAX9655 MAX9656 1 2 ENC_B_IN 2 3 ENC_G_IN Encoder Green Video Input. AC-couple the signal through a 0.1µF capacitor. 3 4 ENC_R_IN Encoder Red Video Input. AC-couple the signal through a 0.1µF capacitor. 4 5 ENC_CVBS_IN 5 6 VCR_B_IN VCR SCART Blue Video Input. AC-couple the signal through a 0.1µF capacitor. 6 7 VCR_G_IN VCR SCART Green Video Input. AC-couple the signal through a 0.1µF capacitor. Encoder Blue Video Input. AC-couple the signal through a 0.1µF capacitor. Encoder Composite Video Input. AC-couple the signal through a 0.1µF capacitor. 7 8 VCR_R_IN 8 9 VCR_CVBS_IN VCR SCART Red Video Input. AC-couple the signal through a 0.1µF capacitor. 9 11 GND 10 13 VCR_CVBS_OUT 11 14 TV_CVBS_OUT 12 15 TV_R_OUT TV SCART Red Video Output. The sync tip is biased at 0.3V. 13 16 TV_G_OUT TV SCART Green Video Output. The sync tip is biased at 0.3V. 14 17 TV_B_OUT TV SCART Blue Video Output. The sync tip is biased at 0.3V. 15 18 TV_SEL 16 19 VDD — 1 TV_CVBS_IN — 10 N.C. — 12 SHDN — 20 VCR_SEL VCR SCART Composite Video Input. AC-couple the signal through a 0.1µF capacitor. Ground VCR SCART Composite Video Output. The sync tip is biased at 0.3V. TV SCART Composite Video Output. The sync tip is biased at 0.3V. TV SCART Output Selection. Connect to GND to route the encoder video signals to the TV SCART outputs. Connect to VDD to route the VCR SCART video signals to the TV SCART outputs. Positive Power Supply. Bypass with 0.1µF ceramic capacitors to GND. Television SCART Composite Video Input. AC-couple the signal through a 0.1µF capacitor. No Connection. Not internally connected. Active-Low Shutdown Logic Input. Connect to GND to place device in shutdown. Connect to VDD for normal operation. VCR SCART Output Selection. Connect to GND to route ENC_CVBS_IN to the VCR SCART CVBS output. Connect to VDD to route TV_CVBS_IN to the VCR SCART CVBS output. Detailed Description A MAX9655 or a MAX9656 can comprise the video portion of a low-cost, dual SCART solution in set-top boxes with a subset of the full SCART functions. The MAX9655/MAX9656 select whether the CVBS, red, green, and blue video signals from the encoder or the VCR SCART are routed to the TV SCART. The MAX9655/MAX9656 support the output of one CVBS signal to the VCR SCART. In the MAX9655, the CVBS signal from the encoder is routed to the VCR SCART. In the MAX9656, the CVBS signal routed to the VCR SCART can come from the encoder or TV SCART. In the typical usage case, the VCR (or DVD recorder) records a television program from the set-top box. In such a case, the encoder would be the source of the CVBS signal. Support for the TV SCART CVBS return path is useful when a person wants to record on his VCR (or more likely DVD recorder) a television program received through the television’s antenna. The television program is transmitted from the television to the set-top box and then to the VCR. Both the MAX9655 and MAX9656 have integrated reconstruction filters so that when the encoder video signals are routed to the TV SCART or the VCR SCART, the steps and spikes left by the video digital-to-analog converter (DAC) are smoothed away. Although the incoming video signals from the VCR SCART are assumed to be filtered already, the reconstruction filter has wide enough bandwidth so that the video signals from the VCR SCART are not degraded. _______________________________________________________________________________________ 7 MAX9655/MAX9656 Pin Description MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors The incoming video signals can have any DC bias because the input sync-tip clamps restore the DC level. The output amplifiers have a gain of 2V/V. The MAX9655/MAX9656 operate from a single 3.3V supply and consume low quiescent power and low average power. In addition, the MAX9656 also has shutdown mode. Table 1. TV_SEL Logic (Applicable to Both the MAX9655 and the MAX9656) LOGIC STATE Operating Modes TV_SEL controls whether the encoder or VCR video signals are sent to the TV SCART. See Table 1. On the MAX9656, VCR_SEL controls whether the CVBS signal from the TV SCART or the encoder is sent to the VCR SCART. SHDN controls whether the device is on or off. See Tables 2 and 3. In shutdown, the outputs of the MAX9656 are high impedance. Low Encoder video signals are routed to the TV SCART. High VCR SCART video signals are routed to the TV SCART. Table 2. VCR_SEL Logic (Only Applicable to the MAX9656) Input Every video signal must be AC-coupled to the MAX9655/MAX9656 through 0.1µF capacitors. The MAX9655/MAX9656 have sync-tip clamps and bias circuits to restore the DC level of the video signal after the input coupling capacitor. When a video input is selected, the input has a sync-tip clamp, which accepts video signals that have sync pulses or that reach their minimum level during sync. Composite video with blanking and sync (CVBS) is an example of a video signal with sync pulses. The red, green, and blue signals in an RGBS signal set are examples of signals that return to their blank level during sync. The sync-tip voltage is internally set to 300mV. When a video input is not selected, the inputs to the MAX9655 and the MAX9656 do not distort the video signal in case the video source is driving video signals to another video circuit such as a video multiplexer. The inputs are biased at VDD/3, which is sufficiently above ground so that the ESD diodes never forward bias as the video signal changes. The input resistance MODE LOGIC STATE MODE Low CVBS signal from encoder is routed to the VCR SCART. High CVBS signal from the TV SCART is routed to the VCR SCART. Table 3. SHDN Logic (Only Applicable to the MAX9656) LOGIC STATE MODE Low Off High On is 220kΩ, which presents negligible loading on the video current DAC. The sole exception to this condition is ENC_CVBS_IN (MAX9655), in which the input circuit is always a sync-tip clamp. Table 4 summarizes which input circuit is active on the inputs of the MAX9655 depending on TV_SEL. Table 5 summarizes which input circuit is active on the inputs of the MAX9656 depending on TV_SEL and VCR_SEL. Table 4. MAX9655 Input Circuit of Input as Determined by State of TV_SEL 8 INPUT INPUT CIRCUIT (TV_SEL = LOW) INPUT CIRCUIT (TV_SEL = HIGH) Bias ENC_B_IN Sync-tip clamp ENC_G_IN Sync-tip clamp Bias ENC_R_IN Sync-tip clamp Bias ENC_CVBS_IN Sync-tip clamp Sync-tip clamp VCR_B_IN Bias Sync-tip clamp VCR_G_IN Bias Sync-tip clamp VCR_R_IN Bias Sync-tip clamp VCR_CVBS_IN Bias Sync-tip clamp _______________________________________________________________________________________ Low-Power Video Switches for Dual SCART Connectors MAX9655/MAX9656 Table 5. MAX9656 Input Circuit of Input as Determined by State of TV_SEL INPUT INPUT CIRCUIT (TV_SEL = LOW) INPUT CIRCUIT (TV_SEL = HIGH) ENC_B_IN Sync-tip clamp Bias ENC_G_IN Sync-tip clamp Bias Sync-tip clamp Bias ENC_R_IN ENC_CVBS_IN Sync-tip clamp (VCR_SEL = 0) Sync-tip clamp (VCR_SEL = 1) Sync-tip clamp (VCR_SEL = 0) Bias (VCR_SEL = 1) TV_CVBS_IN Bias (VCR_SEL = 0) Sync-tip clamp (VCR_SEL = 1) Bias (VCR_SEL = 0) Sync-tip clamp (VCR_SEL = 1) VCR_B_IN Bias Sync-tip clamp VCR_G_IN Bias Sync-tip clamp VCR_R_IN Bias Sync-tip clamp VCR_CVBS_IN Bias Sync-tip clamp Note: VCR_SEL = X (don’t care), except where noted. When the MAX9656 is in shutdown, its inputs are biased at the same voltage and present the same input resistance as unselected inputs. Video Filter The MAX9655/MAX9656 video filter features ±1dB passband out to 9.5MHz and 47dB attenuation at 27MHz, making the filter suitable for standard-definition video signals from all sources (e.g., broadcast and DVD). Broadcast video signals are channel limited: NTSC signals have 4.2MHz bandwidth, and PAL signals have 5MHz bandwidth. Video signals from a DVD player, however, are not channel limited; so the bandwidth of DVD video signals can approach the Nyquist limit of 6.75MHz. Recommendation: ITU-R BT.601-5 specifies 13.5MHz as the sampling rate for standarddefinition video. Therefore, the maximum bandwidth of the signal is 6.75MHz. To ease the filtering requirements, most modern video systems oversample by two times, clocking the video current DAC at 27MHz. Outputs The video output amplifiers can both source and sink load current, allowing output loads to be DC- or ACcoupled. The amplifier output stage needs approximately 300mV of headroom from either supply rail. The devices have an internal level-shift circuit that positions the sync tip at approximately 300mV at the output. If the supply voltage is greater than 3.135V (5% below a 3.3V supply), each amplifier can drive two DC-coupled video loads to ground. If the supply is less than 3.135V, each amplifier can drive only one DC-coupled or AC-coupled video load. Applications Information Audio Switch for Dual SCART Connectors In addition to video signals, SCART connectors also support left and right audio signals that are full duplex. Figure 1 shows a matching audio switch for the MAX9655. Notice that it can be made from low-cost, discrete components. It is assumed that the set-top box chip generates the left and right audio signals directly, or the set-top box chip sends an I2S stream to a stereo audio DAC that generates the left and right audio signals. In both cases, the audio signals are filtered and amplified by a dual audio op amp before they are presented to the audio switch. Figure 2 shows a matching audio switch for the MAX9656. Similar to how the MAX9656 handles video signals, the audio signals from the set-top box chip or the audio signals from the TV SCART are routed to the VCR SCART. AC-Coupling the Outputs The outputs can be AC-coupled since the output stage can source and sink current as shown in Figure 3. Coupling capacitors should be 220µF or greater to keep the highpass filter, formed by the 150Ω equivalent resistance of the video transmission line, to a corner frequency of 4.8Hz or below. The frame rate of PAL systems is 25Hz. The corner frequency should be well below the frame rate. _______________________________________________________________________________________ 9 MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors 12V 12V 12V 0.1μF 9.5kΩ 100kΩ 16 10μF 180pF 0.1μF 2 7 15 + 12V 1MΩ 10μF DAC 8 4.7kΩ 4.7kΩ 1.2kΩ 2 100kΩ 8 1 2.7nF 2.7nF 3 0.1μF + 300kΩ 10μF 1 3 TV_SEL 12V U1 1/2 LM833 4 9, 10, 11 TV SCART 8 7 4 100kΩ 10μF SDATA DEMSCLK LRCK 1 MCLK 4 5 3 2 3 10μF 15 + 1 + 12V 1MΩ 100kΩ 5.1kΩ U0 CS4334 6 2 U2 HEF4053 21 21 + 5.1kΩ 10μF 9.5kΩ 12V 180pF 10μF DAC 5 4.7kΩ 1.2kΩ 4.7kΩ 100kΩ 10μF 6 10μF + 2.7nF 2.7nF + 7 300kΩ + 2 6 3 1/2 LM833 5 100kΩ 1MΩ 4 VCR SCART 6 12V 12V 10kΩ 12V 10kΩ 10μF 3.3V TV_SEL JU0 TV_SEL 10kΩ 2N3904 3.3V VCR_SEL JU1 100kΩ 10μF + VCR_SEL + 10kΩ 21 1MΩ 100kΩ 2N3904 Figure 1. Audio Switch for the MAX9655 10 1 ______________________________________________________________________________________ Low-Power Video Switches for Dual SCART Connectors MAX9655/MAX9656 12V 12V 0.1μF 16 10μF 12V 9.5kΩ 180pF 0.1μF 10μF 15+ 3 + 1MΩ 7 100kΩ 12V 10μF DAC 8 4.7kΩ 4.7kΩ 1.2kΩ 0.1μF 2 TV_SEL 8 + 300kΩ 3 U1 1/2 LM833 4 7 1 3 10μF 15 + 1 MCLK 4 5 12V 1MΩ 2 3 100kΩ 6 2 U2 HEF4053 5.1kΩ U0 CS4334 4 100kΩ 10μF + SDATA DEMSCLK LRCK TV SCART 8 12V 1 2.7nF 2.7nF 9, 10, 11 21 21 + 5.1kΩ 10μF 9.5kΩ 180pF DAC 4.7kΩ 5 4.7kΩ 1.2kΩ 2.7nF 2.7nF 12V 6 7 300kΩ 1/2 LM833 5 2 6 16 1 10μF 3 15 + 10μF 2 6 + 1MΩ 12V 12V 10kΩ 3.3V TV_SEL JU0 0.1μF 12V + TV_SEL 10kΩ 2N3904 100kΩ VCR SCART 10kΩ 3.3V VCR_SEL JU1 VCR_SEL VCR_SEL 10kΩ 8 9, 10, 11 7 4 12V 100kΩ 2N3904 3 10μF 15 + 1 10μF 5 + 1MΩ 100kΩ U2 HEF4053 21 21 Figure 2. Audio Switch for the MAX9656 ______________________________________________________________________________________ 11 MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors Table 6. Quiescent and Average Power Consumption for MAX9655/MAX9656 MEASUREMENTS POWER CONSUMPTION (mW) MAX9655 MAX9656 CONDITIONS TV_B_OUT Quiescent Power Consumption Average Power Consumption 69 No load. LPF 220μF AV = 2V/V 75Ω 175 (MAX9655) 200 (MAX9656) 150Ω to ground on each output. 50% flat field signal on each input. TV_G_OUT LPF 75Ω Power Consumption The quiescent power consumption and average power consumption of the MAX9655/MAX9656 are very low because of the 3.3V operation and low-power circuit design. Quiescent power consumption is defined when the MAX9655/MAX9656 are operating without loads and without any video signals. Average power consumption represents the normal power consumption when the devices drive real video signals into real video loads. It is measured when the MAX9655/MAX9656 drive a 150Ω load to ground with a 50% flat field, which serves as a proxy for a real video signal. Table 6 shows the quiescent and average power consumption of the MAX9655/MAX9656. TV_R_OUT LPF 220μF AV = 2V/V TV SCART 220μF AV = 2V/V 75Ω TV_CVBS_OUT LPF AV = 2V/V LPF AV = 2V/V 220μF 75Ω VCR_CVBS_OUT 220μF 75Ω TO VCR SCART Figure 3. AC-Coupled Outputs Power-Supply Bypassing and Ground The MAX9655/MAX9656 operate from a single-supply voltage down to 2.7V, allowing for low-power operation. Bypass V DD to GND with a 0.1µF capacitor. Place all external components as close as possible to the device. Chip Information PROCESS: BiCMOS 12 ______________________________________________________________________________________ Low-Power Video Switches for Dual SCART Connectors +3.3V 0.1μF MPEG DECODER VDD TV_SEL GPIO DAC ENC_B_IN B DAC G MAX9655 0 0.1μF BUFFER 75Ω TV_B_OUT LPF 2V/V 75Ω ENC_G_IN DAC 1 R 75Ω 0.1μF CLAMPREF 0 DAC CVBS ENC_R_IN 75Ω BUFFER TV_G_OUT LPF 0.1μF 2V/V 75Ω 1 ENC_CVBS_IN TV SCART CLAMPREF 0 0.1μF 75Ω BUFFER TV_R_OUT LPF VCR_B_IN 75Ω 0.1μF VCR SCART 2V/V 1 75Ω CLAMPREF VCR_G_IN 0.1μF 75Ω 0 BUFFER VCR_R_IN TV_CVBS_OUT LPF 2V/V 75Ω 0.1μF 75Ω 1 CLAMPREF VCR_CVBS_IN 0.1μF BUFFER 75Ω VCR_CVBS_OUT LPF 0 2V/V 75Ω TVSEL CLAMPREF GND ______________________________________________________________________________________ 13 MAX9655/MAX9656 Typical Application Circuits Low-Power Video Switches for Dual SCART Connectors MAX9655/MAX9656 Typical Application Circuits (continued) +3.3V 0.1μF MPEG DECODER VDD SHDN TV_SEL GPIO TV_CVBS_IN GPIO 0.1μF 75Ω DAC MAX9656 ENC_B_IN B 0 0.1μF DAC G BUFFER 75Ω TV_B_OUT LPF 2V/V 75Ω ENC_G_IN DAC 1 R 75Ω 0.1μF CLAMPREF 0 DAC CVBS ENC_R_IN 75Ω BUFFER TV_G_OUT LPF 0.1μF 2V/V 75Ω 1 ENC_CVBS_IN TV SCART CLAMPREF 0 0.1μF 75Ω BUFFER TV_R_OUT LPF VCR_B_IN 75Ω 0.1μF VCR SCART 2V/V 1 75Ω CLAMPREF VCR_G_IN 0.1μF 0 75Ω BUFFER TV_CVBS_OUT LPF VCR_R_IN 2V/V 75Ω 0.1μF 1 75Ω CLAMPREF VCR_SEL VCR_CVBS_IN 1 0.1μF 75Ω BUFFER VCR_CVBS_OUT LPF 0 2V/V 75Ω TVSEL VCRSEL 0 CLAMPREF GND 14 ______________________________________________________________________________________ Low-Power Video Switches for Dual SCART Connectors TOP VIEW ENC_B_IN 1 + + 16 VDD TV_CVBS_IN 1 ENC_G_IN 2 15 TV_SEL ENC_B_IN 2 ENC_R_IN 3 14 TV_B_OUT ENC_G_IN 3 13 TV_G_OUT ENC_R_IN 4 ENC_CVBS_IN 4 MAX9655 ENC_CVBS_IN 5 20 VCR_SEL 19 VDD 18 TV_SEL 17 TV_B_OUT MAX9656 16 TV_G_OUT VCR_B_IN 5 12 TV_R_OUT VCR_G_IN 6 11 TV_CVBS_OUT VCR_B_IN 6 15 TV_R_OUT VCR_R_IN 7 10 VCR_CVBS_OUT VCR_G_IN 7 14 TV_CVBS_OUT VCR_R_IN 8 13 VCR_CVBS_OUT VCR_CVBS_IN 8 9 QSOP GND VCR_CVBS_IN 9 12 SHDN N.C. 10 11 GND QSOP ______________________________________________________________________________________ 15 MAX9655/MAX9656 Pin Configurations Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 16 QSOP E16-4 21-0055 20 QSOP E20-1 21-0055 QSOP.EPS MAX9655/MAX9656 Low-Power Video Switches for Dual SCART Connectors 16 ______________________________________________________________________________________ Low-Power Video Switches for Dual SCART Connectors REVISION NUMBER REVISION DATE 0 3/08 Initial release 1 10/08 Removed future product reference from MAX9656, updated Shutdown Supply Current parameter, updated Table 6 2 11/08 Updated Shutdown Supply Current maximum value in EC table. DESCRIPTION PAGES CHANGED — 1, 2, 12 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX9655/MAX9656 Revision History
MAX9656EVKIT+ 价格&库存

很抱歉,暂时无法提供与“MAX9656EVKIT+”相匹配的价格&库存,您可以联系我们找货

免费人工找货