19-3608; Rev 1; 10/05
KIT
ATION
EVALU
E
L
B
A
AVAIL
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
The MAX9702 combines a highly efficient Class D
speaker amplifier with a high-linearity Class AB headphone amplifier. This ensures maximum battery life in
speaker mode and maximum performance in headphone mode. The MAX9702 delivers up to 1.1W per
channel into an 8Ω load and 1.8W into a 4Ω load from a
5V power supply. Maxim’s 2nd-generation, spreadspectrum modulation scheme renders the traditional
Class D output filter unnecessary.
The MAX9702 speaker amplifier offers two modulation
schemes: a fixed-frequency (FFM) mode and a spreadspectrum (SSM) mode that reduces EMI-radiated emissions. The MAX9702 speaker amplifier features a fully
differential architecture, full-bridged (BTL) output, and
comprehensive click-and-pop suppression. The
MAX9702 speaker amplifier features high 75dB PSRR,
low 0.07% THD+N, and SNR in excess of 97dB. Shortcircuit and thermal-overload protection prevent the
device from being damaged during a fault condition.
The headphone amplifier uses Maxim’s DirectDriveTM
architecture that produces a ground-referenced output
from a single supply, eliminating the need for large DCblocking capacitors, saving cost, board space, and
component height. A high 80dB PSRR and low 0.02%
THD+N ensures clean, low-distortion amplification of
the audio signal.
An I2C interface sets the speaker and headphone gain,
mono, stereo, and mute functions.
The MAX9702 is available in a 28-pin thin QFN-EP (5mm
x 5mm x 0.8mm) package. The MAX9702 is specified
over the extended -40°C to +85°C temperature range.
Features
♦ Spread-Spectrum Modulation Reduces EMI
Emissions
♦ Programmable Mono, Stereo, Mute, and Mix
Functions
♦ 1.1W Stereo Output (8Ω, VDD = 5V)
♦ 48mW Headphone Output (32Ω, VDD = 3.3V)
♦ 1.8W Stereo Output (4Ω, VDD = 5V)
♦ 94% Efficiency (RL = 8Ω, PO = 1.1W)
♦ High 73dB PSRR (f = 217Hz)
♦ I2C Programmable Gain Up to +21dB
♦ Integrated Click-and-Pop Suppression
♦ Low-Power Shutdown Mode (0.1µA)
♦ Short-Circuit and Thermal-Overload Protection
♦ ±8kV (HBM) ESD-Protected Headphone Driver
Outputs
Ordering Information
I2C SLAVE
ADDRESS
PKG
CODE
28 TQFN-EP*
1001100
T2855-6
MAX9702BETI+ 28 TQFN-EP*
1001110
T2855-6
PART
PIN–PACKAGE
MAX9702ETI+
Note: All devices specified for -40°C to +85°C operating temperature range.
*EP = Exposed paddle.
+ Denotes lead-free package.
Simplified Block Diagram
Applications
Cellular Phones
PDAs
INM
Handheld Gaming Consoles
INL
∑
INPUT MUX
Notebook PCs
INR
RIGHT MODULATOR
AND H-BRIDGE
GAIN
CONTROL
∑
Pin Configurations appear at end of data sheet.
SHDN
SDA
SCL
SYNC
I2C CONTROL
LEFT MODULATOR
AND H-BRIDGE
OSCILLATOR
SYNC_OUT
MAX9702
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9702
General Description
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................................+6V
PVDD to PGND .......................................................................+6V
CPVDD to CPGND..................................................................+6V
CPVSS to VSS ......................................................................±0.3V
CPVSS to CPGND .....................................................-6V to +0.3V
VSS to CPGND..........................................................-6V to +0.3V
C1N .......................................(CPVSS - 0.3V) to (CPGND + 0.3V)
C1P.......................................(CPGND - 0.3V) to (CPVDD + 0.3V)
HP_ to GND ............................(CPVSS - 0.3V) to (CPVDD + 0.3V)
GND to PGND and CPGND................................................±0.3V
VDD to PVDD and CPVDD ....................................................±0.3V
SDA, SCL to GND.....................................................-0.3V to +6V
All Other Pins to GND.................................-0.3V to (VDD + 0.3V)
Continuous Current In/Out of PVDD, PGND,
CPVDD, CPGND, OUT_ ..............................................±600mA
Continuous Current In/Out of HP_ ..................................±120mA
Continuous Input Current CPVSS....................................+260mA
Continuous Input Current (all other pins) .........................±20mA
Duration of OUT_ Short Circuit to GND or PVDD .........Continuous
Duration of Short Circuit Between OUT__ ..................Continuous
Duration of HP_ Short Circuit to GND
or PVDD ..................................................................Continuous
Continuous Power Dissipation (TA = +70°C)
28-Pin Thin QFN (derate 21.3mW/°C above +70°C)....1702mW
Junction Temperature ......................................................+150°C
Operating Temperature Range ...........................-40oC to +85°C
Storage Temperature Range .............................-65oC to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (VDD = 3.3V)
(VDD = PVDD = CPVDD = SHDN = 3.3V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain
= +1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted, RL = ∞. Headphone load RLH connected
between HPR/HPL to GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL
Supply Voltage Range
VDD
Quiescent Current
IDD
Shutdown Current
ISHDN
Input Resistance
RIN
Debounced Delay
tDEBOUNCE
Turn-On Time
Turn-Off Time
Input Bias Voltage
tON
Inferred from PSRR test
2.5
5.5
V
10
15
mA
HPS = VDD, headphone mode
7
11
mA
Hard shutdown, SHDN = GND
0.1
10
Soft shutdown (see I2C section)
22
30
HPS = GND, speaker mode
Stereo left and right
16.5
24
31.5
Mono channel
8.4
12
15.6
Delay from HPS transition to
headphone/speaker turn-on
Time from SHDN
transition to full
operation
65
HPS = GND (SP mode)
85
HPS = VDD (HP mode)
85
µA
kΩ
ms
ms
tOFF
0
VBIAS
1.125
ms
1.25
1.375
±9
±40
V
SPEAKER AMPLIFIERS (HPS = GND)
Output Offset Voltage
Power-Supply Rejection Ratio
(Note 3)
2
VOS
TA = +25°C
TMIN to TMAX
±50
VDD = 2.5V to 5.5V
PSRR
100mVP-P ripple,
VIN = 0V, TA = +25°C
54
mV
75
fRIPPLE = 217Hz
75
fRIPPLE = 20kHz
55
_______________________________________________________________________________________
dB
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
(VDD = PVDD = CPVDD = SHDN = 3.3V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain
= +1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted, RL = ∞. Headphone load RLH connected
between HPR/HPL to GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
Output Power
SYMBOL
POUT
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
Oscillator Frequency
THD+N
SNR
fS
CONDITIONS
THD+N = 1%, TA = +25°C,
f = 1kHz, VDD = 3.3V
MIN
RL = 8Ω
470
RL = 4Ω
700
RL = 8Ω (POUT = 400mW), f = 1kHz
0.07
RL = 4Ω (POUT = 600mW), f = 1kHz
0.13
VOUT =
2VRMS,
RL = 8Ω
BW = 22Hz
to 22kHz
A-weighted
FFM
86.5
SSM
87.5
FFM
91.5
SSM
fSYNC
SYNC_OUT Capacitance Drive
CSYNC_OUT
Click-and-Pop Level
KCP
1000
SYNC = float
1250
η
Efficiency
Gain (see I2C Section)
AV
%
dB
1200
1340
1450
kHz
1150
±50
2000
100
Into shutdown
56
Out of shutdown
48
POUT = 2 x 500mW, fIN = 1kHz, RL = 8Ω,
L = 68µH
94
B2 = 0
B1 = 0
B0 = 0
0
B2 = 0
B1 = 0
B0 = 1
+3
B2 = 0
B1 = 1
B0 = 0
+6
B2 = 0
B1 = 1
B0 = 1
+9
B2 = 1
B1 = 0
B0 = 0
+12
B2 = 1
B1 = 0
B0 = 1
+15
B2 = 1
B1 = 1
B0 = 0
+18
B2 = 1
B1 = 1
B0 = 1
+21
Channel-to-Channel Gain
Tracking
Crosstalk
UNITS
mW
1100
1000
Peak voltage, 32
samples/second,
A-weighted (Note 3)
MAX
91.5
SYNC = GND
SYNC = VDD
SYNC Frequency Lock Range
TYP
L to R, R to L, f = 10kHz, RL = 8Ω,
POUT = 300mW
kHz
pF
dB
%
dB
±0.2
%
65
dB
_______________________________________________________________________________________
3
MAX9702
ELECTRICAL CHARACTERISTICS (VDD = 3.3V) (continued)
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
ELECTRICAL CHARACTERISTICS (VDD = 3.3V) (continued)
(VDD = PVDD = CPVDD = SHDN = 3.3V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain
= +1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted, RL = ∞. Headphone load RLH connected
between HPR/HPL to GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
±1.8
±6
UNITS
HEADPHONE AMPLIFIERS (HPS = VDD)
Output Offset Voltage
Power-Supply Rejection Ratio
(Note 4)
Output Power
Total Harmonic Distortion Plus
Noise
VOS
TMIN to TMAX
±8
VDD = 2.5V to 5.5V
PSRR
POUT
THD+N
Signal-to-Noise Ratio
SNR
Charge-Pump Frequency
fCP
Click-and-Pop Level
KCP
Slew Rate
SR
Gain (see I2C Section)
TA = +25°C
AV
66
75
100mVP-P ripple,
VIN = 0V, TA = +25°C
fRIPPLE = 217Hz
73
fRIPPLE = 20kHz
53
THD+N = 1%, VDD =
3.3V, TA = +25°C
RL = 32Ω
48
RL = 16Ω
47
RL = 16Ω (POUT = 40mW, f = 1kHz)
0.03
RL = 32Ω (POUT = 32mW, f = 1kHz)
0.015
VOUT = 1VRMS,
RL = 32Ω
BW = 22Hz to 22kHz
95.5
A-weighted
97.9
dB
mW
%
dB
fOSC/2
Peak voltage, 32
samples/second,
A-weighted (Note 3)
Into shutdown
65
Out of shutdown
85
±1V output step
kHz
dB
0.3
B4 = 0
B3 = 0
-2
B4 = 0
B3 = 1
+1
B4 = 1
B3 = 0
+4
B4 = 1
B3 = 1
+7
Channel-to-Channel Gain
Tracking
mV
V/µs
dB
±0.2
%
No sustained oscillations
300
pF
Crosstalk
L to R, R to L, f = 10kHz, RL = 16Ω,
POUT = 10mW
70
dB
HP_ Resistance to GND
In speaker mode
1
kΩ
Capacitance Drive
CL
DIGITAL INPUTS (SHDN, SYNC, SDA, SCL, HPS)
Input Voltage High, SHDN,
SYNC, HPS
VINH
2
V
Input Voltage High, SCL
VINH
0.7 x
VDD
V
Input Voltage Low, SHDN, SYNC,
HPS
VINL
4
_______________________________________________________________________________________
0.8
V
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
(VDD = PVDD = CPVDD = SHDN = 3.3V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain
= +1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted, RL = ∞. Headphone load RLH connected
between HPR/HPL to GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.3 x
VDD
V
Input Voltage Low, SDA, SCL
VINL
Input Hysteresis, SDA, SCL
VHYS
0.05 x
VDD
V
Input Capacitance SDA, SCL
CIN
10
pF
Input Leakage Current, SHDN,
SCL
IIN
Input Leakage Current, HPS
IIN
SYNC Input Current
HPS Pullup Resistance
±1
In play mode
µA
±10
µA
25
600
µA
kΩ
DIGITAL OUTPUTS (SYNC_OUT)
Output Voltage High
VOH
IOH = 3mA
Output Voltage Low
VOL
IOL = 3mA
Output Fall Time, SDA
2.4
V
tF
0.4
V
300
ns
ELECTRICAL CHARACTERISTICS (VDD = 5V)
(VDD = PVDD = CPVDD = SHDN = 5V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain =
+1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted, RL = ∞. Headphone load RLH connected
between HPR/HPL to GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL
Quiescent Current
IDD
Shutdown Current
ISHDN
HPS = GND, speaker mode
14
HPS = VDD, headphone mode
8
Hard shutdown, SHDN = GND
0.2
Soft shutdown (see I2C section)
25
100mVP-P ripple,
VIN = 0V,
TA = +25°C
fRIPPLE = 217Hz
73
fRIPPLE = 20kHz
50
mA
µA
SPEAKER AMPLIFIERS (HPS = GND)
Power-Supply Rejection Ratio
(Note 3)
PSRR
Output Power
POUT
THD+N = 1%,
TA = +25°C,
f = 1kHz
dB
RL = 8Ω
1100
RL = 4Ω
1800
VDD = 5V
mW
_______________________________________________________________________________________
5
MAX9702
ELECTRICAL CHARACTERISTICS (VDD = 3.3V) (continued)
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
ELECTRICAL CHARACTERISTICS (VDD = 5V) (continued)
(VDD = PVDD = CPVDD = SHDN = 5V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain =
+1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted, RL = ∞. Headphone load RLH connected
between HPR/HPL to GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25oC.) (Notes 1, 2)
PARAMETER
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
Click-and-Pop Level
Efficiency
SYMBOL
THD+N
SNR
KCP
η
CONDITIONS
MIN
RL = 8Ω (POUT = 900mW), f = 1kHz
0.08
RL = 4Ω (POUT = 1500mW), f = 1kHz
0.18
VOUT = 2VRMS,
RL = 8Ω
BW = 22Hz
to 22kHz
A-weighted
Peak voltage, 32
samples/second,
A-weighted (Note 4)
FFM
SSM
87
91
SSM
89
Into shutdown
MAX
UNITS
%
88
FFM
dB
61.5
dB
Out of shutdown
POUT = 1W, fIN = 1kHz, RL = 8Ω, L = 68µH
Channel-to-Channel Gain
Tracking
L to R, R to L, f = 10kHz, RL = 8Ω,
POUT = 300mW
Crosstalk
TYP
44
95
%
±0.2
%
65
dB
HEADPHONE AMPLIFIERS (HPS = VDD)
fRIPPLE = 217Hz
78
fRIPPLE = 20kHz
53
Power-Supply Rejection Ratio
(Note 4)
PSRR
100mVP-P ripple,
VIN = 0V, TA = +25°C
Output Power
POUT
THD+N = 1%, TA = +25°C,
RL = 32Ω
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
Click-and-Pop Level
THD+N
RL = 32Ω (POUT = 32mW, f = 1kHz)
6
45
mW
0.03
%
SNR
VOUT = 1VRMS,
RL = 32Ω
BW = 22Hz to 22kHz
94.7
A-weighted
97.4
Into shutdown
67
KCP
Peak voltage, 32
samples/second,
A-weighted
(Notes 3, 4)
Out of shutdown
83
dB
dB
Channel-to-Channel Gain
Tracking
Crosstalk
dB
L to R, R to L, f = 10kHz, RL = 32Ω,
POUT = 10mW
±0.2
%
70
dB
_______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
(VDD = PVDD = CPVDD = SHDN = 3.3V, GND = PGND = CPGND = 0V, SYNC = VDD (SSM), speaker gain = +12dB, headphone gain
= +1dB. Speaker load RL connected between OUT+ and OUT-, unless otherwise noted. RL = ∞. Headphone load RLH connected
between HPR/HPL and GND. CBIAS = 1µF to GND, 1µF capacitor between C1P and C1N, CVSS = 1µF. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25oC.) (Figure 9)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
400
kHz
Serial Clock
fSCL
Bus Free Time Between a STOP
and a START Condition
tBUF
1.3
µs
Hold Time (Repeated) START
Condition
tHD, STA
0.6
µs
Repeated START Condition
Setup Time
tSU, STA
0.6
µs
STOP Condition Setup Time
tSU, STO
0.6
µs
Data Hold Time
tHD,DAT
0
Data Setup Time
tSU,DAT
100
ns
SCL Clock Low Period
tLOW
1.3
µs
SCL Clock High Period
µs
0.9
µs
tHIGH
0.6
Rise Time of SDA and SCL,
Receiving
tR
(Note 5)
20 +
0.1Cb
300
ns
Fall Time of SDA and SCL,
Receiving
tF
(Note 5)
20 +
0.1Cb
300
ns
Fall Time of SDA, Transmitting
tF
(Note 5)
20 +
0.1Cb
250
ns
Pulse Width of Spike Suppressed
tSP
0
50
ns
Capacitive Load for Each Bus
Line
Cb
400
pF
Note 1: All devices are 100% production tested at +25°C. All temperature limits are guaranteed by design.
Note 2: Speaker mode testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For RL =
4Ω, L = 34µH, RL = 8Ω, L = 68µH.
Note 3: Amplifier inputs (STEREO/MONO) connected to GND through CIN.
Note 4: Speaker mode testing performed with an 8Ω resistive load in series with a 68µH inductive load connected across BTL output. Headphone mode testing performed with 32Ω resistive load connected to GND. Mode transitions are controlled by
SHDN. KCP level is calculated as: 20 x log[(peak voltage under normal operation at rated power level)/(peak voltage during
mode transition, no input signal)]. Units are expressed in dB.
Note 5: Cb = total capacitance of one bus line in pF.
_______________________________________________________________________________________
7
MAX9702
I2C TIMING CHARACTERISTICS
Typical Operating Characteristics
(VDD = PVDD = SHDN = 3.3V, GND = PGND = 0V, SYNC = VDD (SSM), speaker gain = 12dB.)
VDD = 5V
RL = 4Ω
VDD = 5V
RL = 8Ω
1
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (SPEAKER MODE)
10
MAX9702 toc02
10
MAX9702 toc01
10
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (SPEAKER MODE)
VCC = 3.3V
RL = 4Ω
0.1
THD+N (%)
1
THD+N (%)
THD+N (%)
1
OUTPUT POWER = 1.6W
MAX9702 toc03
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (SPEAKER MODE)
OUTPUT POWER = 800mW
0.1
OUTPUT POWER = 400mW
0.1
OUTPUT POWER = 100mW
OUTPUT POWER = 200mW
OUTPUT POWER = 200mW
0.01
0.01
10
100
1k
10k
100k
0.01
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER (SPEAKER MODE)
VDD = 5V
RL = 8Ω
POUT = 800mW
100
MAX9702 toc06
VCC = 3.3V
RL = 8Ω
MAX9702 toc05
10
MAX9702 toc04
10
VDD = 5V
RL = 4Ω
10
OUTPUT POWER = 400mW
0.1
THD+N (%)
THD+N (%)
1
THD+N (%)
1
FFM
fIN = 20Hz
1
0.1
0.1
SSM
OUTPUT POWER = 100mW
0.01
fIN = 1kHz
0.01
10
100
1k
10k
100k
fIN = 10kHz
0.01
10
100
1k
10k
100k
0
0.5
1.0
1.5
2.0
2.5
FREQUENCY (Hz)
FREQUENCY (Hz)
OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER (SPEAKER MODE)
VDD = 3.3V
RL = 4Ω
100
VDD = 3.3V
RL = 8Ω
THD+N (%)
1
10
1
THD+N (%)
10
10
MAX9702 toc09
VDD = 5V
RL = 8Ω
MAX9702 toc08
100
MAX9702 toc07
100
THD+N (%)
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
fIN = 20Hz
1
fIN = 10kHz
fIN = 10kHz
fIN = 20Hz
0.1
0.1
fIN = 1kHz
fIN = 1kHz
fIN = 20Hz
0.01
0.01
0
300
600
900
OUTPUT POWER (mW)
8
0.1
fIN = 10kHz
1200
1500
fIN = 1kHz
0.01
0
200
400
600
OUTPUT POWER (mW)
800
1000
0
100
200
300
400
500
OUTPUT POWER (mW)
_______________________________________________________________________________________
600
700
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
(VDD = PVDD = SHDN = 3.3V, GND = PGND = 0V, SYNC = VDD (SSM), speaker gain = 12dB.)
0.1
MAX9702 toc11
80
80
RL = 4Ω
70
60
50
40
30
FFM
0.01
10
300
600
900
1200
VDD = 3.3V
fIN = 1kHz
POUT = POUTL + POUTR
10
0.5
1.0
1.5
2.0
2.5
3.0
0
0.2
0.4
0.6
0.8
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER vs. SUPPLY VOLTAGE
OUTPUT POWER vs. SUPPLY VOLTAGE
OUTPUT POWER
vs. LOAD RESISTANCE
1500
THD+N = 1%
THD+N = 10%
VDD = 5V
f = 1kHz
2.0
OUTPUT POWER (W)
2000
1500
2.5
MAX9702 toc14
RL = 8Ω
fIN = 1kHz
OUTPUT POWER (mW)
THD+N = 10%
1000
2000
MAX9702 toc13
RL = 4Ω
fIN = 1kHz
2500
1000
THD+N = 1%
1.0
THD+N = 10%
1.5
1.0
THD+N = 1%
500
0.5
500
0
0
3.0
3.5
4.0
4.5
5.0
2.5
5.5
3.0
3.5
4.0
4.5
5.0
100
10
SUPPLY VOLTAGE (V)
LOAD RESISTANCE (Ω)
OUTPUT POWER
vs. LOAD RESISTANCE
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SPEAKER MODE)
CROSSTALK vs. FREQUENCY
(SPEAKER MODE)
0
MAX9702 toc16
VDD = 3.3V
f = 1kHz
800
VRIPPLE = 100mVP-P
RL = 8Ω
-10
-20
PSRR (dB)
THD+N = 10%
600
THD+N = 1%
-40
-50
VDD = 3.3V
-60
VDD = 5V
-90
10
100
-30
-40
-50
-60
LEFT TO RIGHT
-90
RIGHT TO LEFT
-100
-100
LOAD RESISTANCE (Ω)
-20
-80
-80
0
VOUT = -30dBV
VDD = 3.3V, 5V
RL = 8Ω
-70
-70
200
0
-10
CROSSTALK (dB)
-30
1
1
SUPPLY VOLTAGE (V)
1000
400
0
5.5
MAX9702 toc17
2.5
MAX9702 toc18
OUTPUT POWER (mW)
40
OUTPUT POWER (mW)
3000
OUTPUT POWER (mW)
50
0
0
1500
60
20
0
0
RL = 4Ω
70
30
VDD = 5V
fIN = 1kHz
POUT = POUTL + POUTR
20
0.001
RL = 8Ω
90
MAX9702 toc15
SSM
100
EFFICIENCY (%)
THD+N (%)
1
RL = 8Ω
90
EFFICIENCY (%)
VDD = 5V
RL = 8Ω
fIN = 1kHz
10
100
MAX9702 toc10
100
EFFICIENCY vs. OUTPUT POWER
(SPEAKER MODE)
MAX9702 toc12
EFFICIENCY vs. OUTPUT POWER
(SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER (SPEAKER MODE)
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
_______________________________________________________________________________________
9
MAX9702
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3.3V, GND = PGND = 0V, SYNC = VDD (SSM), speaker gain = 12dB.)
OUTPUT FREQUENCY SPECTRUM
(SPEAKER MODE)
-40
-50
-60
LEFT TO RIGHT
-70
-40
-60
-80
-100
FFM MODE
VOUT = -60dBV
f = 1kHz
RL = 8Ω
A-WEIGHTED
-20
OUTPUT MAGNITUDE (dBV)
OUTPUT MAGNITUDE (dBV)
-30
FFM MODE
VOUT = -60dBV
f = 1kHz
RL = 8Ω
UNWEIGHTED
-20
0
MAX9702 toc20
RL = 8Ω
f = 1kHz
-20
CROSSTALK (dB)
0
MAX9702 toc19
0
-10
OUTPUT FREQUENCY SPECTRUM
(SPEAKER MODE)
MAX9702 toc21
CROSSTALK vs. AMPLITUDE
(SPEAKER MODE)
-40
-60
-80
-100
-80
-120
-90
-50
-40
-30
-20
0
-10
10
20
15
0
5
10
20
15
FREQUENCY (kHz)
FREQUENCY (kHz)
OUTPUT FREQUENCY SPECTRUM
(SPEAKER MODE)
OUTPUT FREQUENCY SPECTRUM
(SPEAKER MODE)
WIDEBAND OUTPUT SPECTRUM
(FFM MODE, SPEAKER MODE)
-100
-40
-60
-80
-100
10
RBW = 10kHz
INPUT AC GROUNDED
0
OUTPUT AMPLITUDE (dBV)
-80
SSM MODE
VOUT = -60dBV
f = 1kHz
RL = 8Ω
A-WEIGHTED
-20
OUTPUT MAGNITUDE (dBV)
-60
MAX9702 toc23
0
MAX9702 toc22
SSM MODE
VOUT = -60dBV
f = 1kHz
RL = 8Ω
UNWEIGHTED
-40
5
AMPLITUDE (dB)
0
-20
-140
0
-10
MAX9702 toc24
-140
-60
OUTPUT MAGNITUDE (dBV)
-120
RIGHT TO LEFT
-100
-20
-30
-40
-50
-60
-70
-120
-120
-140
-140
5
10
20
15
-80
-90
0
5
10
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
FREQUENCY (MHz)
WIDEBAND OUTPUT SPECTRUM
(SSM MODE, SPEAKER MODE)
TURN-ON/TURN-OFF RESPONSE
(SPEAKER MODE)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(SPEAKER MODE)
MAX9702 toc26
RBW = 10kHz
INPUT AC GROUNDED
0
-10
20
MAX9702 toc25
10
17
SUPPLY CURRENT (mA)
SHDN
-20
-30
-40
MAX9702
OUTPUT
-50
-60
SSM
14
11
FFM
8
-70
f = 1kHz
RL = 8Ω
-80
-90
1
10
100
FREQUENCY (MHz)
10
1
20
15
MAX9702 toc27
0
OUTPUT AMPLITUDE (dBV)
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
1000
5
20ms/div
2.5
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
______________________________________________________________________________________
5.0
5.5
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
(VDD = PVDD = SHDN = 3.3V, GND = PGND = 0V, SYNC = VDD (SSM), speaker gain = 12dB.)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (HEADPHONE MODE)
10
MAX9702 toc29
MAX9702 toc28
10
VDD = 5V
RL = 32Ω
VDD = 3.3V
RL = 16Ω
1
THD+N (%)
0.15
0.10
1
0.1
THD+N (%)
OUTPUT POWER = 10mW
0.01
0.05
OUTPUT POWER = 15mW
0.1
0.01
OUTPUT POWER = 40mW
OUTPUT POWER = 30mW
0.001
0
2.5
3.0
3.5
4.0
4.5
5.0
100
1k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
THD+N (%)
0.1
OUTPUT POWER = 10mW
0.01
1
fIN = 1kHz
0.1
VDD = 3.3V
RL = 16Ω
10
THD+N (%)
10
fIN = 10kHz
1
fIN = 10kHz
0.01
fIN = 20Hz
0.001
10
100
1k
10k
100k
fIN = 1kHz
0.1
0.01
OUTPUT POWER = 30mW
0.001
MAX9702 toc33
VDD = 5V
RL = 32Ω
1
100
MAX9702 toc32
100
MAX9702 toc31
VDD = 3.3V
RL = 32Ω
fIN = 20Hz
0.001
0
10
20
30
40
50
60
0
10
20
30
40
50
60
FREQUENCY (Hz)
OUTPUT POWER (mW)
OUTPUT POWER (mW)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
1
fIN = 1kHz
fIN = 10kHz
250
200
150
100
0.01
50
VDD = 3.3V
POUT = POUTR + POUTL
175
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
10
VDD = 5V
RL = 32Ω
POUT = POUTR + POUTL
300
200
MAX9702 toc35
VDD = 3.3V
RL = 32Ω
0.1
350
MAX9702 toc34
100
THD+N (%)
10k
SUPPLY VOLTAGE (V)
10
THD+N (%)
0.001
10
5.5
MAX9702 toc36
SHUTDOWN CURRENT (µA)
0.20
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY (HEADPHONE MODE)
MAX9702 toc30
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
(SPEAKER MODE)
150
RL = 16Ω
125
100
RL = 32Ω
75
50
25
fIN = 20Hz
0.001
0
0
10
20
30
40
OUTPUT POWER (mW)
50
60
0
0
30
60
90
OUTPUT POWER (mW)
120
150
0
30
60
90
120
150
OUTPUT POWER (mW)
______________________________________________________________________________________
11
MAX9702
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3.3V, GND = PGND = 0V, SYNC = VDD (SSM), speaker gain = 12dB.)
THD+N = 1%
40
30
20
40
THD+N = 10%
30
20
THD+N = 10%
40
THD+N = 1%
30
20
10
10
0
0
0
3.0
3.5
4.0
4.5
5.5
5.0
10
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE (HEADPHONE MODE)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (HEADPHONE MODE)
OUTPUT FREQUENCY SPECTRUM
(HEADPHONE MODE)
-30
C1 = C2 = 1µF
PSRR (dB)
40
C1 = C2 = 0.47µF
35
-40
-50
VDD = 3.3V
-60
-70
30
-80
25
20
25
30
35
40
45
-40
-60
-80
-100
VDD = 5V
-140
-100
50
VOUT = -60dBV
f = 1kHz
RL = 32Ω
-20
-120
-90
20
0
MAX9702 toc42
-20
50
45
VRIPPLE = 100mVP-P
INPUTS AC GROUNDED
-10
OUTPUT MAGNITUDE (dBV)
0
MAX9702 toc41
55
10
100
1k
100k
10k
0
5
10
FREQUENCY (Hz)
FREQUENCY (kHz)
CROSSTALK vs. FREQUENCY
(HEADPHONE MODE)
CROSSTALK vs. AMPLITUDE
(HEADPHONE MODE)
TURN-ON/TURN-OFF RESPONSE
(HEADPHONE MODE)
-40
-50
-60
-70
RIGHT TO LEFT
-80
-20
MAX9702 toc44
RL = 32Ω
f = 1kHz
-10
CROSSTALK (dBV)
-30
MAX9702 toc45
0
MAX9702 toc43
RL = 32Ω
f = 1kHz
VIN = 100mVP-P
SHDN
-30
-40
-50
RIGHT TO LEFT
-60
MAX9702
OUTPUT
-70
-80
-90
-90
-100
-110
f = 1kHz
RL = 32Ω
LEFT TO RIGHT
-100
LEFT TO RIGHT
-110
10
20
15
LOAD (Ω)
0
-20
1000
LOAD RESISTANCE (Ω)
f = 1kHz
THD+N = 1%
-10
100
LOAD RESISTANCE (Ω)
60
15
10
1000
100
SUPPLY VOLTAGE (V)
MAX9702 toc40
2.5
100
1k
FREQUENCY (Hz)
12
50
THD+N = 1%
10
OUTPUT POWER (mW)
50
VDD = 3.3V
f = 1kHz
60
OUTPUT POWER (mW)
OUTPUT POWER (mW)
OUTPUT POWER (mW)
THD+N = 10%
60
VDD = 5V
f = 1kHz
60
70
MAX9702 toc38
RL = 32Ω
70
50
70
MAX9702 toc37
80
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
MAX9702 toc39
OUTPUT POWER vs. SUPPLY VOLTAGE
(HEADPHONE MODE)
CROSSTALK (dB)
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
10k
100k
-60
-50
-40
-30
-20
-10
0
10
100ms/div
AMPLITUDE (dBV)
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
PIN
NAME
1, 22
PVDD
2
SYNC_OUT
3
SCL
I2C Serial Clock. Connect a pullup resistor to VDD (see I2C Interface section).
4
SDA
I2C Serial Data. Connect a pullup resistor to VDD (see I2C Interface section).
5
BIAS
Common-Mode Voltage. Bypass to GND with a 1µF capacitor.
6
SYNC
Frequency Mode Select:
SYNC = GND: Fixed-frequency mode with fS = 1100kHz.
SYNC = Float: Fixed-frequency mode with fS = 1340kHz.
SYNC = VDD: Spread-spectrum mode with fS = 1150kHz ±50kHz.
SYNC = Clocked: Fixed-frequency mode with fS = external clock frequency.
7
CPVDD
Charge-Pump Power Supply. Connect to VDD and bypass to CPGND with a 1µF capacitor.
8
C1P
9
CPGND
10
C1N
11
CPVSS
FUNCTION
H-Bridge Power Supply. Connect to VDD and bypass each PVDD with a 0.1µF capacitor to
PGND.
Clock Signal Output. Float SYNC_OUT if not used.
Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF capacitor from C1P to C1N.
Charge-Pump Power Ground. Connect to PGND.
Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF capacitor from C1N to
C1P.
Charge-Pump Negative Output. Bypass with a 1µF capacitor to CPGND.
12
VSS
Headphone Amplifier Negative Supply. Connect to CPVSS.
13
HPL
Left-Channel Headphone Output
14
HPR
Right-Channel Headphone Output
15
VDD
Analog Power Supply. Bypass with a 1µF capacitor to GND.
16
GND
Analog Ground. Connect to PGND.
17
INR
Right-Channel Audio Input
18
INL
Left-Channel Audio Input
19
INM
Mono Audio Input
20
HPS
Headphone Sense:
HPS = VDD: Headphone mode.
HPS = GND: Speaker mode.
21
SHDN
23
OUTR+
Right-Channel Positive Amplifier Output
24
OUTR-
Right-Channel Negative Amplifier Output
25, 26
PGND
Power Ground. Connect to GND.
27
OUTL-
Left-Channel Negative Amplifier Output
28
OUTL+
Left-Channel Positive Amplifier Output
EP
EP
Active-Low Shutdown. Connect to VDD for normal operation.
Exposed Pad. The external pad lowers the package’s thermal impedance by providing a
direct heat conduction path from the die to the printed circuit board. The exposed pad is
internally connected to VSS. Connect the exposed thermal pad to an isolated plane if
possible or to VSS.
______________________________________________________________________________________
13
MAX9702
Pin Description
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
Detailed Description
The MAX9702 is a 1.8W, filterless, stereo Class D audio
power amplifier and DirectDrive stereo headphone
amplifier. The MAX9702 SSM amplifier features significant improvements to switch-mode amplifier technology. The MAX9702 offers Class AB performance with
Class D efficiency and minimal board space. The
device offers mix, mute, mono and stereo input modes,
eight selectable gains, and a low-power shutdown
mode—all programmable through an I2C interface.
The MAX9702 stereo headphone amplifier features
Maxim’s DirectDrive architecture, which eliminates the
large output-coupling capacitors required by conventional single-supply headphone amplifiers. A negative
supply (VSS) is created internally by inverting the positive supply (CPV DD ). Powering the amplifiers from
CPVDD and CPVSS increases the dynamic range of the
amplifiers to almost twice that of other single-supply
amplifiers, increasing the total available output power.
The DirectDrive outputs of the MAX9702 are biased at
GND (see Figure 7). The benefit of this 0V bias is that
the amplifier outputs do not have a DC component,
eliminating the need for large DC-blocking capacitors.
Eliminating the DC-blocking capacitors on the output
saves board space, system cost, and improves frequency response.
The MAX9702 features extensive click-and-pop suppression circuitry on both speaker and headphone
amplifiers to eliminate audible clicks-and-pops on startup and shutdown.
The MAX9702 features an input multiplexer/mixer that
allows three different audio sources to be selected or
mixed. An I2C-compatible interface allows serial communication between the MAX9702 and a microcontroller. The MAX9702 is available with two different I2C
addresses allowing two MAX9702s to share the same
bus (see Table 2). The internal command register controls the shutdown status of the MAX9702, sets the
maximum gain of the amplifier, and controls the
mono/stereo/mixed/mute MUX inputs (see Table 3).
Class D Speaker Amplifier
Spread-spectrum modulation and synchronizable
switching frequency significantly reduce EMI emissions. Comparators monitor the audio inputs and compare the complementary input voltages to a sawtooth
waveform. The comparators trip when the input magnitude of the sawtooth exceeds their corresponding input
voltage. Both comparators reset at a fixed time after the
14
rising edge of the second comparator trip point, generating a minimum-width pulse (tON(MIN),100ns typ) at
the output of the second comparator (Figure 1). As the
input voltage increases or decreases, the duration of
the pulse at one output increases while the other output
pulse duration remains the same. This causes the net
voltage across the speaker (VOUT+ - VOUT-) to change.
The minimum-width pulse helps the device to achieve
high levels of linearity.
Operating Modes
Fixed-Frequency (FFM) Mode
The MAX9702 features two fixed-frequency modes.
Connect SYNC to GND to select a 1.1MHz switching frequency. Float SYNC to select a 1.34MHz switching frequency. The frequency spectrum of the MAX9702
consists of the fundamental switching frequency and its
associated harmonics (see the Wideband FFT graph in
Typical Operating Characteristics). Program the switching frequency such that the harmonics do not fall within
a sensitive frequency band (Table 1). Audio reproduction is not affected by changing the switching frequency.
Spread-Spectrum (SSM) Mode
The MAX9702 features a unique spread-spectrum
mode that flattens the wideband spectral components,
improving EMI emissions that may be radiated by the
speaker and cables. This mode is enabled by setting
SYNC = VDD to enable SSM (Table 1). In SSM mode,
the switching frequency varies randomly by ±50kHz
around the center frequency (1.15MHz). The modulation scheme remains the same, but the period of the
sawtooth waveform changes from cycle to cycle
(Figure 2). Instead of a large amount of spectral energy
present at multiples of the switching frequency, the
energy is now spread over a bandwidth that increases
with frequency. Above a few megahertz, the wideband
spectrum looks like white noise for EMI purposes
(Figure 3). A proprietary amplifier topology ensures this
does not corrupt the noise floor in the audio bandwidth.
Table 1. Operating Modes
SYNC
GND
FLOAT
VDD
Clocked
MODE
FFM with fOSC = 1100kHz
FFM with fOSC = 1340kHz
SSM with fOSC = 1150kHz ±50kHz
FFM with fOSC = external clock
frequency
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
MAX9702
tSW
VIN-
VIN+
OUT-
OUT+
tON(MIN)
VOUT+ - VOUT-
Figure 1. MAX9702 Outputs with an Input Signal Applied
______________________________________________________________________________________
15
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
tSW
tSW
tSW
tSW
VIN_-
VIN_+
OUT_-
OUT_+
tON(MIN)
VOUT_+ - VOUT_-
Figure 2. MAX9702 Output with an Input Signal Applied (SSM Mode)
16
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
MAX9702 fig03
45
AMPLITUDE (dBµV/m)
MAX9702
50
FCC EMI LIMIT
40
35
30
25
MAX9702
20
15
30
60
80
100
120
140
160
180
200
220
240
260
280
300
FREQUENCY (MHz)
Figure 3. MAX9702 EMI with 76mm of Speaker Cable
External Clock Mode
The SYNC input allows the MAX9702 to be synchronized to an external clock, or another Maxim Class D
amplifier, creating a fully synchronous system, minimizing clock intermodulation, and allocating spectral components of the switching harmonics to insensitive
frequency bands. Applying a TTL clock signal between
1MHz and 2MHz to SYNC synchronizes the MAX9702.
The period of the SYNC clock can be randomized,
allowing the MAX9702 to be synchronized to another
Maxim Class D amplifier operating in SSM mode.
SYNC_OUT allows several Maxim Class D amplifiers to
be cascaded. The synchronized output minimizes interference due to clock intermodulation caused by the
switching spread between single devices using
SYNC_OUT. The modulation scheme remains the same
when using SYNC_OUT, and audio reproduction is not
affected (see Figure 4).
OUTL+
OUTL-
MAX9702
SYNC
INPUT
OUTR+
OUTR-
SYNC
SYNC_OUT
MAX9700
OUT+
SYNC
OUT-
Figure 4. Cascading Two Amplifiers
______________________________________________________________________________________
17
Filterless Modulation/Common-Mode Idle
Efficiency
The MAX9702 uses Maxim’s unique modulation scheme
that eliminates the LC filter required by traditional Class D
amplifiers, improving efficiency, reducing component
count, conserving board space and system cost.
Conventional Class D amplifiers output a 50% duty-cycle
square wave when no signal is present. With no filter, the
square wave appears across the load as a DC voltage,
resulting in finite load current, increasing power consumption, especially when idling. When no signal is present at the input of the MAX9702, the outputs switch as
shown in Figure 5. Because the MAX9702 drives the
speaker differentially, the two outputs cancel each other,
resulting in no net idle mode voltage across the speaker,
minimizing power consumption.
Efficiency of a Class D amplifier is due to the switching
operation of the output stage transistors. In a Class D
amplifier, the output transistors act as current-steering
switches and consume negligible additional power.
Any power loss associated with the Class D output
stage is mostly due to the I2R loss of the MOSFET onresistance, and quiescent current overhead.
The theoretical best efficiency of a linear amplifier is
78%; however, that efficiency is only exhibited at peak
output powers. Under normal operating levels (typical
music reproduction levels), efficiency falls below 30%,
whereas the MAX9702 still exhibits >80% efficiencies
under the same conditions (Figure 6).
EFFICIENCY vs. OUTPUT POWER
100
VIN_ = 0V
90
80
OUT_-
EFFICIENCY (%)
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
MAX9702
70
60
CLASS AB
50
40
30
OUT_+
VDD = 5V
fIN = 1kHz
RL = 8Ω
20
10
0
0
0.1
0.2
0.3
0.4
0.5
OUTPUT POWER (W)
VOUT_+ - VOUT_- = 0V
Figure 5. MAX9702 Outputs with No Input Signal
18
Figure 6. MAX9702 Efficiency vs. Class AB Efficiency
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
Typical Operating Characteristics for details of the possible capacitor sizes. There is a low DC voltage on the
driver outputs due to amplifier offset. However, the offset of the MAX9702 is typically 1.1mV, which, when
combined with a 32Ω load, results in less than 56µA of
DC current flow to the headphones.
In addition to the cost and size disadvantages of the
DC-blocking capacitors required by conventional headphone amplifiers, these capacitors limit the amplifier’s
low-frequency response and can distort the audio signal. Previous attempts at eliminating the output-coupling capacitors involved biasing the headphone return
(sleeve) to the DC bias voltage of the headphone
amplifiers. This method raises some issues:
1) The sleeve is typically grounded to the chassis.
Using the midrail biasing approach, the sleeve must
be isolated from system ground, complicating product design.
2) During an ESD strike, the driver’s ESD structures
are the only path to system ground. Thus, the driver
must be able to withstand the full ESD strike.
3) When using the headphone jack as a line out to
other equipment, the bias voltage on the sleeve may
conflict with the ground potential from other equipment, resulting in possible damage to the drivers.
DirectDrive
Traditional single-supply headphone amplifiers have
outputs biased at a nominal DC voltage (typically half
the supply) for maximum dynamic range. Large-coupling capacitors are needed to block this DC bias from
the headphone. Without these capacitors, a significant
amount of DC current flows to the headphone, resulting
in unnecessary power dissipation and possible damage to both headphone and headphone amplifier.
Maxim’s DirectDrive architecture uses a charge pump
to create an internal negative supply voltage. This
allows the headphone outputs of the MAX9702 to be
biased at GND, almost doubling dynamic range while
operating from a single supply. With no DC component,
there is no need for the large DC-blocking capacitors.
Instead of two large (220µF, typ) tantalum capacitors,
the MAX9702 charge pump requires two small ceramic
capacitors, conserving board space, reducing cost,
and improving the frequency response of the headphone amplifier. See the Output Power vs. ChargePump Capacitance and Load Resistance graph in the
VDD
VDD/2
GND
CONVENTIONAL AMPLIFIER BIASING SCHEME
+VDD
GND
-VDD
DirectDrive BIASING SCHEME
Figure 7. Traditional Amplifier Output vs. MAX9702 DirectDrive
Output
______________________________________________________________________________________
19
MAX9702
Headphone Amplifier
In conventional single-supply headphone amplifiers,
the output-coupling capacitor is a major contributor of
audible clicks and pops. Upon startup, the amplifier
charges the coupling capacitor to its bias voltage, typically half the supply. Likewise, during shutdown the
capacitor is discharged to GND. This results in DC shift
across the capacitor, which in turn, appears as an
audible transient at the speaker. Since the MAX9702
headphone amplifier does not require output-coupling
capacitors, this does not arise.
The MAX9702 offers four headphone amplifier gain settings controlled through the I2C interface. Headphone
amplifier gains of -2dB, +1dB, +4dB, and +7dB are set
by command register bits 3 and 4 (Table 5).
Additionally, the MAX9702 features extensive click-andpop suppression that eliminates any audible transient
sources internal to the device.
In most applications, the output of the preamplifier driving the MAX9702 has a DC bias of typically half the
supply. During startup, the input-coupling capacitor is
charged to the preamplifier’s DC bias voltage through
the RF of the MAX9702, resulting in a DC shift across
the capacitor and an audible click-and-pop. An internal
delay of 40ms eliminates the clicks-and-pops caused
by the input filter.
Charge Pump
The MAX9702 features a low-noise charge pump. The
switching frequency of the charge pump is 1/2 the
switching frequency of the Class D amplifier. When
SYNC is driven externally, the charge pump switches at
1/2 fSYNC. When SYNC = VDD, the charge pump switches with a spread-spectrum pattern. The nominal switching frequency is well beyond the audio range, and thus
does not interfere with the audio signals, resulting in an
SNR of 97dB. The switch drivers feature a controlled
switching speed that minimizes noise generated by
turn-on and turn-off transients. By limiting the switching
speed of the charge pump, the di/dt noise caused by
the parasitic bond wire and trace inductance is minimized. Although not typically required, additional highfrequency noise attenuation can be achieved by
increasing the size of C2 (see Typical Application
Circuit). The charge pump is active in both speaker and
headphone modes.
Input Multiplexer/Mixer
The MAX9702 features an input multiplexer/mixer that
allows three different audio sources to be selected and
mixed. Command register bits 5 and 6 select the input
channel (see Table 6), and the audio signal is output to
the active amplifier. When the mono path is selected
(bit 6 = 0, bit 5 = 1), the mono input is present on both
the outputs (with a gain according to Tables 4 and 5).
When the stereo path is selected, the left and right
inputs are present on the outputs (with a gain according to Tables 4 and 5). When in mixer mode, the mono
input is added to each of the stereo inputs and present
at the output (with a gain according to Tables 4 and 5).
The mono and stereo signals are attenuated by 6dB
prior to mixing to maintain dynamic range. In mute,
none of input signals is present at output.
Headphone Sense Input (HPS)
The headphone sense input (HPS) monitors the headphone jack, and automatically configures the MAX9702
based on the voltage applied at HPS. A voltage of less
than 0.8V sets the MAX9702 to speaker mode. A voltage of greater than 2V disables the bridge amplifiers
and enables the headphone amplifiers.
For automatic headphone detection, connect HPS to
the control pin of a 3-wire headphone jack as shown in
Figure 8. With no headphone present, the output
impedance of the headphone amplifier pulls HPS to
less than 0.8V. When a headphone plug is inserted into
the jack, the control pin is disconnected from the tip
20
contact and HPS is pulled to VDD through the internal
600kΩ pullup resistor. When driving HPS from an external logic source, drive HPS low when the MAX9702 is
shut down. Place a 10kΩ resistor in series with HPS and
the headphone jack to ensure ±8kV ESD protection.
Click-and-Pop Suppression
The MAX9702 features comprehensive click-and-pop
suppression that eliminates audible transients on startup and shutdown. While in shutdown, the H-bridge is
in a high-impedance state. During startup or power-up,
the input amplifiers are muted and an internal loop sets
the modulator bias voltages to the correct levels, preventing clicks and pops when the H-bridge is subsequently enabled.
Current-Limit and Thermal Protection
The MAX9702 features current limiting and thermal protection to protect the device from short circuits and
overcurrent conditions. The headphone amplifier pulses in the event of an overcurrent condition. The speaker
amplifiers’ current-limiting protection clamps the output
current without shutting down the outputs. This can
result in a distorted output.
The MAX9702 has thermal protection that disables the
device into shutdown at +120°C until the temperature
decreases to +110°C.
VDD
MAX9702
100kΩ
SHDN
SHUTDOWN
CONTROL
HPS
SDA
SCL
I2C CONTROL
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
HPL
HPR
10kΩ
10kΩ
Figure 8. HPS Configuration
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
MAX9702
SDA
tBUF
tSU, STA
tSU, DAT
tHD, STA
tHD, DAT
tLOW
tSP
tSU, STO
SCL
tHIGH
tHD, STA
tR
tF
REPEATED
START
CONDITION
START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 9. 2-Wire Serial-Interface Timing Diagram
S
Sr
P
SCL
SDA
Figure 10. START, STOP, and REPEATED START Conditions
I2C Interface
The MAX9702 features an I 2C 2-wire serial interface
consisting of a serial data line (SDA) and a serial clock
line (SCL). SDA and SCL facilitate communication
between the MAX9702 and the master at clock rates up
to 400kHz. Figure 9 shows the 2-wire interface timing
diagram. The MAX9702 is a receive-only slave device
relying on the master to generate the SCL signal. The
MAX9702 cannot write to the SDA bus except to
acknowledge the receipt of data from the master. The
MAX9702 does not acknowledge a read command
from the master. The master, typically a microcontroller,
generates SCL and initiates data transfer on the bus.
A master device communicates to the MAX9702 by
transmitting the proper address followed by the data
word. Each transmit sequence is framed by a START (S)
or REPEATED START (Sr) condition and a STOP (P) con-
dition. Each word transmitted over the bus is 8 bits long
and is always followed by an acknowledge clock pulse.
The MAX9702 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9702 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL if there are multiple masters on the bus, or if the master in a single-master system has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. Series resistors
protect the digital inputs of the MAX9702 from highvoltage spikes on the bus lines, and minimize crosstalk
and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP Conditions
section). SDA and SCL idle high when the I2C bus is
not busy.
START and STOP Conditions
A master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
10). A START (S) condition from the master signals the
beginning of a transmission to the MAX9702. The master terminates transmission and frees the bus by issuing a STOP (P) condition. The bus remains active if a
REPEATED START (Sr) condition is generated instead
of a STOP condition.
______________________________________________________________________________________
21
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
Early STOP Conditions
The MAX9702 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Slave Address
The MAX9702 is available with one of two preset slave
addresses (see Table 2). The address is defined as the
7 most significant bits (MSBs) followed by the
Read/Write bit. The address is the first byte of information sent to the MAX9702 after the START condition.
The MAX9702 is a slave device only capable of being
written to. The Read/Write bit must always be a zero
when configuring the MAX9702. The MAX9702 does
not acknowledge the receipt of its address even if R/W
is set to 1.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9702 uses to handshake receipt each byte of data
(see Figure 11). The MAX9702 pulls down SDA during
the master-generated 9th clock pulse. The SDA line
must remain stable and low during the high period of
the acknowledge clock pulse. Monitoring ACK allows
for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is
busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master may
reattempt communication.
Write Data Format
A write to the MAX9702 includes transmission of a
START condition, the slave address with the R/W bit set
to zero (see Table 2), 1 byte of data to configure the
command register, and a STOP condition. Figure 12
illustrates the proper format for one frame.
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
ACKNOWLEDGE
Figure 11. Acknowledge
COMMAND BYTE IS STORED ON
RECEIPT OF STOP CONDITION
B7 B6 B5 B4 B3 B2 B1 B0
ACKNOWLEDGE FROM MAX9702
S
SLAVE ADDRESS
0
A COMMAND BYTE
A P
ACKNOWLEDGE
FROM MAX9702
R/W
Figure 12. Write Data Format Example
The MAX9702 only accepts write data, but it acknowledges the receipt of its address byte with the R/W bit
set high. The MAX9702 does not write to the SDA bus
in the event that the R/W bit is set high. Subsequently,
the master reads all 1s from the MAX9702. Always set
the R/W bit to zero to avoid this situation.
Table 2. MAX9702 Address Map
PART
22
MAX9702 SLAVE ADDRESS
A6
A5
A4
A3
A2
A1
A0
MAX9702
1
0
0
1
1
0
0
0
MAX9702B
1
0
0
1
1
1
0
0
______________________________________________________________________________________
R/W
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
Programmable Speaker Gain
The MAX9702 has eight internally set speaker gains
selected by B0–B2 (see Table 4).
Programmable Headphone Gain
The MAX9702 has four headphone gain settings selected by B3 and B4 (see Table 5).
acts as a mixer when the mono and stereo inputs are
enabled at the same time. The MUTE function disables
the input signal to the output. All modes are selected
through B5 and B6 (see Table 6).
The MIX function attenuates and mixes the MONO and
STEREO signals. Each input signal is attenuated by
6dB prior to being mixed. This attenuation preserves
headroom at the output. The output signal is represented by the following equation when in MIX mode:
(OUT _ + (−)OUT _ _ ) or HP _ = IN _ +2INM × A V
Programmable Input Modes
The MAX9702 features a multiplexer that selects
between the stereo and mono inputs. The mux also
where AV is the amplifier gain.
Table 3. Command Bits and Description
Table 5. Programmable Headphone Gain
BIT
DEFAULT
B4
B3
B0
Speaker gain-setting bit
FUNCTION
0
0
0
Headphone gain
-2
B1
Speaker gain-setting bit
0
B2
Speaker gain-setting bit
1
0
1
Headphone gain
(default)
+1
B3
Headphone gain-setting bit
1
1
0
Headphone gain
+4
B4
Headphone gain-setting bit
0
1
1
Headphone gain
+7
B5
MONO enable bit (0 = Mute)
0
B6
STEREO enable bit (0 = Mute)
1
B7
Shutdown bit (1 = normal, 0 =
shutdown)
1
GAIN (dB)
Table 6. Programmable Input Modes
B6
B5
0
0
MUTE (no input on the output)
0
1
MONO (MONO input sent to the output)
GAIN
(dB)
1
0
STEREO (left and right inputs sent to the
outputs) (default)
1
1
MIX (MONO and STEREO inputs are
mixed and output)
Table 4. Programmable Speaker Gain
FUNCTION
FUNCTION
B2
B1
B0
0
0
0
Speaker gain
+0
0
0
1
Speaker gain
+3
0
1
0
Speaker gain
+6
0
1
1
+9
1
0
0
Speaker gain
Speaker gain
+12
1
0
1
Speaker gain
+15
1
1
0
Speaker gain
+18
1
1
1
Speaker gain
+21
FUNCTION
______________________________________________________________________________________
23
MAX9702
Command Register
The MAX9702 has one command register that is used to
set speaker and headphone gain, select an input mode,
and enable/disable shutdown. Table 3 describes the
function of the bits contained in the command register.
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
Shutdown
The MAX9702 features a 0.1µA shutdown mode that
reduces power consumption to extend battery life.
Shutdown is controlled by the hardware or software
interface. Drive SHDN low to disable the drive amplifiers, bias circuitry, charge pump, and set the headphone amplifier output impedance to 1kΩ. Similarly, the
MAX9702 enters shutdown when bit 7 (B7) in the control register is set to zero. Connect SHDN to VDD and
set bit 7 = 1 for normal operation (see Table 7). The I2C
interface is active and the contents of the command
register are not affected when in shutdown. This allows
the master to write to the MAX9702 while in shutdown.
Table 7. Shutdown Control (SHDN)
B7
FUNCTION
0
Soft shutdown
1
Normal operation
DC-Coupled Input
The input amplifier can accept DC-coupled inputs that
are biased to the amplifier’s bias voltage. DC-coupling
eliminates the input-coupling capacitors, reducing
component count to potentially one external component
(see the System Diagram). However, the highpass filtering effect of the capacitors is lost, allowing low-frequency signals to feed through to the load.
Power Supplies
Applications Information
Filterless Class D Operation
Traditional Class D amplifiers require an output filter to
recover the audio signal from the amplifier’s PWM output. The filters add cost, increase the solution size of
the amplifier, and can decrease efficiency. The traditional PWM scheme uses large differential output
swings 2 x VDD(P-P) and causes large ripple currents.
Any parasitic resistance in the filter components results
in a loss of power, lowering the efficiency.
The MAX9702 does not require an output filter. The
device relies on the inherent inductance of the speaker
coil and the natural filtering of both the speaker and the
human ear to recover the audio component of the
square wave output. By eliminating the output filter, this
results in a smaller, less costly, more efficient solution.
Because the frequency of the MAX9702 output is well
beyond the bandwidth of most speakers, voice coil
movement due to the square wave frequency is very
small. Although this movement is small, a speaker not
designed to handle the additional power may be damaged. For optimum results, use a speaker with a series
inductance >10µH. Typical 8Ω speakers, for portable
audio applications, exhibit series inductances in the
range of 20µH to 100µH.
Class D Output Offset
Unlike a Class AB amplifier, the output offset voltage of
Class D amplifiers does not noticeably increase quiescent current draw when a load is applied. This is due to
the power conversion of the Class D amplifier. For
24
example, an 8mV DC offset across an 8Ω load results
in 1mA extra current consumption in a Class AB
device. In the Class D case, an 8mV offset into 8Ω
equates to an additional power drain of 8µW. Due to
the high efficiency of the Class D amplifier, this represents an additional quiescent current draw of
8µW/(V DD /100 x η), which is on the order of a few
microamps.
The MAX9702 has different supplies for each portion of
the device, allowing for the optimum combination of
headroom power dissipation and noise immunity. The
speaker amplifiers are powered from PVDD. PVDD can
range from 2.5V to 5.5V and must be connected to the
same potential as VDD. The headphone amplifiers are
powered from VDD and VSS. VDD is the positive supply
of the headphone amplifiers and can range from 2.5V
to 5.5V. VSS is the negative supply of the headphone
amplifiers. Connect VSS to CPVSS. The charge pump is
powered by CPVDD. Connect CPVDD to VDD for normal
operation. The charge pump inverts the voltage at
CPVDD, and the resulting voltage appears at CPVSS.
The remainder of the device is powered by VDD.
Component Selection
Input Filter
An input capacitor, CIN, in conjunction with the input
impedance of the MAX9702 forms a highpass filter that
removes the DC bias from an incoming signal. The ACcoupling capacitor allows the amplifier to automatically
bias the signal to an optimum DC level. Assuming zerosource impedance, the -3dB point of the highpass filter
is given by:
f−3dB =
1
2πRINCIN
Choose CIN such that f-3dB is well below the lowest frequency of interest. Use capacitors whose dielectrics
have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased
distortion at low frequencies.
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
22Ω
0.033µF
100pF
OUTL+
OUTL+
OUTL+
OUTL-
OUTL-
OUTL800Ω
AT 100MHz
15µH
0.068µF
0.15µF
15µH
0.068µF
0.033µF
100pF
MAX9702
MAX9702
22Ω
MAX9702
22Ω
100pF
0.033µF
OUTR+
OUTR+
OUTR+
OUTR-
OUTR-
OUTR800Ω
AT 100MHz
100pF
15µH
0.068µF
0.15µF
15µH
0.033µF
0.068µF
22Ω
(a)
TYPICAL APPLICATION
200mm)
connect the amplifier to the speaker. Figure 13 shows
optional speaker amplifier output filters.
Other considerations when designing the input filter
include the constraints of the overall system and the
actual frequency band of interest. Although high-fidelity
audio calls for a flat-gain response between 20Hz and
20kHz, portable voice-reproduction devices such as
cellular phones and two-way radios need only concentrate on the frequency range of the spoken human voice
(typically 300Hz to 3.5kHz). In addition, speakers used
in portable devices typically have a poor response
below 300Hz. Taking these two factors into consideration, the input filter may not need to be designed for a
20Hz to 20kHz response, saving both board space and
cost due to the use of smaller capacitors.
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, CBIAS, improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
BIAS with a 1µF capacitor to GND.
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. Most
surface-mount ceramic capacitors satisfy the ESR
requirement. For best performance over the extended
temperature range, select capacitors with an X7R
dielectric. Table 8 lists suggested manufacturers.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the output
resistance of the charge pump. A C1 value that is too
small degrades the device’s ability to provide sufficient
current drive, which leads to a loss of output voltage.
Increasing the value of C1 reduces the charge-pump output resistance to an extent. Above 1µF, the on-resistance
of the switches and the ESR of C1 and C2 dominate.
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at CPVSS. Increasing the value of C2 reduces
output ripple. Likewise, decreasing the ESR of C2
reduces both ripple and output resistance. Lower
capacitance values can be used in systems with low
maximum output power levels. See the Output Power
vs. Charge-Pump Capacitance and Load Resistance
graph in the Typical Operating Characteristics.
CPVDD Bypass Capacitor
The CPVDD bypass capacitor (C3) lowers the output
impedance of the power supply and reduces the
impact of the MAX9702’s charge-pump switching tran-
sients. Bypass CPVDD with C3 to PGND and place it
physically close to the CPVDD and PGND. Use a value
for C3 that is equal to C1.
Supply Bypassing, Layout,
and Grounding
Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Large traces also aid in moving heat away from the package. Proper grounding
improves audio performance, minimizes crosstalk
between channels, and prevents any switching noise
from coupling into the audio signal. Connect PGND and
GND together at a single point on the PC board. Route
all traces that carry switching transients away from GND
and the traces/components in the audio signal path.
Connect all of the power-supply inputs (CPVDD, VDD,
and PVDD) together. Bypass PVDD with a 0.1µF capacitor to PGND and CPVDD with a 1µF capacitor to PGND.
Bypass V DD with 1µF capacitor to GND. Place the
bypass capacitors as close to the MAX9702 as possible. Place a bulk capacitor between PVDD and PGND,
if needed.
Use large, low-resistance output traces. Current drawn
from the outputs increases as load impedance
decreases. High-output trace resistance decreases the
power delivered to the load. Large output, supply, and
GND traces decrease the thermal impedance of the
system, allowing more heat to move from the MAX9702
to the air.
The MAX9702 thin QFN-EP package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal impedance by providing a
direct-heat conduction path from the die to the printed
circuit board. The exposed pad is internally connected
to V SS . Connect the exposed pad to an isolated
plane if possible or to VSS.
Table 8. Suggested Capacitor Manufacturers
SUPPLIER
PHONE
FAX
Taiyo Yuden
800-348-2496
847-925-0899
www.t-yuden.com
TDK
807-803-6100
847-390-4405
www.component.tdk.com
26
WEBSITE
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
2.5V TO 6.5V
1µF
10µF*
0.1µF
PVDD
VDD
1, 22
15
SYNC 6
VDD
2
OSCILLATOR
AND
SAWTOOTH
5
SYNC_OUT
BIAS
CBIAS
1µF
CIN
1µF
CIN
1µF
CIN
1µF
28 OUTL+
INL 18
CLASS D
MODULATOR
AND H-BRIDGE
18 OUTL-
INM 19
INR 17
CLASS D
MODULATOR
AND H-BRIDGE
INPUT
MUX
23 OUTR+
24 OUTR-
VDD
20 HPS
SHDN 21
13 HPL
BASEBAND
PROCESSOR
SDA 4
VDD
SCL 3
I2C
14 HPR
CPVDD 7
C1P 8
C3
1µF
C1
1µF
CHARGE
PUMP
10
C1N
BIAS
GENERATOR
CPGND 9
MAX9702
11
CPVSS
12
16
VSS
C2
1µF
25, 26
GND
PGND
*BULK CAPACITANCE IF NEEDED
______________________________________________________________________________________
27
MAX9702
Functional Diagram/Typical Operating Circuit
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
MAX9702
System Diagram
VDD
*CBULK
10µF
1µF
1µF
VDD
CPVDD
0.1µF
OUTL+
INL
MAX4063 OUT
2.2kΩ
INM
OUT
BIAS
2.2kΩ
PVDD
VDD
AUX_IN
CODEC/
BASEBAND
PROCESSOR
0.1µF
OUTL-
MAX9702
OUTR+
INR
OUTRSYNC
0.1µF
HPS
SYNC_OUT
IN+
HPL
HPR
IN4.7kΩ
0.1µF
4.7kΩ
PVDD
BIAS
µC
VSS
CPVSS
C2
1µF
C1P C1N
C1
1µF
*BULK CAPACITANCE IF NEEDED
28
______________________________________________________________________________________
1µF
0.1µF
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
Chip Information
TRANSISTOR COUNT: 10,435
PROCESS: BiCMOS
SHDN
HPS
INM
INL
INR
GND
VDD
TOP VIEW
21
20
19
18
17
16
15
PVDD
22
14
HPR
OUTR+
23
13
HPL
OUTR-
24
12
VSS
PGND
25
11
CPVSS
PGND
26
10
C1N
OUTL-
27
9
CPGND
OUTL+
28
8
C1P
1
2
3
4
5
6
7
PVDD
SYNC_OUT
SCL
SDA
BIAS
SYNC
CPVDD
MAX9702
THIN QFN
______________________________________________________________________________________
29
MAX9702
Pin Configuration
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
QFN THIN.EPS
MAX9702
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
30
______________________________________________________________________________________
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
The MAX9702 thin QFN-EP package features an exposed thermal pad on its underside. This pad lowers the package’s
thermal impedance by providing a direct-heat conduction path from the die to the printed circuit board. The exposed pad
is internally connected to VSS. Connect the exposed thermal pad to an isolated plane.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 31
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
MAX9702
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
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