19-0627; Rev 1; 3/08
KIT
ATION
EVALU
E
L
B
AVAILA
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
The MAX9726 stereo, DirectDrive™, headphone amplifier
with BassMax and volume control is ideal for portable
audio applications where space is at a premium and performance is essential. The MAX9726 operates from a single 2.7V to 5.5V power supply and includes features that
reduce external component count, system cost, board
space, and offer improved audio reproduction. High
85dB PSRR makes the MAX9726 ideal for direct connection to a battery-powered supply and eliminates the need
for a dedicated LDO. The MAX9726 features Maxim’s
industry-leading click-and-pop suppression circuitry,
which reduces/eliminates audible transients during
power-up and power-down.
The headphone amplifier uses Maxim’s DirectDrive architecture that produces a ground-referenced output from a
single supply, eliminating the need for large DC-blocking
capacitors. The headphone amplifiers deliver 105mW into
a 32Ω load and feature low 0.02% THD+N.
The BassMax feature boosts the bass response of the
amplifier, improving audio reproduction when using inexpensive headphones. The integrated volume control features 64 discrete volume levels, eliminating the need for
an external potentiometer. External resistors set the
MAX9726’s overall gain allowing for custom gain settings.
BassMax and the volume control are enabled through the
I2C/SMBus™-compatible interface. Shutdown can be controlled through the hardware or software interface.
The MAX9726 consumes only 5.5mA of supply current,
provides short-circuit and thermal-overload protection,
and is specified over the -40°C to +85°C extended temperature range. The MAX9726 is available in a tiny
(2mm x 2.5mm x 0.62mm) 20-bump chip-scale package (UCSP™) and a 20-pin TQFN package (4mm x
4mm x 0.75mm).
Features
♦ 105mW DirectDrive Headphone Amplifier
Eliminates Bulky DC-Blocking Capacitors
♦ 2.7V to 5.5V Single-Supply Operation
♦ Integrated 64-Level Volume Control
♦ High 85dB PSRR at 1kHz
♦ Software-Enabled Bass Boost (BassMax)
♦ Industry-Leading Click-and-Pop Suppression
♦ ±7.5kV HBM ESD-Protected Headphone Outputs
♦ Short-Circuit and Thermal-Overload Protection
♦ Low-Power Shutdown Mode (8μA)
♦ Low 0.02% THD+N
♦ I2C/SMBus-Compatible Interface
♦ Available in Space-Saving, Thermally Efficient
Packages
20-Bump UCSP (2mm x 2.5mm x 0.62mm)
20-Pin TQFN (4mm x 4mm x 0.75mm)
Ordering Information
PART
PIN-PACKAGE
SLAVE ADDRESS
MAX9726AEBP+T
20 UCSP-20
1001100
MAX9726AETP+
20 TQFN-EP*
1001100
MAX9726BEBP+T
20 UCSP-20
1001101
MAX9726BETP+
20 TQFN-EP*
1001101
Note: All devices specified over the -40°C to +85°C operating
range.
+Denotes lead-free package.
*EP = Exposed pad.
T = Tape and reel.
Simplified Block Diagram
2.7V TO 5.5V SUPPLY
Applications
SCL
SDA
BML
BassMax
I2 C
INTERFACE
FBL
INL
VOLUME
CONTROL
Σ
OUTL
Σ
OUTR
INR
FBR
MAX9726
BMR
BassMax
SMBus is a trademark of Intel Corp.
UCSP is a trademark of Maxim Integrated Products, Inc.
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX9726
General Description
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
ABSOLUTE MAXIMUM RATINGS
VDD to PGND............................................................-0.3V to +6V
PVSS to SVSS .........................................................-0.3V to +0.3V
SGND to PGND .....................................................-0.3V to +0.3V
C1P to PGND..............................................-0.3V to (VDD + 0.3V)
C1N to PGND............................................(PVSS - 0.3V) to +0.3V
PVSS, SVSS to PGND ................................................+0.3V to -6V
IN_ to SGND...................................(SVSS - 0.3V) to (VDD + 0.3V)
FB_ to SGND..................................(SVSS - 0.3V) to (VDD + 0.3V)
SDA, SCL to PGND ....................................-0.3V to (VDD + 0.3V)
SHDN to PGND ..........................................-0.3V to (VDD + 0.3V)
OUT_ to SGND ............................................................-3V to +3V
BM_ to SGND ..............................................................-3V to +3V
Duration of OUT_ Short Circuit to PGND....................Continuous
Continuous Current Into/Out of:
VDD, C1P, PGND, C1N, PVSS, SVSS, or OUT_ ...........±850mA
Any Other Pin................................................................±20mA
Continuous Power Dissipation (TA = +70°C, multilayer board)
20-Bump UCSP (derate 10mW/°C above +70°C) .......800mW
20-Pin TQFN (derate 25.6mW/°C above +70°C) .......2051mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
OUTL and OUTR ESD Protection (Human Body Model)....±7.5kV
Bump Temperature (soldering) Reflow............................+230°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (5V Supply)
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL
Supply Voltage Range
VDD
Quiescent Supply Current
IDD
Shutdown Supply Current
IDD_SHDN
2.7
No load
SHDN = 0V
5.5
V
5.5
10
mA
8
15
µA
Turn-On Time
tON
440
µs
Turn-Off Time
tOFF
1
µs
Thermal-Shutdown Threshold
TTHRES
+150
°C
Thermal-Shutdown Hysteresis
THYST
12
°C
HEADPHONE AMPLIFIER
Output Offset Voltage
Input Offset Voltage of Input
Amplifier
Input Bias Current
BMR, BML Input Bias Current
Power-Supply Rejection Ratio
(Note 2)
Output Power
Total Harmonic Distortion Plus
Noise
2
VOSHP
Measured between OUT_ and SGND, gain
= 0dB, RIN = RF = 10kΩ, TA = +25°C
(Note 2)
±0.6
VOS
Referenced to SGND, measured between
FBR, FBL, and SGND
3
IB
IBIAS_BB
DC, VDD = 2.7V to 5.5V
PSRR
POUT
THD+N
f = 1kHz, 100mVP-P ripple
80
10
mV
mV
±20
±100
nA
±20
±100
nA
97
85
f = 20kHz, 100mVP-P ripple
74
THD+N = 1%, RL = 16Ω
fIN = 1kHz
RL = 32Ω
124
RL = 16Ω, POUT = 15mW, fIN = 1kHz
0.04
RL = 32Ω, POUT = 30mW, fIN = 1kHz
0.02
104
_______________________________________________________________________________________
dB
mW
%
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Signal-to-Noise Ratio
SNR
Slew Rate
CONDITIONS
RL = 32Ω,
VOUT =
1.77VRMS
MIN
BW = 22Hz to 22kHz
102
A-weighted
105
Output Resistance in Shutdown
ROUT_SHDN
Click-and-Pop Level
KCP
Charge-Pump Switching
Frequency
UNITS
1
V/µs
No sustained oscillations
200
pF
VSHDN = 0V, measured from OUT_ to
SGND
50
kΩ
Peak voltage, A-weighted,
32 samples per second
(Notes 2, 4)
Into
shutdown
59
Out of
shutdown
61
dBV
fCP
515
L to R, or R to L, f = 10kHz,
VOUT = 1VP-P, RL = 32Ω, both channels
loaded
Crosstalk
MAX
dB
SR
Capacitive Drive
TYP
610
705
85
kHz
dB
VOLUME CONTROL
Attenuator Step Accuracy
0 to 64dB
±0.1
68dB to 96dB
±0.5
100dB to 120dB
dB
±2
DIGITAL INPUTS (SHDN, SDA, SCL)
Input High Voltage
VIH
Input Low Voltage
VIL
0.7 x
VDD
V
Input Leakage Current
0.3 x
VDD
V
±1
µA
0.06
V
1
µA
DIGITAL OUTPUTS (SDA)
Output Low Voltage
VOL
IOL = 3mA
Output High Current
IOH
VSDA = VDD
ELECTRICAL CHARACTERISTICS (3.3V Supply)
(VDD = SHDN = 3.3V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum
volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Output Power
SYMBOL
POUT
Total Harmonic Distortion Plus
Noise
THD+N
CONDITIONS
THD+N = 1%,
fIN = 1kHz
MIN
TYP
RL = 16Ω
80
RL = 32Ω
70
RL = 16Ω, POUT = 15mW, fIN = 1kHz
0.05
RL = 32Ω, POUT = 30mW, fIN = 1kHz
0.03
MAX
UNITS
mW
%
_______________________________________________________________________________________
3
MAX9726
ELECTRICAL CHARACTERISTICS (5V Supply) (continued)
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
ELECTRICAL CHARACTERISTICS (3.3V Supply) (continued)
(VDD = SHDN = 3.3V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum
volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
TYP
f = 1kHz, 100mVP-P ripple
85
f = 20kHz, 100mVP-P ripple
73
Power-Supply Rejection Ratio
(Note 2)
PSRR
Signal-to-Noise Ratio
SNR
RL = 32Ω,
VOUT = 1.5VRMS
KCP
Peak voltage,
A-weighted, 32
samples per
second
(Notes 2, 4)
Click-and-Pop Level
MIN
BW = 22Hz to 22kHz
101
A-weighted
104
Into shutdown
62
MAX
UNITS
dB
dB
dBV
Out of shutdown
67
TIMING CHARACTERISTICS
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
400
kHz
Serial Clock Frequency
fSCL
0
Bus Free Time Between a STOP and a
START Condition
tBUF
1.3
µs
tHD:STA
0.6
µs
Low Period of the SCL Clock
tLOW
1.3
µs
High Period of the SCL Clock
tHIGH
0.6
µs
Setup Time for a Repeated START
Condition
tSU:STA
0.6
µs
Data Hold Time
tHD:DAT
0
Data Setup Time
tSU:DAT
100
Hold Time Repeated for a START
Condition
0.9
µs
ns
Rise Time of Both SDA and SCL Signals
tr
300
ns
Fall Time of Both SDA and SCL Signals
tf
300
ns
Setup Time for STOP Condition
Pulse Width of Suppressed Spike
Capacitive Load for Each Bus Line
Note 1:
Note 2:
Note 3:
Note 4:
4
tSU:STO
tSP
0.6
µs
50
CL_BUS
ns
400
pF
All specifications are 100% tested at TA = +25°C. Temperature limits are guaranteed by design.
Inputs AC-coupled to SGND.
Guaranteed by design.
Headphone testing performed with a 32Ω resistive load connected to PGND. Mode transitions are controlled by SHDN. KCP
level is calculated as 20log[(peak voltage during mode transition, no input signal)/1VRMS]. Units are expressed in dBV.
_______________________________________________________________________________________
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
fIN = 1kHz
1
fIN = 20Hz
0.1
fIN = 10kHz
0
20
fIN = 1kHz
10
20 40 60 80 100 120 140 160 180 200
OUTPUT POWER (mW)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
10
MAX9726 toc04
VDD = 5V
RL = 32Ω
0
40 60 80 100 120 140 160
OUTPUT POWER (mW)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
100
fIN = 10kHz
0.001
0.001
40 60 80 100 120 140 160
OUTPUT POWER (mW)
fIN = 20Hz
0.1
0.01
0.01
0.001
1
MAX9726 toc05
0.01
20
MAX9726 toc03
10
THD+N (%)
fIN = 10kHz
THD+N (%)
VDD = 3.3V
RL = 16Ω
1
THD+N (%)
THD+N (%)
OUTPUT POWER = 60mW
1
fIN = 20Hz
0.1
0.1
fIN = 10kHz
0.01
0.01
0.001
OUTPUT POWER = 20mW
0.001
20
40 60 80 100 120 140 160
OUTPUT POWER (mW)
10
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
VDD = 3.3V
RL = 32Ω
10
VDD = 5V
RL = 16Ω
1
THD+N (%)
1k
10k
FREQUENCY (Hz)
100k
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
MAX9726 toc06
10
100
MAX9726 toc07
0
1
OUTPUT POWER = 20mW
THD+N (%)
THD+N (%)
fIN = 1kHz
0.1
0
VDD = 5V
RL = 16Ω
fIN = 1kHz
fIN = 20Hz
1
VDD = 3.3V
RL = 32Ω
10
100
MAX9726 toc02
VDD = 3.3V
RL = 16Ω
10
100
MAX9726 toc01
100
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
0.1
0.01
OUTPUT POWER = 80mW
0.1
0.01
OUTPUT POWER = 40mW
OUTPUT POWER = 60mW
0.001
0.001
10
100
1k
10k
FREQUENCY (Hz)
100k
10
100
1k
10k
FREQUENCY (Hz)
100k
_______________________________________________________________________________________
5
MAX9726
Typical Operating Characteristics
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. Outputs in phase, both
channels loaded. TA = +25°C, unless otherwise noted.) (See the Functional Diagram/Typical Operating Circuit)
Typical Operating Characteristics (continued)
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. Outputs in phase, both
channels loaded. TA = +25°C, unless otherwise noted.) (See the Functional Diagram/Typical Operating Circuit)
POWER DISSIPATION
vs. OUTPUT POWER
OUTPUT POWER = 40mW
0.1
OUTPUT POWER = 80mW
0.01
VDD = 3.3V
fIN = 1kHz
POUT = POUTR + POUTL
500
1000
400
RL = 16Ω
300
200
VDD = 5V
fIN = 1kHz
POUT = POUTR + POUTL
900
POWER DISSIPATION (mW)
1
600
MAX9726 toc09
VCC = 5V
RL = 32Ω
POWER DISSIPATION (mW)
MAX9726 toc08
10
POWER DISSIPATION
vs. OUTPUT POWER
RL = 32Ω
MAX9726 toc10
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
THD+N (%)
800
700
RL = 16Ω
600
500
400
RL = 32Ω
300
200
100
100
0
0.001
1k
10k
FREQUENCY (Hz)
0
0
100k
40
80
120
200
160
0
VDD = 5V, fIN = 1kHz
180
OUTPUT POWER (mW)
100
210
MAX9726 toc11
VDD = 3.3V, fIN = 1kHz
OUTPUT POWER (mW)
120
160
OUTPUT POWER
vs. LOAD RESISTANCE
120
THD+N = 10%
60
40
THD+N = 1%
20
150
THD+N = 10%
120
90
60
30
0
THD+N = 1%
0
10
1000
100
1000
100
LOAD RESISTANCE (Ω)
OUTPUT POWER
vs. SUPPLY VOLTAGE
OUTPUT POWER
vs. SUPPLY VOLTAGE
THD+N = 10%
140
OUTPUT POWER (mW)
140
120
100
THD+N = 1%
80
160
MAX9726 toc13
THD+N = 10%
160
10
LOAD RESISTANCE (Ω)
180
60
120
100
80
THD+N = 1%
60
40
40
RL = 16Ω
fIN = 1kHz
20
RL = 32Ω
fIN = 1kHz
20
0
0
2.5
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
6
80
5.0
5.5
200
TOTAL OUTPUT POWER (mW)
OUTPUT POWER
vs. LOAD RESISTANCE
80
40
TOTAL OUTPUT POWER (mW)
MAX9726 toc12
100
MAX9726 toc14
10
OUTPUT POWER (mW)
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5.5
240
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
-60
-50
-60
-70
-70
-80
-80
-90
-90
-100
-100
-110
100
1k
100k
10k
RIGHT TO LEFT
100
1k
100k
10k
10
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
40
MAX9726 toc18
VIN = 1VP-P
RL = 32Ω
G = -10dB
100k
BassMax FREQUENCY RESPONSE
CROSSTALK vs. FREQUENCY
-40
R2 = 22kΩ
C3 = 0.1μF
30
-60
RIGHT TO LEFT
-70
R1 = 47kΩ
RL = 32Ω
R2 = 36kΩ
C3 = 0.068μF
35
GAIN (dB)
R2 = 10kΩ
C3 = 0.22μF
25
20
-80
LEFT TO RIGHT
-90
BassMax DISABLED
15
10
-100
10
100
1k
10k
FREQUENCY (Hz)
1
100k
160
MAX9726 toc20
-80
-100
C1 = C2 = 2.2μF
150
140
OUTPUT POWER (mW)
VIN = 100mVRMS
ATTEN = 60dB
VOUT = -60dBV
RL = 320Ω
fIN = 1kHz
VDD = 5V
-60
1k
100k
10k
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
0
-40
100
FREQUENCY (Hz)
OUTPUT FFT
-20
10
130
120
110
C1 = C2 = 1μF
100
90
80
-120
VDD = 5V
fIN = 1kHz
THD+N = 1%
MAX9726 toc21
CROSSTALK (dB)
-100
-120
10
FREQUENCY (Hz)
-50
LEFT TO RIGHT
-90
-110
-110
10
-80
MAX9726 toc19
-40
PSRR (dB)
-30
VIN = 1VP-P
RL = 32Ω
G = 0dB
-70
CROSSTALK (dB)
-20
-40
-50
VDD = 3.3V + 100mVP-P
RIN = RF = 10kΩ
-10
-30
AMPLITUDE (dBV)
PSRR (dB)
-20
-60
MAX9726 toc16
VDD = 5V + 100mVP-P
RIN = RF = 10kΩ
-10
CROSSTALK vs. FREQUENCY
0
MAX9726 toc15
0
MAX9726 toc17
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
C1 = C2 = 0.68μF
70
-140
60
0
5
10
FREQUENCY (kHz)
15
20
10
15
20
25
30
35
40
45
50
LOAD RESISTANCE (Ω)
_______________________________________________________________________________________
7
MAX9726
Typical Operating Characteristics (continued)
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. Outputs in phase, both
channels loaded. TA = +25°C, unless otherwise noted.) (See the Functional Diagram/Typical Operating Circuit)
Typical Operating Characteristics (continued)
(VDD = SHDN = 5V, PGND = SGND = 0V, C1 = C2 = 1µF, CPREG = CNREG = 1µF, BM_ = 0V, RIN = 10kΩ, RF = 10kΩ, maximum volume (overall gain = 0dB), BassMax disabled. Load connected between OUT_ and PGND where specified. Outputs in phase, both
channels loaded. TA = +25°C, unless otherwise noted.) (See the Functional Diagram/Typical Operating Circuit)
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
C1 = C2 = 2.2μF
85
C1 = C2 = 1μF
EXITING SHUTDOWN
POWER-UP/POWER-DOWN
MAX9726 toc24
MAX9726 toc23
MAX9726 toc22
90
OUTPUT POWER (mW)
RL = 32Ω
VSHDN
5V/div
VDD
2V/div
80
75
VIN_
200mV/div
C1 = C2 = 0.68μF
70
VOUT_
10mV/div
VDD = 3.3V
fIN = 1kHz
THD+N = 1%
65
VOUT_
2V/div
60
10
15
20
25
30
35
40
45
50
20ms/div
100μs/div
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
LOAD RESISTANCE (Ω)
MAX9726 toc25
NO LOAD
INPUTS AC GROUNDED
VSHDN
5V/div
VIN_
200mV/div
VOUT_
2V/div
5.4
5.3
5.2
5.1
5.0
4.8
7
6
4
2
3
4
SUPPLY VOLTAGE (V)
8
8
5
4.9
20μs/div
NO LOAD
INPUTS AC GROUNDED
9
SHUTDOWN CURRENT (μA)
5.5
10
MAX9726 toc26
5.6
MAX9726 toc27
ENTERING SHUTDOWN
SUPPLY CURRENT (mA)
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
5
6
2
3
4
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
6
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
PIN
BUMP
TQFN
UCSP
1
A1
VDD
Power-Supply Input. Bypass VDD to PGND with a 1µF capacitor.
2
A2
C1P
Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P
and C1N.
3
A3
PGND
4
A4
C1N
Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P
and C1N.
5
A5
PVSS
Charge-Pump Output. Connect to SVSS and bypass with a 1µF capacitor to PGND.
6
B3
SDA
Serial Data Input. Connect a pullup resistor greater than 500Ω from SDA to VDD.
7
C3
SCL
Serial Clock Input. Connect a pullup resistor greater than 500Ω from SCL to VDD.
8
C2
SHDN
Active-Low Shutdown Input. Drive SHDN low to disable the MAX9726. Connect SHDN to
VDD while bit 7 is high for normal operation (see the Command Register section).
9
B4
FBL
Left-Channel Feedback Output. Connect a feedback resistor between FBL and INL. See
the Gain-Setting Components section.
10
B5
INL
Left-Channel Input. Connect an input resistor to INL. See the Gain-Setting Components
section.
11
C5
INR
Right-Channel Input. Connect an input resistor to INR. See the Gain-Setting Components
section.
12
C4
FBR
Right-Channel Feedback Output. Connect a feedback resistor between FBR and INR. See
the Gain-Setting Components section.
13
D5
SGND
Signal Ground. Connect to PGND.
14
D2
NREG
Negative Supply Regulator Voltage. Bypass NREG to PGND with a 1µF capacitor.
15
D4
BMR
Right BassMax Input. Connect an external passive network between OUTR and BMR to
apply bass boost to the right-channel output. See the Gain-Setting Components section.
Connect BMR to SGND if BassMax is not used.
16
D1
SVSS
Headphone Amplifier Negative Power-Supply Input. Connect to PVSS and bypass with a
1µF capacitor to PGND.
17
C1
OUTR
Right Headphone Output
18
B1
OUTL
Left Headphone Output
19
D3
BML
Left BassMax Input. Connect an external passive network between OUTL and BML to
apply bass boost to the right-channel output. See the Gain-Setting Components section.
Connect BML to SGND if BassMax is not used.
20
B2
PREG
EP
—
EP
NAME
FUNCTION
Power Ground. Connect to SGND.
Positive Supply Regulator Voltage. Bypass PREG to PGND with a 1µF capacitor.
Exposed Pad. Connect EP to SVSS or leave unconnected.
_______________________________________________________________________________________
9
MAX9726
Pin Description
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Detailed Description
The MAX9726 stereo headphone amplifier features
Maxim’s DirectDrive architecture, eliminating the large
output-coupling capacitors required by conventional
single-supply headphone amplifiers. The MAX9726 consists of two 105mW Class AB headphone amplifiers, two
adjustable gain preamplifiers, hardware/software shutdown control, inverting charge pump, integrated 64level volume control, BassMax feature, comprehensive
click-and-pop suppression circuitry, and an I 2 C/SMBus-compatible interface (see the Functional
Diagram/Typical Operating Circuit). A negative power
supply (PVSS) is created internally by inverting the positive supply (VDD). Powering the amplifiers from VDD and
PVSS increases the dynamic range of the amplifiers to
almost twice that of other single-supply amplifiers,
increasing the total available output power. High PSRR
topologies eliminate the need for an external voltage
regulator.
An I2C-/SMBus-compatible interface allows serial communication between the MAX9726 and a microcontroller. The internal command register controls the
shutdown status of the MAX9726, enables the BassMax
circuitry, and sets the volume level (see the Volume
Control section). The MAX9726’s BassMax circuitry
improves audio reproduction by boosting the bass
response of the amplifier, compensating for any lowfrequency attenuation introduced by the headphone.
External components set the MAX9726’s overall gain
allowing for custom gain settings (see the Gain-Setting
Components section). Amplifier volume is digitally programmable to any one of 64 levels.
Maxim’s DirectDrive architecture uses a charge pump
to create an internal negative supply voltage. This
allows the MAX9726 headphone amplifier outputs to be
biased about ground, almost doubling the dynamic
range while operating from a single supply (see Figure
1). With no DC component, there is no need for the
large DC-blocking capacitors. Instead of two large (up
to 220µF) tantalum capacitors, the MAX9726 charge
pump requires only two small 1µF ceramic capacitors,
conserving board space, reducing cost, and improving
the frequency response of the headphone amplifier.
See the Output Power vs. Charge-Pump Capacitance
and Load Resistance graphs in the Typical Operating
Characteristics for details of the possible capacitor
sizes.
VOUT
VDD
VDD
VDD/2
GND
CONVENTIONAL DRIVER-BIASING SCHEME
VOUT
VDD*
DirectDrive
Traditional single-supply headphone amplifiers have
their outputs biased about a nominal DC voltage, typically half the supply, for maximum dynamic range.
Large coupling capacitors are needed to block this DC
bias from the headphone. Without these capacitors, a
significant amount of DC current flows to the headphone, resulting in unnecessary power dissipation and
possible damage to both the headphone and headphone amplifier. In addition to the cost and size disadvantages, the DC-blocking capacitors required by
conventional headphone amplifiers limit low-frequency
response and can distort the audio signal.
10
2VDD*
GND
-VDD*
DirectDrive BIASING SCHEME
*VDD IS INTERNALLY LIMITED TO ±2.5V DUE TO ABSOLUTE MAXIMUM RATINGS
AND TO LIMIT POWER DISSIPATION.
Figure 1. Traditional Amplifier Output vs. MAX9726 DirectDrive
Output
______________________________________________________________________________________
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
BassMax (Bass Boost)
Typical headphones do not have a flat-frequency
response. The small physical size of the diaphragm
does not allow the headphone speaker to efficiently
reproduce low frequencies. This physical limitation
results in attenuated bass response. The MAX9726
includes a bass-boost feature that compensates for the
headphone’s poor bass response by increasing the
amplifier gain at low frequencies.
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers,
the output coupling capacitor is a major contributor of
audible clicks and pops. The amplifier charges the
coupling capacitor to its output bias voltage at startup.
During shutdown, the capacitor is discharged. This
charging and discharging results in a DC shift across
the capacitor, which appears as an audible transient at
the headphone speaker. Since the MAX9726 headphone amplifier does not require output-coupling
capacitors, no audible transients occur.
Additionally, the MAX9726 features extensive click-andpop suppression that eliminates any audible transient
sources internal to the device. The Power-Up/PowerDown graph in the Typical Operating Characteristics
shows that there are minimal transients at the output
upon startup or shutdown.
In most applications, the preamplifier driving the
MAX9726 has a DC bias of typically half the supply.
The input-coupling capacitor is charged to the preamplifier’s bias voltage through the MAX9726’s input resistor (R IN ) during startup. The resulting voltage shift
across the capacitor creates an audible click-and-pop.
Delay the rise of SHDN by at least four time constants
(4 x RIN x CIN) relative to the start of the preamplifier to
avoid clicks/pops caused by the input filter.
Shutdown
The MAX9726 features a 8µA, low-power shutdown
mode that reduces quiescent current consumption and
extends battery life. Shutdown is controlled by a hardware and software interface. Driving the SHDN input low
disables the drive amplifiers, bias circuitry, charge
pump, and sets the headphone amplifier output resistance to 50kΩ. Similarly, the MAX9726 enters shutdown
when bit seven (B7) in the control register is set to 0 (see
the Command Register section). SHDN and B7 must be
high to enable the MAX9726. The I2C/SMBus interface is
active and the contents of the command register are not
affected when in shutdown. This allows the master to
write to the MAX9726 while in shutdown.
The DirectDrive output of the MAX9726 has more headroom than typical single-supply headphone amplifiers.
This additional headroom allows boosting the bass frequencies without the output signal clipping.
Program the BassMax gain and cutoff frequency with
external components connected between OUT_ and
BM_ (see the Gain-Setting Components section and the
Functional Diagram/Typical Operating Circuit). Use the
I2C-compatible interface to program the command register to enable/disable the BassMax circuit.
BM_ is connected to the noninverting input of the output amplifier when BassMax is enabled. BM_ is pulled
to SGND when BassMax is disabled. The typical application of the BassMax circuit involves feeding a lowpass version of the output signal back to the amplifier.
This is realized using positive feedback from OUT_ to
BM_. Figure 2 shows the connections needed to implement BassMax.
MAX9726
R
R
FROM
ATTENUATOR
STAGE
OUT_
TO HEADPHONE
SPEAKER
R1
BM_
BassMax
ENABLE
R2
C3
Figure 2. BassMax External Connections
______________________________________________________________________________________
11
MAX9726
Charge Pump
The MAX9726 features a low-noise charge pump. The
610kHz switching frequency is well beyond the audio
range, and does not interfere with the audio signals.
This enables the MAX9726 to achieve an SNR of
102dB. The switch drivers feature a controlled switching speed that minimizes noise generated by turn-on
and turn-off transients. Limiting the switching speed of
the charge pump also minimizes di/dt noise caused by
the parasitic bond wire and trace inductance.
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Volume Control
The MAX9726 includes a 64-level volume control that
adjusts the gain of the output amplifiers according to
the code contained in the command register. Volume is
programmed through the command register bits [5:0].
Table 5 shows all possible attenuation settings of the
MAX9726 with respect to the overall gain set by the
external gain-setting resistors (RIN and RF). Mute attenuation is typically better than 120dB when driving a
32Ω load. To perform smooth-sounding volume
changes, step through all intermediate volume settings
at a rate of approximately 2ms per step when a volume
change occurs.
Serial Interface
The MAX9726 features an I 2 C-/SMBus-compatible,
2-wire serial interface consisting of a serial data line
(SDA) and a serial clock line (SCL). SDA and SCL facilitate communication between the MAX9726 and the
master at clock rates up to 400kHz. Figure 3 shows the
2-wire interface timing diagram. The MAX9726 is a
receive-only slave device relying on the master to generate the SCL signal. The MAX9726 cannot write to the
SDA bus except to acknowledge the receipt of data
from the master. The master, typically a microcontroller,
generates SCL and initiates data transfer on the bus.
A master device communicates to the MAX9726 by
transmitting the slave address with the read/write (R/W)
bit followed by the data word. Each transmit sequence
is framed by a START (S) or REPEATED START (Sr)
condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed
by an acknowledge clock pulse.
The MAX9726 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9726 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL if there are multiple masters on the bus, or if the master in a single-master system has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. Series resistors
protect the digital inputs of the MAX9726 from highvoltage spikes on the bus lines, and minimize crosstalk
and undershoot of the bus signals.
SDA
tBUF
tSU, STA
tSU, DAT
tHD, STA
tHD, DAT
tLOW
tSP
tSU, STO
SCL
tHIGH
tHD, STA
tR
tF
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
Figure 3. 2-Wire Serial-Interface Timing Diagram
12
______________________________________________________________________________________
START
CONDITION
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
START and STOP Conditions
SDA and SCL idle high when the bus is not in use. A
master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
5). A START condition from the master signals the
beginning of a transmission to the MAX9726. The master terminates transmission, and frees the bus, by issuing a STOP condition. The bus remains active if a
REPEATED START condition is generated instead of a
STOP condition.
Early STOP Conditions
The MAX9726 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
S
Sr
Slave Address
The slave address is defined as the seven most significant bits (MSBs) of the serial data transmission. The
first byte of information sent to the MAX9726 after the
START condition must contain the slave address and
R/W bit (see Table 1). The MAX9726 is a slave device
only capable of being written to. The sent R/W bit must
always be set to zero when configuring the MAX9726.
The MAX9726 acknowledges the receipt of its address
even if R/W is set to 1. However, the MAX9726 does not
drive SDA. Addressing the MAX9726 with R/W set to 1
causes the master to receive all ones regardless of the
contents of the command register.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9726 uses to handshake receipt each byte of data
(see Figure 6). The MAX9726 pulls down SDA during
the master generated 9th clock pulse. The SDA line
must remain stable and low during the high period of
the acknowledge clock pulse. Monitoring ACK allows
for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is
busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master may
reattempt communication.
P
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SCL
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
SDA
ACKNOWLEDGE
Figure 4. START, STOP, and REPEATED START Conditions
Figure 5. Acknowledge Bit
Table 1. MAX9726 Slave Address with Read/Write Bit
PART
A6 (MSB)
A5
A4
A3
A2
A1
A0
R/W
MAX9726A
1
0
0
1
1
0
0
0
MAX9726B
1
0
0
1
1
0
1
0
______________________________________________________________________________________
13
MAX9726
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse since changes in SDA while SCL is
high are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
COMMAND BYTE IS STORED ON
RECEIPT OF STOP CONDITION
B7 B6 B5 B4 B3 B2 B1 B0
ACKNOWLEDGE FROM MAX9726
SLAVE ADDRESS
S
0
COMMAND BYTE
A
A P
ACKNOWLEDGE
FROM MAX9726
R/W
START
CONDITION
STOP
CONDITION
Figure 6. Write Data Format Example
20
40
60
80
100
120
0
16
32
48
Write Data Format
A write to the MAX9726 includes transmission of a
START condition, the slave address with the R/W bit set
to 0 (see Table 1), one byte of data to configure the
command register, and a STOP condition. Figure 6
illustrates the proper format for one frame.
The MAX9726 only accepts write data, but it acknowledges the receipt of its address byte with the R/W bit
set to 1. The MAX9726 does not write to the SDA bus in
the event that the R/W bit is set to 1. Subsequently, the
master reads all 1’s from the MAX9726. Always set the
R/W bit to zero to avoid this situation.
Command Register
The MAX9726 has one command register that is used
to enable/disable shutdown, enable/disable BassMax,
and set the volume. Table 2 describes the function of
the bits contained in the command register.
Set B7 to 0 to shutdown the MAX9726. The MAX9726
wakes up from shutdown when B7 is set to 1 provided
SHDN is high. SHDN must be high and B7 must be set
to 1 for the MAX9726 to operate normally (see Table 3).
Set B6 to 1 to enable BassMax (see Table 4). The output signal’s low-frequency response is boosted according to the external components connected between
OUT_ and BM_. See the Gain-Setting Components section for details on choosing the external components.
Adjust the MAX9726’s volume with control bits [5:0].
The volume is adjustable to one of 64 steps ranging
from full mute to the maximum gain set by the external
components. Table 5 lists all the possible volume settings for the MAX9726. Figure 7 shows the volume-control transfer function for the MAX9726.
MAX9726 fig07
0
ATTENUATION OF MAX. GAIN SETTING (dB)
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
64
CODE (DECIMAL)
Figure 7. Volume-Control Transfer Function
Table 2. Command Register
B7
B6
Shutdown
BassMax
Enable
B5
B4
MODE
Enabled
14
B2
B1
B0
Volume (See Table 5)
Table 3. Shutdown Control, SHDN = VDD
Disabled
B3
B7
Table 4. BassMax Control
MODE
B6
0
BassMax Disabled
0
1
BassMax Enabled
1
______________________________________________________________________________________
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
B5
B4
B3
B2
B1
B0
(LSB)
ATTENUATION OF MAXIMUM GAIN SETTING (dB)
0
0
0
0
0
0
120
0
0
0
0
0
1
116
0
0
0
0
1
0
112
0
0
0
0
1
1
108
0
0
0
1
0
0
104
0
0
0
1
0
1
100
0
0
0
1
1
0
96
0
0
0
1
1
1
92
0
0
1
0
0
0
88
0
0
1
0
0
1
84
0
0
1
0
1
0
80
0
0
1
0
1
1
76
0
0
1
1
0
0
72
0
0
1
1
0
1
68
0
0
1
1
1
0
64
0
0
1
1
1
1
62
0
1
0
0
0
0
60
0
1
0
0
0
1
58
0
1
0
0
1
0
56
0
1
0
0
1
1
54
0
1
0
1
0
0
52
0
1
0
1
0
1
50
0
1
0
1
1
0
48
0
1
0
1
1
1
46
0
1
1
0
0
0
44
0
1
1
0
0
1
42
0
1
1
0
1
0
40
0
1
1
0
1
1
38
0
1
1
1
0
0
36
0
1
1
1
0
1
34
0
1
1
1
1
0
32
0
1
1
1
1
1
30
1
0
0
0
0
0
28
______________________________________________________________________________________
MAX9726
Table 5. MAX9726 Volume-Control Settings
15
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Table 5. MAX9726 Volume-Control Settings (continued)
16
B5
B4
B3
B2
B1
B0
(LSB)
ATTENUATION OF MAXIMUM GAIN SETTING (dB)
1
0
0
0
0
1
27
1
0
0
0
1
0
26
1
0
0
0
1
1
25
1
0
0
1
0
0
24
1
0
0
1
0
1
23
1
0
0
1
1
0
22
1
0
0
1
1
1
21
1
0
1
0
0
0
20
1
0
1
0
0
1
19
1
0
1
0
1
0
18
1
0
1
0
1
1
17
1
0
1
1
0
0
16
1
0
1
1
0
1
15
1
0
1
1
1
0
14
1
0
1
1
1
1
13
1
1
0
0
0
0
12
1
1
0
0
0
1
11
1
1
0
0
1
0
10
1
1
0
0
1
1
9
1
1
0
1
0
0
8
1
1
0
1
0
1
7
1
1
0
1
1
0
6
1
1
0
1
1
1
5
1
1
1
0
0
0
4
1
1
1
0
0
1
3
1
1
1
0
1
0
2.5
1
1
1
0
1
1
2
1
1
1
1
0
0
1.5
1
1
1
1
0
1
1
1
1
1
1
1
0
0.5
1
1
1
1
1
1
0
______________________________________________________________________________________
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
MODE
B7
B6
B5
B4
B3
B2
B1
B0
Power-On Reset
1
1
1
1
1
1
1
1
Power-On Reset
The contents of the MAX9726’s command register at
power-on are as shown in Table 6.
Applications Information
Power Dissipation and Heatsinking
Linear power amplifiers can dissipate a significant
amount of power under normal operating conditions.
The maximum power dissipation for each package is
given in the Absolute Maximum Ratings section under
Continuous Power Dissipation or can be calculated by
the following equation:
TJ(MAX) − TA
PD(MAX) =
θJA
where TJ(MAX) is +150°C, TA is the ambient temperature, and θJA is the reciprocal of the derating factor in
°C/W as specified in the Absolute Maximum Ratings
section. For example, θJA for the TQFN package is
+39°C/W.
If the power dissipation exceeds the rated package
dissipation, reduce VDD, increase load impedance,
decrease the ambient temperature, or add heatsinking.
Large output, supply, and ground traces decrease θJA,
allowing more heat to be transferred from the package
to surrounding air.
Output Dynamic Range
Dynamic range is the difference between the noise
floor of the system and the output level at 1% THD+N. It
is essential that a system’s dynamic range be known
before setting the maximum output gain. Output clipping occurs if the output signal is greater than the
dynamic range of the system. The DirectDrive architecture of the MAX9726 has increased dynamic range (for
a given VDD) compared to other single-supply amplifiers. Due to the absolute maximum ratings of the
MAX9726 and to limit power dissipation, the MAX9726
includes internal circuitry that limits the output voltage
to approximately ±2.5V.
Use the THD+N vs. Output Power graphs in the Typical
Operating Characteristics section to identify the system’s dynamic range. Find the output power that causes 1% THD+N for a given load. This point indicates the
output power that causes the output to begin to clip.
Use the following equation to determine the peak-topeak output voltage that causes 1% THD+N for a given
load.
VOUT(P −P) = 2 2(POUT _ 1% × RL
where POUT_1% is the output power that causes 1%
THD+N, RL is the load resistance, and VOUT(P-P) is the
peak-to-peak output voltage. Determine the voltage
gain (AV) necessary to attain this output voltage based
on the maximum peak-to-peak input voltage (VIN(P-P)):
AV =
VOUT(P −P)
VIN(P −P)
The maximum voltage gain setting is determined by
external components (see the Gain-Setting Components
section).
UVLO
The MAX9726 features an undervoltage lockout (UVLO)
function that prevents the device from operating if the
supply voltage is less than 2.7V. This feature ensures
proper operation during brownout conditions and prevents deep battery discharge. Once the supply voltage
exceeds the UVLO threshold, the MAX9726 charge
pump is turned on and the amplifiers are powered, provided that SHDN is high and B7 in the command register is set to 1.
Component Selection
Charge-Pump Capacitor Selection
Use ceramic capacitors with a low ESR for optimum
performance. For optimal performance over the extended temperature range, select capacitors with an X7R
dielectric.
Charge-Pump Flying Capacitor (C1)
The charge-pump flying capacitor connected between
C1N and C1P affects the charge pump’s load regulation and output impedance. Choosing a flying capacitor
that is too small degrades the MAX9726’s ability to provide sufficient current drive and leads to a loss of output voltage. Increasing the value of the flying capacitor
improves load regulation and reduces the chargepump output impedance. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance
graphs in the Typical Operating Characteristics.
______________________________________________________________________________________
17
MAX9726
Table 6. Initial Power-Up Command Register Status
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Charge-Pump Hold Capacitor (C2)
The hold capacitor’s value and ESR directly affect the
ripple at PVSS. Ripple is reduced by increasing the
value of the hold capacitor. Choosing a capacitor with
lower ESR reduces ripple and output impedance.
Lower capacitance values can be used in systems with
low maximum output power levels. See the Output
Power vs. Charge-Pump Capacitance and Load
Resistance graphs in the Typical Operating
Characteristics. C2 should be greater than or equal to
the value of C1.
Input-Coupling Capacitor
The AC-coupling capacitor (C IN) and input resistor
(RIN) form a highpass filter that removes any DC bias
from an input signal. See the Functional Diagram/
Typical Operating Circuit. CIN prevents any DC components from the input signal source from appearing in
the amplifier outputs. The -3dB point of the highpass filter, assuming zero-source impedance due to the input
signal source, is given by:
f−3dB =
1
2π × RIN × CIN
(Hz)
Choose CIN such that f-3dB is well below the lowest frequency of interest. Setting f-3dB too high affects the
amplifier’s low-frequency response. Use capacitors with
low-voltage coefficient dielectrics. Aluminum electrolytic,
tantalum, or film dielectric capacitors are good choices
for AC-coupling capacitors. Capacitors with high-voltage
coefficients, such as ceramics (non-C0G dielectrics),
can result in increased distortion at low frequencies.
Gain-Setting Components
With BassMax disabled, the maximum gain of the
MAX9726 is set by the values of the external resistors
R IN and R F (see the Functional Diagram/Typical
Operating Circuit ). When BassMax is disabled, the
maximum gain of the MAX9726 is:
⎛R ⎞
A V = 20 × log⎜ F ⎟ (dB)
⎝ RIN ⎠
18
where AV is the maximum voltage gain in dB. The overall voltage gain of the MAX9726 with BassMax disabled
is equal to:
A TOTAL = A V − ATTENdB _ VOL (dB)
where ATTENdB_VOL is the attenuation due to the volume setting in dB and ATOTAL is the overall voltage
gain of the MAX9726 in dB.
When BassMax is enabled, the bass-boost low-frequency response is set by the ratio of R1 to R2, by the
following equation (see Figure 2):
⎛ R1 + R2 ⎞
ABOOST = 20 × log⎜
⎟ (dB)
⎝ R1 − R2 ⎠
where ABOOST is the voltage gain boost at low frequencies in dB. ABOOST is added to the gain realized by the
volume setting and the gain set by resistors RIN and RF
(AV). The overall voltage gain of the MAX9726 at low
frequencies with BassMax enabled is equal to:
A TOTAL _ BB = A V + ABOOST − ATTENdB _ VOL (dB)
where ATOTAL_BB is the overall gain of the MAX9726 at
low frequencies in dB.
R2
To maintain circuit stability, the ratio R1 + R2
must not exceed one-half. A ratio equal to or
less than one-third is recommended. The switch that
shorts BM_ to SGND, when BassMax is disabled, can
have an on-resistance as high as 300Ω. Choose a
value for R1 that is greater than 40kΩ to ensure that
positive feedback is negligible when BassMax is disabled. Table 7 contains a list of R2 values, with R1 =
47kΩ, and the corresponding low-frequency gain
boost.
Table 7. BassMax Gain Examples
(R1 = 47kΩ)
R2 (kΩ)
LOW-FREQUENCY GAIN BOOST (dB)
39
20.6
33
15.1
27
11.3
22
8.8
15
5.7
10
3.7
______________________________________________________________________________________
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Capacitor C3 forms a pole and a zero according to the
following equations:
The passband gain of the active filter is determined by
the external component values described in the GainSetting Components section.
To minimize distortion, use capacitors with low-voltage
coefficient dielectrics when selecting CF. Film or C0G
dielectric capacitors are good choices for feedback
capacitors. Capacitors with high-voltage coefficients,
such as ceramics (non-C0G dielectrics), can result in
increased distortion.
R1 − R2
(Hz)
2π × C3 × R1 × R2
R1 + R2
(Hz)
fZERO =
2π × C3 × R1 × R2
fPOLE =
6
Table 8. BassMax Pole and Zero
Examples for a Gain Boost of 8.8dB
(R1 = 47kΩ, R2 = 22kΩ)
C3 (nF)
fPOLE (Hz)
4
GAIN (dB)
fPOLE is the frequency at which the gain boost begins
to roll off. fZERO is the frequency at which the bassboost gain no longer effects the transfer function. At
frequencies greater than or equal to fZERO, the gain set
by resistors RIN and RF and the volume control attenuation dominate. Table 8 contains a list of capacitor values and the corresponding poles and zeros for a given
DC gain. See Figure 8 for an example of a gain profile
using BassMax.
R1 = 47kΩ
R2 = 22kΩ
C3 = 0.1μF
RL = 32Ω
BassMax ENABLED
8
fZERO
MAX9726 fig08
BassMax FREQUENCY RESPONSE
10
fPOLE
2
0
-2
BassMax DISABLED
-4
-6
-8
-10
100
10
1k
10k
FREQUENCY (Hz)
Figure 8. BassMax Gain Profile Example
fZERO (Hz)
100
38
106
82
47
130
68
56
156
56
68
190
47
81
230
22
174
490
10
384
1060
CF
RF
MAX9726
Single-Pole Active Lowpass Filter (LPF)
RIN
IN_
FB_
To configure the MAX9726 as an active single-pole lowpass filter (Figure 9), connect a single feedback capacitor (CF) in parallel with the feedback resistor (RF). The
-3dB point (below passband) of the active lowpass filter
is equal to:
f−3dB =
1
(Hz)
2πRFCF
f-3dB =
TO
ATTENUATOR
STAGE
1
2πRFCF
Figure 9. Single-Pole Active Lowpass Filter
______________________________________________________________________________________
19
MAX9726
The low-frequency boost attained by the BassMax circuit is added to the gain realized by the maximum gain
and volume settings. Select the BassMax gain so that
the output signal remains within the dynamic range of
the MAX9726. Output signal clipping occurs at low frequencies if the BassMax gain boost is excessively
large. See the Output Dynamic Range section.
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Summing Amplifier (Audio Mixer)
Layout and Grounding
Figure 10 shows the MAX9726 configured as a summing amplifier, which allows multiple audio sources to
be linearly mixed together. Using this configuration, the
output of the MAX9726 is equal to the weighted sum of
the input signals:
Proper layout and grounding are essential for optimum
performance. Connect PGND and SGND together at a
single point (star ground point) on the PC board.
Connect PVSS to SVSS at the device and bypass this
connection with a 1µF capacitor to PGND. Bypass VDD,
PREG, and NREG to PGND with a 1µF capacitor. Place
the power-supply bypass capacitor and the chargepump hold capacitor as close as possible to the
MAX9726. Route PGND, and all traces that carry
switching transients, away from SGND and the audio
signal path. Route digital signal traces away from the
audio signal path. Make traces perpendicular to each
other when routing digital signals over or under audio
signals.
The TQFN package features an exposed pad that
improves thermal efficiency. Ensure that the exposed
pad is electrically isolated from PGND, SGND, and
VDD. Connect the exposed pad to PVSS when the
board layout dictates that the exposed pad cannot
be left unconnected.
⎛
R
R
R ⎞
VOUT _ = −⎜ VIN1 F + VIN2 F + VIN3 F ⎟
RIN1
RIN2
RIN3 ⎠
⎝
As shown in the above equation, the weighting or
amount of gain applied to each input signal source is
determined by the ratio of RF and the respective input
resistor (RIN1, RIN2, RIN3) connected to each signal
source. When BassMax is enabled, the low-frequency
gain (ABOOST) set by R1, R2, and C3 (see the GainSetting Components section) adds to the gain determined by RF and RIN_. Select RF and RIN_ such that the
dynamic range of the MAX9726 is not exceeded when
BassMax is enabled and/or when the input signals are
at their maximum values and in phase with each other.
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board techniques, bump-pad layout, and recommended reflow
temperature profile, as well as the latest information on
reliability testing results, go to Maxim’s website at
www.maxim-ic.com/ucsp and look up the Application
Note: UCSP—A Wafer-Level Chip-Scale Package.
RF
CIN
RIN1
VIN1
MAX9726
CIN
RIN2
IN_
FB_
VIN2
CIN
UCSP Applications Information
TO
ATTENUATOR
STAGE
RIN3
VIN3
VFB_ = -(VIN1
RF
R
R
+ VIN2 F + VIN3 F )
RIN2
RIN3
RIN1
DIAGRAM SHOWN WITH BassMax DISABLED.
Figure 10. Summing Amplifier
20
______________________________________________________________________________________
MASTER
TO I2C
C1
1μF
CNREG
1μF
CPREG
1μF
10kΩ
SCL
7
(C3)
4
(D1)
CHARGE
PUMP
NEGATIVE
REGULATOR
INTERFACE
I2C
POSITIVE
REGULATOR
VDD
C2
1μF
SGND PGND
PVSS
3
5
13
(C1) (E1)
(E4)
C1N
2
(B1) C1P
14
(B4) NREG
SDA
6
(C2)
20
(B2) PREG
1
(A1)
RF AND RIN ARE CHOSEN FOR A GAIN OF 20dB.
BassMax CIRCUIT TUNED FOR +8.8dB AT 106Hz.
( ) UCSP PACKAGE
10kΩ
1μF
2.7V TO 5.5V
CIN
1μF
RF
10kΩ
VEE
VCC
VEE
VCC
RF
10kΩ
RIGHT AUDIO
INPUT
RIN
10kΩ
SVSS INR
16
11
(A4) (E3)
VEE
VCC
INL
10
(E2)
RIN
10kΩ
0 TO 120dB
ATTENUATOR
0 TO 120dB
ATTENUATOR
FBR
12
(D3)
FBL
9
(D2)
8
(B3)
ON
MAX9726
R
R
SHDN
OFF
R
VEE
VCC
VEE
VCC
R
OUTR 17
(A3)
BMR 15
(D4)
19
BML (C4)
18
OUTL (A2)
R1
47kΩ
C3
0.1μF
C3
0.1μF
R1
47kΩ
R2
22kΩ
R2
22kΩ
Functional Diagram/Typical Operating Circuit
______________________________________________________________________________________
21
MAX9726
LEFT AUDIO
INPUT
CIN
1μF
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
MAX9726
System Diagrams
10kΩ
10kΩ
2.7V TO
5.5V
1μF
CPREG
1μF
CNREG
1μF
VDD
SDA
μCONTROLLER
PREG
NREG
OUTL
R1
47kΩ
SCL
SHDN
CIN
1μF
BML
RF
100kΩ
RIN
10kΩ
INL
CIN
1μF
RF
100kΩ
RIN
10kΩ
C1P
C1N
SGND
PGND
C3
0.1μF
2.7V TO
5.5V
1μF
OUTR
SVSS
PVSS
C1
1μF
CPREG
1μF
VDD
SDA
μCONTROLLER
CNREG
1μF
PREG
NREG
OUTL
R1
47kΩ
SCL
SHDN
CIN
1μF
RIN
10kΩ
BML
RF
100kΩ
CIN
1μF
INL
RIN
10kΩ
RF
100kΩ
INR
C1N
AUDIO DAC
22
C3
0.1μF
R2
22kΩ
R1
47kΩ
C1P
CIN
RIN
0.1μF 100kΩ
R2
22kΩ
BMR
FBR
CIN
RIN
0.1μF 100kΩ
C3
0.1μF
MAX9726
FBL
FM RADIO IC
R2
22kΩ
R1
47kΩ
INR
10kΩ
C3
0.1μF
BMR
FBR
10kΩ
R2
22kΩ
MAX9726
FBL
FM RADIO IC
C3
0.1μF
C1
1μF
SGND
PGND
PVSS
OUTR
SVSS
C2
0.1μF
______________________________________________________________________________________
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
BMR
NREG
SGND
FBR
INR
TOP VIEW
15
14
13
12
11
TOP VIEW
(BUMP SIDE DOWN)
1
2
3
4
5
VDD
C1P
PGND
C1N
PVSS
OUTL
PREG
SDA
FBL
INL
OUTR
SHDN
SCL
FBR
INR
SVSS
NREG
BML
BMR
SGND
A
SVSS 16
10
INL
OUTR 17
9
FBL
8
SHDN
7
SCL
6
SDA
OUTL 18
MAX9726
BML 19
PREG 20
+
B
C
2
3
4
5
PGND
C1IN
PVSS
VDD
1
C1P
D
UCSP
TQFN
(4mm x 4mm)
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information, go to
www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
20 UCSP
B20-1
21-0095
20 TQFN-EP
T2044-3
21-0139
______________________________________________________________________________________
23
MAX9726
Pin Configurations
MAX9726
DirectDrive, Headphone Amplifier with
BassMax, I2C, Volume and Gain Control
Revision History
PAGES
CHANGED
REVISION
NUMBER
REVISION
DATE
0
9/06
Initial release
—
1
3/08
Released UCSP packaging. Removed future product reference.
1
DESCRIPTION
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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