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MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
General Description
The MAX98400A/MAX98400B Class D amplifiers provide
high-performance, thermally efficient amplifier solutions. The
MAX98400A delivers 2x20W into 8Ω loads or 1x40W into a
4Ω load. The MAX98400B delivers 2x12W into 8Ω loads.
Features
●● Wide 8V to 28V Supply Voltage Range
●● Single-Supply Operation
●● Low EMI: Active Emissions Limiting
An integrated limiting circuit prevents output clipping
distortion, protects small speakers from transient voltages,
and reduces power dissipation.
●● Clipping Limiter
A thermal-foldback feature can be enabled to automatically
reduce the output power at above a junction temperature
of +120°C. Traditional thermal protection is also available in
addition to robust overcurrent protection.
●● Thermal and Overcurrent Protection
The ICs operate from a single 8V to 28V supply and provide
a high 67dB PSRR, eliminating the need for a regulated
power supply. They offer up to 90% efficiency from a 12V
supply.
●● Low Quiescent Current
●● Thermal Foldback
Applications
●●
●●
●●
●●
LCD/PDP Televisions
LCD Monitors
MP3 Docking Stations
Notebook PCs
Filterless modulation allows the ICs to pass EN55022B EMI
limits with 1m cables using only a low-cost ferrite bead and
small-value capacitor on each output.
Both devices feature eight digitally controlled gain settings.
Comprehensive click-and-pop reduction circuitry minimizes
noise coming into and out of shutdown.
Ordering Information appears at end of data sheet.
The MAX98400A/MAX98400B are available in 36-pin and
24-pin TQFN packages, respectively, and are specified over
the -40°C to +85°C temperature range.
Simplified Block Diagram
INL-
INL+
OUTLCLIPPING
LIMITER
PGA
CLASS D
MODULATOR
AND H-BRIDGE
OUTL+
MONO*
MAX98400A/B
INR-
INR+
OUTRCLIPPING
LIMITER
*MAX98400A ONLY
19-5286; Rev 3; 10/20
PGA
CLASS D
MODULATOR
AND H-BRIDGE
OUTR+
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
TABLE OF CONTENTS
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Stereo Configuration for MAX98400A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Mono Configuration for MAX98400A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Click-and-Pop Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Mono Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clipping Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Limiter Threshold Control (LIM_TH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Release Time Control (RELEASE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Preamplifier Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal Foldback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Filterless Class D Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Inductor-Based Output Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Internal Regulator VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Supply Bypassing, Layout, and Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chip Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Functional Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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Maxim Integrated │ 2
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
LIST OF FIGURES
Figure 1. MAX98400B EMI Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 2. MAX98400A Efficiency vs. Class AB Effifciency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 3. Limiter Control, Mode3 Configuration (Table 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 4. Output Filter for PWM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
LIST OF TABLES
Table 1. Limiter Control Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 2. Gain Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 3. Filter Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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Maxim Integrated │ 3
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Absolute Maximum Ratings
PVDD to PGND......................................................-0.3V to +30V
VS to GND................................................................-0.3V to +6V
SHDN, MONO to GND.............................................-0.3V to +6V
IN_ to GND...............................................................-0.3V to +6V
G1, G2, RELEASE, TEMPLOCK,
LIM_TH to GND........................................-0.3V to (VS + 0.3V)
OUT_ to PGND..................................... -0.3V to (VPVDD + 0.3V)
PGND to GND.......................................................-0.3V to +0.3V
Continuous Current into OUT_............................................+2.4A
Continuous Current into PVDD, PGND...............................+4.8A
Continuous Current into All Other Pins.............................+10mA
Duration of OUT_ Short Circuit to PVDD or PGND...Continuous
Duration of Short Circuit Between
OUT_+ and OUT_-.................................................Continuous
Continuous Power Dissipation (TA = +70°C)
36-Pin TQFN Multilayer Board
(derate 35.7mW/°C above +70°C)..........................2857.1mW
θJA (Note 1)..............................................................28°C/W
θJC (Note 1)................................................................1°C/W
24-Pin TQFN Multilayer Board
(derate 27.8mW/°C above +70°C)..............................35.7mW
θJA (Note 1)..............................................................36°C/W
θJC (Note 1)................................................................3°C/W
Junction Temperature.......................................................+150°C
Operating Temperature Range............................ -40°C to +85°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s)..................................+300°C
Soldering Temperature (reflow)........................................+260°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Electrical Characteristics
(VPVDD = 18V, CIN = 1μF, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CREL =
1μF, C1 = C2 = 1μF, RL = ∞, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
8
28
V
4.75
5.5
V
AMPLIFIER DC CHARACTERISTICS
PVDD Supply Voltage Range
VS Supply Input Voltage
VPVDD
VS
Inferred from IVS test
10
15
6
8.2
Single-supply mode:
TA = +25°C
16
23
RL = 8Ω (Note 3)
17
VSHDN = 0V, TA = +25°C,
VS = 5.5V
8
20
3
7
10
7.9
4.47
4.75
V
Differential Input Voltage Range
2
VRMS
Single-Ended Input Voltage
Range
1
VRMS
Quiescent Current
Single-Supply
Quiescent Current
Shutdown Current
IPVDD
Inferred from PVDD_PSRR
IVS
IPVDD
ISHDN_
PVDD
PVDD Undervoltage Lockout
ISHDN_VS
VUVLO
VS Regulator Output Voltage
VS
Dual-supply mode:
VS = 4.75V, TA = +25°C
4.2
mA
mA
μA
V
INPUT STAGE
Common-Mode Rejection Ratio
Input Resistance
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CMRR
Differential VLIM_TH = 0V, gain = +35dB
20
60
dB
32
kΩ
Maxim Integrated │ 4
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Electrical Characteristics (continued)
(VPVDD = 18V, CIN = 1μF, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CREL =
1μF, C1 = C2 = 1μF, RL = ∞, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
11
ms
±0.8
±4
%
±2
%
POWER STAGE
Shutdown to Full Operation
tSON
Gain Accuracy
Left-to-Right Gain Matching
All gain settings
Crosstalk
Output Offset Voltage
Click-and-Pop Level
PVDD Power-Supply Rejection
Ratio
VS Power-Supply Rejection
Ratio
MAX98400A Output Power
MAX98400B Output Power
Total Harmonic Distortion Plus
Noise
Output Noise
Efficiency
Current Limit
Output FET Resistance
Switching Frequency
Peak Output Voltage
LIMITER
Attack Time
Release Time
Maximum Trigger Level
Minimum Trigger Level
Trigger Level
Compression Range
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VOS
KCP
1kHz
-85
10kHz
-68
TA = +25°C
Peak voltage,
32 samples/s,
A-weighted,
TA = +25°C (Notes 4, 5)
±8
Into
shutdown
-47
Out of
shutdown
-56
VPVDD = 8V to 28V
PSRRPVDD
POUT
POUT
THD+N
VN
η
±45
mV
dBV
52
63
1kHz, 100mVP-P ripple
67
10kHz, 100mVP-P ripple
57
VS = 4.75V to 5.5V
PSRRVS
dB
39
dB
55
dB
1kHz, 100mVP-P ripple
50
10kHz, 100mVP-P ripple
40
Stereo, RL = 8Ω, 10% THD+N,
fIN = 1kHz (Note 3)
22
Mono, RL = 4Ω, 10% THD+N,
fIN = 1kHz (Note 3)
44
Stereo, RL = 8Ω, 10% THD+N,
fIN = 1kHz (Note 3)
15
POUT = 0.1W to POUT/2, fIN = 20Hz to
20kHz, RL = 8Ω
0.3
POUT/2, fIN = 1kHz, RL = 8Ω
0.03
A-weighted
100
μVRMS
POUT = 2x20W, RL = 8Ω (MAX98400A)
fIN = 1kHz (Note 3)
90
%
5
0.4
330
26
A
Ω
kHz
V
ILIM
RDSON
fSW
3.5
VPVDD = 28V
265
20
VLIM_TH = 0V
VLIM_TH = 0V
VPVDD = 14V (Note 6)
(Note 7)
VLIM_TH = 0V
240
0.8
-1
VLIM_TH = 0V
-12
W
%
395
500
4
0
-6
+1
μs
s
dBFS
dBFS
dBFS
dB
Maxim Integrated │ 5
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Electrical Characteristics (continued)
(VPVDD = 18V, CIN = 1μF, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CREL =
1μF, C1 = C2 = 1μF, RL = ∞, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
VGA Distortion
SYMBOL
CONDITIONS
MIN
Compression = 0 to -12dB
LIM_TH Input-Voltage Low
(PVDD Tracking)
TYP
MAX
3.5
%
0.15
V
LIM_TH Input-Voltage High
(Limiter Off)
VS
-1
Channel-to-Channel Attenuation
Tracking
±1
THERMAL FOLDBACK
Internal Templock Resistor
120
Trigger Temperature
Hard Thermal Protection
UNITS
205
V
dB
310
+130
+165
kΩ
°C
°C
LOGIC INPUT (G1, G2)
Sink Current
TA = +25°C, VG1, VG2 = 0V
+2.5
+5
+8
μA
Source Current
TA = +25°C, VG1, VG2 = VS
-8
-5
-2.5
μA
0.8 x
VS
V
Input High Threshold
Input Low Threshold
0.3 x
VS
Input Three-State Window
0.45 x
VS
V
0.5 x
VS
0.55 x
VS
V
LOGIC INPUT (SHDN, MONO (MAX98400A Only))
Input Leakage Current
Input High Threshold
IIN
VINH
Input Low Threshold
Input-Voltage Hysteresis
VINL
TA = +25°C
±10
μA
V
0.4
V
mV
2
100
Note 2: 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by design.
Note 3: The MAX98400A stereo mode is specified with an 8Ω resistive load in series with a 68μH inductive load connected across
BTL outputs. The MAX98400A mono mode is specified with a 4Ω resistive load in series with 33μH inductive load. The
MAX98400B is specified with an 8Ω resistive load in series with a 68μH inductive load connected across BTL outputs.
Note 4: Amplifier inputs AC-coupled to GND.
Note 5: Mode transitions controlled by SHDN.
Note 6: Relative to equivalent full-scale undistorted output. Full scale (FS) = VPVDD x 0.95.
Note 7: Relative to equivalent full-scale undistorted output. Full scale (FS) = VPVDD.
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Maxim Integrated │ 6
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics
(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)
POUT = 4W
MAX98400 toc02
1
0.1
POUT = 0.5W
THD+N (%)
0.1
THD+N (%)
THD+N (%)
0.1
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
1
MAX98400 toc01
1
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
POUT = 7W
0.01
MAX98400 toc03
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
POUT = 10W
0.01
0.01
POUT = 1W
0.01
0.1
1
10
0.001
100
0.01
0.1
1
FREQUENCY (kHz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
f = 1kHz
0.01
VPVDD = 12V
8I LOAD
f = 100Hz
0
2
4
6
8
10
MAX98400 toc05
0.1
f = 1kHz
12
0
0.01
0
2
4
4
8
12
16
20
24
VPVDD = 12V
4I LOAD
8
10
12
OUTPUT POWER (W)
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0
8
16
80
14
16
32
40
48
EFFICIENCY vs. OUTPUT POWER
70
60
50
40
90
80
70
60
50
40
30
VPVDD = 12V,
8I LOAD,
BOTH CHANNELS DRIVEN
10
18
24
100
MAX98400 toc08
90
VPVDD = 24V
RL = 8I
STOPS BEFORE 10% THD+N
DUE TO THERMAL LIMITING OF
THERMAL FOLDBACK FEATURE
OUTPUT POWER (W)
EFFICIENCY vs. OUTPUT POWER
100
20
6
f = 1kHz
f = 100Hz
30
0.001
0.1
0.001
EFFICIENCY (%)
f = 1kHz
f = 100Hz
f = 6kHz
OUTPUT POWER (W)
MAX98400 toc07
0.1
VPVDD = 18V
8I LOAD
f = 100Hz
EFFICIENCY (%)
THD+N (%)
1
0.01
0.001
f = 6kHz
100
10
f = 6kHz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
1
10
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
OUTPUT POWER (W)
10
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
0.01
0.001
0.1
FREQUENCY (kHz)
THD+N (%)
0.1
0.01
FREQUENCY (kHz)
1
f = 6kHz
THD+N (%)
THD+N (%)
1
0.001
100
10
MAX98400 toc04
10
10
VPVDD = 18V
8I LOAD
MAX98400 toc09
0.001
POUT = 1W
VPVDD = 12V
4I LOAD
MAX98400 toc06
VPVDD = 12V
8I LOAD
0
0
2
4
6
8
10 12 14 16 18 20
TOTAL OUTPUT POWER (W)
20
VPVDD = 18V,
8I LOAD,
BOTH CHANNELS DRIVEN
10
0
0
5
10
15
20
25
30
35
40
TOTAL OUTPUT POWER (W)
Maxim Integrated │ 7
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)
50
40
30
60
50
40
30
20
VPVDD = 24V,
8I LOAD,
BOTH CHANNELS DRIVEN
10
0
0
10
20
30
40
50
VPVDD = 12V,
4I LOAD,
BOTH CHANNELS DRIVEN
10
0
60
0
TOTAL OUTPUT POWER (W)
VPVDD = 12V
35
30
POUT (W)
10% THD+N
10
60
10% THD+N
1% THD+N
5
0
10 20 30 40 50 60 70 80 90 100
10
0
10 20 30 40 50 60 70 80 90 100
LOAD (I)
100mVP-P RIPPLE
0
-10
CROSSTALK vs. FREQUENCY
-30
-40
-50
-60
1% THD+N
20
8I LOAD,
POUT = 1W,
f = 1kHz
0
CROSSTALK (dB)
PSRR (dB)
10% THD+N
20
-20
-40
-60
-80
-70
-100
-80
0
0
20
15
-20
10
25
POWER-SUPPLY REJECTION RATIO
40
28
30
LOAD (I)
50
30
VPVDD = 18V
40
1% THD+N
0
MAX98400 toc16
VPVDD = 24V
24
10
OUTPUT POWER vs. LOAD
70
20
45
10% THD+N
SUPPLY VOLTAGE (V)
80
16
OUTPUT POWER vs. LOAD
20
16
12
50
MAX98400 toc17
14
1% THD+N
35
0
0
12
20
8
5
10
10% THD+N
30
SUPPLY VOLTAGE (V)
25
10
8
40
0
15
1% THD+N
20
50
OUTPUT POWER vs. LOAD
40
30
60
40
POUT (W)
50
30
40
MAX98400 toc13
MAXIMUM OUTPUT POWER (W)
4I LOAD, BOTH CHANNELS ARE DRIVEN
20
70
TOTAL OUTPUT POWER (W)
MAXIMUM OUTPUT POWER vs. SUPPLY VOLTAGE
(WITH THERMAL SHUTDOWN)
60
10
80
10
MAX98400 toc14
20
8I LOAD, BOTH
CHANNELS ARE DRIVEN
90
MAX98400 toc15
60
70
100
MAX98400 toc12
80
EFFICIENCY (%)
70
90
MAX98400 toc18
80
MAX98400 toc11
90
EFFICIENCY (%)
100
MAX98400 toc10
100
POUT (W)
MAXIMUM OUTPUT POWER vs. SUPPLY VOLTAGE
(WITH THERMAL SHUTDOWN)
EFFICIENCY vs. OUTPUT POWER
MAXIMUM OUTPUT POWER (W)
EFFICIENCY vs. OUTPUT POWER
10 20 30 40 50 60 70 80 90 100
LOAD (I)
www.maximintegrated.com
0.01
0.1
1
FREQUENCY (kHz)
10
100
0.01
0.1
1
10
100
FREQUENCY (kHz)
Maxim Integrated │ 8
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)
WIDEBAND OUTPUT SPECTRUM
-40
-60
-80
SHDN
2V/div
-40
-60
-80
OUTPUT
2V/div
-100
-120
15
-120
20
0.1
1
10
100
FREQUENCY (kHz)
FREQUENCY (MHz)
SUPPLY CURRENT
vs. PVDD SUPPLY VOLTAGE
SUPPLY CURRENT
vs. VS SUPPLY VOLTAGE
12
10
8
6
12
SUPPLY CURRENT (mA)
IPVDD
IVS
4
SHUTDOWN CURRENT
vs. PVDD SUPPLY VOLTAGE
14
MAX98400 toc22
14
IPVDD
10
8
4ms/div
IVS
6
4
14
12
8
6
4
12
16
20
24
VS = 5V
0
4.75
28
5.00
0
5.50
5.25
8
12
16
20
24
28
PVDD SUPPLY VOLTAGE (V)
VS SUPPLY VOLTAGE (V)
PVDD SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT
vs. VS SUPPLY VOLTAGE
MAXIMUM OUTPUT POWER
vs. PVDD (NO THERMAL SHUTDOWN)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (MONO)
8
IPVDD_SHDN
6
4
IVS_SHDN
2
50
MAXIMUM POUT (W)
10
8Ω LOAD
5.00
5.25
0.1
30
4Ω LOAD
20
VS SUPPLY VOLTAGE (V)
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0
POUT = 1W
0.01
10
5.50
POUT = 8W
40
THERMAL FOLDBACK ENABLED,
BOTH CHANNELS DRIVEN
VPVDD = 18V
0
MAX98400 toc27
12
1
MAX98400 toc26
60
MAX98400 toc25
14
4.75
IVS_SHDN
2
VPVDD = 18V
VS = 5V
0
8
IPVDD_SHDN
10
2
2
MAX98400 toc24
10
MAX98400 toc23
5
SHUTDOWN CURRENT (µA)
0
SUPPLY CURRENT (mA)
MAX98400 toc20
-20
-100
SHUTDOWN CURRENT (µA)
MAX98400 toc21
RBW = 100Hz
THD+N (%)
OUTPUT AMPLITUDE (dBV)
-20
SHDN ON/OFF RESPONSE
0
OUTPUT AMPLITUDE (dBV)
8I LOAD
MAX98400 toc19
INBAND OUTPUT SPECTRUM
0
8
12
16
20
24
PVDD SUPPLY VOLTAGE (V)
28
VPVDD = 12V
4I LOAD
0.001
0.01
0.1
1
10
100
FREQUENCY (kHz)
Maxim Integrated │ 9
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)
f = 1kHz
0.01
0.1
f = 1kHz
0.01
VPVDD = 12V,
4I LOAD
0
4
8
12
16
20
0
8
16
OUTPUT POWER (W)
EFFICIENCY vs. OUTPUT POWER (MONO)
60
50
40
0.001
48
0
70
60
50
40
20
20
VPVDD = 12V,
4I LOAD
15
0
0
80
70
80
80
70
60
50
40
5
10
15
20
25
30
35
VPVDD = 24V,
4I LOAD
10
0
40
0
OUTPUT POWER vs. LOAD (MONO)
25
VPVDD = 12V
20
5
10
15
20
25
30
35
40
TOTAL OUTPUT POWER (W)
OUTPUT POWER vs. LOAD (MONO)
50
VPVDD = 18V
45
40
10% THD+N
35
1% THD+N
15
POUT (W)
POUT (W)
60
40
60
90
TOTAL OUTPUT POWER (W)
MAX98400 toc34
90
50
20
MAXIMUM OUTPUT POWER
vs. PVDD (WITH THERMAL SHUTDOWN, MONO)
100
40
EFFICIENCY vs. OUTPUT POWER (MONO)
VPVDD = 18V,
4I LOAD
10
20
30
30
TOTAL OUTPUT POWER (W)
50
20
100
MAX98400 toc32
80
30
70
10
OUTPUT POWER (W)
90
30
10
40
EFFICIENCY (%)
70
5
32
VPVDD = 24V,
4I LOAD
f = 100Hz
EFFICIENCY vs. OUTPUT POWER (MONO)
EFFICIENCY (%)
EFFICIENCY (%)
80
0
24
100
MAX98400 toc31
90
0
f = 1kHz
OUTPUT POWER (W)
100
10
VPVDD = 18V,
4I LOAD
f = 100Hz
0.001
24
0.1
MAX98400 toc33
0.001
f = 6kHz
0.01
MAX98400 toc35
f = 100Hz
MAXIMUM POUT (W)
1
f = 6kHz
THD+N (%)
THD+N (%)
0.1
MAX98400 toc30
1
f = 6kHz
10
MAX98400 toc29
1
THD+N (%)
10
MAX98400 toc28
10
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO)
MAX98400 toc36
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO)
10
30
30
25
20
15
20
10% THD+N
5
10
8
12
16
20
24
PVDD SUPPLY VOLTAGE (V)
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5
1% THD+N
4I LOAD, THERMAL FOLD DISABLED
0
28
0
0
10% THD+N
10
10 20 30 40 50 60 70 80 90 100
LOAD (I)
1% THD+N
0
0
10 20 30 40 50 60 70 80 90 100
LOAD (I)
Maxim Integrated │ 10
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. PVDD SUPPLY VOLTAGE (MONO)
OUTPUT POWER vs. LOAD (MONO)
12
SUPPLY CURRENT (mA)
POUT (W)
60
50
40
30
20
10% THD+N
IPVDD
10
8
6
IVS
4
2
10
1% THD+N
VS = 5V
0
0
10 20 30 40 50 60 70 80 90 100
0
8
LOAD (I)
16
20
24
28
MAXIMUM OUTPUT POWER
vs. PVDD (NO THERMAL SHUTDOWN, MONO)
IPVDD
8
6
50
MAXIMUM POUT (W)
10
IVS
4
MAX98400 toc40
12
60
MAX98400 toc39
14
SUPPLY CURRENT (mA)
12
PVDD SUPPLY VOLTAGE (V)
SUPPLY CURRENT
vs. VS SUPPLY VOLTAGE (MONO)
40
30
20
10
2
4Ω LOAD, THERMAL FOLDBACK ENABLED
VPVDD = 18V
0
5.00
4.75
5.25
5.50
0
8
12
16
20
24
VS SUPPLY VOLTAGE (V)
PVDD SUPPLY VOLTAGE (V)
LIMITER TRANSFER CHARACTERISTIC
LIMITER RELEASE TIME
RL = 8I + 68µH
LIM_TH = GND
22
20
VPVDD = 24V
18
16
28
MAX98400 toc42
MAX98400 toc41
24
OUTPUT VOLTAGE (V)
MAX98400 toc38
VPVDD = 24V
70
14
MAX98400 toc37
80
LIM_TH = GND
INPUT
2V/div
VPVDD = 18V
14
12
10
8
6
4
2
0
OUTPUT
4V/div
VPVDD = 8V
tRELEASE
0
0.5
1.0
1.5
2.0
2.5
3.0
200ms/div
INPUT VOLTAGE (V)
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Maxim Integrated │ 11
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
17
INR+
30
16
INR-
PVDD
31
15
GND
PVDD
32
14
MAX98400A
PVDD
33
13
GND
MONO
PGND
34
12
INL-
PGND
35
11
INL+
N.C.
36
10
LIM_TH
EP
1
2
3
4
5
6
7
8
9
OUTL-
OUTL-
N.C.
OUTL+
OUTL+
VS
N.C.
G1
G2
+
SHDN
RELEASE
TEMPLOCK
16
15
14
13
PGND 19
12 INR+
PGND 20
11 INR-
PVDD 21
10 GND
MAX98400B
PVDD 22
PGND 23
PGND 24
EP
+
1
2
3
4
5
6
G2
29
17
VS
PGND
PGND
18
G1
N.C.
OUTR+
18
OUTL+
28
OUTL-
N.C.
OUTR-
27 26 25 24 23 22 21 20 19
OUTR-
TOP VIEW
OUTL-
TEMPLOCK
RELEASE
SHDN
N.C.
OUTR+
OUTR+
N.C.
OUTR-
TOP VIEW
OUTR-
Pin Configurations
9
INL-
8
INL+
7
LIM_TH
TQFN
TQFN
Pin Descriptions
PIN
NAME
FUNCTION
MAX98400A
MAX98400B
1, 2
1, 2
OUTL-
3, 7, 18, 22,
25, 28, 36
—
N.C.
4, 5
3
OUTL+
6
4
VS
5V Regulator Supply. Bypass VS to GND with a 1μF capacitor. Connect to a +5V
source for dual-supply operation.
8
9
5
6
G1
G2
Three-State Input for Gain Selection 1. See the Detailed Description section.
Three-State Input for Gain Selection 2. See the Detailed Description section.
10
7
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LIM_TH
Negative Left Speaker Output
No Connection
Positive Left Speaker Output
See the Limiter Threshold Control (LIM_TH) section for details.
Connect to:
1) VS to disable limiter.
2) GND to have no clipping.
3) RLIM1 resistor to GND to have a PVDD tracking threshold.
4) RLIM1 and RLIM2 resistor-divider to have an absolute threshold.
Maxim Integrated │ 12
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Pin Descriptions (continued)
PIN
NAME
FUNCTION
MAX98400A
MAX98400B
11
8
INL+
Left-Channel Positive Analog Input
12
9
INL-
Left-Channel Negative Analog Input
13
—
MONO
14, 15
10
GND
Analog Ground
Mono Operation. Connect MONO to GND for stereo operation. Connect MONO
to VS for mono operation.
16
11
INR-
Right-Channel Negative Analog Input
17
12
INR+
Right-Channel Positive Analog Input
See the Thermal Foldback section for details.
Connect to:
1) GND to disable thermal foldback.
2) Leave open to enable thermal foldback.
19
13
TEMPLOCK
20
14
RELEASE
21
15
SHDN
Active-Low Shutdown Input
Low = shutdown
High = enable
23, 24
16
OUTR+
Positive Right Speaker Output
26, 27
17, 18
OUTR-
Negative Right Speaker Output
29, 30, 34, 35
19, 20,
23, 24
PGND
Power Ground
31, 32, 33
—
21, 22
—
PVDD
EP
Power Supply. Bypass PVDD to PGND with 1μF and 200μF capacitors.
Exposed Pad. Connect to PGND for optimum thermal performance.
www.maximintegrated.com
Sets the Limiter Time Constant. Connect to GND through 1μF.
Maxim Integrated │ 13
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Stereo Configuration for MAX98400A
8V TO 28V
C1
1.0µF
C2
1.0µF
VS
PVDD
6
MONO
CIN
1.0µF
LEFT
INPUT
CIN
1.0µF
CBULK
200µF
31, 32, 33
MAX98400A
13
REGULATOR
INL+ 11
INL- 12
4, 5 OUTL+
CLIPPING
LIMITER
PGA
1, 2 OUTL-
TEMPLOCK 19
CIN
1.0µF
RIGHT
INPUT
CIN
1.0µF
POWER
STAGE
THERMAL
FOLDBACK
23, 24 OUTR+
INR+ 17
INR- 16
CLIPPING
LIMITER
LIMITER
CONTROL
10
LIM_TH
WITH THERMAL
AND
OVERCURRENT
PROTECTION
PGA
20
RELEASE
GAIN
SELECTION
BIAS AND
OSCILLATOR
8
9
21
G1
G2
SHDN
14, 15
GND
26, 27 OUTR-
29, 30,
34, 35
PGND
CREL
1.0µF
ENABLE
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Maxim Integrated │ 14
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Mono Configuration for MAX98400A
8V TO 28V
C2
1.0µF
CBULK
200µF
C1
1.0µF
PVDD
VS
MONO
CIN
1µF
REGULATOR
INL- 12
CIN
1µF
MAX98400A
13
INL+ 11
LEFT
INPUT
CIN
1µF
31, 32, 33
6
VS
TEMPLOCK
RIGHT
INPUT
4, 5 OUTL+
CLIPPING
LIMITER
PGA
19
1, 2 OUTL-
POWER
STAGE
THERMAL
FOLDBACK
23, 24 OUTR+
INR+ 17
INR- 16
CLIPPING
LIMITER
WITH THERMAL
AND
OVERCURRENT
PROTECTION
PGA
26, 27 OUTR-
CIN
1µF
LIMITER
CONTROL
10
LIM_TH
GAIN
SELECTION
20
RELEASE
8
9
G1
G2
CREL
1.0µF
Detailed Description
The MAX98400A/MAX98400B Class D amplifiers provide
high-performance, thermally efficient amplifier solutions.
The MAX98400A delivers 2x20W into 8Ω loads or 1x40W
into a 4Ω load. The MAX98400B delivers 2x12W into 8Ω
loads.
An integrated limiting circuit prevents output clipping
distortion and protects small speakers from transient voltages.
A thermal-foldback feature can be enabled to automatically reduce the output power if the supply voltage, input
signal, and/or ambient temperature are too high to operate within a junction temperature of +130°C. Traditional
www.maximintegrated.com
BIAS AND
OSCILLATOR
21
14, 15
SHDN
GND
29, 30,
34, 35
PGND
ENABLE
thermal protection is also available in addition to robust
overcurrent protection.
Both devices operate from an 8V to 28V supply and
provide a high 67dB PSRR, eliminating the need for a
regulated power supply. They offers up to 90% efficiency
from a 12V supply.
Filterless modulation allows the ICs to pass EN55022B
EMI limits with 1m cables using only a low-cost ferrite bead and small-value capacitor on each output
(Figure 1).
Comprehensive click-and-pop reduction circuitry minimizes noise coming into and out of shutdown.
Maxim Integrated │ 15
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
The MAX98400A/MAX98400B are available in 36-pin and
24-pin TQFN packages, respectively, and are specified
over the -40°C to +85°C temperature range.
Click-and-Pop Suppression
Efficiency
The high efficiency of a Class D amplifier is due to the
switching operation of the output stage transistors. In a
Class D amplifier, the output transistors act as switches
and consume negligible power. Power loss associated
with the Class D output stage is due to the I2R loss of the
MOSFET on-resistance, various switching losses, and
quiescent current overhead.
The ICs feature comprehensive click-and-pop suppression that minimizes audible transients on startup and
shutdown. While in shutdown, the H-bridge is in a highimpedance state.
Mono Configuration
The theoretical best efficiency of a linear amplifier is 78%
at peak output power. Under typical music reproduction
levels, the efficiency falls below 30%, whereas these
ICs exhibit > 85% efficiency under the same conditions
(Figure 2).
The MAX98400A features a mono mode that allows the
right and left channels to operate in parallel, achieving up
to 40W of output power. Apply a logic-high (VS) to MONO
to enable mono mode. In mono mode, an audio signal
applied to the left channel (INL) is routed to the H-bridges
of both channels. Connect OUTL+ to OUTR+ and OUTLto OUTR- using heavy PCB traces as close as possible
to the device. Driving MONO low (stereo mode) while the
outputs are wired together in mono mode can trigger the
short-circuit or thermal-overload protection, or both.
Shutdown
Clipping Limiter
The ICs feature a shutdown mode that reduces power
consumption and extends battery life in portable applications. The shutdown mode reduces supply current to 8μA
(typ). Drive SHDN high for normal operation. Drive SHDN
low to place the device in low-power shutdown mode. In
shutdown mode, the outputs are high impedance and the
common-mode voltage at the output decays to zero. The
shutdown mode serves as a mute function.
The ICs feature a programmable clipping limiter to prevent output clipping distortion and excessive power dissipation and to protect small speakers. All limiter functionality is controlled by two pins: LIM_TH and RELEASE. The
voltage applied at the LIM_TH pin controls the threshold
when the limiter acts, and the capacitor at the RELEASE
pin controls the release time of the limiter. The limiter
controls both left and right channels together.
EFFICIENCY vs. OUTPUT POWER
40
100
90
MAX98400A
80
EFFICIENCY (%)
AMPLITUDE (dBµV/m)
30
20
10
70
60
50
40
CLASS AB
30
0
20
10
-10
30
100
FREQUENCY (MHz)
Figure 1. MAX98400B EMI Performance
www.maximintegrated.com
1000
0
0
5
10
15
20
TOTAL OUTPUT POWER (W)
Figure 2. MAX98400A Efficiency vs. Class AB Efficiency
Maxim Integrated │ 16
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Limiter Threshold Control (LIM_TH)
For a 5V supply, a resistor-divider of RLIM1 = 165kΩ/
RLIM2 = 270kΩ gives both an unloaded voltage of 1.82V
and the desired output resistance of approximately
100kΩ.
There are three modes for the limiter, defined by VLIM_TH,
the voltage applied to the LIM_TH pin (Table 1).
In Mode1, the limiter is disabled. The output clips when
output peak voltage reaches the voltage on PVDD, VPVDD.
In Mode2, the limiter threshold (VTHRESH) tracks supply
voltage, VPVDD. The peak output voltage is limited to
approximately VTHRESH = VPVDD x 0.95.
In Mode3, the limiter threshold, VTHRESH, is programmable. VLIM_TH can be set to a voltage proportional to the
desired output threshold. The limiter threshold can be set
down to 0.5 x VPVDD and up to 1.6 x VPVDD. VTHRESH
cannot exceed 22V.
If only distortion limiting is desired, set VTHRESH to be
20% higher than VPVDD. This limits the output clipping
levels to approximately 10% THD.
The attack time for the limiter is fixed, typically < 200μs.
Release Time Control (RELEASE)
The release time for the limiter is set by an external
capacitor at RELEASE (CREL) to GND. Choose CREL =
Release Time [s] x 1μF. The CREL limit is 2.2μF.
Threshold settings below VPVDD can be used to protect
speakers; the peak output voltage is limited to a value of
VTHRESH = VLIM_TH x 6.4.
MAX98400A
MAX98400B
Threshold settings above VPVDD can be used to limit the
output distortion; the peak output voltage is limited to a
value of VTHRESH = VLIM_TH x 6.4 x 0.95. The 0.95 factor
takes into account the voltage drop across the power FET
that occurs when the amplifier is clipped. Choose RLIM1
and RLIM2 (Figure 3) to set the desired voltage at the
LIM_TH pin. For best accuracy, the parallel combination
RLIM1||RLIM2 should be approximately 100kΩ.
PVDD
PVDD
VS
RLIM2
If the speaker in the application can handle only 12V peak,
but VPVDD is higher, the threshold voltage (VTHRESH)
should be set to 12V:
C2
1.0µF
LIMITER
CONTROL
LIM_TH
RLIM1
VTHRESH = 12V
VLIM_TH = VTHRESH/6.4 = 12V/6.4 = 1.88V
18V
C1
1.0µF
VS
REGULATOR
Example:
The voltage that needs to be applied to VLIM_TH is then
defined as:
PVDD
RELEASE
CREL
1.0µF
Figure 3. Limiter Control, Mode3 Configuration (Table 1)
Table 1. Limiter Control Modes
MODE
NAME
FUNCTION
LIM_TH VOLTAGE
RANGE
Mode1
Disable
The limiter is disabled when connecting LIM_TH to VS or a voltage greater
than 3.9V.
3.9V < VLIM_TH ≤ VS
Mode2
PVDD tracking
The output peak voltage is limited to just below the supply voltage, VPVDD.
VTHRESH = VPVDD x 0.95 when LIM_TH is connected to ground or a
voltage below 0.3V.
VGND ≤ VLIM_TH <
0.15V
The output peak voltage, VTHRESH, is limited to the threshold set by the
voltage applied on the LIM_TH so that VTHRESH = VLIM_TH x 6.4.
Mode3 Programmable
When VTHRESH is set 20% higher than VPVDD, the output THD distortion
is limited to 10%.
Note: VTHRESH is the output peak limiting voltage (limiter threshold voltage).
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0.6V ≤ VLIM_TH ≤ 3.8V
Maxim Integrated │ 17
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Preamplifier Gain Setting
sequence. The shutdown and recovering sequence is
repeated until the output fault is removed.
The ICs offer eight pin-selectable gain settings, selectable
through the G1 and G2 pins.
Applications Information
Protection
Filterless Class D Operation
The ICs feature overcurrent protection and two types of
thermal protection: thermal foldback and overtemperature
protection.
Traditional Class D amplifiers require an output filter to
recover the audio signal from the amplifier’s output. The
filters add cost, increase the solution size of the amplifier,
and can decrease efficiency and THD+N performance.
The traditional PWM scheme uses large differential output
swings (2 x VDD peak-to-peak) and causes large ripple
currents. Any parasitic resistance in the filter components
results in a loss of power, lowering the efficiency.
Thermal Foldback
The ICs feature thermal foldback that helps prevent
unwanted thermal-shutdown events. If activated, thermal
foldback attenuates the stereo output signal once the
internal junction temperature exceeds +130°C. Attenuation
is applied proportionally as the junction temperature (TJ)
exceeds the fixed +130°C threshold. The thermal-foldback
mode is controlled by the TEMPLOCK pin.
These ICs do not require an output filter. The devices rely
on the inherent inductance of the speaker coil and the
natural filtering of both the speaker and the human ear to
recover the audio component of the square-wave output.
Eliminating the output filter results in a smaller, lower cost
solution.
Overtemperature Protection
The ICs feature an overtemperature protection that disables the amplifier if the junction temperature exceeds
+165°C. Once the amplifier is disabled and the die temperature has cooled by 20°C, the devices enable again
and resume normal operation.
Because the frequency of the ICs’ output is well beyond
the bandwidth of most speakers, voice coil movement due
to the square-wave frequency is very small. For optimum
results, use a speaker with a series inductance > 10μH.
Typical 8Ω speakers exhibit series inductances in the
20μH to 100μH range.
Overcurrent Protection
When the output current reaches the current limit, 5A
(typ), the ICs disable the outputs and initiate a recovering
Table 2. Gain Selection
GAIN SETTING
(dB)
G1
G2
GND
GND
9
Unconnected
GND
13
VS
GND
16.7
GND
Unconnected
20.1
Unconnected
Unconnected
23.3
VS
Unconnected
26.4
GND
VS
29.8
Unconnected
VS
32.9
VS
VS
Reserved
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Maxim Integrated │ 18
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Inductor-Based Output Filters
Internal Regulator VS
Some applications use the ICs with a full inductor-/capacitor-based (L/C) output filter. See Figure 4 for the correct
connections of these components.
The load impedance of the speaker determines the filter
component selection (Table 3).
Inductors L1 and L2 and capacitor C1 form the primary
output filter. Capacitors C2 and C3 provide commonmode filtering to reduce radiated emissions. Capacitors
C4 and C5, plus resistors R1 and R2, form a Zobel at the
output. A Zobel corrects the output loading to compensate for the rising impedance of the loudspeaker. Without
a Zobel, the filter exhibits a peak response near the cutoff
frequency.
Component Selection
Input Capacitor
The input AC-coupling capacitors allow the amplifier to
automatically bias the signal to an optimum DC level. 1μF
is recommended for the input capacitor.
Power Supplies
The ICs are designed to be operated from a singlesupply voltage, VPVDD, which can range from 8V to 28V.
Inside the ICs, this VPVDD supplies power for the output
FETs and other high-power circuitry, while the low-power
circuitry operates from VS, an internally generated 5V
supply (4.6V typ). VS is internally generated from a linear regulator that is powered from VPVDD. Bypass both
PVDD and VS pins to ground with a 1μF capacitor.
C2
C4
R1
C1
L2
C3
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum
performance. Use wide traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Proper grounding improves
audio performance, minimizes crosstalk between channels, and prevents switching noise from coupling into the
audio signal. Connect PGND and GND together at a single point on the PCB. Route all traces that carry switching
transients away from GND and the traces/components in
the audio signal path.
Bypass each PVDD pin with a 0.1μF capacitor to PGND.
Place the bypass capacitors as close as possible to the
ICs. Place a 220μF capacitor between PVDD and PGND.
Bypass both PVDD and VS pins with a 1μF capacitor to
GND.
Use wide, low-resistance output traces. Current drawn
from the outputs increases as load impedance decreases. High-output trace resistance decreases the power
delivered to the load. The TQFN package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a heat
conduction path from the die to the PCB. Connect the
exposed thermal pad to PGND by using a large pad and
multiple vias to the PGND plane.
For best optimum thermal performance, use 2oz copper
and allow lots of PCB area around the device.
L1
MAX98400A/B
For highest efficiency operation and best thermal performance, especially at higher VPVDD levels, the VS can be
supplied from an external 5V supply. To do this, connect
a 5V source to the VS pin (4.75V to 5.5V). When a 5V
supply is connected to the VS pin, the internal regulator
is automatically disabled and the power dissipation of the
ICs is reduced.
Chip Information
C5
PROCESS: CMOS
R2
Figure 4. Output Filter for PWM Mode
Table 3. Filter Component Selection
RL (Ω)
L1, L2 (µH)
C1 (µF)
C2, C3 (µF)
C4, C5 (µF)
R1, R2 (Ω)
4
10
0.47
0.10
0.22
10
8
15
0.15
0.15
0.15
15
16
33
0.10
0.10
0.10
33
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Maxim Integrated │ 19
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Functional Diagrams
PVDD
VS
31, 32, 33
6
MONO
13
MAX98400A
REGULATOR
INL+ 11
INL- 12
4, 5 OUTL+
CLIPPING
LIMITER
PGA
1, 2 OUTL-
TEMPLOCK 19
POWER
STAGE
THERMAL
FOLDBACK
23, 24 OUTR+
INR+ 17
INR- 16
CLIPPING
LIMITER
LIMITER
CONTROL
10
LIM_TH
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WITH THERMAL
AND
OVERCURRENT
PROTECTION
PGA
GAIN
SELECTION
20
RELEASE
8
9
G1
G2
26, 27 OUTR-
BIAS AND
OSCILLATOR
21
SHDN
14, 15
GND
29, 30,
34, 35
PGND
Maxim Integrated │ 20
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Functional Diagrams (continued)
VS
PVDD
4
21, 22
REGULATOR
MAX98400B
INL+ 8
INL- 9
3 OUTL+
CLIPPING
LIMITER
PGA
1, 2 OUTL-
TEMPLOCK 13
POWER
STAGE
THERMAL
FOLDBACK
16 OUTR+
INR+ 12
INR- 11
CLIPPING
LIMITER
LIMITER
CONTROL
7
LIM_TH
WITH THERMAL
AND
OVERCURRENT
PROTECTION
PGA
GAIN
SELECTION
14
RELEASE
5
6
G1
G2
17, 18 OUTR-
BIAS AND
OSCILLATOR
15
SHDN
10
GND
19, 20,
23, 24
PGND
Ordering Information
PART
PIN-PACKAGE
SPEC
MAX98400AETX+
36 TQFN-EP*
2x20W
MAX98400BETG+
24 TQFN-EP*
2x12W
Note: Devices operate over the -40°C to +85°C temperature
range.
*EP = Exposed pad.
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Maxim Integrated │ 21
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Package Information
For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
36 TQFN-EP
T3666+3
21-0141
90-0050
24 TQFN-EP
T2444+4
21-0139
90-0022
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Maxim Integrated │ 22
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.
www.maximintegrated.com
Maxim Integrated │ 23
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
JEROLD LEE
9/25/13
For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.
www.maximintegrated.com
Maxim Integrated │ 24
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.
www.maximintegrated.com
Maxim Integrated │ 25
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.
www.maximintegrated.com
Maxim Integrated │ 26
MAX98400A/MAX98400B
Stereo, High-Power, Class D Amplifiers
Revision History
REVISION
NUMBER
REVISION
DATE
0
6/10
Initial release
—
1
4/15
Corrected Land Pattern numbers
22
2
8/20
Updated Package Information table
22
3
10/20
Corrected TOCs 26 and 40
DESCRIPTION
PAGES
CHANGED
9, 11
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2020 Maxim Integrated Products, Inc. │ 27
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