74LVC1G00SE

74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description The 74LVC1G00 is a single 2-input positive NAND gate with a standard totem pole output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry Pin Assignments (Top View) A B 1 2 4 5 Vcc GND 3 Y N EW PRODUCT disables the output preventing damaging current backflow when the device is powered down. The gate performs the positive Boolean function: SOT25 / SOT353 (Top View) A B GND 1 2 3 6 5 4 Y = A •B Features • • • • • • or Y = A+B Vcc NC Y Wide Supply Voltage Range from 1.65 to 5.5V ± 24mA Output Drive at 3.3V CMOS low power consumption IOFF Supports Partial-Power-Down Mode Operation Inputs accept up to 5.5V ESD Protection Tested per JESD 22 Exceeds 200-V Machine Model (A115-A) Exceeds 2000-V Human Body Model (A114-A) • • • • Voltage Level Shifting General Purpose Logic Power Down Signal Isolation Wide array of products such as. o PCs, networking, notebooks, netbooks, PDAs o Computer peripherals, hard drives, CD/DVD ROM o TV, DVD, DVR, set top box o Cell Phones, Personal Navigation / GPS o MP3 players ,Cameras, Video Recorders DFN1410 (Note 2) Applications • • • • • Latch-Up Exceeds 100mA per JESD 78, Class II Range of Package Options Direct Interface with TTL Levels SOT25, SOT353, and DFN1410: Assembled with “Green” Molding Compound (no Br, Sb) Lead Free Finish/ RoHS Compliant (Note 1) Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at http://www.diodes.com/products/lead_free.html. 2. Pin 2 and pin 5 of the DFN1410 package are internally connected. 74LVC1G00 Document number: DS32196 Rev. 2 - 2 1 of 14 www.diodes.com December 2010 © Diodes Incorporated 74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Pin Descriptions Pin Name A B GND Y Vcc Data Input Data Input Ground Data Output Supply Voltage No Connection Description N EW PRODUCT NC Logic Diagram 1 2 A B 4 Y Function Table Inputs A H L X B H X L Output Y L H H 74LVC1G00 Document number: DS32196 Rev. 2 - 2 2 of 14 www.diodes.com December 2010 © Diodes Incorporated 74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Absolute Maximum Ratings (Note 3) Symbol ESD HBM ESD MM VCC VI Description Human Body Model ESD Protection Machine Model ESD Protection Supply Voltage Range Input Voltage Range Voltage applied to output in high impedance or IOFF state Voltage applied to output in high or low state Input Clamp Current VI