AP139
300mA LOW-NOISE CMOS LDO
Features
• • • • • • • • • • • • Very Low Dropout Voltage Low Current Consumption: Typ. 45µA, max. 60mA Output Voltage: 1.5V, 1.8V, 2.0V, 2.5V, 2.8V, 3.0V 3.3V, and 3.5V Guaranteed 300mA Output Input Range from 2.7 up to 5.5V Thermal Shutdown Current Limiting Stability with Low ESR Capacitors Low Temperature Coefficient Lead-free Package: SOT25 SOT25: Available in “Green” Molding Compound (No Br, Sb) Lead Free Finish/RoHS Compliant (Note 1)
General Description
The AP139 is a positive voltage linear regulator utilizing CMOS technology. The features that include low quiescent current (45µA typ.), low dropout voltage, and high output voltage accuracy, make it ideal for battery applications. EN input connected to the device will produce a low bias current. The space-saving SOT25 package is attractive for “pocket” and “hand held” applications. This rugged device has both thermal shutdown, and current limit protections to prevent device failure under the “worst” operating conditions. In a low noise, regulated supply application, a 10nF capacitor is necessary to be placed in between Bypass and Ground. The AP139 is stable with a low ESR output capacitor of 1.0µF or greater.
Applications
• • • • Personal Communication Devices Home Electric/Electronic Appliances PC Peripherals Battery-Powered Devices
Ordering Information
AP139 XX X X X Package
W : SOT25
Output voltage
15: 1.5V 18: 1.8V 20: 2.0V 25: 2.5V 28: 2.8V 30: 3.0V 33: 3.3V 35: 3.5V
Note:
Lead free
L : Lead Free G : Green
Packing
- 7 : Taping
1. RoHS revision 13.2.2003. Glass and High Temperature Solder Exemptions Applied, see EU Directive Annex Notes 5 and 7.
Device
AP139-XXW
Note:
Package Code
W
Packaging
SOT25
7” Tape and Reel Quantity Part Number Suffix
3000/Tape & Reel -7
2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be on our website at http://www.diodes.com/datasheets/ap02001.pdf.
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AP139
300mA LOW-NOISE CMOS LDO
Pin Assignments
( T o p V ie w )
Pin Descriptions
V
OUT
BYP
4
5
AP139
1
2
3
Pin Name VIN GND EN BYP VOUT
Pin No. 1 2 3 4 5
Function Power Supply Ground Enable Pin Bypass Signal Pin Output
V
IN
GND EN SO T25
Block Diagram
VIN
VOUT
Current Limit 1uA
Thermal Shutdown
R1
EN BYP
AMP
+
Vref R2 GND
Absolute Maximum Ratings
Symbol VIN IOUT VOUT Top TMJ PD Parameter Input Voltage Output Current Output Voltage ESD Classification Operating Junction Temperature Range Maximum Junction Temperature Internal Power Dissipation Rating +6 PD/ (VIN-VO) GND - 0.3 to VIN+ 0.3 B -40 to +125 150 250 Unit V mA V ºC ºC mW
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AP139
300mA LOW-NOISE CMOS LDO
Electrical Characteristics
(TA = +25ºC, unless otherwise noted)
Symbol Parameter VIN Input Voltage IQ Quiescent Current ISTB Standby Current VOUT VOUT Temperature Coefficient VDROPOUT Dropout Voltage IOUT ILIMIT Output Current Current Limit
Test Conditions IO = 0mA VIN = 5.0V, VOUT = 0V, VEN < VEL
Min. Note 4 -2 -
Typ. 45 2.0 50 450 150 0.1 0.3 60 50 40 75 55 30 130 20 226 34
Max. 5.5 60 3.0 2 0.45 300 0.3 1 0.8 1.05V
VO ≥2.8V
300 300 1.7 -
Ishort Short Circuit Current △VLINE Line Regulation △VLOAD Load Regulation PSRR PSRR VEH VEL IEN OTS OTH θJA θJC
Note:
Vcc = 5V, Vout < 1.05V IOUT=1mA, VIN =( VOUT +1V ) to 5.5V IO = 1mA to 300mA, VIN = 5V f = 1KHz I = 100mA, Power Supply Rejection O f = 10KHz CO = 2.2µF ceramic f = 100KHz f = 1KHz IO = 100mA, Power Supply Rejection CO = 2.2µF ceramic, f = 10KHz CBYP = 20nF f = 100KHz Output ON EN Input Threshold Output OFF
Enable Pin Current Over Temperature Shutdown Over Temperature Hysteresis Thermal Resistance Thermal Resistance
C C
o
SOT25 (Note 4) SOT25 (Note 4)
ºC/W ºC/W
3. VIN(MIN) = VOUT + VDROPOUT. 4. Test conditions for SOT25: Devices mounted on FR-4 PC board, MRP, 1 oz. copper, single sided, calibrate at TJ=85 ºC, measure at TA=25 ºC, no heat Sink, no air flow.
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AP139
300mA LOW-NOISE CMOS LDO
Typical Application
IN VIN AP139 BYP C1 1uF C2 10nF GND EN C3 1uF VOUT OUT
Typical Performance Characteristics
100 90
V c c V s Q u ie s c e n t C u r r e n t
1.6 1.4
V out vs. Dropout Voltage
Quiescent Current (μ A)
80 70 60 50 40 30 20 10 0 3 .5 4 4 .5 5 T A = 2 5℃
0.2 0 Io = 100mA 1.5 1.8 2 2.5 V out (V) 2.8 3 3.3 3.5
Dropout Voltage (V)
1.2 1 0.8 0.6 0.4 Io = 300mA Io = 200mA
5 .5
6
V c c (V )
0 -10 -20 -30
Power Supply Rejection Ratio
Iout = 100mA
0 -10 -20 -30
Power Supply Rejection Ratio
BP = 10nF
100mA
PSRR (dB)
PSRR (dB)
-40 -50 BP = 1nF -60 -70 -80 -90 1.0E+00 BP = 20nF 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 BP = 5nF
-40 -50 -60 1mA -70 -80 - 90 1.0E+00 1.0E+06 10mA
BP = 10nF
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05
Frequency (Hz)
Frequency (Hz)
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AP139
300mA LOW-NOISE CMOS LDO
Typical Performance Characteristics
Power Supply Rejection Ratio
0 BP=0 -10 -20 -30 100mA
(Continued)
Vout Vs Current Limit
0.7 0.6 0.5
Current Limit (A)
PSRR (dB)
-40 -50 -60
10mA
0.4 0.3 0.2 0.1 Vcc=5V 0
1mA -70 -80 -90 1.0E+00
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
1.5
1.8
2
2.5
2.8
3
3.3
3.5
Frequency (Hz)
Vout (V)
V c c V s S h o rt C u rre n t
400 350 300
Short Current (mA)
250 200 150 100 50 0 3 .5 T o p to b o tto m V o u t= 1 .5 V V o u t= 1 .8 V V o u t= 2 .5 V V o u t= 3 .3 V
4
4 .5
5
5 .5
6
V c c (V )
Function Description
The AP139 of CMOS regulators contain a PMOS pass transistor, voltage reference, error amplifier, over-current protection, thermal shutdown. The P-channel pass transistor receives data from the error amplifier, over-current protection, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. The over-current and thermal shutdown circuits become active when the junction temperature o exceeds 130 C, or the current exceeds 300mA. During thermal shutdown, the output voltage remains low. Normal operation is o restored when the junction temperature drops below 110 C. The AP139 switches from voltage mode to current mode when the load exceeds the rated output current. This prevents over-stress. Enable The enable pin normally floats high. When actively, pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the quiescent current is less than 2µA. This pin behaves much like an electronic switch. External Capacitor The AP139 is stable with a low ESR output capacitor to ground of 1.0µF or greater. It can keep stable even with higher ESR capacitors. A second capacitor is recommended between the input and ground to stabilize VIN. The input capacitor should be larger than 0.1µF to have a beneficial effect. All capacitors should be placed in close proximity to the pins. A “quiet” ground termination is desirable.
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AP139
300mA LOW-NOISE CMOS LDO
Marking Information
(Top View)
5
4
XX Y M X 1 2
SOT 25
XX : Identification Code Y : Year: 0-9 M : Month A~L X : L : Lead Free G : Green
3
Identification Code N0 N1 N2 N3 N4 N5 N6 N7
Output Version AP139-1.5V AP139-1.8V AP139-2.0V AP139-2.5V AP139-2.8V AP139-3.0V AP139-3.3V AP139-3.5V
Package Information
Package Type: SOT25
7
( unit: mm )
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AP139
300mA LOW-NOISE CMOS LDO
IMPORTANT NOTICE Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither does it convey any license under its patent rights, nor the rights of others. The user of products in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on our website, harmless against all damages. LIFE SUPPORT Diodes Incorporated products are not authorized for use as critical components in life support devices or systems without the expressed written approval of the President of Diodes Incorporated.
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