AP7217A

AP7217A 3.3V 600mA CMOS LDO Features • • • • • • • • • • • Very Low Dropout Voltage Low Current Consumption: Typ. 50µA Output Voltage: 3.3V Guaranteed 600mA (min) Output Input Range up to 5.5V Current Limiting Stability with Low ESR Capacitors Thermal shutdown Protection Low Temperature Coefficient SOP-8L and SOP-8L-EP: Available in “Green” Molding Compound (No Br, Sb) Lead Free Finish/ RoHS Compliant (Note 1) General Description The AP7217A low-dropout linear regulator operates from a 3.3V to 5.5V supply and delivers a guaranteed 600mA (min) continuous load current. The high-accuracy output voltage is preset to an internally trimmed voltage. An active-low open-drain reset output remains asserted for at least 200ms (TYP) after output voltage reaches regulation. The space-saving SOP-8L and SOP-8L-EP packages are suitable for “pocket” and hand-held application. Applications • • • • • HD/ Blue Ray DVD & MP3/4 Players CD and MP3 Players Cellular and PCS Phones Digital Still Camera Hand-Held Computers Typical Application Circuit U1 VIN 100K CIN 1uF VDOUT 4 VIN VOUT 2 VROUT ON AP7217A 6 VDOUT GND 7 EN 8 OFF COUT 1uF AP7217A Rev. 3 DS31423 1 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Ordering Information AP 7217A - 33 XX G - 13 Output voltage 33 : 3.3V Package S : SOP-8L SP : SOP-8L-EP Packaging (Note 2) SOP-8L SOP-8L-EP Green G : Green Packing 13 : Tape & Reel Device AP7217A-33SG-13 AP7217A-33SPG-13 Notes: Package Code S SP 13” Tape and Reel Quantity Part Number Suffix 2500/Tape & Reel -13 2500/Tape & Reel -13 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at http://www.diodes.com/products/lead_free.html. 2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. Pin Assignments ( Top View ) GND 1 8 7 AP7217A GND 3 VIN 4 6 VD OUT 5 GND EN GND GND 1 ( Top View ) 8 7 EN GND VR OUT 2 VROUT 2 GND 3 VIN 4 6 VDOUT 5 GND SOP-8L SOP-8L-EP Pin Descriptions Pin Name GND VROUT VIN VDOUT EN Pin No. 1, 3, 5, 7 2 4 6 8 Description Ground Voltage Output Supply Voltage VD Output (Reset on I/P) Enable (VR On/Off) AP7217A Rev. 3 DS31423 2 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Block Diagram EN On Off Enable VIN Bandgap 1.2V R1 VDOUT ERROR AMP Current Limit VROUT + + VD Comp. R3 R2 R4 GND Absolute Maximum Ratings Symbol ESD HBM ESD MM VIN IOUT VROUT PD TJ Parameter Human Body Model ESD Protection Machine Model ESD Protection Input Voltage Output Current Output Voltage SOP-8L Power Dissipation SOP-8L-EP Operating Junction Temperature Range Rating 3.5 500 +6 PD/ (VIN-VO) GND - 0.3 ~ VIN+ 0.3 1010 1650 -40 to +125 Unit KV V V mA V mW ºC Recommended Operating Conditions Symbol VIN IOUT TA Parameter Input Voltage Output Current Operating Ambient Temperature Min 3.3 0 -40 Max 5.5 600 85 Unit V mA ºC AP7217A Rev. 3 DS31423 3 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Electrical Characteristics (TA = 25°C, CIN = 1µF, COUT = 1µF, VEN = VIN, unless otherwise noted) Symbol IQ ISTB Parameter Quiescent Current Standby Current Output Voltage Accuracy VOUT Temperature Coefficient Dropout Voltage Maximum Output Current Current Limit Short Circuit Current Line Regulation Load Regulation Power Supply Rejection EN Input Threshold Enable Pin Current Detect fall voltage VHysteresis Test Conditions IO = 0mA VEN = Off VIN = 5.0V IO = 30mA, VIN = 5V -40°C to 85°C, IOUT = 30mA IOUT = 300mA IOUT = 600mA VIN = 5.3V VIN = 5.3V VIN = 5.3V 4.3V ≤ VIN ≤ 5.5V; IOUT = 30mA 1mA ≤ IOUT ≤ 100mA, VIN = 5.3V VIN = 4.3V+ 0.5Vp-pAC, F = 1KHz IOUT = 50mA Output ON Output OFF Min - Typ. 50 15 Max 80 25 3.366 Unit µA µA V ppm / oC 3.234 3.300 ±100 350 800 VROUT VDROPOUT IOUT ILIMIT Ishort ∆VLINE/∆VIN/VOUT ∆VOUT PSRR VEH VEL IEN VDF VD Hysteresis Range 400 900 mV mA 600 750 50 0.01 15 55 1.6 -0.1 3.23 VDF x1.02 0.25 0.1 3.37 VDF x1.08 ±0.2 50 mA mA %/V mV dB V V µA V V mA 3.3 VDF x1.05 20 30 200 134 82 28 12 IVDout tRP θJA θJC Notes: VDout = 0.5V VIN = 2.0V 3.0V VDOUT Delay Time VIN = 1.8V to VDF+ 1V Thermal Resistance SOP-8L (Note 3) Junction-to-Ambient SOP-8L-EP (Note 4) Thermal Resistance SOP-8L (Note 3) Junction-to-Case SOP-8L-EP (Note 4) VD Supply Current 180 - mSec ºC/W ºC/W 3. Test condition for SOP-8L: Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout. 4. Test condition for SOP-8L-EP: Device mounted on 2oz copper, minimum recommended pad layout on top & bottom layer with thermal vias, double sided FR-4 PCB. AP7217A Rev. 3 DS31423 4 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Typical Performance Characteristics O utput Current vs. Dropout Voltage (Vout=3.3V) 900 800 800 700 Input Voltage vs. Max Iout Dropout Voltage (m V) 700 600 500 400 300 200 100 0 30mA 100mA 300mA 600mA Max Iout (m A) 600 500 400 300 200 100 0 3.6V 4.3V 5.0V 5.3 5.5V Output Current Quiescent Current vs. Tem perature 75 80 Input Voltage Quiescent Current vs. Input Voltage Quiescent Current (uA) Quiescent Current (uA) 70 65 60 55 50 45 40 -40℃ 0℃ 25℃ 85℃ 100℃ 70 60 50 40 30 20 10 0 3.6V 56V 58V 61V 5.5V Tem perature Input Voltage AP7217A Rev. 3 DS31423 5 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Typical Performance Characteristics S hort Current vs. Input Voltage 65 64 63 62 61 60 59 58 57 56 55 3.6V 4.3V 5V 5.3V 5.5V (Continued) Short Current vs. Tem perature (Vin=5.5V) 64 62 Short Current (m A) Short Current (m A) 60 58 56 54 52 50 -40℃ 25℃ 85℃ 105℃ Input Voltage Stand-by Current vs. Input Voltage 24 35 Tem perature Stand-by Current vs. Tem perature Stand-by Current (uA) 21 Stand-by Current (uA) 30 25 20 15 10 5 0 18 15 12 3.6V 4V Input Voltage 4.3V 5V 5.5V -40℃ 0℃ Tem perature 25℃ 85℃ 105℃ 125℃ Load Transient Response Load Transient Response AP7217A Rev. 3 DS31423 6 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Timing Diagram tRP 200mSec-TYP. 1.6V VIN VDOUT EN VROUT Application Note Input Capacitor A 1µF ceramic capacitor is recommended to connect between IN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. A lower ESR (Equivalent Series Resistance) capacitor allows the use of less capacitance, while higher ESR type requires more capacitance. This input capacitor must be located as close as possible to the device to assure input stability and less noise. For PCB layout, a wide copper trace is required for both IN and GND. Output Capacitor The output capacitor is required to stabilize and help the transient response of the LDO. The AP7217A is designed to have excellent transient response for most applications with a small amount of output capacitance. The AP7217 is stable with any small ceramic output capacitors of 1.0µF or higher value, and the temperature coefficients of X7R or X5R type. Additional capacitance helps to reduce undershoot and overshoot during transient. For PCB layout, the output capacitor must be placed as close as possible to OUT and GND pins, and keep the leads as short as possible. ENABLE/SHUTDOWN Operation The AP7217A is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to IN pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pin must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. VROUT 0V 3.3V VDOUT Φ Φ EN=0 EN=1 Thermal Considerations Thermal Shutdown Protection limits power dissipation in AP7217A. When the operation junction temperature exceeds 150°C, the Over Temperature Protection circuit starts the thermal shutdown function and turns the pass element off. The pass element turn on again after the junction temperature cools by 40°C. For continuous operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is: PD = (VIN − VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / θJA Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. AP7217A Rev. 3 DS31423 7 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Application Note (Continued) Vin Iin IN OUT Iout Vout C AP7217A GND Short circuit protection When VROUT pin is shorted to GND or VROUT voltage is less than 200mV, short circuit protection will be triggered and clamp the output current to approximately 50mA. VDOUT (reset output) ---Open-Drain Active-Low reset output--In general, VDOUT is pulled up by a resistor (100Kohm) to VIN. The AP7217A microprocess (uP) supervisory circuitry asserts a guaranteed logic-low reset during power-up and power-down. Reset is asserted asserts when VIN is below the reset threshold and remain asserted for at least tRP after VIN rises above the reset threshold. As long as VIN is lower than the reset threshold, VDOUT remains at logic "0". When VIN become higher than VTH, a logic "1" is asserted after a time delay defined by tRP. Co ESR Iq Current Limit Protection When output current at OUT pin is higher than current limit threshold, the current limit protection will be triggered and clamp the output current to approximately 750mA to prevent over-current and to protect the regulator from damage due to overheating. Marking Information (1) SOP-8L ( Top View ) 8 5 Logo Part Number 7217A-33 YY WW X X 1 4 YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week X : Internal Code G : Green (2) SOP-8L-EP ( Top View ) 8 5 Logo Part No. 7217A-33 YY WW X X E 1 4 G : Green YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week X : Internal Code SOP-8L-EP AP7217A Rev. 3 DS31423 8 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO Package Information (1) Package Type: SOP-8L (All Dimensions in mm) 3.85/3.95 5.90/6.10 0.10/0.20 0.254 0.62/0.82 Gauge Plane Seating Plane Detail "A" 7°~9° 1.30/1.50 1.75max. 0.15/0.25 0.35max. 45° 7°~9° Detail "A" 0°/8° 1.27typ 4.85/4.95 0.3/0.5 8x-0.60 5.4 6x-1.27 8x-1.55 Land Pattern Recommendation (Unit: mm) (2) Package Type: SOP-8L-EP Detail "A" Exposed pad 7°~9° 3.85/3.95 5.90/6.10 3.70/4.10 45° 0.35max. 7°~9° 1 1.30/1.50 1.75max. 0.15/0.25 3.3Ref. 1 Bottom View 0/0.13 0.254 1.27typ 4.85/4.95 1 0.3/0.5 Gauge Plane Seating Plane 0.62/0.82 Detail "A" 8x-0.60 Exposed pad 6x-1.27 8x-1.55 Land Pattem Recommendation (Unit:mm) 5.4 AP7217A Rev. 3 DS31423 9 of 10 www.diodes.com 2.4Ref. OCTOBER 2009 © Diodes Incorporated AP7217A 3.3V 600mA CMOS LDO IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDING TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. 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Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2009, Diodes Incorporated www.diodes.com AP7217A Rev. 3 DS31423 10 of 10 www.diodes.com OCTOBER 2009 © Diodes Incorporated