AP9050FDB

AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Description AP9050 is designed to protect the latest generation of PMICs for portable applications such as UMPCs, smartphones and others utilizing battery power. The integrated LDO allows the PMIC to power up and determine whether the connected power supply (USB or AC-DC wall adapter) is valid and a safe operation can be performed. The PMIC controls the operation of the integrated n-channel MOSFET to either pass the line voltage or disconnect the line from the PMIC to protect its internal circuits in the event of an over-voltage. The AP9050 is available in a low-profile U-DFN2020-6 package. Pin Assignments (Top View) 1 8 2 7 3 4 5 6 N EW PRODUCT U-DFN2020-6 Features • • • • Input Supply Range from 3V to 30V Lower Power Dissipation and Higher Efficiency as compared to a Zener Shunt Regulator LDO is stable without a bypass capacitor on the output and operates across the temperature range Available in a U-DFN2020-6 package with a typical height of 0.575mm Applications • • • • • • Power Interface for New Generation PMICs Charger Front End Protection Smartphone Cell Phone Ultra Mobile PC Tablets Note: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at http://www.diodes.com/products/lead_free.html. Typical Application Circuit Figure 1. Typical Application Circuit AP9050 Document number: DS35283 Rev. 1 - 2 1 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Pin Descriptions Pin # 1 2 3, 7 4 5 6, 8 Name Source Gate VIN Ground VOUT Drain Description Source of the n-channel power FET. Pass-switch’s output pin. Gate of the FET switch. Pass-switch’s control pin. Input voltage to the internal LDO. LDO ground connection. Output of the LDO. Drain of the power FET. Pass-switch’s input pin. N EW PRODUCT Functional Block Diagram Figure 2. Functional Block Diagram AP9050 Document number: DS35283 Rev. 1 - 2 2 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Absolute Maximum Ratings (Note 2, 3) Symbol VIN VGS Supply Voltage Gate-to-Source Voltage Drain Current, Peak (10µs pulse) Drain Current, Continuous (Note 4, Steady-State) TA = 25ºC TA = 85ºC Pmax TJ TJ TL Total Power Dissipation @ TA = 25°C (Note 3, 4) Junction Temperature Range Non-operating Temperature Range Maximum Lead Temperature for Soldering Purposes 750 −40 to +125 −55 to +150 260 mW °C °C °C Parameter Rating −0.3 to 30 ±12 19 3.7 2.7 Unit V V A N EW PRODUCT IDpk ID A Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Notes: 2. Exceeding these ratings may damage the device. 2 3. Mounted on FR4 Board using 30 mm , 2 oz Cu. 4. Dual die operation (equally−heated). Thermal Resistance Symbol θJA θJC Note: Parameter Junction to Ambient (Note 5) Junction to Case 2 Rating 132 13 Unit °C/W °C/W 5. Test condition for DFN2020-6: Mounted on FR4 Board using 30 mm , 2 oz Cu. Recommended Operating Conditions (Note 6) Symbol VIN TA Note: Parameter Supply Voltage Operating Ambient Temperature Range Min 3 −40 Max 30 +85 Unit V °C 6. The device function is not guaranteed outside of the recommended operating conditions. AP9050 Document number: DS35283 Rev. 1 - 2 3 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Electrical Characteristics (VIN (OVP_SENSE) = 5.0V, TJ = +25°C, unless otherwise noted) Symbol Power FET Parameter Test Conditions VDS = 24V, VGS = 0V TJ = 85°C VDS = 0V, VGS = ±8V VGS = VDS, ID = 250µA VGS = 4.5V, ID = 2.0A VGS = 2.5V, ID = 2.0A VDS = 5V, ID = 2.0A VDS = 15V, VGS = 0V, f = 1MHz VDS = 15V, VGS = 0V, f = 1MHz VDS = 15V, VGS = 0V, f = 1MHz VIN = 5.5V, IOUT = 1mA VIN − VOUT, IOUT = 1.2mA, Vhead Headroom VIN = 4.6V VIN − VOUT, IOUT = 10mA, VIN = 4.8V, TJ = −40 to +125°C VIN 0 to 30V, < 1µs rise time, 5.0kΩ resistive load (Note 8) VIN 0 to 30V, < 1µs rise time, 5.0kΩ resistive load (Note 8) VIN = 5.5V 110 4.6 0.62 0.9 41 55 8 500 65 50 Min Typ. Max 1.0 10 80 1.2 53 68 Unit N EW PRODUCT IDSS IGSS VGS(th) RDS(on) gFS CISS COSS CRSS Zero Gate Voltage Drain Current Gate-to-Source Leakage Current Gate Threshold Voltage Drain-to-Source On-Resistance (Note 7) Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance µA nA V mΩ S pF pF pF LDO (unless otherwise noted, TJ = 25ºC, VIN = 5.0V) VOUT Regulated Output Voltage 5.0 5.3 150 1000 V mV mV Response to Input Transient tpulse Vpk Total Device Ibias VIN_min Notes: Time signal is above 5.5V Peak Voltage 5.0 9.0 µs V Input Bias Current Minimum Operating Voltage 850 3.0 µA V 7. Pulse test width 300µs, duty cycle 2% 8. Guaranteed by design AP9050 Document number: DS35283 Rev. 1 - 2 4 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Typical Performance Characteristics 1.6 1.5 Normalised RDS(on) 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 VGS=4.5V ID=2A N EW PRODUCT -50 -25 0 25 50 75 100 Junction Temperature (ºC) 125 150 Figure 3. RDS(ON) variation over junction temperature 20 18 16 Drain Current (A) VGS=10V VGS=2.5V 14 12 10 8 6 4 2 0 0 1 2 3 Drain-Source Voltage (V) 4 5 VGS=1.5V VGS=3V VGS=2V Figure 4. RDS(ON) Characteristics 5.2 5.15 Output Voltage (V) 5.1 5.05 5 4.95 4.9 4.85 4.8 -50 -25 0 25 50 75 100 Junction Temperature (ºC) 125 150 Figure 5. Output voltage variation over junction temperature AP9050 Document number: DS35283 Rev. 1 - 2 5 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Applications Information Theory of Operation The AP9050 was designed to work in close relationship with a PMIC (Power Management IC). To protect the PMIC from an overvoltage situation the AP9050 powers up a detection circuit within the connected PMIC. (See Figure 2 as reference) This detection circuit determines if a valid input source is connected (ex. VIN < 8V). If a valid input source is detected the power MOSFET will be turned on and the supply current to the PMIC will be turned on. The overvoltage detection is continuous, if an overvoltage occurs at a later state the Power MOSFET will be turned off. External Capacitors AP9050 was specified to reduce board space and external component count, by designing the LDO to be stable without an external bypass capacitor. A low ESR 1nF to 10nF external capacitor can be used to improve behavior with fast ac transients or other switching currents that might be present. To improve noise immunity and ac impedance from long input traces a 1nF capacitor can be added to the input VIN of the LDO. N EW PRODUCT PCB Layout The AP9050 was designed utilizing two process technologies to provide best performance and a cost effective solution. 1 8 2 7 3 6 5 4 Figure 6. Package Pin Out Both die are packaged side by side in the U-DFN2020-6 package and are mounted on two separate exposed pads. These pads are not required for electrical functionality, but to aid with the thermal performance of AP9050. Attention should be paid in the layout of the PCB (Printed Circuit Board) that PAD7 is connected to VIN of the LDO, pin 3, while PAD8 is connected to the Drain of the Power MOSFET, pin 6 of the package. For best thermal performance large copper areas connected to the two exposed pads should be used to transfer heat away from the AP9050. AP9050 Document number: DS35283 Rev. 1 - 2 6 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Ordering Information AP9050FDB-7 N EW PRODUCT Package U-DFN2020-6 Device AP9050FDB-7 Note: Packing FDB 7” Tape and Reel Part Number Suffix -7 Package Code FDB Packaging (Note 10) U-DFN2020-6 Quantity 3000/Tape & Reel 10. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. Marking Information U-DFN2020-6 ( Top View ) XX YW X XX : Identification Code Y : Year : 0~9 W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week X : A~Z : Internal code Device AP9050FDB Package U-DFN2020-6 Identification Code BZ AP9050 Document number: DS35283 Rev. 1 - 2 7 of 9 www.diodes.com March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL Package Outline Dimensions (All Dimensions in mm) U-DFN2020-6 0.545/0.605 N EW PRODUCT Marking 0.13Typ. 0.05 C 0.08 C 0.43mon. (Active area depth) Seating plane C 0/0.05 0.15 C 1.05 2x-0.70 C L 2x 1.95/2.075 2x-0.5/0.7 0.45 6x-0.45 C L 1.95/2.075 2x-0.9/1.1 0.25/0.35 2x- 0.15 C .1 R0 6x-0.3 0.65 Top View 0.2/0.3 0.65nom. Land Pattern Recommendation unit:mm 0.05 M C A B Bottom View AP9050 Document number: DS35283 Rev. 1 - 2 8 of 9 www.diodes.com 2x-1.10 1.7 B n Pi A .15 D R0 #1 I March 2011 © Diodes Incorporated AP9050 PROTECTION INTERFACE for PMICs with INTEGRATED OVP CONTROL IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. 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N EW PRODUCT Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2011, Diodes Incorporated www.diodes.com AP9050 Document number: DS35283 Rev. 1 - 2 9 of 9 www.diodes.com March 2011 © Diodes Incorporated