Technical Reference Note
Embedded Power for Business-Critical Continuity
SXX06E
Rev. 08.010.6
Page 1 of 2
LGA C Series
3/6/10/20 A
Total Power: 15-100 Watts No. of Outputs: Single
Rev. 12.07.09 LGA C Series 1 of 28
Special Features
• 3,6,10 and 20 A output current rating • Wide input voltage range: up to 14 Vdc • Adjustable output voltage: 0.59-5.1 V • Excellent transient response • High efficiency • Output margining • Power enable • Minimal airflow requirement • Termination voltage capability • Ultra compact profile and footprint • RoHS compliant • Remote sense
Product Family: Function: Usage:
LGA C Series Embedded Power Device ASIC, Memory, FPGAs, Telecom and Networking Equipment, Servers, Industrial Equipment, POL Regulation
Definition: The LGA C Series is a new high density, non-isolated converter for space sensitive applications. This Embedded Power Device (EPD) has a wide input range up to14.0 V and offers a 0.59-5.1 V adjustable output with 3, 6, 10 and 20 A capability without derating. This EPD offers a complete feature set of of enable, remote sense, and power good inclusive of a wide adjustable output range.
Standards
Designed to meet EN60950 when utilized in end use equipment. International Standards for Solderability: J-STD-002B IEC-60068-2-58
Technical Reference Note
Embedded Power for Business-Critical Continuity
Electrical Description
Electrical Description The LGA C Series is implemented using a voltage mode single-phase synchronous buck topology. A block diagram of the converter is shown in Figure 1. The output voltage is adjustable over a range of 0.59 - 5.1 V by using a resistor or voltage as described on Page 5. (Factory preset is 0.591Vout.) The converter can be shut down via the remote ON/ OFF. The remote ON/OFF operates with positive logic that is compatible with popular logic devices. Positive logic implies that the converter is enabled if the remote ON/OFF input is high (or floating), and disabled if it is low.
Vin Trim Vout +Sense -Sense
+ -
Rev. 12.07.09 LGA C Series 2 of 28
Fixed Frequency Voltage Mode Controlled PWM Remote ON/OFF PGood
∩∩∩
Vout GND
Figure 1 - Electrical Block Diagram
The power good signal is an open collector output that is pulled low by the PWM controller when it detects the output is not within ±10% of its set value. The output is monitored for overcurrent and short-circuit conditions. When the PWM controller detects an overcurrent condition, it forces the module into hiccup mode. A typical application is shown in Figure 2.
RofsRofs+
Wide Operating Temperature Range The LGA C Series's ability to accommodate a wide range of ambient temperatures is the result of its extremely high power conversion efficiency and resultant low power dissipation, combined with the excellent thermal performance of the thermally enhanced cover. The maximum output power that the module delivers will depend on a number of parameters, primarily: • • • • Input voltage range Output load current Air velocity (forced or natural convection) Addition of heatisnk
Rmargin
Margin Control Enable On/Off
23 21
12
13
22 1-4
Power Good
Vout
Ruvlo Vin
LGA C Series 9-10 5-8 24
Rtrim
15
+Sense
Cout
14
R L O A D
Cin
GND
-Sense GND
Figure 2 - Standard Application Drawing
The LGA C Series module has an operating temperature range of -40 °C to 85 °C with suitable derating.
Technical Reference Note
Embedded Power for Business-Critical Continuity
Features and Functions
Output Voltage Adjustment The output voltage on all models is adjustable from 0.59 - 5.1 V. Undervoltage Lockout The default undervoltage lockout is set as follows: LGA 03/06/10C: 2.9 V LGA20C: 4.3 V
Rev. 12.07.09 LGA C Series 3 of 28
Current Limit and Short-Circuit Protection The LGA C models have a built-in non-latching current limit function and full continuous short-circuit protection. The module monitors current through the top and bottom FET. When an overcurrent condition occurs, the module goes into hiccup mode, where it attempts to power up periodically to determine if the problem persists. The output current level is sensed through the voltage drop across the top and bottom FETs during their on time. This type of sensing is affected by temperature due to the change in Rdson. At higher temperatures, the Rdson increases, which lowers the overcurrent point. Note that the module specifications are not guaranteed when the unit is operated in an overcurrent condition. Remote ON/OFF The remote ON/OFF input allows external circuitry to put the LGA C Series converter into a low dissipation sleep mode. Positive logic remote ON/OFF is available as standard. The EPD is turned on if the remote ON/OFF pin is high or floating. Pulling the pin low will turn off the EPD. To guarantee turn-on, the enable voltage must be above 0.50 V. To turn off the enable voltage, it must be pulled below 0.2 V. Figures illustrating the response of the unit to switching on and off using the remote ON/OFF feature are included on pages 13, 16, 20 and 25. Figures 3 and 4 show various circuits for driving the remote ON/OFF feature. The remote ON/OFF input can be driven through a discrete device (e.g. a bipolar signal transistor) or directly from a logic gate output. The output of the logic gate may be an open-collector (or opendrain) device. Please note the remote ON/OFF pin should only be driven in the following range: If, If, Vin ≤ 5 V, Von/off (max) = Vin Vin > 5 V, Von/off (max) = 5 V
Technical Reference Note
Embedded Power for Business-Critical Continuity
Features and Functions (cont'd)
Remote ON/OFF (cont'd)
LGA C Series
Vin Remote ON/OFF Ground Vout PGood
Rev. 12.07.09 LGA C Series 4 of 28
5V Vin
LGA C Series
Vout PGood
Remote ON/OFF Ground
Figure 3 - Remote ON/OFF Input Drive Circuit for Non-Isolated Biopolar
Figure 4 - Remote ON/OFF Input Drive Circuit for Logic Driver
Power Good The LGA C modules have a power good indicator output. This output pin uses positive logic and is opencollector. Also, the power good output is able to sink 10 mA. When the output of the module is within ±10% of the nominal set point, the Power Good pin can be pulled high. Note that Power Good should not be pulled higher than the following conditions: If, Vin ≤ 5 V, Vpgood (max) = Vin
If, Vin > 5 V, Vpgood (max) = 5 V Current Sink Capabilities The LGA C series of dc-dc converters is able to current sink as well as current source. The EPD operates over the full output current range at any specified output voltage. This feature allows the LGA C to fit into any voltage termination application. Setting Output Voltage The output of the module can be adjusted from 0.59 V to 5.1 V. This is accomplished by connecting an external resistor between Trim and -Sense as shown in Figure 5 and graphed in Figure 8 or by driving the Trim pin with an external voltage as shown in Figure 6. High accuracy setpoints can be achieved with the use of a potentiometer as shown in Figure 7.
Technical Reference Note
Embedded Power for Business-Critical Continuity
Applications
Setting Output Voltage (cont'd) Setting Output Voltage (cont'd)
LGA C Series Vout Vin Trim Remote ON/OFF -Sense Rtrim Remote ON/OFF -Sense Vin Trim Rtrim 2 Rtrim 1 LGA C Series Vout
Rev. 12.07.09 LGA C Series 5 of 28
Vt
Figure 5 - Output Voltage Trim
Figure 6 - Output Voltage Trim with Voltage Source
The trim equation for the basic configuration shown in Figure 5 is: Rtrim (kΩ) = 1.182 (Vout - 0.591) Where Vout is the desired output voltage and Rtrim is the resistance required between the Trim pin and -Sense.
The trim equation for the external voltage configuration shown in Figure 6 is: Rtrim2 (kΩ) = Rtrim1 (1.182 - 2Vt) Rtrim1 (Vout - 0.591) - 1.182 Where Vout is the desired output voltage, Rtrim1 (kΩ) and Rtrim2 (kΩ) are the resistors in Figure 6 and Vt is the applied external output voltage. Note: If, If, Vin ≤ 5 V, Vpin24 (max) = Vin Vin > 5 V, Vpin24 (max) = 5 V
Technical Reference Note
Embedded Power for Business-Critical Continuity
Applications (cont'd)
Setting Output Voltage (cont'd) The trim equation for the potentiometer configuration show in Figure 7. 0.591 Vout = (2Rtrim2 + 2Rpot + Rtrim1Rtrim2 + Rtrim1Rpot + 2Rtrim1) (Rtrim2 + Rpot)Rtrim1 *
Rev. 12.07.09 LGA C Series 6 of 28
Where Vout is the desired output voltage, Rtrim1(kΩ) and Rtrim2(kΩ) are the resistors in Figure 7 and Rpot is the resistance of the potentiometer.
LGA C Series
REQUIRED TRIM RESISTOR ( ) Ω
1000000
Vout
100000 10000 1000 100 10 0 1 2 3 4 5
DESIRED OUTPUT VOLTAGE SETPOINT (V)
Vin
Trim Rtrim1 Rtrim 2 Rpot -Sense
Remote ON/OFF
Figure 7 - Output Voltage Trim with Potentiometer
Figure 8 - Typical Trim Curves
Undervoltage Lockout These EPD's have built-in undervoltage lockout to ensure reliable output power. The lockout prevents the unit from operating when the input voltage is too low. The UVLO for the LGA03/06/10C can be adjusted with the following equation: 14.8 * 6.81 Ruvlo(kΩ) = 6.81 * Vturn_on - 18.16 The UVLO for the LGA20C can be adjusted with the following equation: Ruvlo(kΩ) = 30.1 * 4.22 8.577 * Vturn_on - 34.32
Technical Reference Note
Embedded Power for Business-Critical Continuity
Applications (cont'd)
Rev. 12.07.09 LGA C Series 7 of 28
Output Capacitance The LGA C Series has output capacitors inside the converter. Limited output capacitance, 10uF for the 3 A/6A/10A and 50 uF for the 20A, is required for stable operation. When powering loads with large dynamic current requirements, improved voltage regulation is obtained by inserting low ESR capacitors as close as possible to the load. Low ESR ceramic capacitors will handle the short duration high frequency components of the dynamic current requirement. In addition, higher values of electrolytic capacitors should be used to handle the mid-frequency components. It is equally important to use good design practices when configuring the dc distribution system. Low resistance and low inductance PCB layout traces should be utilized, particularly in the high current output section. Remember that the capacitance of the distribution system and the associated ESR are within the feedback loop of the power capabilities, thus affecting the stability and dynamic response of the module. Note that the maximum rated value of output capacitance varies between models and for each output voltage setpoint. A stability vs. Load Capacitance calculator, (see your sales representative), details how an external load capacitance influences the gain and phase margins of the LGA C Series modules. Setting Margin Control To margin the output voltage up, pull the margin control pin high. To margin down, pull the margin control pin low. If the pin is left floating, the feature is disabled. The maximum margining range is ±33% of the output voltage setting, with maximum output at 5.5 V. The equations for margining up and down are as follows: Vmargin_up = 0.1182 * Rmargin * Rtrim + 2k Rtrim Rofs+ Vmargin_down = 0.1182 * Rmargin * Rtrim + 2k Rtrim RofsNote: The margin control pin cannot be pulled in the following range: If, Vin ≤ 5V then Vmargin(max) = Vin If, Vin > 5V then Vmargin(max) = 5V
See Table 1 for suggested margining values.
Technical Reference Note
Embedded Power for Business-Critical Continuity
Applications (cont'd)
Setting Margin Control (cont'd)
Margin Up and Down 5%
Vout_nom (V) 0.9 1.2 1.8 2.5 3.3 5.0 Rtrim (kΩ) 3.83 1.96 0.976 0.619 0.432 0.267 Rmargin (kΩ) 2.49 2.49 2.49 2.49 2.49 2.49 Rofs- (kΩ) 10.0 10.0 10.0 10.0 10.0 10.0 Rofs+ (kΩ) 10.0 10.0 10.0 10.0 10.0 10.0 Vmargin_down (V) Vout _down (V) Vmargin_up (V) 0.045 0.059 0.090 0.125 0.166 0.250 0.855 1.141 1.710 2.375 3.134 4.750 0.045 0.059 0.090 0.125 0.166 0.250
Rev. 12.07.09 LGA C Series 8 of 28
Vout_up (V) 0.945 1.259 1.890 2.625 3.466 5.250
Margin Up and Down 10%
0.9 1.2 1.8 2.5 3.3 5.0 3.83 1.96 0.976 0.619 0.432 0.267 4.99 4.99 4.99 4.99 4.99 4.99 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 0.090 0.119 0.180 0.250 0.332 0.501 0.810 1.081 1.620 2.250 2.968 4.499 0.090 0.199 0.180 0.250 0.332 0.501 0.990 1.319 1.980 2.750 3.632 5.501
Table 1 - Suggested Margin Values
Water Washing Water-washing is not recommended. Interface Finish Electroless Nickel Immersion Gold (ENIG). Solder Paste Solderballs are caused between LGA and substrate due to printing an excessive amount of solderpaste. Stencil apertures should be windowpaned; dividing them into quadrants rather than printing a continuous deposit over the entire pad. This will control the amount of solder available to form a joint between LGA and customer board. Additionally, this will also reduce the formation of voids. Solder Paste Window Paning
Figure 9: Window Paning
Figure 10: Window Paning
Technical Reference Note
Embedded Power for Business-Critical Continuity
Applications (cont'd)
Rev. 12.07.09 LGA C Series 9 of 28
Recommend Placement Method Use of a placement machine with front lighting and pad recognition is recommended. For best results, place the LGA based on the centerpoint of the pad array (case silhouetting is not recommended for placement). Reflow Guidelines For a SnPb process: pads should be above 183 °C (liquidus) for 90 seconds max (60-75 seconds typical) with a peak temperature of 225 °C. For a leadfree SAC305 process: pads should be above 217 °C (liquidus) for 90 seconds max (60-75 seconds typical) with a peak temperature of 250 °C. The LGA Series products passed solderability testing per J-STD-002B and IEC-60068-2-58. The test was conducted by Process Sciences, Inc in August, 2007 Thermal Hotspot The electrical operating conditions of the LGA (shown below) determine how much power is dissipated within the converter. • Input voltage (Vin) • Output voltage (Vo) • Output current (Io) The following parameters further influence the thermal stresses experienced by the converter: • Ambient temperature • Air velocity 1 • Thermal efficiency of the end system application • Parts mounted on system PCB that may block airflow • Real airflow characteristics at the converter location In order to simplify the thermal design, a number of thermal derating plots are provided in this Technical Reference Note. These derating graphs show the load current of the LGA versus the ambient air temperature and forced air velocity. However, since the thermal performance is heavily dependent upon the final system application, the user needs to ensure the thermal reference point temperatures are kept within the recommended temperature rating. It is recommended that the thermal reference point temperatures are measured using a thermocouple or an IR camera. In order to comply with stringent Emerson Network Power derating criteria the ambient temperature should never exceed 85 °C. The case maximum recommended temperature is 100 °C. Please contact Emerson Network Power for further support.
2
LGAXXX-0XSADJJ
Figure 11: Thermal Hotspots 1: With Heatsink 2: Without Heatsink
Technical Reference Note
Embedded Power for Business-Critical Continuity
Applications (cont'd)
Heatsink Accessory System should be reflowed before attaching heatsink. 1. Clean the top surface of the case with isopropyl alcohol and ensure the case surface is air-dried. 2. Remove clear plastic liner from bottom of the heatsink to expose the adhesive. 3. Align heatsink with case and apply even pressure (10-15 PSI) for 10-20 seconds.
Recommended Air flow direction
Rev. 12.07.09 LGA C Series 10 of 28
Liner
Heatsink Number System with Options
Product Family Product Package Height*
LGA
-
HTSK
Product HTSK = Heatsink
-
KIT
Package KIT = Heatsink and Adhesive
-
XXX
LGA20 + Heatsink 045 = 0.45" 048 = 0.48" 050 = 0.50"
*Height is the total height of the LGA20C-00SADJJ with heatsink attached.
Technical Reference Note
Embedded Power for Business-Critical Continuity
All Models
Parameter Absolute Maximums Input Voltage Enable Voltage Operating Ambient Temperature Non-Operating Ambient Temperature Case Temperature Output Specifications Ouput Voltage Output Setpoint Accuracy Output Regulation (Line) Duty Cycle Turn On Specifications Turn On Delay (with Vin) Turn On Delay (with Enable) Output Rise TIme Enable Specifications Signal Low (Unit Off) Signal Low Current Signal High (Unit On) Signal High Current Material Ratings Flammability Moisture Sensitivity Level Material Type International Standards Solderability J-STD-002B IEC-60068-2-58 UL94V-0 3 FR4 PCB 12 Vin 0 0 15 1 400 0.4 10% - 90% 2 2.0 1.5 3 3 0.591 -1.0 -0.2 90 5.1 +1.0 +0.2 0 0 -40 -40 14.0 5 85 125 100 Test Conditions Min Typ Max
Rev. 12.07.09 LGA C Series 11 of 28
Units V V °C °C °C V % % % ms ms ms
V uA V uA
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA03C
Parameter Input Specifications Input Voltage Input Current (Max) Input Current (No Load) Input Current (Standby) Input Capacitance (Internal) Input Capacitance (External) Output Specifications Output Current Output Capacitance (Internal) Output Capacitance (External) 12 Vin, 0.9 Vout (Startup capacitance) 12 Vin, 2.5 Vout (Startup capacitance) 12 Vin, 5.0 Vout (Startup capacitance) Output Ripple/Noise (Peak/Peak) 5 Vin, 0.9 Vout, 10 uF Cout 12 Vin, 2.5 Vout, 10 uF Cout 12 Vin, 5 Vout, 10 uF Cout Efficiency 5 Vin, 0.9 Vout, 3 Aout 12 Vin, 2.5 Vout, 3 Aout 12 Vin, 5 Vout, 3 Aout Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Protection Specification Over Current Protection General Specifications MTBF Weight Switching Frequency Junction to Case Thermal Resistance Telcordia SR-332, Method II, Parts Stress, 40 °C Ambient, 400 LFM, 100% Load 28,037,062 0.1 1,000 3 Hiccup Mode 6 12 Vin, 0.9 Vout, 1.5-3 at 5 A/us, 10 uF Cout 12 Vin, 0.9 Vout, 1.5-3 at 5 A/us, 10 uF Cout 12 Vin, 2.5 Vout, 1.5-3 at 5 A/us, 10 uF Cout 12 Vin, 2.5 Vout, 1.5-3 at 5 A/us, 10 uF Cout 10 10 10 15 20 30 79.1 86.4 91.8 85 8 95 15 0 20 3,000 1,100 450 3 Required for input ripple current 12.0 Vin, 2.5 Vout, 0 Aout 12.0 Vin, Module disabled 55 14 10 1 Internal input capacitance rated 16 Vdc max. 3 14.0 3 Test Conditions Min Typ Max
Rev. 12.07.09 LGA C Series 12 of 28
Units V A mA mA uF uF A uF uF uF uF mV mV mV % % % mV us mV us A Hours oz kHz °C/W
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA03C
All Inputs and Outputs
4 3.8 3.6 3.4 3.2 3 2.8 2.6 2.4 2.2 2 30 35 40 45 50 55 60 65 70 75 80 85 Ambient (C) 100 LFM
Rev. 12.07.09 LGA C Series 13 of 28
2.50V Efficiency
0.95 0.9 0.85 0.8 0.75 0 1 2 3 Output Current (A)
Figure 13: 2.5 V Efficiency vs. Load
Output Current (A)
3 Vin 5 Vin 7 Vin 12 Vin 13.8 Vin
Figure 12: Thermal Derating Curve for All Inputs and Outputs
5.00V Efficiency
1 0.95 0.9 0.85 0.8 0 1 2 3 Output Current (A)
Figure 14: 5 V Efficiency vs. Load Figure 15: Remote On/Off (Channel 1: Output Voltage, Channel 2: PGood, Channel 3: Enable)
7 Vin 12 Vin 13.8 Vin
Figure 16: Typical Output Ripple
Figure 17: Transient Response 100% - 50% (Channel 4: Current Step at 1 A/div, Channel 1: Output Voltage Deviation)
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA03C
Rev. 12.07.09 LGA C Series 14 of 28
Figure 18: Transient Response 50% - 100% (Channel 4: Current Step at 1 A/div, Channel 1: Output Voltage Deviation)
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA06C
Parameter Input Specifications Input Voltage Input Current (Max) Input Current (No Load) Input Current (Standby) Input Capacitance (Internal) Input Capacitance (External) Output Specifications Output Current Output Capacitance (Internal) Output Capacitance (External) 12 Vin, 0.9 Vout (Startup capacitance) 12 Vin, 2.5 Vout (Startup capacitance) 12 Vin, 5.0 Vout (Startup capacitance) Output Ripple/Noise (Peak/Peak) 5 Vin, 0.9 Vout, 10 uF Cout 12 Vin, 2.5 Vout, 10 uF Cout 12 Vin, 5 Vout, 10 uF Cout Efficiency 5 Vin, 0.9 Vout, 6 Aout 12 Vin, 2.5 Vout, 6 Aout 12 Vin, 5 Vout, 6 Aout Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Protection Specification Over Current Protection General Specifications MTBF Weight Switching Frequency Junction to Case Thermal Resistance Telcordia SR-332, Method II, Parts Stress, 40 °C Ambient, 400 LFM, 100% Load 27,141,984 0.1 1,000 3 Hiccup Mode 11 12 Vin, 0.9 Vout, 3-6 at 5 A/us, 10 uF Cout 12 Vin, 0.9 Vout, 3-6 at 5 A/us, 10 uF Cout 12 Vin, 2.5 Vout, 3-6 at 5 A/us, 10 uF Cout 12 Vin, 2.5 Vout, 3-6 at 5 A/us, 10 uF Cout 10 10 10 20 35 50 80.1 86.5 92.1 125 8 175 8 0 20 7,500 1,500 750 6 Required for input ripple current 12.0 Vin, 2.5 Vout, 0 Aout 12.0 Vin, Module disabled 94 14 10 1 Internal input capacitance rated 16 Vdc max. 3 14.0 6 Test Conditions Min Typ Max
Rev. 12.07.09 LGA C Series 15 of 28
Units V A mA mA uF uF A uF uF uF uF mV mV mV % % % mV us mV us A Hours oz kHz °C/W
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA06C
All Inputs and Outputs
6.1 6.08 6.06 6.04 6.02 6 5.98 5.96 5.94 5.92 5.9 30 100 LFM
Rev. 12.07.09 LGA C Series 16 of 28
2.50V Efficiency
0.95 0.9 0.85 0.8 3 Vin 5 Vin 7 Vin 12 Vin 13.8 Vin 0 2 4 6
Output Current (A)
35
40
45
50
55
60
65
70
75
80
85
Ambient (C)
Output Current (A)
Figure 20: 2.5 V Efficiency vs. Load
Figure 19: Thermal Derating Curve for All Inputs and Outputs
5.01V Efficiency
1 0.95 0.9 0.85 0.8 0 2 4 6
Figure 22: Remote On/Off (Channel 1: Output Voltage, Channel 2: PGood, Channel 3: Enable)
7 Vin 12 Vin 13.8 Vin
Figure 21: 5 V Efficiency vs. Load
Figure 23: Typical Output Ripple
Figure 24: Transient Response 100% - 50% (Channel 4: Current Step at 2 A/div, Channel 1: Output Voltage Deviation)
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA06C
Rev. 12.07.09 LGA C Series 17 of 28
Figure 25: Transient Response 50% - 100% (Channel 4: Current Step at 2 A/div, Channel 1: Output Voltage Deviation)
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA10C
Parameter Input Specifications Input Voltage Input Current (Max) Input Current (No Load) Input Current (Standby) Input Capacitance (Internal) Input Capacitance (External) Output Specifications Output Current Output Capacitance (Internal) Output Capacitance (External) 12 Vin, 0.9 Vout (Startup capacitance) 12 Vin, 2.5 Vout (Startup capacitance) 12 Vin, 5.0 Vout (Startup capacitance) Output Ripple/Noise (Peak/Peak) 5 Vin, 0.9 Vout, 10 uF Cout 12 Vin, 2.5 Vout, 10 uF Cout 12 Vin, 5 Vout, 10 uF Cout Efficiency 5 Vin, 0.9 Vout, 10 Aout 12 Vin, 2.5 Vout, 10 Aout 12 Vin, 5 Vout, 10 Aout Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Protection Specification Over Current Protection General Specifications MTBF Weight Switching Frequency Junction to Case Thermal Resistance Telcordia SR-332, Method II, Parts Stress, 40 °C Ambient, 400 LFM, 100% Load 27,141,984 0.1 1,000 9 Hiccup Mode 20 12 Vin, 0.9 Vout, 5-10 at 5 A/us, 10 uF Cout 12 Vin, 0.9 Vout, 5-10 at 5 A/us, 10 uF Cout 12 Vin, 2.5 Vout, 5-10 at 5 A/us, 10 uF Cout 12 Vin, 2.5 Vout, 5-10 at 5 A/us, 10 uF Cout 10 10 10 30 40 45 76.6 85.9 91.7 90 8 135 8 0 20 7,500 2,400 1,200 10 Required for input ripple current 12.0 Vin, 2.5 Vout, 0 Aout 12.0 Vin, Module disabled 100 14 10 1 Internal input capacitance rated 16 Vdc max. 3 14.0 10 Test Conditions Min Typ Max
Rev. 12.07.09 LGA C Series 18 of 28
Units V A mA mA uF uF A uF uF uF uF mV mV mV % % % mV us mV us A Hours oz kHz °C/W
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA10C
0.9V 3.3Vin
10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 30 40 50 60 Ambient (C) 70 80
10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 30 40 50 60 Ambient (C) 70 80
Rev. 12.07.09 LGA C Series 19 of 28
0.9V 5Vin
Output Current (A)
100LF M 200LF M 300LF M 400LF M
Output Current (A)
100LF M
Figure 26: Thermal Derating Curve - 0.9 V
Figure 27: 2 Thermal Derating Curve - 0.9 V
0.9V 12Vin
10 9.8 9.6 9.4 9.2 9 8.8 8.6 8.4 8.2 8 30 40 50 60 Ambient (C) 70 80
10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 30 40 50
2.5V 3.3Vin
Output Current (A)
100LF M 200LF M 300LF M 400LF M
Output Current (A)
100LF M 200LF M 300LF M 400LF M
60 Ambient (C)
70
80
Figure 28: Thermal Derating Curve - 0.9 V
Figure 29: Thermal Derating Curve - 2.5 V
2.5V 5Vin
10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 30 40 50 60 Ambient (C) 70 80 100LF M 200LF M 300LF M 400LF M
2.5V 12Vin
10 9.8 9.6 9.4 9.2 9 8.8 8.6 8.4 8.2 8 30 40 50 60 Ambient (C) 70 80
Output Current (A)
Output Current (A)
100LF M 200LF M 300LF M 400LF M
Figure 30: Thermal Derating Curve - 2.5 V
Figure 31: Thermal Derating Curve - 2.5 V
Technical Reference Note
Embedded Power for Business-Critical Continuity
Rev. 12.07.09 LGA C Series 20 of 28
5V 12Vin
10 9.8 9.6 9.4 9.2 9 8.8 8.6 8.4 8.2 8 30 40 50 60 Ambient (C) 70 80 100LF M 200LF M 300LF M 400LF M
2.5V Efficiency
0.95 0.9 0.85 0.8 0 5 Output Current (A)
Figure 33: 2.5 V Efficiency vs. Load
3 Vin 5 Vin 7 Vin 12 Vin 13.8 Vin 10
Output Current (A)
Figure 32: Thermal Derating Curve - 5 V
5.0V Efficiency
1 0.95 0.9 0.85 0 5 Output Current (A)
Figure 34: 5 V Efficiency vs. Load Figure 35: Remote On/Off (Channel 1: Output Voltage, Channel 2: PGood, Channel 3: Enable)
7 Vin 12 Vin 13.8 Vin
10
Figure 36: Typical Output Ripple
Figure 37: Transient Response 100% - 50% (Channel 1: Output Voltage Deviation, Channel 2: Current Step at 2 A/div)
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA10C
Rev. 12.07.09 LGA C Series 21 of 28
Figure 38: Transient Response 50% - 100% (Channel 1: Output Voltage Deviation, Channel 2: Current Step at 2 A/div)
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA20C
Parameter Input Specifications Input Voltage Input Current (Max) Input Current (No Load) Input Current (Standby) Input Capacitance (Internal) Input Capacitance (External) Output Specifications Output Current Output Capacitance (Internal) Output Capacitance (External) 12 Vin, 0.9 Vout (Startup capacitance) 12 Vin, 2.5 Vout (Startup capacitance) 12 Vin, 5.0 Vout (Startup capacitance) Output Ripple/Noise (Peak/Peak) 5 Vin, 0.9 Vout, 10 uF Cout 12 Vin, 2.5 Vout, 10 uF Cout 12 Vin, 5 Vout, 10 uF Cout Efficiency 5 Vin, 0.9 Vout, 20 Aout 12 Vin, 2.5 Vout, 20 Aout 12 Vin, 5 Vout, 20 Aout Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Dynamic Load Response (Peak Deviation) Dynamic Load Response (Setting Time) Protection Specification Over Current Protection General Specifications MTBF Weight Switching Frequency Junction to Case Thermal Resistance Telcordia SR-332, Method II, Parts Stress, 40 °C Ambient, 400 LFM, 100% Load 28,388,596 0.1 800 2 Hiccup Mode 27 12 Vin, 0.9 Vout, 10-20 at 5 A/us, 50 uF Cout 12 Vin, 0.9 Vout, 10-20 at 5 A/us, 50 uF Cout 12 Vin, 2.5 Vout, 10-20 at 5 A/us, 50 uF Cout 12 Vin, 2.5 Vout, 10-20 at 5 A/us, 50 uF Cout 50 50 50 25 45 70 77.3 86.6 91.2 95 12 175 20 0 20 7,500 2,400 500 20 Required for input ripple current 12.0 Vin, 2.5 Vout, 0 Aout 12.0 Vin, Module disabled 87 13 10 10 Internal input capacitance rated 16 Vdc max. 4.5 14.0 20 Test Conditions Min Typ Max
Rev. 12.07.09 LGA C Series 22 of 28
Units V A mA mA uF uF A uF uF uF uF mV mV mV % % % mV us mV us A Hours oz kHz °C/W
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA20C
0.9Vout 5Vin
20 18
Output Current (A)
Output Current (A)
Rev. 12.07.09 LGA C Series 23 of 28
0.9Vout 12Vin
20 18 16 14 12 10 8 6 4 2 100LFM 200LFM 300LFM 400LFM
100LF M 200LF M 300LF M 400LF M
16 14 12 10 8 6 4 2 30 40 50 60 Ambient (C) 70 80
30
40
50
60 Ambient (C)
70
80
Figure 39: Thermal Derating Curve (5 Vin - 0.9 Vout)
Figure 40: Thermal Derating Curve (12 Vin - 0.9 Vout)
2.5Vout 5Vin
20 18
Output Current (A)
Output Current (A)
2.5Vout 12Vin
20 18 16 14 12 10 8 6 4 2 100LFM 200LFM 300LFM 400LFM
100LF M 200LF M 300LF M 400LF M
16 14 12 10 8 6 4 2 30 40 50 60 Ambient (C) 70 80
30
40
50
60 Ambient (C)
70
80
Figure 41: Thermal Derating Curve (5 Vin - 2.5 Vout)
Figure 42: Thermal Derating Curve (12 Vin - 2.5 Vout)
5Vout 12Vin
20 18
Output Current (A) Output Current (A)
0.9Vout 5Vin
20 18 16 14 12 10 8 6 4 2 100LFM 200LFM
100LF M 200LF M 300LF M 400LF M
16 14 12 10 8 6 4 2 30 40 50 60 Ambient (C) 70 80
30
40
50
60 Ambient (C)
70
80
Figure 43: Thermal Derating Curve (12 Vin - 5 Vout)
Figure 44: Thermal Derating Curve (5 Vin - 0.9 Vout) with 0.5" Heatsink
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA20C
0.9Vout 12Vin
20 18
Output Current (A)
Rev. 12.07.09 LGA C Series 24 of 28
2.5Vout 5Vin
20 18
Output Current (A)
16 14 12 10 8 6 4 2 30 40 50 60 Ambient (C) 70 80 100LFM 200LFM 300LFM
16 14 12 10 8 6 4 2 30 40 50 60 Ambient (C) 70 80 100LFM 200LFM 300LFM 400LFM
Figure 45: Thermal Derating Curve (12 Vin - 0.9 Vout) with 0.5" Heatsink
2.5Vout 12Vin
20 18
Output Current (A) Output Current (A)
Figure 46: Thermal Derating Curve (5 Vin - 2.5 Vout) with 0.5" Heatsink
5Vout 12Vin
20 18 16 14 12 10 8 6 4 2 100LFM 200LFM 300LFM 400LFM
16 14 12 10 8 6 4 2 30 40 50 60 Ambient (C) 70 80 100LFM 200LFM 300LFM 400LFM
30
40
50
60 Ambient (C)
70
80
Figure 47: Thermal Derating Curve (12 Vin - 2.5 Vout) with 0.5" Heatsink
Figure 48: Thermal Derating Curve (12 Vin - 5 Vout) with 0.5" Heatsink
2.51V Efficiency
0.95 0.9 0.85 0.8 0 5 10 15 20 Output Current (A)
Figure 49: 2.5 V Efficiency vs. Load
5.06V Efficiency
1 5 Vin 7 Vin 12 Vin 13.8 Vin 0.95 0.9 0.85 0.8 0.75 0 5 10 15 20 Output Current (A)
Figure 50: 5 V Efficiency vs. Load
7 Vin 12 Vin 13.8 Vin
Technical Reference Note
Embedded Power for Business-Critical Continuity
LGA20C
Rev. 12.07.09 LGA C Series 25 of 28
Figure 51: Remote On/Off (Channel 1: Output Voltage, Channel 2: PGood, Channel 3: Enable)
Figure 52: Typical Output Ripple
Figure 53 Transient Response 50% - 100% (Channel 1: Output Voltage Deviation, Channel 4: Current Step at 5 A/div )
Figure 54: Transient Response 100% - 50% (Channel 1: Output Voltage Deviation, Channel 4: Current Step at 5 A/div)
Technical Reference Note
Embedded Power for Business-Critical Continuity
Mechanical drawings
.139 3.53 MAX .139 A
Rev. 12.07.09 LGA C Series 26 of 28
SECTION A-A SCALE 4 : 1 SECTION A-A SCALE 4 : 1 .020±.003 0.51±0.08 .031 0.79 PCB .020±.003 0.51±0.08 REF
A A
3.53 MAX
.102 2.59 REF
A A
.650 16.51 MAX .650 16.51 MAX .650 16.51 MAX .650 16.51 MAX
.102 2.59 REF A
Component Height .031 0.79 PCB REF Model # DIM A in (mm)
LGA03 LGA06 LGA10
.008 A
0.129 (3.27)
A
LGA20
0.210 (5.33)
.008 A
Recommended Application
System Board Footprint Solder Paste Stencil
Recommend Stencil thickness of 6 mil (see window paning on page 9)
.487 12.37 .392 9.96 .343 8.71 .294 7.47 .245 6.22 .196 4.98 .147 3.73 .098 2.49
0.220 (5.59) 0.269 (6.83) 0.318 (8.08) 0.367 (9.32) 0.416 (10.57) 0.465 (11.81) 0.514 (13.06) 0.563 (14.30) 0.612 (15.54)
.049 1.24
2X .120 X .110 0.690 (17.53) 0.570 (14.48) PIN 10 0.435 (11.05) PIN 9
0 (0)
00
14X .025 X .025
.104 2.64
0.024" X.024" 14X 13X 00 .042 1.07 .024 0.61 .114 2.90 .177 4.50 0.114" X 0.114" 8X 0.114" X 0.104" 2X .024 0.61 .045 1.14 .090 2.29 .135 3.43 .180 4.57 .225 5.72
PIN 16
PIN 24 PIN 15 0.612 (15.55) 0.567 (14.40) 0.522 (13.26) 0.477 (12.12) 0.432 (10.97) 0.387 (9.83) PIN 11 PIN 8 PIN 4 MODULE OUTLINE
0.295 (7.50) PIN 5 0.125 (3.18) 0 (0) 0.418 (10.62) 0.690 (17.53) 0.564 (14.33) 0 (0) 0.126 (3.20) 0.272 (6.91) 8X .120 X .120 PIN 1
.317 8.05
.114 2.90
.487 12.37
0 (0) KEEP OUT AREA
.114 2.90 .340 8.64 .194 4.93 .048 1.22
Tolerance Note: ± 0.010 (0.25)
Technical Reference Note
Embedded Power for Business-Critical Continuity
Packaging
LGA03C, 06C, 10C EIA DIMENSIONS
W E F So P Po P2 Do D1 T Ao Bo Ko 32.0 ±0.30 1.75 ±0.10 14.2 ±0.10 28.4 ±0.10 24.0 ±0.10 4.0 ±0.10 2.0 ±0.10 Ø 1.5 +0.10 -0.00 Ø 2.0 MIN 0.40 ±0.05 16.6 ±0.10 16.7 ±0.10 3.7 ±0.10
Rev. 12.07.09 LGA C Series 27 of 28
LGA20C LGA20C EIA DIMENSIONS
W E F So P Po P2 Do D1 T Ao Bo 32.0 ±0.30 1.75 ±0.10 14.2 ±0.10 28.4 ±0.10 24.0 ±0.10 4.0 ±0.10 2.0 ±0.10 Ø 1.5 +0.10 -0.00 Ø 2.0 MIN 0.40 ±0.05 16.8 ±0.10 16.8 ±0.10 5.8 ±0.10
Notes: a) b) c) d) e)
Ko
T&R packaging comes in Standard 13" reel size. Tape material: Black, Anti-static Polystyrene Amine free. Surface Resistivity: