EM621FT16EU-55LF

EM621FV16BU Series Low Power, 128Kx16 SRAM Document Title 128K x16 bit Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No. 0.0 0.1 History Initial Draft 0.1 Revision Revised VOH(2.2v to 2.4v),tOH(15ns to 10ns), tOE-55(30ns to 25ns), tWP-55(45ns to 40ns), tWP-70(55ns to 50ns), tWHZ-70(25ns to 20ns), ICC(2mA to 3mA), ICC1(2mA to 3mA) Fix typo error Draft Date June 28, 2007 July 2, 2007 Remark 0.2 0.2 Revision Nov. 13, 2007 Emerging Memory & Logic Solutions Inc. 4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea Tel : +82-64-740-1712 Fax : +82-64-740-1749~1750 / Homepage : www.emlsi.com Zip Code : 690-719 The attached data sheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to your questions about device. If you have any questions, please contact the EMLSI office. 1 EM621FV16BU Series Low Power, 128Kx16 SRAM 128K x16 Bit Low Power and Low Voltage CMOS Static RAM FEATURES - Process Technology : 0.15mm Full CMOS - Organization : 128K x16 - Power Supply Voltage => EM621FV16BU Series : 2.7V~3.6V - Low Data Retention Voltage : 1.5V (MIN) - Three state output and TTL Compatible - Packaged product designed for 45/55/70ns - Package Type: 44-TSOP2 PRODUCT FAMILY Power Dissipation Product Family EM621FV16BU-45LF EM621FV16BU-55LF EM621FV16BU-70LF Operating Temperature Industrial (-40 ~ 85oC) Industrial (-40 ~ 85oC) Industrial (-40 ~ 85oC) Vcc Range Speed Standby (ISB1, Typ.) 1 µA 1 µA 1 µA Operating (ICC1.Max) 3mA 3mA 3mA PKG Type GENERAL DESCRIPTION The EM621FV16BU series are fabricated by EMLSI’s advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user flexibility of system design. The families also supports low data retention voltage for battery back-up operation with low data retention current. The EM621FV16BU series are available in KGD, JEDEC standard 44 pin 400 mil TSOP2 package. 2.7V~3.6V 2.7V~3.6V 2.7V~3.6V 45ns 55ns 70ns 44-TSOP2 44-TSOP2 44-TSOP2 PIN DESCRIPTION A4 A3 A2 A1 A0 CS I/O 0 I/O 1 I/O 2 I/O 3 VCC VSS I/O 4 I/O 5 I/O 6 I/O 7 WE A16 A15 A14 A13 A12 FUNCTIONAL BLOCK DIAGRAM 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O 15 I/O 14 I/O 13 I/O 12 VSS VCC I/O 11 I/O 10 I/O 9 I/O 8 NC A8 A9 A10 A11 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Pre-charge Circuit EM621FV16BU-45LF A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 VCC VSS Row Select Memory Array 1024 x 2048 I/O0 ~ I/O7 I/O8 ~ I/O15 Data Cont Data Cont I/O Circuit Column Select A10 A11 A12 A13 A14 A15 A16 Name CS OE WE A0~A16 I/O0~I/O15 Function Chip select inputs Output Enable input Write Enable input Address Inputs Data Inputs/Outputs Name Vcc Vss UB LB NC Function Power Supply Ground Upper Byte (I/O8~15) Lower Byte (I/O0~7) No Connection WE OE UB LB CS Control Logic 2 EM621FV16BU Series Low Power, 128Kx16 SRAM ABSOLUTE MAXIMUM RATINGS * Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Operating Temperature Symbol VIN, VOUT VCC PD TA Minimum -0.2 to 4.0V -0.2 to 4.0V 1.0 -40 to 85 Unit V V W o C * Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL DESCRIPTION CS H X L L L L L L L L OE X X H H L L L X X X WE X X H H H H H L L L LB X H L X L H L L H L UB X H X L H L L H L L I/O0-7 High-Z High-Z High-Z High-Z Data Out High-Z Data Out Data In High-Z Data In I/O8-15 High-Z High-Z High-Z High-Z High-Z Data Out Data Out High-Z Data In Data In Mode Deselected Deselected Output Disabled Output Disabled Lower Byte Read Upper Byte Read Word Read Lower Byte Write Upper Byte Write Word Write Power Stand by Stand by Active Active Active Active Active Active Active Active Note: X means don’t care. (Must be low or high state) 3 EM621FV16BU Series Low Power, 128Kx16 SRAM RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Supply voltage Ground Input high voltage Input low voltage 1. 2. 3. 4. Symbol VCC VSS VIH VIL Min 2.7 0 2.2 -0.23) Typ 3.3 0 - Max 3.6 0 VCC + 0.22) 0.6 Unit V V V V TA= -40 to 85oC, otherwise specified Overshoot: VCC +2.0 V in case of pulse width < 20ns Undershoot: -2.0 V in case of pulse width < 20ns Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Input capacitance Input/Ouput capacitance 1. Capacitance is sampled, not 100% tested. Symbol CIN CIO Test Condition VIN=0V VIO=0V Min - Max 8 10 Unit pF pF DC AND OPERATING CHARACTERISTICS Parameter Input leakage current Output leakage current Operating power supply Symbol ILI ILO ICC ICC1 Average operating current ICC2 VIN=VSS to VCC CS=VIH or OE=VIH or WE=VIL or LB=UB=VIH VIO=VSS to VCC IIO=0mA, CS=VIL, VIN=VIH or VIL Cycle time=1µs, 100% duty, IIO=0mA, CS