EM6323FR8BS-85L

EM640FV16FW Series Low Power, 256Kx16 SRAM Document Title 256K x16 bit Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No. 0.0 History Initial Draft Draft Date August 13 , 2003 Remark Emerging Memory & Logic Solutions Inc. 4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea Tel : +82-64-740-1712 Fax : +82-64-740-1749~1750 / Homepage : www.emlsi.com Zip Code : 690-719 The attached data sheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to your questions about device. If you have any questions, please contact the EMLSI office. 1 EM640FV16FW Series Low Power, 256Kx16 SRAM 256K x16 Bit Low Power and Low Voltage CMOS Static RAM FEATURES - Process Technology : 0.18µm Full CMOS - Organization :256K x16 - Power Supply Voltage => EM640FV16FW : 2.7~3.6V - Three state output and TTL Compatible - Packaged product designed for 55/70ns GENERAL PHYSICAL SPECIFICATIONS - Backside die surface of polished bare silicon - Typical Die Thickness = 725um - Typical top-level metalization : => Metal ( Ti/TiN/Al-Cu 0.5% ) : 5.7K Angstroms thickness - Topside Passivation : => 7K Angstroms PE-SiN - Typical Pad Size : 90.0um x 80.0um - Wafer diameter : 8 inch OPTIONS - C1/W1 : DC Probed Die/Wafer @ Hot Temp - C2/W2 : DC/AC Probed Die/Wafer @ Hot Temp PAD DESCRIPTIONS Name CS1, CS2 OE WE A0~A17 I/O1~I/O16 Function Chip select inputs Output Enable input Write Enable input Address Inputs Data Inputs/Outpus Name Vcc Vss UB LB *NC Function Power Supply Ground Upper Byte (I/O9~16) Lower Byte (I/O1~8) No Connection 2 EM640FV16FW Series Low Power, 256Kx16 SRAM FUNCTIONAL SPECIFICATIONS There are 3 classifications for EMLSI die and wafers products, which are C1 and C2 for die and W1 and W2 for wafer, respectively. Each die and wafer support dedicated charateristics and probe the eletrical parameters within their specifications. Followings are brief information for die and wafer classifications. Please refer to packaged specifications for more information but these parameters are not guaranteed at bare die and wafer. − C1 LEVEL DIE OR W1 LEVEL WAFER The DC parameters are measured by specification for C1 level die or W1 level wafer. The DC parameters measured at 70°C temperature, which called ‘Hot DC Sorting’ Other parameters are not guaranteed and warranted including device reliability. Please refer to qualification report for device reliability and package level datasheets for electrical parameters. − C2 LEVEL DIE OR W2 LEVEL WAFER The DC parameters and selected AC parameters are measured with for C2 level die or W2 level wafer. The DC characteristics of C2 die and W2 wafer is tested based on DC specifications of C1 level die and W1 level wafer. The DC and specified AC parameters are tested at 70°C temperature, which called ‘Hot DC & Selective AC Sorting’. Other parameters are not guaranteed and warranted including device reliability. Please refer to qualification report for device reliability and package level datasheets for electrical parameters. C2 level die and W2 level wafer probe following AC parameter. − tRC, tAA, tCO − tWC, tCW PACKAGING Individual device will be packed in anti-static trays. − Chip Trays : A 2-inch square waffle style carrier for die with separate compartments for each die. Commonly referred to as a waffle pack, each tray has a cavity size selected for the device that allows for easy loading and unloading and prevents rotation. The tray itself is made of conductive material to reduce the danger of damage to the die from electrostatic discharge. The chip carriers will be labeled with the following information : − EMLSI wafer lot number − EMLSI part number − Quantity − Jar Packing : Jar packing is made by EMLSI and used by many customers that we deliver the requested die as wafer. The pack is consisted of clean paper to wrap the wafer, high cushioned sponge between wafers and hardly fragile plastic box with sponge. Each pack has typically 25 wafers and then several packs are put into larger box depending on amounts of wafers. Bond Pad #1 at Top Die orientation in chip carriers STORAGE AND HANDLING EMLSI recommends the die stored in a controlled environment with filtered nitrogen. The carrier must be opened at ESD safe environment when inspection and assembly. 3 EM640FV16FW Series Low Power, 256Kx16 SRAM ABSOLUTE MAXIMUM RATINGS * Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Operating Temperature Symbol VIN, VOUT VCC PD TA Ratings -0.2 to Vcc+0.3(Max.4.0V) -0.2 to 4.0V 1.0 -40 to 85 Unit V V W o C * Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL DESCRIPTION CS1 H X X L L L L L L L L CS2 X L X H H H H H H H H OE X X X H H L L L X X X WE X X X H H H H H L L L LB X X H L X L H L L H L UB X X H X L H L L H L L I/O1-8 High-Z High-Z High-Z High-Z High-Z Data Out High-Z Data Out Data In High-Z Data In I/O9-16 High-Z High-Z High-Z High-Z High-Z High-Z Data Out Data Out High-Z Data In Data In Mode Deselected Deselected Deselected Output Disabled Output Disabled Lower Byte Read Upper Byte Read Word Read Lower Byte Write Upper Byte Write Word Write Power Stand by Stand by Stand by Active Active Active Active Active Active Active Active Note: X means don’t care. (Must be low or high state) 4 EM640FV16FW Series Low Power, 256Kx16 SRAM RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Supply voltage Ground Input high voltage Input low voltage 1. 2. 3. 4. Symbol VCC VSS VIH VIL Min 2.7 0 2.2 -0.23) Typ 3.3 0 - Max 3.6 0 VCC + 0.22) 0.6 Unit V V V V TA= -40 to 85oC, otherwise specified Overshoot: VCC +2.0 V in case of pulse width < 20ns Undershoot: -2.0 V in case of pulse width < 20ns Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Input capacitance Input/Ouput capacitance 1. Capacitance is sampled, not 100% tested Symbol CIN CIO Test Condition VIN=0V VIO=0V Min - Max 8 10 Unit pF pF DC AND OPERATING CHARACTERISTICS Parameter Input leakage current Output leakage current Operating power supply Symbol ILI ILO ICC ICC1 Average operating current ICC2 Output low voltage Output high voltage Standby Current (TTL) VOL VOH ISB VIN=VSS to VCC CS1=VIH or CS2=VIL or OE=VIH or WE=VIL or LB=UB=VIH VIO=VSS to VCC IIO=0mA, CS1=VIL, CS2=WE=VIH, VIN=VIH or VIL Cycle time=1µs, 100% duty, IIO=0mA, CS1VCC-0.2V (CS1 controlled) or 0V