EM632AFP8EW-55LF

EM640FP16 Series Low Power, 256Kx16 SRAM Document Title 256K x16 bit Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No. 0.0 0.1 0.2 History Initial Draft 2’nd Draft 3’rd Draft Changed Icc, Icc1 value Changed ISB1 test conditions, Changed VDR & IDR measurement condition Draft Date October 24 , 2002 November 11 , 2002 December 23 , 2002 Remark Preliminary 0.3 0.4 4’th Draft 5’th Draft Add Pb-free part number EM640FP16: Changed Icc2 value Changed Package Dimension February 13 , 2004 April 11 , 2006 Emerging Memory & Logic Solutions Inc. IT Venture Tower Eastside 11F, 78, Karac-Dong, Songpa-Ku, Seoul, Rep.of Korea Zip Code : 138-160 Tel : +82-2-2142-1759~1766 Fax : +82-2-2142-1769 / Homepage : www.emlsi.com The attached datasheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to your questions about device. If you have any questions, please contact the EMLSI office. 1 EM640FP16 Series Low Power, 256Kx16 SRAM FEATURES • • • • • • Process Technology : 0.18µm Full CMOS Organization : 256K x 16 bit Power Supply Voltage : 1.65V ~ 2.2V Low Data Retention Voltage : 1.0V(Min.) Three state outputs Package Type : 48-FPBGA 6.0x7.0 GENERAL DESCRIPTION The EM640FP16 families are fabricated by EMLSI’s advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user flexibility of system design. The families also supports low data retention voltage for battery back-up operation with low data retention current. PRODUCT FAMILY Power Dissipation Product Family Operating Temperature Vcc Range Speed Standby (ISB1, Typ.) 1 µA O perating (ICC1.Max) 2 mA PKG Type 48-FPBGA (6.0x7.0) EM640FP16 Industrial (-40 ~ 85oC) 1.65~2.2V 70ns1) 1. The parameter is measured with 30pF test load. PIN DESCRIPTION 1 A B C D E F G H 2 3 4 5 6 FUNCTIONAL BLOCK DIAGRAM Pre-charge Circuit LB I/O9 OE UB A0 A3 A5 A17 DNU A14 A12 A9 A1 A4 A6 A7 A16 A15 A13 A10 A2 CS1 I/O2 I/O4 I/O5 I/O6 WE A11 CS2 I/O1 I/O3 VCC VSS I/O7 I/O8 DNU A11 A12 A13 A14 A15 A16 A17 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 VCC Row Select VSS I/O10 I/O 11 VSS V CC I/O 12 I/O 13 Memory Array 2048 x 2048 I/O1 ~ I/O8 I/O9 ~ I/O16 Data Cont I/O15 I/O 14 I/O16 DNU DNU A8 Data Cont I/O Circuit Column Select 48-FPBGA : Top view (ball down) WE OE UB LB Control Logic Name CS1,CS2 OE WE A 0~A17 Function Chip select inputs Output Enable input Write Enable input A ddress Inputs Name Vcc Vss UB LB DNU Function Power Supply Ground Upper Byte (I/O9~16) Lower Byte (I/O1~8) Do Not Use CS1 CS2 I/O 1~I/O16 Data Inputs/outputs 2 EM640FP16 Series Low Power, 256Kx16 SRAM ABSOLUTE MAXIMUM RATINGS * Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Operating Temperature Symbol VIN, VOUT VCC PD TA Minimum -0.5 to 2.5V -0.3 to 2.5V 1.0 -40 to 85 Unit V V W oC * Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL DESCRIPTION CS1 H X X L L L L L L L L CS2 X L X H H H H H H H H OE X X X H H L L L X X X WE X X X H H H H H L L L LB X X H L X L H L L H L UB X X H X L H L L H L L I/O1-8 High-Z High-Z High-Z High-Z High-Z Data Out High-Z Data Out Data In High-Z Data In I/O9-16 High-Z High-Z High-Z High-Z High-Z High-Z Data Out Data Out High-Z Data In Data In Mode Deselected Deselected Deselected Output Disabled Output Disabled Lower Byte Read Upper Byte Read Word Read Lower Byte Write Upper Byte Write Word Write Power Stand by Stand by Stand by Active Active Active Active Active Active Active Active Note: X means don’t care. (Must be low or high state) 3 EM640FP16 Series Low Power, 256Kx16 SRAM RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Supply voltage Ground Input high voltage Input low voltage 1. 2. 3. 4. Symbol VCC VSS VIH VIL Min 1.65 0 1.4 -0.33) Typ 1.8 0 - Max 2.2 0 VCC + 0.32) 0.4 Unit V V V V TA= -40 to 85oC, otherwise specified Overshoot: VCC +1.0 V in case of pulse width < 20ns Undershoot: -1.0 V in case of pulse width < 20ns Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Input capacitance Input/Ouput capacitance 1. Capacitance is sampled, not 100% tested Symbol CIN CIO Test Condition VIN=0V VIO=0V Min - Max 8 10 Unit pF pF DC AND OPERATING CHARACTERISTICS Parameter Input leakage current Output leakage current Operating power supply Symbol ILI ILO ICC ICC1 Average operating current ICC2 Output low voltage Output high voltage VOL VOH Cycle time = Min, IIO=0mA, 100% duty, CS1=VIL, CS2=V IH , LB=V IL or/and UB =VIL VIN =V IL or VIH IOL = 0.1mA IOH = -0.1mA CS1>V CC-0.2V, CS2>VCC-0.2V (CS 1 controlled) or 0V