EM645FS16BT-10LL

EM620FU16B Series Low Power, 128Kx16 SRAM Document Title 128K x16 bit Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No. 0.0 0.1 History Initial Draft 0.1 Revision Fix typo error Draft Date Oct. 31, 2007 Nov. 16, 2007 Remark Emerging Memory & Logic Solutions Inc. 4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea Tel : +82-64-740-1712 Fax : +82-64-740-1749~1750 / Homepage : www.emlsi.com Zip Code : 690-719 The attached data sheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to your questions about device. If you have any questions, please contact the EMLSI office. 1 EM620FU16B Series Low Power, 128Kx16 SRAM 128K x16 Bit Low Power and Low Voltage CMOS Static RAM FEATURES - Process Technology : 0.15mm Full CMOS - Organization : 128K x16 - Power Supply Voltage => EM620FU16B Series: 2.7V~3.3V - Low Data Retention Voltage : 1.5V (MIN) - Three state output and TTL Compatible - Packaged product designed for 45/55/70ns - Package Type: 48-FpBGA PRODUCT FAMILY Power Dissipation Product Family EM620FU16B-45LF EM620FU16B-55LF EM620FU16B-70LF Operating Temperature Industrial (-40 ~ 85oC) Industrial (-40 ~ 85oC) Industrial (-40 ~ 85oC) Vcc Range Speed Standby (ISB1, Typ.) 1µA 1µA 1µA Operating (ICC1.Max) 3mA 3mA 3mA PKG Type GENERAL DESCRIPTION The EM620FU16B series are fabricated by EMLSI’s advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user flexibility of system design. The families also supports low data retention voltage for battery back-up operation with low data retention current. The EM620FU16B series are available in KGD and JEDEC standard 48 pin 6mm x 7mm BGA package. 2.7V~3.3V 2.7V~3.3V 2.7V~3.3V 45ns 55ns 70ns 48-FpBGA 48-FpBGA 48-FpBGA PIN DESCRIPTIO 1 A B C D E F G H 2 3 4 5 6 FUNCTIONAL BLOCK DIAGRAM LB I/O8 OE UB A0 A3 A5 A1 A4 A6 A7 A16 A15 A13 A10 A2 CS1 I/O1 I/O3 I/O4 I/O5 WE A11 CS2 I/O0 Row Select Pre-charge Circuit I/O9 I/O10 VSS VCC I/O2 VCC VSS I/O6 I/O7 DNU I/O11 DNU I/O12 DNU A14 A12 A9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 VCC VSS Memory Array 1024 x 2048 I/O14 I/O13 I/O15 DNU DNU A8 I/O0 ~ I/O7 I/O8 ~ I/O15 Data Cont Data Cont I/O Circuit Column Select 48-FpBGA: Top view (Ball down) A10 A11 A12 A13 A14 A15 A16 Name CS1, CS2 OE WE A0~A16 I/O0~I/O15 Function Chip select inputs Output Enable input Write Enable input Address Inputs Data Inputs/Outputs Name Vcc Vss UB LB NC Function Power Supply Ground Upper Byte (I/O9~16) Lower Byte (I/O1~8) No Connection WE OE UB LB CS1 CS2 Control Logic 2 EM620FU16B Series Low Power, 128Kx16 SRAM ABSOLUTE MAXIMUM RATINGS * Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Operating Temperature Symbol VIN, VOUT VCC PD TA Minimum -0.2 to 4.0V -0.2 to 4.0V 1.0 -40 to 85 Unit V V W o C * Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL DESCRIPTION CS1 H X X L L L L L L L L CS2 X L X H H H H H H H H OE X X X H H L L L X X X WE X X X H H H H H L L L LB X X H L X L H L L H L UB X X H X L H L L H L L I/O0-7 High-Z High-Z High-Z High-Z High-Z Data Out High-Z Data Out Data In High-Z Data In I/O8-15 High-Z High-Z High-Z High-Z High-Z High-Z Data Out Data Out High-Z Data In Data In Mode Deselected Deselected Deselected Output Disabled Output Disabled Lower Byte Read Upper Byte Read Word Read Lower Byte Write Upper Byte Write Word Write Power Stand by Stand by Stand by Active Active Active Active Active Active Active Active Note: X means don’t care. (Must be low or high state) 3 EM620FU16B Series Low Power, 128Kx16 SRAM RECOMMENDED DC OPERATING CONDITIONS 1) Parameter Supply voltage Ground Input high voltage Input low voltage 1. 2. 3. 4. Symbol VCC VSS VIH VIL Min 2.7 0 2.0 -0.23) Typ 3.0 0 - Max 3.3 0 VCC + 0.22) 0.6 Unit V V V V TA= -40 to 85oC, otherwise specified Overshoot: VCC +2.0 V in case of pulse width < 20ns Undershoot: -2.0 V in case of pulse width < 20ns Overshoot and undershoot are sampled, not 100% tested. CAPACITANCE1) (f =1MHz, TA=25oC) Item Input capacitance Input/Ouput capacitance 1. Capacitance is sampled, not 100% tested. Symbol CIN CIO Test Condition VIN=0V VIO=0V Min - Max 8 10 Unit pF pF DC AND OPERATING CHARACTERISTICS Parameter Input leakage current Output leakage current Operating power supply Symbol ILI ILO ICC ICC1 Average operating current ICC2 VIN=VSS to VCC CS1=VIH or CS2=VIL or OE=VIH or WE=VIL or LB=UB=VIH VIO=VSS to VCC IIO=0mA, CS1=VIL, CS2=WE=VIH, VIN=VIH or VIL Cycle time=1µs, 100% duty, IIO=0mA, CS1VCC-0.2V, VINVCC-0.2V Cycle time = Min, IIO=0mA, 100% duty, CS1=VIL, CS2=VIH, VIN=VIL or VIH IOL = 2.1mA IOH = -1.0mA CS1=VIH, CS2=VIL, Other inputs=VIH or VIL CS1>VCC-0.2V, CS2>VCC-0.2V (CS1 controlled) or 0V