Enpirion® Power Datasheet
EY1501DI-ADJ High Performance 1A LDO
Device Is Discontinued And No Longer Available
EY1501DI-ADJ
Datasheet
The EY1501DI-ADJ is a low voltage, high current, single
output LDO specified at 1A output current. This LDO
operates from input voltages from 2.2V to 6V, and is
capable of providing output voltages from 0.8V to 5V.
The EY1501DI-ADJ features an adjustable output.
Features
A sub-micron BiCMOS process is utilized to deliver the
best in class analog performance and overall value. This
CMOS LDO will consume significantly lower quiescent
current as a function of load compared to bipolar LDOs,
which translates into higher efficiency and packages
with smaller footprints. State of the art internal
compensation achieves a very fast load transient
response. An external capacitor on the soft-start pin
provides an adjustable soft-starting ramp. The EN
feature allows the part to be placed into a low quiescent
current shutdown mode. A Power OK logic output
signals a fault condition.
• Very Low 130mV Dropout Voltage at VOUT = 2.5V
• ±0.2% initial VOUT Accuracy
• ±1.8% VOUT Accuracy Guaranteed Over Line, Load
and TJ = -40°C to +125°C
• Very Fast Transient Response
• Programmable Soft-starting
• Power OK Output
• Excellent 58dB PSRR at 1kHz
• Current Limit Protection
• Thermal Shutdown Function
• Available in a 10 Ld DFN Package
• Pb-Free (RoHS Compliant)
Applications
Table 1 shows the EY1501DI-ADJ features.
TABLE 1. EY1501DI-ADJ Features
• DSP, FPGA and µP Core Power Supplies
PART NUMBER
PROGRAMMABLE
ILIMIT
ILIMIT
(DEFAULT)
VOUT
EY1501DI-ADJ
No
1.75A
ADJ
• Noise-Sensitive Instrumentation Systems
• Post Regulation of Switched Mode Power Supplies
• Industrial Systems
• Medical Equipment
• Telecommunications and Networking Equipment
• Servers
• Hard Disk Drives (HD/HDD)
10
10µF
CIN
VIN
VOUT
9 V
IN
VOUT
1
2
82pF
CPB
10k
R3
VFB
3
1.00k
R1
EY1501DI-ADJ
7
6
0.01µF
CSS
EN
POK
2.61k
R2
1.8V
140
10µF
COUT
120
100k
RPOK
4
DROPOUT VOLTAGE (mV)
2.5V ± 10%
100
80
60
40
20
VOUT = 2.5V
SS
GND
0
5
0
0.2
0.4
0.6
0.8
1.0
OUTPUT CURRENT (A)
FIGURE 2. DROPOUT vs LOAD CURRENT
FIGURE 1. TYPICAL APPLICATION CIRCUIT
101 Innovation Drive
San Jose, CA 95134
www.altera.com
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products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use
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ISO
9001:2008
Registered
Altera Corporation
Subscribe
10039
August 28, 2020
Rev C
Page 2
Ordering Information
PART NUMBER
(Note 3)
EY1501DI-ADJ (Note 1)
PART MARKING
1501
VOUT VOLTAGE
(Note 2)
TEMP RANGE (°C)
ADJ
-40 to +125
PACKAGE
(Pb-Free)
10 Ld 3x3 DFN
PKG DWG. #
L10.3x3
NOTES:
1. Please refer to Packing and Marking Information: www.altera.com/support/reliability/packing/rel-packing-and-marking.html
2. For other output voltages, contact Altera Enpirion Marketing.
3. These Altera Enpirion Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb
and Pb-free soldering operations). Altera Enpirion Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Enpirion Power Datasheet EY1501DI-ADJ High Performance 1A LDO
10039
August 28, 2020
Altera Corporation
Rev C
Page 3
Pin Configuration
EY1501DI-ADJ
(10 LD 3x3 DFN)
TOP VIEW
VOUT
1
VOUT
2
VFB
3
POK
GND
10 VIN
9
VIN
8
NC
4
7
EN
5
6
SS
EPAD
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1, 2
VOUT
Regulated output voltage. A minimum 10µF X5R/X7R output capacitor is required for stability. See “External Capacitor
Requirements” on page 9 for more details.
3
VFB
This pin is connected to the feedback resistor divider and provides voltage feedback signals for the LDO to set the output
voltage. In addition, the Power OK circuit uses this input to monitor the output voltage status.
4
POK
This is an open drain logic output used to indicate the status of the output voltage. Logic low indicates VOUT is not in
regulation. Must be grounded if not used.
5
GND
Ground.
6
SS
External capacitor on this pin adjusts startup ramp and controls inrush current.
7
EN
VIN independent chip EN. TTL and CMOS compatible.
8
NC
No connection. Leave floating.
9, 10
VIN
Input supply. A minimum of 10µF X5R/X7R input capacitor is required for proper operation. See “External Capacitor
Requirements” on page 9 for more details.
-
EPAD
EPAD at ground potential. It is recommended to solder the EPAD to the ground plane.
Enpirion Power Datasheet EY1501DI-ADJ High Performance 1A LDO
Altera Corporation
10039
August 28, 2020
Rev C
Page 4
Absolute Maximum Ratings
Thermal Information
VIN Relative to GND (Note 4). . . . . . . . . . . . . . . . -0.3V to +6.5V
VOUT Relative to GND (Note 4) . . . . . . . . . . . . . . -0.3V to +6.5V
POK, EN, VFB, SS
Relative to GND (Note 4) . . . . . . . . . . . . . . . . . -0.3V to +6.5V
ESD Rating
Human Body Model (Tested per JESD22 A114F) . . . . . 2.5kV
Machine Model (Tested per JESD22 A115C) . . . . . . . . . 250V
Latch Up (Tested per JESD78C, Class 2, Level A)±100mA at +85°C
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
10 Ld DFN Package (Notes 5, 6).
48
7
Storage Temperature Range . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Recommended Operating Conditions (Notes 7, 8)
Junction Temperature Range (TJ) (Note 7) . . . . -40°C to +125°C
VIN Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .2.2V to 6V
VOUT Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800mV to 5V
POK, EN, VFB, SS relative to GND . . . . . . . . . . . . . . . 0V to 6V
POK Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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