Intel® Advanced Boot Block Flash
Memory (B3)
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Datasheet
Product Features
• Flexible SmartVoltage Technology
— 2.7 V – 3.6 V read/program/erase
— 12 V V PP fast production programming
• 1.65 V – .5 V or 2.7 V – 3.6 V I/O option
— Reduces overall system power
• High Performance
— 2.7 V – 3.6 V: 70 ns max access time
• Optimized Block Sizes
— Eight 8-KB blocks for data, top or
bottom locations
— Up to 127 x 64-KB blocks for code
• Block Locking
— VCC-level control through Write Protect
WP#
• Low Power Consumption
— 9 mA typical read current
• Absolute Hardware-Protection
— VPP = GND option
— VCC lockout voltage
• Extended Temperature Operation
— –40 °C to +85 °C
• Automated Program and Block Erase
— Status registers
• Intel® Flash Data Integrator Software
—Flash Memory Manager
—System Interrupt Manager
—Supports parameter storage, streaming
data (for example, voice)
• Extended Cycling Capability
—Minimum 100,000 block erase cycles
• Automatic Power Savings Feature
—Typical ICCS after bus inactivity
• Standard Surface Mount Packaging
—48-Ball CSP packages
—40-Lead and 48-Lead TSOP packages
• Density and Footprint Upgradeable for
common package
—8-, 16-, 32-, and 64-Mbit densities
• ETOX™ VIII (0.13 µm) Flash
Technology
—16-Mbit and 32-Mbit densities
• ETOX™ VII (0.18 µm) Flash Technology
—16-, 32-, and 64-Mbit densities
• ETOX ™ VI (0.25µm) Flash Technology
—8-, 16-, and 32-Mbit densities
• Bo not use the x8 option for new designs
The Intel® Advanced Boot Block Flash Memory (B3) device, manufactured on the Intel 0.13 µm
and 0.18 µm technologies, is a feature-rich solution at a low system cost. The B3 device in x16 is
available in 48-lead TSOP and 48-ball CSP packages. The x8 option of this product family is
available only in 40-lead TSOP and 48-ball µBGA* packages. For additional information about
this product family, see the Intel website: http://www.intel.com/design/flash.
Notice: This specification is subject to change without notice. Verify with your local Intel sales
office that you have the latest datasheet before finalizing a design.
Order Number: 290580, Revision: 020
18 Aug 2005
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL ® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT.
Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
The Intel® Advanced Boot Block Flash Memory (B3) may contain design defects or errors known as errata which may cause the product to deviate
from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800
548-4725 or by visiting Intel's website at http://www.intel.com.
Intel, the Intel logo, and ETOX are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2005, Intel Corporation.
18 Aug 2005
2
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Contents
1.0 Introduction ............................................................................................................................... 7
1.1
1.2
Nomenclature ....................................................................................................................... 7
Conventions .......................................................................................................................... 8
2.0 Functional Overview .............................................................................................................. 8
3.0 Functional Overview .............................................................................................................. 9
3.1
3.2
Architecture Diagram .......................................................................................................... 10
Memory Maps and Block Organization ............................................................................... 11
3.2.1 Parameter Blocks .................................................................................................. 11
3.2.2 Main Blocks ........................................................................................................... 11
3.2.3 4-Mbit, 8-Mbit, 16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Maps ............. 11
3.2.4 4-Mbit, 8-Mbit, and 16-Mbit Byte-Wide Memory Maps........................................... 20
4.0 Package Information ............................................................................................................ 24
4.1
4.2
4.3
mBGA* and Very Thin Profile Fine Pitch Ball Grid Array (VF BGA) Package .................... 24
TSOP Package ................................................................................................................... 25
Easy BGA Package ............................................................................................................ 26
5.0 Pinout and Signal Descriptions ....................................................................................... 27
5.1
5.2
Signal Pinouts ..................................................................................................................... 27
5.1.1 40-Lead and 48-Lead TSOP Packages ................................................................. 27
Signal Descriptions ............................................................................................................. 30
6.0 Maximum Ratings and Operating Conditions ...........................................................32
6.1
6.2
Absolute Maximum Ratings ................................................................................................ 32
Operating Conditions .......................................................................................................... 33
7.0 Electrical Specifications ..................................................................................................... 34
7.1
7.2
DC Current Characteristics .................................................................................................34
DC Voltage Characteristics.................................................................................................36
8.0 AC Characteristics ................................................................................................................ 37
8.1
8.2
8.3
8.4
8.5
AC Read Characteristics .................................................................................................... 37
AC Write Characteristics..................................................................................................... 41
Erase and Program Timing .................................................................................................45
AC I/O Test Conditions ....................................................................................................... 46
Device Capacitance ............................................................................................................ 46
9.0 Power and Reset Specifications .....................................................................................47
9.1
9.2
9.3
Datasheet
Power-Up/Down Characteristics ......................................................................................... 47
9.1.1 RP# Connected to System Reset .......................................................................... 47
9.1.2 VCC, VPP, and RP# Transitions..............................................................................47
Reset Specifications ........................................................................................................... 48
Power Supply Decoupling................................................................................................... 49
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
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28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
9.4
Power Consumption ........................................................................................................... 49
9.4.1 Active Power.......................................................................................................... 49
9.4.2 Automatic Power Savings (APS) ........................................................................... 49
9.4.3 Standby Power ...................................................................................................... 49
9.4.4 Deep Power-Down Mode....................................................................................... 50
10.0 Operations Overview ........................................................................................................... 50
10.1
Bus Operations ................................................................................................................... 51
10.1.1 Read ...................................................................................................................... 51
10.1.2 Output Disable ....................................................................................................... 52
10.1.3 Standby.................................................................................................................. 52
10.1.4 Deep Power-Down / Reset .................................................................................... 52
10.1.5 Write ...................................................................................................................... 53
11.0 Operating Modes ................................................................................................................... 53
11.1
11.2
11.3
11.4
11.5
Read Array.......................................................................................................................... 54
Read Identifier .................................................................................................................... 56
Read Status Register.......................................................................................................... 56
11.3.1 Clearing the Status Register.................................................................................. 57
Program Mode .................................................................................................................... 57
11.4.1 Suspending and Resuming Programming ............................................................. 58
Erase Mode ........................................................................................................................ 58
11.5.1 Suspending and Resuming Erase ......................................................................... 59
12.0 Block Locking ......................................................................................................................... 62
12.1
12.2
WP# = VIL for Block Locking............................................................................................... 62
WP# = VIH for Block Unlocking........................................................................................... 62
13.0 VPP Program and Erase Voltages ................................................................................... 63
13.1
VPP = VIL for Complete Protection...................................................................................... 63
14.0 Additional Information ........................................................................................................ 63
Appendix A
Write State Machine Current/Next States ................................................. 64
Appendix B
Program and Erase Flowcharts .................................................................... 66
Appendix C
Ordering Information ......................................................................................... 70
18 Aug 2005
4
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Revision History
Revision
Number
Description
-001
Original version
-002
Section 3.4, VPP Program and Erase Voltages, added
Updated Figure 9: Automated Block Erase Flowchart
Updated Figure 10: Erase Suspend/Resume Flowchart (added program to table)
Updated Figure 16: AC Waveform: Program and Erase Operations (updated notes)
IPPR maximum specification change from ±25 µA to ±50 µA
Program and Erase Suspend Latency specification change
Updated Appendix A: Ordering Information (included 8 M and 4 M information)
Updated Figure, Appendix D: Architecture Block Diagram (Block info. in words not bytes)
Minor wording changes
-003
Combined byte-wide specification (previously 290605) with this document
Improved speed specification to 80 ns (3.0 V) and 90 ns (2.7 V)
Improved 1.8 V I/O option to minimum 1.65 V (Section 3.4)
Improved several DC characteristics (Section 4.4)
Improved several AC characteristics (Sections 4.5 and 4.6)
Combined 2.7 V and 1.8 V DC characteristics (Section 4.4)
Added 5 V VPP read specification (Section 3.4)
Removed 120 ns and 150 ns speed offerings
Moved Ordering Information from Appendix to Section 6.0; updated information
Moved Additional Information from Appendix to Section 7.0
Updated figure Appendix B, Access Time vs. Capacitive Load
Updated figure Appendix C, Architecture Block Diagram
Moved Program and Erase Flowcharts to Appendix E
Updated Program Flowchart
Updated Program Suspend/Resume Flowchart
Minor text edits throughout
-004
Added 32-Mbit density
Added 98H as a reserved command (Table 4)
A 1–A20 = 0 when in read identifier mode (Section 3.2.2)
Status register clarification for SR3 (Table 7)
VCC and VCCQ absolute maximum specification = 3.7 V (Section 4.1)
Combined IPPW and ICCW into one specification (Section 4.4)
Combined IPPE and ICCE into one specification (Section 4.4)
Max Parameter Block Erase Time (tWHQV2/tEHQV2) reduced to 4 sec (Section 4.7)
Max Main Block Erase Time (tWHQV3/tEHQV3) reduced to 5 sec (Section 4.7)
Erase suspend time @ 12 V (tWHRH2/tEHRH2) changed to 5 µs typical and 20 µs maximum
(Section 4.7)
Ordering Information updated (Section 6.0)
Write State Machine Current/Next States Table updated (Appendix A)
Program Suspend/Resume Flowchart updated (Appendix F)
Erase Suspend/Resume Flowchart updated (Appendix F)
Text clarifications throughout
-005
µBGA package diagrams corrected (Figures 3 and 4)
IPPD test conditions corrected (Section 4.4)
32-Mbit ordering information corrected (Section 6)
µBGA package top side mark information added (Section 6)
-006
VIH and VILSpecification change (Section 4.4)
ICCS test conditions clarification (Section 4.4)
Added Command Sequence Error Note (Table 7)
Data sheet renamed from Smart 3 Advanced Boot Block 4-Mbit, 8-Mbit, 16-Mbit Flash
Memory Family.
Added device ID information for 4-Mbit x8 device
Removed 32-Mbit x8 to reflect product offerings
Minor text changes
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
5
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Revision
Number
Description
-007
Corrected RP# pin description in Table 2, 3 Volt Advanced Boot Block Pin Descriptions
Corrected typographical error fixed in Ordering Information
-008
4-Mbit packaging and addressing information corrected throughout document
-009
Corrected 4-Mbit memory addressing tables in Appendices D and E
-010
Max ICCD changed to 25 µA
VCC Max on 32 M (28F320B3) changed to 3.3 V
-011
Added 64-Mbit density and faster speed offerings
Removed access time vs. capacitance load curve
-012
Changed references of 32Mbit 80ns devices to 70ns devices to reflect the faster product
offering.
Changed VccMax=3.3V reference to indicate the affected product is the 0.25µm 32Mbit
device.
Minor text edits throughout document.
-013
Added New Pin-1 indicator information on 40 and 48Lead TSOP packages.
Minor text edits throughout document.
-014
Added specifications for 0.13 micron product offerings throughout document
-015
Minor text edits throughout document.
Adjusted ordering information.
Adjusted specifications for 0.13 micron product offerings.
-016
Revised and corrected DC Characteristics Table.
Adjusted package diagram information.
Minor text edits throughout document.
Updated ordering information.
Adjusted specifications for 0.13 micron product offerings.
-017
Updated AC/DC Characteristics Table.
Added TSOP and µBGA* package diagram information.
Minor text edits throughout document.
-018
Updated the layout of the datasheet.
-019
Added line items to Table 34 “Ordering Information: Valid Combinations” on page 70.
-020
Removed all x8 products from ordering information, page 70
18 Aug 2005
6
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
1.0
Introduction
This datasheet describes the specifications for the Intel® Advanced Boot Block Flash Memory (B3)
device (hereafter referred to as the B3 flash memory device).
The B3 flash memory device is optimized for portable, low-power, systems. This family of
products features 1.65 V to 2.5 V or 2.7 V to 3.6 V I/Os, and a low VCC/V PP operating range of
2.7 V to 3.6 V for Read, Program, and Erase operations. The B3 device is also capable of fast
programming at 12 V.
Throughout this document:
• 2.7 V refers to the full voltage range 2.7 V to 3.6 V (except where noted otherwise).
• VPP = 12 V refers to 12 V ±5%.
1.1
Nomenclature
Table 1.
Nomenclature
Term
Datasheet
Definition
0x
Hexadecimal prefix
0b
Binary prefix
Byte
8 bits
Word
16 bits
KW or Kword
1024 words
Mword
1,048,576 words
Kb
1024 bits
KB
1024 bytes
Mb
1,048,576 bits
MB
1,048,576 bytes
APS
Automatic Power Savings
CSP
Chip Scale Package
CUI
Command User Interface
OTP
One Time Programmable
PR
Protection Register
PRD
Protection Register Data
PLR
Protection Lock Register
RFU
Reserved for Future Use
SR
Status Register
SRD
Status Register Data
WSM
Write State Machine
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
7
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
1.2
Conventions
Table 2.
Conventions
Convention
Description
Used interchangeably to refer to the external signal connections on the
package.
Pin or signal
Note:
2.0
For a chip scale package (CSP), the term ball is used in place of pin.
Group Membership Brackets
Square brackets designate group membership or define a group of signals
with similar function (for example, A[21:1], SR[4:1])
Set
When referring to registers, the term set means the bit is a logical 1.
Clear:
When referring to registers, the term clear means the bit is a logical 0.
Block
A group of bits (or words) that erase simultaneously using one block erase
instruction.
Main Block
A block that contains 32 Kwords.
Parameter Block
A block that contains 4 Kwords.
Functional Overview
The B3 flash memory device features the following:
• Enhanced blocking for easy segmentation of code and data or additional design flexibility.
• Program Suspend to Read command.
• VCCQ input of 1.65 V to 2.5 V or 2.7 V to 3.6 V on all I/Os. See Figure 1 through Figure 4 for
pinout diagrams and VCCQ location.
• Maximum program and erase time specification for improved data storage.
Table 3.
B3 Device Feature Summary (Sheet 1 of 2)
Feature
VCC Read Voltage
VPP Program/Erase Voltage
Speed
Memory Arrangement
18 Aug 2005
8
Reference
Section 6.2, Section
7.2
2.7 V– 3.6 V
VCCQ I/O Voltage
Bus Width
28F800B3, 28F160B3,
28F320B3(3), 28F640B3
28F008B3, 28F016B3
1.65 V–2.5 V or 2.7 V– 3.6 V
Section 4.2, 4.4
2.7 V– 3.6 V or 11.4 V– 12.6 V
Section 4.2, 4.4
8 bit
16 bit
70 ns, 80 ns, 90 ns, 100 ns, 110 ns
1024 Kbit x 8 (8 Mbit),
2048 Kbit x 8 (16 Mbit)
512 Kbit x 16 (8 Mbit),
1024 Kbit x 16 (16 Mbit),
2048 Kbit x 16 (32 Mbit),
4096 Kbit x 16 (64 Mbit)
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Table 27
Section 8.1
Section 3.2
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 3.
B3 Device Feature Summary (Sheet 2 of 2)
Feature
28F008B3, 28F016B3
Blocking (top or bottom)
28F800B3, 28F160B3,
28F320B3(3), 28F640B3
Eight 8-Kbyte parameter blocks and
Fifteen 64-Kbyte blocks (8 Mbit) or
Thirty-one 64-Kbyte main blocks (16 Mbit)
Sixty-three 64-Kbyte main blocks (32 Mbit)
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)
WP# locks/unlocks parameter blocks
All other blocks protected using VPP
Locking
Reference
Section 3.2, “Memory
Maps and Block
Organization” on
page 11
Section 12.0
Table 32
Operating Temperature
Extended: –40 °C to +85 °C
Section 6.2, Section
7.2
Program/Erase Cycling
100,000 cycles
Section 6.2, Section
7.2
Packages
40-lead TSOP(1),
48-Ball µBGA* CSP (2)
48-Lead TSOP,
48-Ball µBGA CSP(2),
48-Ball VF BGA
Figure 8, Figure 9
Notes:
1.
32-Mbit and 64-Mbit densities not available in 40-lead TSOP.
2.
8-Mbit densities not available in µBGA* CSP.
3.
VCC Max is 3.3 V on 0.25µm 32-Mbit devices.
3.0
Functional Overview
Intel provides the most flexible voltage solution in the flash industry, providing three discrete
voltage supply pins:
• VCC for Read operation
• VCCQ for output swing
• VPP for Program and Erase operation.
All B3 flash memory devices provide program/erase capability at 2.7 V or 12 V (for fast
production programming), and read with V CC at 2.7 V. Because many designs read from the flash
memory a large percentage of the time, 2.7 V VCC operation can provide substantial power
savings.
The B3 flash memory device family is available in either x8 or x16 packages in the following
densities (see Appendix C, “Ordering Information,” for availability):
• 8-Mbit (8, 388, 608-bit) flash memory organized as 512 Kwords of 16 bits each or 1024
Kbytes of 8-bits each.
• 16-Mbit (16, 777, 216-bit) flash memory organized as 1024 Kwords of 16 bits each or
2048 Kbytes of 8-bits each.
• 32-Mbit (33, 554, 432-bit) flash memory organized as 2048 Kwords of 16 bits each.
• 64-Mbit (67, 108, 864-bit) flash memory organized as 4096 Kwords of 16 bits each.
The parameter blocks are located at either the top (denoted by -T suffix) or the bottom (-B suffix)
of the address map, to accommodate different microprocessor protocols for kernel code location.
The upper two (or lower two) parameter blocks can be locked to provide complete code security
for system initialization code. Locking and unlocking is controlled by Write Protect WP# (see
Section 12.0, “Block Locking” on page 62 for details).
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
9
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
• The Command User Interface (CUI) is the interface between the microprocessor or
microcontroller and the internal operation of the flash memory.
• The internal Write State Machine (WSM) automatically executes the algorithms and timings
necessary for Program and Erase operations (including verification), which unburdens the
microprocessor or microcontroller.
• To indicate the status of the WSM, the Status Register signifies block erase or word program
completion and status.
The B3 flash memory device also provides Automatic Power Savings (APS), which minimizes
system current drain and allows for very low power designs. This mode is entered following the
completion of a read cycle (approximately 300 ns later).
The RP# pin provides additional protection against unwanted command writes that might occur
during system reset and power-up/down sequences due to invalid system bus conditions (see
“Power and Reset Specifications” on page 47).
• Section 10.0, “Operations Overview” on page 50 explains the different modes of operation.
• Section 7.0, “Electrical Specifications” on page 34 and Section 8.0, “AC Characteristics” on
page 37 provide complete current and voltage specifications.
• Section 8.1, “AC Read Characteristics” on page 37 provides read, program, and erase
performance specifications.
3.1
Architecture Diagram
Figure 1.
B3 Architecture Block Diagram
DQ0-DQ15
VCCQ
Input Buffer
Identifier
Register
Status
Register
Power
Reduction
Control
Data
Comparator
Y-Decoder
Y-Gating/Sensing
Data
Register
Output
Multiplexer
Output Buffer
I/O Logic
CE#
WE#
OE#
RP#
Command
User
Interface
WP#
A0-A19
Write State
Machine
Address
Counter
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10
32-KWord
Main Block
X-Decoder
4-KWord
Parameter Block
32-KWord
Main Block
Address
Latch
4-KWord
Parameter Block
Input Buffer
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Program/Erase
Voltage Switch
VPP
VCC
GND
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3.2
Memory Maps and Block Organization
The B3 flash memory device uses an asymmetrically blocked architecture, enabling system
integration of code and data within a single flash memory device. Each block can be erased
independently of other blocks up to 100,000 times. For the address locations of each block, see the
following memory maps:
•
•
•
•
•
3.2.1
Table 4 “16-Mbit and 32-Mbit Word-Wide Memory Addressing Map” on page 11
Table 5 “4-Mbit and 8-Mbit Word-Wide Memory Addressing Map” on page 14
Table 6 “16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map” on page 15
Table 7 “8-Mbit and 16-Mbit Byte-Wide Memory Addressing Map” on page 20
Table 8 “4-Mbit Byte Wide Memory Addressing Map” on page 23
Parameter Blocks
The B3 flash memory device architecture includes parameter blocks to facilitate storing frequently
updated small parameters (such as data traditionally stored in an EEPROM). The word-rewrite
functionality of EEPROMs can be emulated using software techniques. Each flash memory device
contains eight parameter blocks of 8 Kbytes/4 Kwords (8192 bytes/4,096 words) each.
3.2.2
Main Blocks
After the parameter blocks, the remainder of the flash memory array is divided into equal-size main
blocks (65,536 bytes/32,768 words) for data or code storage.
•
•
•
•
The 8-Mbit flash memory device contains 15 main blocks.
The 16-Mbit flash memory device contains 31 main blocks.
The 32-Mbit memory device contains 63 main blocks.
The 64-Mbit memory device contains 127 main blocks.
3.2.3
4-Mbit, 8-Mbit, 16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Maps
Table 4.
16-Mbit and 32-Mbit Word-Wide Memory Addressing Map (Sheet 1 of 4)
16-Mbit and 32-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KW)
16 Mbit
32 Mbit
Size
(KW)
4
FF000-FFFFF
1FF000-1FFFFF
32
1F8000-1FFFFF
4
FE000-FEFFF
1FE000-1FEFFF
32
1F0000-1F7FFF
4
FD000-FDFFF
1FD000-1FDFFF
32
1E80001EFFFF
4
FC000-FCFFF
1FC000-1FCFFF
32
1E00001E7FFF
Datasheet
8 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
16 Mbit
32 Mbit
18 Aug 2005
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28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 4.
16-Mbit and 32-Mbit Word-Wide Memory Addressing Map (Sheet 2 of 4)
16-Mbit and 32-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KW)
16 Mbit
32 Mbit
Size
(KW)
4
FB000-FBFFF
1FB000-1FBFFF
32
1D80001DFFFF
4
FA000-FAFFF
1FA000-1FAFFF
32
1D00001D7FFF
4
F9000-F9FFF
1F9000-1F9FFF
32
1C80001CFFFF
4
F8000-F8FFF
1F8000-1F8FFF
32
1C00001C7FFF
32
F0000-F7FFF
1F0000-1F7FFF
32
1B80001BFFFF
32
E8000-EFFFF
1E8000-1EFFFF
32
1B00001B7FFF
32
E0000-E7FFF
1E0000-1E7FFF
32
1A80001AFFFF
32
D8000-DFFFF
1D8000-1DFFFF
32
1A00001A7FFF
32
D0000-D7FFF
1D0000-1D7FFF
32
198000-19FFFF
32
C8000-CFFFF
1C8000-1CFFFF
32
190000-197FFF
32
C0000-C7FFF
1C0000-1C7FFF
32
188000-18FFFF
32
B8000-BFFFF
1B8000-1BFFFF
32
180000-187FFF
32
B0000-B7FFF
1B0000-1B7FFF
32
178000-17FFFF
32
A8000-AFFFF
1A8000-1AFFFF
32
170000-177FFF
32
A0000-A7FFF
1A0000-1A7FFF
32
168000-16FFFF
32
98000-9FFFF
198000-19FFFF
32
160000-167FFF
32
90000-97FFF
190000-197FFF
32
158000-15FFFF
32
88000-8FFFF
188000-18FFFF
32
150000-157FFF
32
80000-87FFF
180000-187FFF
32
148000-14FFFF
32
78000-7FFFF
178000-17FFFF
32
140000-147FFF
32
70000-77FFF
170000-177FFF
32
138000-13FFFF
32
68000-6FFFF
168000-16FFFF
32
130000-137FFF
32
60000-67FFF
160000-167FFF
32
128000-12FFFF
32
58000-5FFFF
158000-15FFFF
32
120000-127FFF
32
50000-57FFF
150000-157FFF
32
118000-11FFFF
32
48000-4FFFF
148000-14FFFF
32
110000-117FFF
32
40000-47FFF
140000-147FFF
32
108000-10FFFF
32
38000-3FFFF
138000-13FFFF
32
32
30000-37FFF
130000-137FFF
32
F8000-FFFFF
0F8000-0FFFFF
32
28000-2FFFF
128000-12FFFF
32
F0000-F7FFF
0F0000-0F7FFF
18 Aug 2005
12
8 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
16 Mbit
32 Mbit
100000-107FFF
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 4.
16-Mbit and 32-Mbit Word-Wide Memory Addressing Map (Sheet 3 of 4)
16-Mbit and 32-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KW)
16 Mbit
32 Mbit
Size
(KW)
32
20000-27FFF
120000-127FFF
32
18000-1FFFF
32
16 Mbit
32 Mbit
32
E8000-EFFFF
0E80000EFFFF
118000-11FFFF
32
E0000-E7FFF
0E00000E7FFF
10000-17FFF
110000-117FFF
32
D8000-DFFFF
0D80000DFFFF
32
08000-0FFFF
108000-10FFFF
32
D0000-D7FFF
0D00000D7FFF
32
00000-07FFF
100000-107FFF
32
C8000-CFFFF
0C80000CFFFF
This column continues on next page
8 Mbit
This column continues on next page
32
0F8000-0FFFFF
32
C0000-C7FFF
0C00000C7FFF
32
0F0000-0F7FFF
32
B8000-BFFFF
0B80000BFFFF
32
0E8000-0EFFFF
32
B0000-B7FFF
0B00000B7FFF
32
0E0000-0E7FFF
32
A8000-AFFFF
0A80000AFFFF
32
0D8000-0DFFFF
32
A0000-A7FFF
0A00000A7FFF
32
0D0000-0D7FFF
32
98000-9FFFF
098000-09FFFF
32
0C8000-0CFFFF
32
90000-97FFF
090000-097FFF
32
0C0000-0C7FFF
32
88000-8FFFF
088000-08FFFF
32
0B8000-0BFFFF
32
80000-87FFF
080000-087FFF
32
0B0000-0B7FFF
32
78000-7FFFF
78000-7FFFF
32
0A8000-0AFFFF
32
70000-77FFF
70000-77FFF
32
0A0000-0A7FFF
32
68000-6FFFF
68000-6FFFF
32
098000-09FFFF
32
60000-67FFF
60000-67FFF
32
090000-097FFF
32
58000-5FFFF
58000-5FFFF
32
088000-08FFFF
32
50000-57FFF
50000-57FFF
32
080000-087FFF
32
48000-4FFFF
48000-4FFFF
32
078000-07FFFF
32
40000-47FFF
40000-47FFF
32
070000-077FFF
32
38000-3FFFF
38000-3FFFF
32
068000-06FFFF
32
30000-37FFF
30000-37FFF
32
060000-067FFF
32
28000-2FFFF
28000-2FFFF
32
058000-05FFFF
32
20000-27FFF
20000-27FFF
32
050000-057FFF
32
18000-1FFFF
18000-1FFFF
32
048000-04FFFF
32
10000-17FFF
10000-17FFF
32
040000-047FFF
32
08000-0FFFF
08000-0FFFF
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
13
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
le 4.
16-Mbit and 32-Mbit Word-Wide Memory Addressing Map (Sheet 4 of 4)
16-Mbit and 32-Mbit Word-Wide Memory Addressing
Top Boot
ize
W)
Bottom Boot
32 Mbit
Size
(KW)
038000-03FFFF
16 Mbit
32 Mbit
4
07000-07FFF
07000-07FFF
030000-037FFF
4
06000-06FFF
06000-06FFF
028000-02FFFF
4
05000-05FFF
05000-05FFF
020000-027FFF
4
04000-04FFF
04000-04FFF
018000-01FFFF
4
03000-03FFF
03000-03FFF
010000-017FFF
4
02000-02FFF
02000-02FFF
008000-00FFFF
4
01000-01FFF
01000-01FFF
000000-007FFF
4
00000-00FFF
00000-00FFF
16 Mbit
Table 5.
8 Mbit
4-Mbit and 8-Mbit Word-Wide Memory Addressing Map (Sheet 1 of 2)
4-Mbit and 8-Mbit Word-Wide Memory Addressing
Top Boot
Size
(KW)
Bottom Boot
Size
(KW)
4 Mbit
4 Mbit
8 Mbit
3F000-3FFFF
7F000-7FFFF
32
78000-7FFFF
3E000-3EFFF
7E000-7EFFF
32
70000-77FFF
3D000-3DFFF
7D000-7DFFF
32
68000-6FFFF
3C000-3CFFF
7C000-7CFFF
32
60000-67FFF
3B000-3BFFF
7B000-7BFFF
32
58000-5FFFF
3A000-3AFFF
7A000-7AFFF
32
50000-57FFF
39000-39FFF
79000-79FFF
32
48000-4FFFF
38000-38FFF
78000-78FFF
32
40000-47FFF
4
30000-37FFF
70000-77FFF
32
38000-3FFFF
38000-3FFFF
4
28000-2FFFF
68000-6FFFF
32
30000-37FFF
30000-37FFF
4
20000-27FFF
60000-67FFF
32
28000-2FFFF
28000-2FFFF
4
18000-1FFFF
58000-5FFFF
32
20000-27FFF
20000-27FFF
4
10000-17FFF
50000-57FFF
32
18000-1FFFF
18000-1FFFF
4
08000-0FFFF
48000-4FFFF
32
10000-17FFF
10000-17FFF
4
00000-07FFF
40000-47FFF
32
08000-0FFFF
08000-0FFFF
4
38000-3FFFF
4
07000-07FFF
07000-07FFF
32
30000-37FFF
4
06000-06FFF
06000-06FFF
32
28000-2FFFF
4
05000-05FFF
05000-05FFF
32
20000-27FFF
4
04000-04FFF
04000-04FFF
32
18000-1FFFF
4
03000-03FFF
03000-03FFF
18 Aug 2005
14
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 5.
4-Mbit and 8-Mbit Word-Wide Memory Addressing Map (Sheet 2 of 2)
4-Mbit and 8-Mbit Word-Wide Memory Addressing
Top Boot
Size
(KW)
Bottom Boot
4 Mbit
Size
(KW)
4 Mbit
8 Mbit
32
10000-17FFF
4
02000-02FFF
02000-02FFF
32
08000-0FFFF
4
01000-01FFF
01000-01FFF
32
00000-07FFF
4
00000-00FFF
00000-00FFF
Table 6.
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map (Sheet 1 of 6)
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KW)
16 Mbit
32 Mbit
64 Mbit
Size
(KW)
4
FF000-FFFFF
1FF0001FFFFF
3FF000-3FFFFF
32
3F80003FFFFF
4
FE000-FEFFF
1FE0001FEFFF
3FE000-3FEFFF
32
3F00003F7FFF
4
FD000-FDFFF
1FD0001FDFFF
3FD000-3FDFFF
32
3E80003EFFFF
4
FC000-FCFFF
1FC0001FCFFF
3FC000-3FCFFF
32
3E00003E7FFF
4
FB000-FBFFF
1FB0001FBFFF
3FB000-3FBFFF
32
3D80003DFFFF
4
FA000-FAFFF
1FA0001FAFFF
3FA000-3FAFFF
32
3D00003D7FFF
4
F9000-F9FFF
1F90001F9FFF
3F9000-3F9FFF
32
3C80003CFFFF
4
F8000-F8FFF
1F80001F8FFF
3F8000-3F8FFF
32
3C00003C7FFF
32
F0000-F7FFF
1F00001F7FFF
3F0000-3F7FFF
32
3B80003BFFFF
32
E8000-EFFFF
1E80001EFFFF
3E8000-3EFFFF
32
3B00003B7FFF
32
E0000-E7FFF
1E00001E7FFF
3E0000-3E7FFF
32
3A80003AFFFF
32
D8000-DFFFF
1D80001DFFFF
3D8000-3DFFFF
32
3A00003A7FFF
32
D0000-D7FFF
1D00001D7FFF
3D0000-3D7FFF
32
398000-39FFFF
32
C8000-CFFFF
1C80001CFFFF
3C8000-3CFFFF
32
390000-397FFF
32
C0000-C7FFF
1C00001C7FFF
3C0000-3C7FFF
32
388000-38FFFF
32
B8000-BFFFF
1B80001BFFFF
3B8000-3BFFFF
32
380000-387FFF
Datasheet
16 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
32 Mbit
64 Mbit
18 Aug 2005
15
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 6.
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map (Sheet 2 of 6)
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KW)
16 Mbit
32 Mbit
64 Mbit
Size
(KW)
32
B0000-B7FFF
1B00001B7FFF
3B0000-3B7FFF
32
378000-37FFFF
32
A8000-AFFFF
1A80001AFFFF
3A8000-3AFFFF
32
370000-377FFF
32
A0000-A7FFF
1A00001A7FFF
3A0000-3A7FFF
32
368000-36FFFF
32
98000-9FFFF
19800019FFFF
398000-39FFFF
32
360000-367FFF
32
90000-97FFF
190000197FFF
390000-397FFF
32
358000-35FFFF
32
88000-8FFFF
18800018FFFF
388000-38FFFF
32
350000-357FFF
32
80000-87FFF
180000187FFF
380000-387FFF
32
348000-34FFFF
32
78000-7FFFF
17800017FFFF
378000-37FFFF
32
340000-347FFF
32
70000-77FFF
170000177FFF
370000-377FFF
32
338000-33FFFF
32
68000-6FFFF
16800016FFFF
368000-36FFFF
32
330000-337FFF
32
60000-67FFF
160000167FFF
360000-367FFF
32
328000-32FFFF
32
58000-5FFFF
15800015FFFF
358000-35FFFF
32
320000-327FFF
32
50000-57FFF
150000157FFF
350000-357FFF
32
318000-31FFFF
32
48000-4FFFF
14800014FFFF
348000-34FFFF
32
310000-317FFF
32
40000-47FFF
140000147FFF
340000-347FFF
32
308000-30FFFF
32
38000-3FFFF
13800013FFFF
338000-33FFFF
32
300000-307FFF
32
30000-37FFF
130000137FFF
330000-337FFF
32
2F80002FFFFF
32
28000-2FFFF
12800012FFFF
328000-32FFFF
32
2F00002F7FFF
32
20000-27FFF
120000127FFF
320000-327FFF
32
2E80002EFFFF
32
18000-1FFFF
118000-11FFFF
318000-31FFFF
32
2E00002E7FFF
32
10000-17FFF
110000-117FFF
310000-317FFF
32
2D80002DFFFF
18 Aug 2005
16
16 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
32 Mbit
64 Mbit
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 6.
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map (Sheet 3 of 6)
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KW)
16 Mbit
32 Mbit
64 Mbit
Size
(KW)
32
08000-0FFFF
10800010FFFF
308000-30FFFF
32
2D00002D7FFF
32
00000-07FFF
100000107FFF
300000-307FFF
32
2C80002CFFFF
32
0F80000FFFFF
2F8000-2FFFFF
32
2C00002C7FFF
32
0F00000F7FFF
2F0000-2F7FFF
32
2B80002BFFFF
32
0E80000EFFFF
2E8000-2EFFFF
32
2B00002B7FFF
32
0E00000E7FFF
2E0000-2E7FFF
32
2A80002AFFFF
32
0D80000DFFFF
2D8000-2DFFFF
32
2A00002A7FFF
32
0D00000D7FFF
2D0000-2D7FFF
32
298000-29FFFF
32
0C80000CFFFF
2C8000-2CFFFF
32
290000-297FFF
32
0C00000C7FFF
2C0000-2C7FFF
32
288000-28FFFF
32
0B80000BFFFF
2B8000-2BFFFF
32
280000-287FFF
32
0B00000B7FFF
2B0000-2B7FFF
32
278000-27FFFF
32
0A80000AFFFF
2A8000-2AFFFF
32
270000-277FFF
32
0A00000A7FFF
2A0000-2A7FFF
32
268000-26FFFF
32
09800009FFFF
298000-29FFFF
32
260000-267FFF
32
090000097FFF
290000-297FFF
32
258000-25FFFF
32
08800008FFFF
288000-28FFFF
32
250000-257FFF
32
080000087FFF
280000-287FFF
32
248000-24FFFF
32
07800007FFFF
278000-27FFFF
32
240000-247FFF
32
070000077FFF
270000-277FFF
32
238000-23FFFF
32
06800006FFFF
268000-26FFFF
32
230000-237FFF
Datasheet
16 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
32 Mbit
64 Mbit
18 Aug 2005
17
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 6.
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map (Sheet 4 of 6)
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
32 Mbit
64 Mbit
Size
(KW)
32
060000067FFF
260000-267FFF
32
228000-22FFFF
32
05800005FFFF
258000-25FFFF
32
220000-227FFF
32
050000057FFF
250000-257FFF
32
218000-21FFFF
32
04800004FFFF
248000-24FFFF
32
210000-217FFF
32
040000047FFF
240000-247FFF
32
208000-20FFFF
32
03800003FFFF
238000-23FFFF
32
200000-207FFF
32
030000037FFF
230000-237FFF
32
1F80001FFFFF
1F80001FFFFF
32
02800002FFFF
228000-22FFFF
32
1F00001F7FFF
1F00001F7FFF
32
020000027FFF
220000-227FFF
32
1E80001EFFFF
1E80001EFFFF
32
01800001FFFF
218000-21FFFF
32
1E00001E7FFF
1E00001E7FFF
32
010000017FFF
210000-217FFF
32
1D80001DFFFF
1D80001DFFFF
32
00800000FFFF
208000-21FFFF
32
1D00001D7FFF
1D00001D7FFF
32
000000007FFF
200000-207FFF
32
1C80001CFFFF
1C80001CFFFF
32
1F8000-1FFFFF
32
1C00001C7FFF
1C00001C7FFF
32
1F0000-1F7FFF
32
1B80001BFFFF
1B80001BFFFF
32
1E8000-1EFFFF
32
1B00001B7FFF
1B00001B7FFF
32
1E0000-1E7FFF
32
1A80001AFFFF
1A80001AFFFF
32
1D8000-1DFFFF
32
1A00001A7FFF
1A00001A7FFF
32
1D0000-1D7FFF
32
198000-19FFFF
198000-19FFFF
32
1C8000-1CFFFF
32
190000-197FFF
190000-197FFF
32
1C0000-1C7FFF
32
188000-18FFFF
188000-18FFFF
32
1B8000-1BFFFF
32
180000-187FFF
180000-187FFF
32
1B0000-1B7FFF
32
178000-17FFFF
178000-17FFFF
32
1A8000-1AFFFF
32
170000-177FFF
170000-177FFF
Size
(KW)
16 Mbit
18 Aug 2005
18
16 Mbit
32 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
64 Mbit
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 6.
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map (Sheet 5 of 6)
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
64 Mbit
Size
(KW)
32
1A0000-1A7FFF
32
Size
(KW)
32 Mbit
64 Mbit
32
168000-16FFFF
168000-16FFFF
198000-19FFFF
32
160000-167FFF
160000-167FFF
32
190000-197FFF
32
158000-15FFFF
158000-15FFFF
32
188000-18FFFF
32
150000-157FFF
150000-157FFF
32
180000-187FFF
32
148000-14FFFF
148000-14FFFF
32
178000-17FFFF
32
140000-147FFF
140000-147FFF
32
170000-177FFF
32
138000-13FFFF
138000-13FFFF
32
168000-16FFFF
32
130000-137FFF
130000-137FFF
32
160000-167FFF
32
128000-12FFFF
128000-12FFFF
32
158000-15FFFF
32
120000-127FFF
120000-127FFF
32
150000-157FFF
32
118000-11FFFF
118000-11FFFF
32
148000-14FFFF
32
110000-117FFF
110000-117FFF
32
140000-147FFF
32
108000-10FFFF
108000-10FFFF
32
138000-13FFFF
32
100000-107FFF
100000-107FFF
32
130000-137FFF
32
F8000-FFFFF
F8000-FFFFF
16 Mbit
32 Mbit
16 Mbit
F8000-FFFFF
32
128000-12FFFF
32
F0000-F7FFF
F0000-F7FFF
F0000-F7FFF
32
120000-127FFF
32
E8000-EFFFF
E8000-EFFFF
E8000-EFFFF
32
118000-11FFFF
32
E0000-E7FFF
E0000-E7FFF
E0000-E7FFF
32
110000-117FFF
32
D8000-DFFFF
D8000-DFFFF
D8000-DFFFF
32
108000-10FFFF
32
D0000-D7FFF
D0000-D7FFF
D0000-D7FFF
32
100000-107FFF
32
C8000-CFFFF
C8000-CFFFF
C8000-CFFFF
32
0F8000-0FFFFF
32
C0000-C7FFF
C0000-C7FFF
C0000-C7FFF
32
0F0000-0F7FFF
32
B8000-BFFFF
B8000-BFFFF
B8000-BFFFF
32
0E8000-0EFFFF
32
B0000-B7FFF
B0000-B7FFF
B0000-B7FFF
32
0E0000-0E7FFF
32
A8000-AFFFF
A8000-AFFFF
A8000-AFFFF
32
0D8000-0DFFFF
32
A0000-A7FFF
A0000-A7FFF
A0000-A7FFF
32
0D0000-0D7FFF
32
98000-9FFFF
98000-9FFFF
98000-9FFFF
32
0C8000-0CFFFF
32
90000-97FFF
90000-97FFF
90000-97FFF
32
0C0000-0C7FFF
32
88000-8FFFF
88000-8FFFF
88000-8FFFF
32
0B8000-0BFFFF
32
80000-87FFF
80000-87FFF
80000-87FFF
32
0B0000-0B7FFF
32
78000-7FFFF
78000-7FFFF
78000-7FFFF
32
0A8000-0AFFFF
32
70000-77FFF
70000-77FFF
70000-77FFF
32
0A0000-0A7FFF
32
68000-6FFFF
68000-6FFFF
68000-6FFFF
32
098000-09FFFF
32
60000-67FFF
60000-67FFF
60000-67FFF
32
090000-097FFF
32
58000-5FFFF
58000-5FFFF
58000-5FFFF
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
19
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 6.
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing Map (Sheet 6 of 6)
16-Mbit, 32-Mbit, and 64-Mbit Word-Wide Memory Addressing
Top Boot
Bottom Boot
64 Mbit
Size
(KW)
16 Mbit
32 Mbit
64 Mbit
32
088000-08FFFF
32
50000-57FFF
50000-57FFF
50000-57FFF
32
080000-087FFF
32
48000-4FFFF
48000-4FFFF
48000-4FFFF
32
078000-07FFFF
32
40000-47FFF
40000-47FFF
40000-47FFF
Size
(KW)
16 Mbit
32 Mbit
32
070000-077FFF
32
38000-3FFFF
38000-3FFFF
38000-3FFFF
32
068000-06FFFF
32
30000-37FFF
30000-37FFF
30000-37FFF
32
060000-067FFF
32
28000-2FFFF
28000-2FFFF
28000-2FFFF
32
058000-05FFFF
32
20000-27FFF
20000-27FFF
20000-27FFF
32
050000-057FFF
32
18000-1FFFF
18000-1FFFF
18000-1FFFF
32
048000-04FFFF
32
10000-17FFF
10000-17FFF
10000-17FFF
32
040000-047FFF
32
08000-0FFFF
08000-0FFFF
08000-0FFFF
32
038000-03FFFF
4
07000-07FFF
07000-07FFF
07000-07FFF
32
030000-037FFF
4
06000-06FFF
06000-06FFF
06000-06FFF
32
028000-02FFFF
4
05000-05FFF
05000-05FFF
05000-05FFF
32
020000-027FFF
4
04000-04FFF
04000-04FFF
04000-04FFF
32
018000-01FFFF
4
03000-03FFF
03000-03FFF
03000-03FFF
32
010000-017FFF
4
02000-02FFF
02000-02FFF
02000-02FFF
32
008000-00FFFF
4
01000-01FFF
01000-01FFF
01000-01FFF
32
000000-007FFF
4
00000-00FFF
00000-00FFF
00000-00FFF
3.2.4
4-Mbit, 8-Mbit, and 16-Mbit Byte-Wide Memory Maps
Table 7.
8-Mbit and 16-Mbit Byte-Wide Memory Addressing Map (Sheet 1 of 3)
8-Mbit and 16-Mbit Byte-Wide Byte-Wide Memory Addressing
Top Boot
Bottom Boot
Size (KB)
8 Mbit
16 Mbit
Size (KB)
8
FE000-FFFFF
1FE000-1FFFFF
64
8
FC000-FDFFF
1FC000-1FDFFF
64
8
FA000-FBFFF
1FA000-1FBFFF
64
8
F8000-F9FFF
1F8000-1F9FFF
64
8
F6000-F7FFF
1F6000-1F7FFF
64
8
F4000-F5FFF
1F4000-1F5FFF
64
8
F2000-F3FFF
1F2000-1F3FFF
64
8
F0000-F1FFF
1F0000-1F1FFF
64
18 Aug 2005
20
8 Mbit
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
16 Mbit
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 7.
8-Mbit and 16-Mbit Byte-Wide Memory Addressing Map (Sheet 2 of 3)
8-Mbit and 16-Mbit Byte-Wide Byte-Wide Memory Addressing
Top Boot
Bottom Boot
Size (KB)
8 Mbit
16 Mbit
Size (KB)
64
E0000-EFFFF
1E0000-1EFFFF
64
64
D0000-DFFFF
1D0000-1DFFFF
64
64
C0000-CFFFF
1C0000-1CFFFF
64
64
B0000-BFFFF
1B0000-1BFFFF
64
64
A0000-AFFFF
1A0000-1AFFFF
64
64
90000-9FFFF
190000-19FFFF
64
64
80000-8FFFF
180000-18FFFF
64
64
70000-7FFFF
170000-17FFFF
64
64
60000-6FFFF
160000-16FFFF
64
64
50000-5FFFF
150000-15FFFF
64
64
40000-4FFFF
140000-14FFFF
64
64
30000-3FFFF
130000-13FFFF
64
64
20000-2FFFF
120000-12FFFF
64
64
10000-1FFFF
110000-11FFFF
64
64
00000-0FFFF
8 Mbit
16 Mbit
100000-10FFFF
64
64
0F0000-0FFFFF
64
64
0E0000-0EFFFF
64
64
0D0000-0DFFFF
64
64
0C0000-0CFFFF
64
64
0B0000-0BFFFF
64
64
0A0000-0AFFFF
64
64
090000-09FFFF
64
64
080000-08FFFF
64
64
070000-07FFFF
64
64
060000-06FFFF
64
1F0000-1FFFFF
64
050000-05FFFF
64
1E0000-1EFFFF
64
040000-04FFFF
64
1D0000-1DFFFF
64
030000-03FFFF
64
1C0000-1CFFFF
64
020000-02FFFF
64
1B0000-1BFFFF
64
010000-01FFFF
64
1A0000-1AFFFF
64
000000-00FFFF
64
190000-19FFFF
64
64
180000-18FFFF
64
64
170000-17FFFF
64
64
160000-16FFFF
64
64
150000-15FFFF
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
21
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 7.
8-Mbit and 16-Mbit Byte-Wide Memory Addressing Map (Sheet 3 of 3)
8-Mbit and 16-Mbit Byte-Wide Byte-Wide Memory Addressing
Top Boot
Size (KB)
8 Mbit
Bottom Boot
16 Mbit
Size (KB)
8 Mbit
16 Mbit
64
64
140000-14FFFF
64
64
130000-13FFFF
64
64
120000-12FFFF
64
64
110000-11FFFF
64
64
100000-10FFFF
64
64
64
64
E0000-EFFFF
0E0000-0EFFFF
64
64
D0000-DFFFF
0D0000-0DFFFF
64
64
C0000-CFFFF
0C0000-0CFFFF
64
64
B0000-BFFFF
0B0000-0BFFFF
64
64
A0000-AFFFF
0A0000-0AFFFF
64
64
90000-9FFFF
090000-09FFFF
64
64
80000-8FFFF
080000-08FFFF
64
64
70000-7FFFF
070000-07FFFF
64
64
60000-6FFFF
060000-06FFFF
64
64
50000-5FFFF
050000-05FFFF
64
64
40000-4FFFF
040000-04FFFF
64
64
30000-3FFFF
030000-03FFFF
64
64
20000-2FFFF
020000-02FFFF
64
64
10000-1FFFF
010000-01FFFF
64
8
0E000-0FFFF
00E000-00FFFF
64
8
0C000-0DFFF
00C000-00DFFF
64
8
0A000-0BFFF
00A000-00BFFF
64
8
08000-09FFF
008000-009FFF
64
8
06000-07FFF
006000-007FFF
64
8
04000-05FFF
004000-005FFF
64
8
02000-03FFF
002000-003FFF
64
8
00000-01FFF
000000-001FFF
18 Aug 2005
22
F0000-FFFFF
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
0F0000-0FFFFF
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 8.
4-Mbit Byte Wide Memory Addressing Map
4-Mbit Byte-Wide Memory Addressing
Top Boot
Bottom Boot
Size
(KB)
4 Mbit
Size
(KB)
4 Mbit
8
7E000-7FFFF
64
70000-7FFFF
8
7C000-7DFFF
64
60000-6FFFF
8
7A000-7BFFF
64
50000-5FFFF
8
78000-79FFF
64
40000-4FFFF
8
76000-77FFF
64
30000-3FFFF
8
74000-75FFF
64
20000-2FFFF
8
72000-73FFF
64
10000-1FFFF
8
70000-71FFF
8
0E000-0FFFF
64
60000-6FFFF
8
0C000-0DFFF
64
50000-5FFFF
8
0A000-0BFFF
64
40000-4FFFF
8
08000-09FFF
64
30000-3FFFF
8
06000-07FFF
64
20000-2FFFF
8
04000-05FFF
64
10000-1FFFF
8
02000-03FFF
64
00000-0FFFF
8
00000-01FFF
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
23
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
4.0
Package Information
4.1
µBGA* and Very Thin Profile Fine Pitch Ball Grid Array
(VF BGA) Package
Figure 2.
µBGA* and VF BGA Package Drawing
Ball A1
Corner
D
1
E
2
3
4
S1
5
6
7
8
8
A
A
B
B
C
C
D
D
E
E
F
F
7
6
5
4
3
2
Ball A1
Corner
S2
1
e
b
Bottom View -Bump side up
Top View - Bump Side down
A
1
A2
A
Seating
Y
Plan
Side View
Note: Drawing not to scale
Dimensions
Package Height
Ball Height
Package Body Thickness
Ball (Lead) Width
Package Body Length 8M (.25)
Package Body Length 16M (.25/.18/.13) 32M (.25/.18/.13)
Package Body Length 64M (.18)
Package Body Width 8M (.25)
Package Body Width 16M (.25/.18/.13) 32M (.18/.13)
Package Body Width 32M (.25)
Package Body Width 64M (.18)
Pitch
Ball (Lead) Count 8M, 16M
Ball (Lead) Count 32M
Ball (Lead) Count 64M
Seating Plane Coplanarity
Corner to Ball A1 Distance Along D 8M (.25)
Corner to Ball A1 Distance Along D 16M (.25/.18/.13) 32M (.18/.13)
Corner to Ball A1 Distance Along D 64M (.18)
Corner to Ball A1 Distance Along E 8M (.25)
Corner to Ball A1 Distance Along E 16M (.25/.18/.13) 32M (.18/.13)
Corner to Ball A1 Distance Along E 32M (.25)
Corner to Ball A1 Distance Along E 64M (.18)
18 Aug 2005
24
Symbol
A
A1
A2
b
D
D
D
E
E
E
E
e
N
N
N
Y
S1
S1
S1
S2
S2
S2
S2
Min
Millimeters
Nom
Max
1.000
0.150
0.325
7.810
7.186
7.600
6.400
6.864
10.750
8.900
1.230
0.918
1.125
1.275
1.507
3.450
2.525
Min
Inches
Nom
Max
0.0394
0.0059
0.665
0.375
7.910
7.286
7.700
6.500
6.964
10.850
9.000
0.750
46
47
48
1.330
1.018
1.225
1.375
1.607
3.550
2.625
0.2829
0.2992
0.2520
0.2702
0.4232
0.3504
0.2868
0.3031
0.2559
0.2742
0.4272
0.3543
0.0295
46
47
48
0.100
1.430
1.118
1.325
1.475
1.707
3.650
2.725
0.0484
0.0361
0.0443
0.0502
0.0593
0.1358
0.0994
0.0524
0.0401
0.0482
0.0541
0.0633
0.1398
0.1033
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
0.0128
0.0262
0.0148
0.425
8.010
7.386
7.800
6.600
7.064
10.860
9.100
0.0167
0.2908
0.3071
0.2598
0.2781
0.4276
0.3583
0.0039
0.0563
0.0440
0.0522
0.0581
0.0672
0.1437
0.1073
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
4.2
TSOP Package
Figure 3.
TSOP Package Drawing
Z
A2
See Notes 1, 2, 3 and 4
Pin 1
e
See Detail B
E
Y
D1
A1
D
Seating
Plane
See Det ail A
A
Det ail A
Detail B
C
b
0
L
A5568- 02
Dimensions
Family: Thin Small Out
-Line Package
Symbol
Millimeters
Min
Nom
Inches
Max
Notes
Min
Nom
1.200
Max
Package Height
A
Standoff
A1
0.050
Package Body Thickness
A2
0.950
1.000
1.050
0.037
0.039
0.041
Lead Width
b
0.150
0.200
0.300
0.006
0.008
0.012
0.100
0.150
0.047
0.002
Lead Thickness
c
0.200
0.004
0.006
0.008
Plastic Body Length
D1
18.200 18.400 18.600
0.717
0.724
0.732
Package Body Width
E
11.800 12.000 12.200
0.465
0.472
0.480
Lead Pitch
e
0.500
Terminal Dimension
D
19.800 20.000 20.200
Lead Tip Length
L
Lead Count
N
Lead Tip Angle
Ø
Seating Plane Coplanarity
Y
Lead to Package Offset
Z
0.500
0.600
0.0197
0.780
0.787
0.795
0.700
0.020
0.024
0.028
5°
0°
48
0°
3°
48
3°
0.100
0.150
Notes
0.250
0.350
5°
0.004
0.006
0.010
0.014
Notes:
1.
One dimple on package denotes Pin 1.
2.
If two dimples, then the larger dimple denotes Pin 1.
3.
Pin 1 is in the upper left corner of the package, in reference to the product mark.
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
25
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
4.3
Easy BGA Package
Figure 4.
Easy BGA Package Drawing
Ball A1
Corner
D
1
E
2
3
4
Ball A1
Corner
S1
5
6
7
8
8
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
7
6
5
4
3
2
1
S2
b
e
Top View - Ball side down
Bottom View - Ball Side Up
A1
A2
A
Seating
Y
Plane
Side View
Note: Drawing not to scale
Dimensions Table
Package Height
Ball Height
Package Body Thickness
Ball (Lead) Width
Package Body Width
Package Body Length
Pitch
Ball (Lead) Count
Seating Plane Coplanarity
Corner to Ball A1 Distance Along D
Corner to Ball A1 Distance Along E
Symbol
A
A1
A2
b
D
E
[e]
N
Y
S1
S2
Millimeters
Min
Nom
Max
1.200
Notes
0.250
0.330
9.900
12.900
1.400
2.900
Inches
Min
Nom
Max
0.0472
0.0098
0.780
0.430
10.000
13.000
1.000
64
1.500
3.000
0.530
10.100
13.100
1
1
0.0130
0.3898
0.5079
0.100
1.600
3.100
1
1
0.0551
0.1142
0.0307
0.0169
0.3937
0.5118
0.0394
64
0.0591
0.1181
0.0209
0.3976
0.5157
0.0039
0.0630
0.1220
Note: (1) Package dimensions are for reference only. These dimensions are estimates based
on die size, and are subject to change.
18 Aug 2005
26
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
5.0
Pinout and Signal Descriptions
This section explains the package pinout and signal descriptions.
5.1
Signal Pinouts
The B3 flash memory device is available in the following packages:
•
•
•
•
40-lead TSOP (x8, Figure 5).
48-lead TSOP (x16, Figure 6).
48-ball µBGA (x8 in Figure 8 and x16 in Figure 9).
48-ball VF BGA (x16, Figure 9).
5.1.1
40-Lead and 48-Lead TSOP Packages
Figure 5.
40-Lead TSOP Package for x8 Configurations
4M
A16
A15
A14
A13
A12
A11
A9
A8
WE#
RP#
VPP
WP#
A18
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Advanced Boot Block
40-Lead TSOP
10 mm x 20 mm
TOP VIEW
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A17
GND
A20
A19
A10
DQ7
DQ6
DQ5
DQ4
VCCQ
VCC
NC
DQ3
DQ2
DQ1
DQ0
OE#
GND
CE#
A0
16 M
8M
Notes:
1.
40-Lead TSOP available for 8-Mbit and 16-Mbit densities only.
2.
Lower densities have NC on the upper address pins. For example, an 8-Mbit device has NC on Pin 38.
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
27
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Figure 6.
48-Lead TSOP Package for x16 Configurations
64 M
32 M
16 M
Figure 7.
A15
A14
A13
A12
A11
A10
A9
A8
A21
A20
WE#
RP#
VPP
WP#
A19
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Advanced Boot Block
48-Lead TSOP
12 mm x 20 mm
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
VCCQ
GND
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
GND
CE#
A0
New Mark for Pin-1 Indicator: 40-Lead 8/16 Mb TSOP and 48-Lead 8/16/32 Mb TSOP
New Mark:
Note:
18 Aug 2005
28
The topside marking on 8-Mb, 16-Mb, and 32-Mb Intel® Advanced Boot Block 40L and 48L
TSOP products changed to a white ink triangle as a Pin-1 indicator. Products without the white
triangle continue to use a dimple as a Pin-1 indicator. No other changes were made in package size,
materials, functionality, customer handling, or manufacturability. The product continues to meet
stringent Intel quality requirements. Table 9 lists the ordering codes of the affected products. See
also Table 34 “Ordering Information: Valid Combinations” on page 70.
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 9.
B3 Flash Memory Device Ordering Information
Ordering Information Valid Combinations
40-Lead TSOP
48-Lead TSOP
Ext. Temp. 64
Mbit
Ext. Temp. 32
Mbit
Ext. Temp. 16
Mbit
Ext. Temp. 8
Mbit
Figure 8.
TE28F640B3TC70
TE28F640B3BC70
TE28F320B3TD70
TE28F320B3BD70
TE28F320B3TC70
TE28F320B3BC70
TE28F320B3TC90
TE28F320B3BC90
TE28F320B3TA100
TE28F320B3BA100
TE28F320B3TA110
TE28F320B3BA110
TE28F160B3TC70
TE28F160B3BC70
TE28F160B3TC80
TE28F160B3BC80
TE28F016B3TA90
TE28F016B3BA90
TE28F160B3TA90
TE28F160B3BA90
TE28F016B3TA110
TE28F016B3BA110
TE28F160B3TA110
TE28F160B3BA110
TE28F008B3TA90
TE28F008B3BA90
TE28F800B3TA90
TE28F800B3BA90
TE28F008B3TA110
TE28F008B3BA110
TE28F800B3TA110
TE28F800B3BA110
x8 48-Ball µBGA* Chip Size Package (Top View, Ball Down)
1
2
3
4
5
6
7
8
A
A14
A12
A8
V PP
W P#
A20
A7
A4
B
A15
A10
WE#
RP#
A19
A18
A5
A2
C
A16
A13
A9
A6
A3
A1
D
A17
NC
D5
NC
D2
NC
CE#
A0
E
VCCQ
A11
D6
NC
D3
NC
D0
GND
D7
NC
D4
V CC
NC
D1
OE#
16M
8M
F
GND
Notes:
1.
A19 and A20 indicate the upgrade address connections. Lower density devices do not have the upper
address solder balls. Do not route is not done in this area. A20 is the upgrade address for the 16-Mbit
device.
Datasheet
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
29
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Figure 9.
x16 48-Ball VF BGA and µBGA* Chip Size Package (Top View, Ball Down)
1
2
3
4
5
6
7
8
16M
A
A13
A11
A8
VPP
WP#
A19
A7
A4
B
A14
A10
WE#
RP#
A18
A17
A5
A2
64M
32M
C
A15
A12
A9
A21
A20
A6
A3
A1
D
A16
D14
D5
D11
D2
D8
CE#
A0
E
VCCQ
D15
D6
D12
D3
D9
D0
Vss
F
Vss
D7
D13
D4
VCC
D10
D1
OE#
Notes:
1.
A19, A20, and A21 indicate the upgrade address connections. Lower density devices do not have the
upper address solder balls. Do not route in this area.
– A19 is the upgrade address for the 16-Mbit device.
– A20 is the upgrade address for the 32-Mbit device.
– A21 is the upgrade address for the 64-Mbit device.
2.
Table 10 “B3 Flash memory Device Signal Descriptions” on page 31 details the usage of each device
pin.
5.2
Signal Descriptions
Table 10 describes the active signals.
18 Aug 2005
30
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
Datasheet
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 10.
Symbol
A0–A21
DQ0–DQ7
B3 Flash memory Device Signal Descriptions (Sheet 1 of 2)
Type
Description
Input
ADDRESS INPUTS for memory addresses. Addresses are internally latched during a program or
erase cycle.
28F008B3: A[0-19], 28F016B3: A[0-20],
28F800B3: A[0-18], 28F160B3: A[0-19],
28F320B3: A[0-20], 28F640B3: A[0-21]
Input/
Output
DATA INPUTS/OUTPUTS: Inputs array data on the second CE# and WE# cycle during a
Program command.
• Inputs commands to the Command User Interface when CE# and WE# are active. Data is
internally latched.
• Outputs array, identifier and Status Register data. The data pins float to tristate when the chip
is deselected or the outputs are disabled.
DATA INPUTS/OUTPUTS:
• Inputs array data on the second CE# and WE# cycle during a Program command. Data is
internally latched.
• Outputs array and identifier data. The data pins float to tristate when the chip is de-selected.
Not included on x8 products.
DQ8–DQ15
Input/
Output
CE#
Input
CHIP ENABLE: Activates the internal control logic, input buffers, decoders, and sense amplifiers.
CE# is active low. CE# high de-selects the memory device and reduces power consumption to
standby levels.
OE#
Input
OUTPUT ENABLE: Enables the flash memory device outputs through the data buffers during a
Read operation. OE# is active low.
WE#
Input
WRITE ENABLE: Controls writes to the Command Register and memory array. WE# is active
low. Addresses and data are latched on the rising edge of the second WE# pulse.
Input
RESET/DEEP POWER-DOWN: Uses two voltage levels (VIL, VIH) to control reset/deep powerdown mode.
• When RP# is at logic low, the flash memory device is in reset/deep power-down mode,
which drives the outputs to High-Z, resets the Write State Machine, and minimizes current
levels (ICCD).
• When RP# is at logic high, the flash memory device is in standard operation. When
RP# transitions from logic-low to logic-high, the flash memory device defaults to the read
array mode.
RP#
WRITE PROTECT: Locks and unlocks the two lockable parameter blocks.
WP#
Input
VCCQ
Input
VCC
Power
Datasheet
• When WP# is at logic low, the lockable blocks are locked, preventing Program and Erase
operations to those blocks. If a Program or Erase operation is attempted on a locked block,
SR.1 and either SR.4 [program] or SR.5 [erase] are set to indicate the operation failed.
• When WP# is at logic high, the lockable blocks are unlocked and can be programmed or
erased.
See Section 12.0, “Block Locking” on page 62 for details on write protection.
OUTPUT V CC: Enables all outputs to be driven to 1.8 V to 2.5 V while the VCC is at 2.7 V to 3.3 V.
If the VCC is regulated to 2.7 V to 2.85 V, VCCQ can be driven at 1.65 V to 2.5 V to achieve lowest
power operation (see Section 7.2, “DC Voltage Characteristics” on page 36).
This input can be tied directly to VCC (2.7 V to 3.6 V).
DEVICE Power Supply: 2.7 V to 3.6 V
Intel® Advanced Boot Block Flash Memory (B3)
Order Number: 290580, Revision: 020
18 Aug 2005
31
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Table 10.
Symbol
B3 Flash memory Device Signal Descriptions (Sheet 2 of 2)
Type
Description
VPP
Power
PROGRAM/ERASE Power Supply: Supplies power for Program and Erase operations. VPP can
be the same as VCC (2.7 V to 3.6 V) for single supply voltage operation. For fast programming at
manufacturing, 11.4 V to 12.6 V can be supplied to VPP. This pin cannot be left floating. 11.4 V to
12.6 V can be applied to VPP only for a maximum of 1000 cycles on the main blocks and 2500
cycles on the parameter blocks. VPP can be connected to 12 V for a total of 80 hours maximum
(see Section 13.0, “VPP Program and Erase Voltages” on page 63 for details).
VPP < VPPLK protects memory contents against inadvertent or unintended program and erase
commands.
GND
—
Ground: For all internal circuitry. All ground inputs must be connected.
NC
—
No Connect: Pin can be driven or left floating.
6.0
Maximum Ratings and Operating Conditions
6.1
Absolute Maximum Ratings
Warning:
Stressing the flash memory device beyond the Absolute Maximum Ratings in Table 11 can cause
permanent damage. These ratings are stress ratings only.
NOTICE: Specifications are subject to change without notice. Verify with your local Intel Sales office that you have the latest
datasheet before finalizing a design.
Table 11.
Absolute Maximum Ratings
Parameter
Maximum Rating
Notes
Extended Operating Temperature
During Read
–40 °C to +85 °C
During Block Erase and Program
–40 °C to +85 °C
Temperature under Bias
–40 °C to +85 °C
Storage Temperature
–65 °C to +125 °C
Voltage On Any Pin (except VCC and VPP) with Respect to GND
–0.5 V to +3.7 V
1
VPP Voltage (for Block Erase and Program) with Respect to GND
–0.5 V to +13.5 V
1,2,3
VCC and VCCQ Supply Voltage with Respect to GND
–0.2 V to +3.6 V
Output Short Circuit Current
100 mA
4
Notes:
1.
Minimum DC voltage is –0.5 V on input/output pins. During transitions, this level might
undershoot to –2.0 V for periods
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