Intel® Joule™ Module
Datasheet
September 2016
Revision 1.1
September 2016
Document number: 566641 rev. 1.1
Intel® Joule™ Datasheet
Page 1
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Copyright © 2016 Intel Corporation. All rights reserved
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Intel® Joule™ Datasheet
Page 2
Revision History
Revision
1.1
1.0
Description
Update wireless communication statement for end-use equipment integration
Initial release
September 2016
Document number: 566641 rev. 1.1
Date
September 2018
August 2016
Intel® Joule™ Datasheet
Page 3
Contents
1
Introduction ............................................................................................................................................................................. 8
1.1 Acronyms................................................................................................................. 8
1.2 Reference documents ................................................................................................ 9
2
System on a Module Overview ............................................................................................................................................ 9
2.1 Intel® Joule™ configurations ...................................................................................... 9
2.2 Intel® Joule™ feature summary.................................................................................10
2.3 Expansion board requirements ...................................................................................10
2.3.1
Method for connecting module to expansion board ..........................................10
2.3.2
Method to provide +VSYS power to the module ..............................................10
2.3.3
Required strapping of module pins ................................................................11
2.3.4
BIOS installed onto module..........................................................................11
2.4 Expansion board recommendations.............................................................................11
2.4.1
External EEPROM for multipurpose pin configuration data.................................11
2.4.2
Power button .............................................................................................11
2.4.3
DnX button................................................................................................11
2.4.4
Real time clock (RTC) backup power source ...................................................11
2.4.5
UART debugging.........................................................................................11
3
Power Delivery, Signaling, and Reset .............................................................................................................................. 12
3.1 Main power supply (VSYS).........................................................................................12
3.2 Power on signaling ...................................................................................................12
3.2.1
+VDC_IN power sensing..............................................................................12
3.2.2
+VBUS power sensing.................................................................................12
3.2.3
Power good ...............................................................................................12
3.3 Hard shutdown via power button ................................................................................12
3.4 System voltage rail specifications ...............................................................................13
4
Graphics Specifications....................................................................................................................................................... 13
4.1 Intel® Gen9LP features ............................................................................................13
4.2 Graphic encoder and decoder support .........................................................................14
4.3 HDMI* signal group specifications ..............................................................................14
5
Wireless Connectivity .......................................................................................................................................................... 15
5.1 Intel® Dual Band Wireless-AC 8260 highlights...............................................................15
5.1.1
Wi-Fi features ............................................................................................15
5.2 Bluetooth® highlights ................................................................................................15
5.2.1
Supported Bluetooth® profiles ......................................................................15
5.3 Security ..................................................................................................................16
5.4 Wireless antenna connectors......................................................................................16
5.5 The Intel® Dual Band Wireless-AC 8260 support site......................................................16
6
SD Card Interface.................................................................................................................................................................. 17
6.1 SD card interface features .........................................................................................17
6.1.1
SD card signal group specifications ...............................................................17
7
Module Connectors .............................................................................................................................................................. 17
7.1 Module dimensions ...................................................................................................17
7.2 Module to expansion board connectors ........................................................................18
7.2.1
Module electrostatic discharge......................................................................18
7.2.2
J6 connector interface signals ......................................................................18
7.2.3
J7 connector interface signals ......................................................................20
8
I2C Interfaces......................................................................................................................................................................... 22
8.1 I2C features ............................................................................................................22
8.2 I2C default configuration ...........................................................................................22
8.3 I2C signal group specifications ...................................................................................22
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9
Clock Specifications............................................................................................................................................................. 22
9.1 RTC backup battery ..................................................................................................22
10 UART Specifications............................................................................................................................................................. 23
10.1 UART availability ......................................................................................................23
11 I2S Specifications ................................................................................................................................................................. 23
11.1 I2S signal group specifications ...................................................................................23
11.1.1
I2S available formats ..................................................................................23
11.2 Digital microphone ports ...........................................................................................24
12 GPIO Specifications.............................................................................................................................................................. 24
12.1 Dedicated GPIO lines ................................................................................................24
12.2 Reconfigurable interfaces buses as GPIO .....................................................................24
12.3 GPIO internal pull UP / pull DOWN resistors .................................................................24
12.4 Linux* GPIO to function mapping ...............................................................................25
13 Pulse Width Modulators ..................................................................................................................................................... 26
13.1 PWM frequency formula: ...........................................................................................26
13.2 PWM duty cycle formula:...........................................................................................26
14 Universal Serial Bus ............................................................................................................................................................. 26
14.1 Available USB ports ..................................................................................................26
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Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Acronyms and terminology ...................................................................................... 8
Intel® Joule™ configurations ................................................................................... 9
Intel® Joule™ features ..........................................................................................10
Required strapping of module pins ...........................................................................11
Boot decision per voltage supply condition ................................................................12
Module power rails.................................................................................................13
Graphics engine encoders and decoders supported.....................................................14
J6 connector pin descriptions ..................................................................................18
J7 connector pin descriptions ..................................................................................20
I2C mapping.........................................................................................................22
Available UARTS....................................................................................................23
I2S available configuration formats ..........................................................................23
Linux* GPIO number to module signal ......................................................................25
PWM programming examples ..................................................................................26
USB port types......................................................................................................26
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Figures
1
2
Wireless antenna connector location ...........................................................................16
Module physical connectors .......................................................................................17
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Introduction
1 Introduction
This datasheet outlines the technical features of the Intel® Joule™ system-on-module (SoM) that combines
high-performance compute and graphics with large memory and wireless connectivity in a tiny footprint.
1.1 Acronyms
Table 1 Acronyms and terminology
Acronyms
Description
DVS
Dynamic Voltage Scaling
eMMC*
embedded Multimedia Card, a lower cost type of boot ROM
GPIO
General Purpose Input/Output
HDMI*
High-Definition Multimedia Interface
I2C
IIC - Inter-Integrated Circuit
I2S
Inter-IC Sound
IA
Intel Architecture
ISH
Integrated Sensor Hub
LPDDR
Low Power Double Data Rate
LPSS
Low Power Subsystem
OSC
Oscillator
PCB
Printed Circuit Board
PMIC
Power Management Integrated Circuit
RTC
Real Time Clock
SCU
System Controller Unit
SDIO
Secure Digital Input/Output
SOC
System on Chip; combines compute, graphics and interface in a single device
SOM
System on Module; contains the SOC and additional components in a single package
SPI
Serial Peripheral Interface (Bus)
TAP
Test Access Port
TBD
To Be Defined - information not available in this release
UART / HSUART
UART - as used in this document, UART ports are to be assumed as only supporting Rxd, TxD signals
HSUART - is a full function UART with Clear to Send and Return to Send handshakes for High Speed transfers
ULPI
UTMI+ Low Pin Interface
XTAL
Crystal
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System on a Module Overview
1.2 Reference documents
Intel Documents
Intel Document Number or Internet Address
Intel® Joule™ Platform Mechanical Descriptor
568978
Intel® Joule™ Expansion Board Datasheet
569056 - pending release at time of this publication
Intel® Joule™ Expansion Board Design Guide
566861 - pending release at time of this publication
Intel® Joule™ Thermal Management Guide
568457 - pending release at time of this publication
Intel® Joule™ Product Website
https://software.intel.com/en-us/iot/hardware/joule
Intel® Joule™ Online User Guide
https://software.intel.com/en-us/intel-joule-getting-started
Intel® Joule™ Online Community
https://communities.intel.com/community/tech/intel-joule
Intel® Joule™ FCC and FAA Regulatory Information
http://www.intel.com/content/www/us/en/support/boards-and-kits/000022313.html
Industry Specifications
Internet Address
JEDEC Standard LPDDR4 Specification
http://www.jedec.org
Universal Serial Bus Specification (USB)
http://www.usb.org/developers/doc
USB* On-The-Go (OTG) and Embedded Host
http://www.usb.org/developers/onthego
HDMI* Specification v1.4b
http://www.hdmi.org/manufacturer/specification.aspx
Note:
Intel does not control or audit third-party benchmark data or the web sites referenced in this document. You should visit the referenced web site and
confirm whether referenced data are accurate.
2 System on a Module Overview
The Intel® Joule™ system-on-module (SoM) is available in multiple configurations that share the same footprint and interface
connector placement. This enables accelerated product designed by providing multiple levels of compute power, graphics,
memory and communication options in a single common footprint that can scale with end-product requirements.
2.1 Intel® Joule™ configurations
Table 2 Intel® Joule™ configurations
Module
CPU Clock
Graphic Clock
Memory and Storage
Intel® Joule™ 550x
1.5 GHz
300 MHz
3GB RAM & 8GB eMMC Flash
Intel® Joule™ 570x
1.7 GHz; Turbo Boost up to 2.4GHz
450 MHz base, 650 MHz Turbo
4GB RAM & 16GB eMMC Flash
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System on a Module Overview
2.2 Intel® Joule™ feature summary
Table 3 Intel® Joule™ features
Domain
Attribute
Value
Notes
Compute
System on a Chip
14nm Intel® Atom™ quad-core
4 cores supporting 2 threads per core
Address Bus Size
64-Bit (x86-64)
Cache
4MB L1
2MB per core-pair
RAM
Type and Speed
LPDDR4 (4 lanes, 3200 MT/sec)
Integrated Package on Package
Graphics
Execution Units
12EUs (2x6) on 550x and 18EUs (3x6) on 570x
Open Graphics Libraries
Open GL 3.1ES, Open GL4.3 & Open CL 2.0
Display
HDMI Output
HDMI 1.4b
1080p at 60fps via expansion board
connectors
Storage
Type Supported
eMMC 5.0
Max eMMC speed of 400 MB/second
Expansion
Connector
Module to expansion board
Two, 2x50 pin connectors
Hirose Electric Co LTD*
Part Number DF40C-100DP-0.4V
Audio
Number of DMIC
2
Routed via expansion board connectors
Number and Speed of I2S
One I2S at 9.6 MHz
USB
USB 3.0 compliant
1 Type C OTG and 1 Host
USB 3, Port 0 is dedicated to Type C
USB 3, Port 1 is multiplexed with PCIe
PCIe*
Number of Ports / lanes
1 port / 1 lane
Multiplexed with USB3, Port1
Max Speed
5 Gb/s
I2C
5 ports (3 LPSS, 2 ISH as LPSS)
Master Mode; max 3.4Mb/s
UARTS
3 full and 1 half
Maximum rate of 115.2 kb/s for half speed and
3.6864 Mb/s maximum for full speed mode(s)
SIO
SPI
2 ports, 5 chip selects
Up to 25MHz
SDIO
Number of ports
1
For SD Card interface
GPIO
Dedicated GPIO lines
8
Up to 48 when remapping interface pins
Additional GPIO lines
Up to 48
Interfaces pins can be remapped within BIOS
(tool release pending)
Wi-Fi and
Bluetooth®
PWM
4
Integrated wireless module
Intel® Dual Band Wireless-AC 8260
Bands
Dual Band MIMO 2x2
Standards
IEEE 802.11agn + ac, BT 4.2 core
2.4 and 5GHz
Security
WPA, WPA2, WPS2, 802.11w, WMM, WMM-PS, WFD, Miracast, Passpoint
Dual mode, BT 4.1 Core
Over 15 profiles supported
Antenna
Dual MHF4 connectors on module
Connection A1 is Wi-Fi only while connection A2 services both BT and Wi-Fi
WPA2, AES-CCMP encryption
Power Manager
Integrated PMIC
Whiskey Cove
Not user programmable
2.3 Expansion board requirements
The Intel® Joule™ Expansion Board Design Guide (See Section 1.2) provides design recommendations for designing customer
expansion boards. At a minimum, the following elements are required to enable successful module boot and operation.
2.3.1 Method for connecting module to expansion board
The module must be securely mounted to an expansion board in a method that maintains full engagement of the board-toboard interface connectors. See the Intel® Joule™ Platform Mechanical Descriptor for more information.
2.3.2 Method to provide +VSYS power to the module
The subject is covered in Section 3
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System on a Module Overview
2.3.3 Required strapping of module pins
These module pin strappings must be implemented for boot during rising edge of PMIC_PWRGOOD (J6, pin 33).
Table 4 Required strapping of module pins
Signal Name
Location
Default
Requirement
GPIO_UART_TXD
J6, pin 93
Internal 20k pull down
Must be Hi-z or pulled down to GND when PMIC_PWRGOOD asserts
ISH_UART0_RTS
J7, pin 11
Internal 20k pull up
Must be Hi-z or pulled up to VDD1 when PMIC_PWRGOOD asserts
ISH_UART0_TXD
J7, pin 15
Internal 20k pull down
Must be Hi-z or pulled down to GND when PMIC_PWRGOOD asserts
SSP0_SPI_FS1
J7, pin 79
Internal 20k pull up
Must be Hi-z or pulled up to VDD1 when PMIC_PWRGOOD asserts
2.3.4 BIOS installed onto module
The module requires a Basic Input Output System (BIOS) code to installed in the device firmware in order to complete the
boot and initialization process. The reference configuration loaded during module production can be overwritten with either
an updated, approved reference BIOS or a custom BIOS developed by other users, customers or partners.
Caution:
Turning off the device during a BIOS update can cause data corruption and loss of functionality.
Warning:
End-use equipment integrating the device has to be authorized as required by the U.S. Federal
Communications Commission ("FCC") or it has to be operated in accordance with the FCC's
rules on operation of unauthorized devices (47 C.F.R. § 2.805), including obtaining approval
from any licensed spectrum operator, if the end-use equipment will use such operator's
spectrum
Hyperlink:
Regulatory Information for the Intel® Joule™ Compute Module
2.4 Expansion board recommendations
2.4.1 External EEPROM for multipurpose pin configuration data
An external EEPROM (recommend ST Microelectronics M24M02-DR* or equivalent) connected to I2C port 0 will hold a
specific configuration of the multipurpose pins. During boot, if the BIOS does not find an EEPROM device attached to I2C port
0, then the module will load the default configuration that is stored in BIOS.
2.4.2 Power button
Connect an active low power button to J6 pin 9 to trigger a reset or to power cycle the board.
2.4.3 DnX button
Connect an active high (VDD1) signal to J6, pin 78 to initiate a Download and Execute routine that will update the BIOS via
USB 2.0, port 0. This DnX button signal is the only way to initiate the Download and Execute update process.
2.4.4 Real time clock (RTC) backup power source
See section Section 9.1
2.4.5 UART debugging
Include a method to access UART port 2 on the module during boot to collect debug information as this is the only way to
access debug messages generated during the power on and boot sequences.
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Power Delivery, Signaling, and Reset
3 Power Delivery, Signaling, and Reset
3.1 Main power supply (VSYS)
The Intel® Joule™ module requires VSYS source routed through 12 pins, 6 on each board-to-board connector, that must all
be connected in common to balance the current path.
This is the only power input path; voltage detection at +VDC_IN or USB VBUS will trigger module boot.
Caution:
It is NOT possible to supply VSYS directly from any USB power supply, as the USB operating
specification of 4.75V to 5.25V may exceed the safe operational range of the module.
Table 5 Boot decision per voltage supply condition
+VDC_IN
+VBUS
VSYS
Action
No Boot
0 VDC
0 VDC
>VSYS (min)
0 VDC
>+VBUS (min)
>VSYS (min)
Cold Boot
>+VDC_IN (min)
0 VDC
>VSYS (min)
Cold Boot
>+VDC_IN (min)
>+VBUS (min)
>VSYS (min)
Cold Boot
3.2 Power on signaling
3.2.1 +VDC_IN power sensing
+VDC_IN is the signal that indicates when the module is being powered from an external power source.
When no RTC battery is present, the system will boot when both +VDC_IN and VSYS are at a valid level.
If an RTC battery is present, the operating system can configure the wake source register of the PMIC to either boot when
+VDC_IN is present, or to wait for a signal on the power button line.
3.2.2 +VBUS power sensing
The +VBUS pin is used by the module to detect if power is present on the USB connector of the attached expansion board. If
the +VBUS pin is within the voltage range specified in Table 5, then the module will initiate a boot.
3.2.3 Power good
The module will assert the PMIC_PWRGOOD signal HIGH after the VDD1 and VDD3 rails are within specification.
3.3 Hard shutdown via power button
The Intel® Joule™ module has a single Power Button pin (PMIC_PWRBTN_N) that will trigger a shutdown of the module when
held LOW for longer than 10 seconds.
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Graphics Specifications
3.4 System voltage rail specifications
The outputs shown below are only intended to signal or enable other subsystems and not to drive loads.
Table 6 Module power rails
Rail Name
Voltage
Current
Min
Typ
Max
Units
+VSYS
3.6
4
5
+VDD3
3.1
3.3
+VBUS
4
+V5P0V_VCONN
Usage
Max
Units
V
4
A
Input
Powers the core logic and radios. Recommend using
5V if using the CSI cameras.
3.45
V
300
mA
Output
General use. Powers on prior to VDD1
5
20
V
20
uA
Input
Voltage sense for VBUS power
4.75
5
5.25
V
300
mA
Input
Voltage for USB-C VCONN to CC1 or CC2
+VDD1
1.71
1.8
1.89
V
300
mA
Output
General use. Power on after +VDD3
+VDC_IN
4
12
20
V
20
20
uA
Input
Voltage sense for +VDC_IN power
+VRTC
2.05
3.3
V
20
500
uA
Input
RTC backup voltage - supplies voltage to RTC logic
when the system is not-powered.
+VBATTERY
0
5
V
1
slot.
Design supports flipping
polarity on the frame signal.
0-left
, 1-right
50/50
0%.
0%
Left justified master 2
192K,96K, 16,24
48K
2
0
0-left, 1right
50/50
0%
I2S slave
3
192K,96K, 16,24
48K,44.1K
2
0
0-left, 1right
50/50
0%
Left justified slave
3
192K,96K, 16,24
48K
2
0
0-left, 1right
50/50
0%
Right justified
Rising edge frame sensitive.
Design supports more
frame- to-data offset
options.
Not supported.
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GPIO Specifications
11.2 Digital microphone ports
Intel® Joule™ supports microphones that use the PDM digital microphone standard and attached to the module through the
AVS_M interface. Two microphones can share one data line by using time domain multiplexing to the two slots.
PDM microphones are enabled and disabled by the clock signal. Absence of clock signal will switch microphone to sleep
mode, which can be utilized in system power management.
Additionally the microphones can be power-gated to cut the power consumption to zero when microphones are not used.
Refer to the Intel® Joule™ Expansion Board Design Guide for the specifications and PCB routing guidance for this interface.
12 GPIO Specifications
12.1 Dedicated GPIO lines
The Intel® Joule™ module provides 8 dedicated GPIO lines (GPIO_0 - 6, GPIO_17 and GPIO_22) connected to the core
processor.
12.2 Reconfigurable interfaces buses as GPIO
Many interface lines on the module can be reconfigured as GPIO lines by defining a configuration table stored within an
EEPROM device on the expansion board.
The BIOS loads a default configuration (see BIOS release notes for more details) if the EEPROM appears empty or is found
unreadable by the BIOS. The configuration EEPROM is only read at cold boot and the configuration is retained during reset.
Specific outputs can be can be set or cleared before entering a sleep state.
12.3 GPIO internal pull UP / pull DOWN resistors
Each GPIO line can employ an internal pull UP or pull DOWN resistor, this is also defined within the configuration table and
stored in the expansion board EEPROM device and read by the BIOS at cold boot.
See the Intel® Joule™ BIOS Guide for pull UP and pull DOWN configuration details and the Intel® Joule™ Expansion Board
Design Guide for the specifications and PCB routing guidance of the GPIO interfaces.
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GPIO Specifications
12.4 Linux* GPIO to function mapping
Default configuration for Linux* GPIO number to signal on the Intel® Joule™ module.
Table 13 Linux* GPIO number to module signal
Linux* GPIO
Module Signal Name
Linux* GPIO
270
DISPLAY_0_BIAS_EN
413
SPI_0_FS2
271
DISPLAY_0_BKLTEN
414
SPI_0_MOSI
272
BLDRW_0_PWM
415
SPI_0_MISO
315
I2C_0_SDA
416
SPI_1_CLK
316
I2C_0_SCL
417
SPI_1_FS0
317
I2C_1_SDA
419
SPI_1_FS2
318
IC2_1_SCL
421
SPI_1_MISO
319
I2C_2_SDA
422
SPI_1_MOSI
320
I2C_2_SCL
446
BTN_N
331
ISH_I2C_0_SDA
456
DISPLAY_0_RST_N
332
ISH_I2C_0_SCL
462
UART_0_TXD
333
ISH_1_SDA
463
PWM0
334
ISH_1_SCL
464
PMW1
365
PMIC_PWRGOOD
465
PMW2
366
PMIC_RESET_N
466
PMW3
367
PMIC_SLPCLK_1
467
UART_0_RXD
378
I2S_1_MCLK
469
UART_0_RTS
379
I2S_1_BCLK
470
UART_0_CTS
380
I2S_1_WS_SYNC
471
UART_1_RXD
381
I2S_1_RXD
472
UART_1_TXD
382
I2S_1_TXD
483
ISH_UART_1_RXD
383
AVS_M_CLK_A1
484
ISH_UART_1_TXD
384
AVS_M_CLK_B1
485
ISH_UART_1_RTS
385
AVS_M_DATA_1
486
ISH_UART_1_CTS
410
SPI_0_CLK
491
FLASH_RST_N
411
SPI_0_FS0
492
FLASH_TORCH
412
SPI_0_FS1
493
FLASH_TRIGGER
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Intel® Joule™ Datasheet
Page 25
Pulse Width Modulators
13 Pulse Width Modulators
The default BIOS configuration table defines four dedicated PWM outputs as PWM_0, PWM_1, PWM_2, and PWM_3, each
with programmable frequency and duty cycle.
Table 14 shows examples of hardware (register) based PWM programming:
The PWM variables that control frequency and duty cycle are controlled by the BASE_UNIT_INT, BASE_UNIT_FRAC, and
ON_TIME_DIVISOR register settings and the following equations:
13.1 PWM frequency formula:
13.2 PWM duty cycle formula:
Note:
Consult specific operating system documents if manipulating PWM settings at the OS level.
Table 14 PWM programming examples
Integer part of
BASE_UNIT_INT
(bits 29:22)
Fractional part of
BASE_UNIT_FRAC
(bits 21:8)
Decimal
base unit
value
ON_TIME_DIVISOR
(bits 7:0)
Base unit
type
PWM
frequency
(Hz)
PWM
period
(uSec)
Duty
Cycle
0000_0000b
00_0100_0000_0000b
0.0625
0000_1000b
fractional
4,688
213
50%
0000_0000b
00_0010_0000_0000b
0.03125
0000_0100b
fractional
2,344
427
50%
0000_0000b
00_0001_0000_0000b
0.015625
0000_0001b
fractional
1,172
853
50%
14 Universal Serial Bus
14.1 Available USB ports
The Intel® Joule™ module provides two USB 3.0 ports; one Type C (OTG) and one USB 3.0 host mode and a USB 2 host port.
Table 15 USB port types
Signal name
Port
Description
USB2_0_DP
0
USB 2 data positive
USB2_0_DN
USB3_1_RX_DP
USB 2 data negative
1
USB 3 receive data positive
USB3_1_RX_DN
USB 3 receive data negative
USB3_1_TX_DP
USB 3 transmit data positive
USB3_1_TX_DN
USB 3 transmit data negative
Refer to the Intel® Joule™ Expansion Board Design Guide for the specifications and PCB routing guidance for this interface.
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