EPC2111

eGaN® FET DATASHEET EPC2111 EPC2111 – Enhancement-Mode GaN Power Transistor Half-Bridge VDS , 30 V RDS(on) , 19 mΩ (Q1), 8 mΩ (Q2) ID , 16 A (Q1), 16 A (Q2) EFFICIENT POWER CONVERSION HAL Gallium Nitride’s exceptionally high electron mobility and low temperature coefficient allows very low RDS(on), while its lateral device structure and majority carrier diode provide exceptionally low QG and zero QRR. The end result is a device that can handle tasks where very high switching frequency, and low on-time are beneficial as well as those where on-state losses dominate. Maximum Ratings DEVICE PARAMETER VDS ID Q1 VGS VALUE Drain-to-Source Voltage (Continuous) 30 Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C) 36 Continuous (TA = 25°C, RθJA = 15°C/W) 16 Pulsed (25°C, TPULSE = 300 µs) 50 Gate-to-Source Voltage 6 Gate-to-Source Voltage -4 TJ Operating Temperature –40 to 150 TSTG Storage Temperature –40 to 150 VDS ID Q2 Drain-to-Source Voltage (Continuous) 30 Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C) 36 Continuous (TA = 25°C, RθJA = 36°C/W) 16 Pulsed (25°C, TPULSE = 300 µs) 140 Gate-to-Source Voltage 6 Gate-to-Source Voltage -4 TJ Operating Temperature –40 to 150 TSTG Storage Temperature –40 to 150 VGS V EPC2111 eGaN® ICs are supplied only in passivated die form with solder bumps Die Size: 3.5 mm x 1.5 mm A Applications UNIT V • High Frequency DC-DC • Point-of-Load (POL) Converters °C Benefits V • High Frequency Operation (up to 10 MHz) A • Low Inductance Package V • High Density Footprint °C Thermal Characteristics PARAMETER TYP RθJC Thermal Resistance, Junction-to-Case 1.3 RθJB Thermal Resistance, Junction-to-Board 6.6 RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 58 UNIT °C/W Note 1: RθJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board. See https://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 1 eGaN® FET DATASHEET EPC2111 Static Characteristics DEVICE PARAMETER UNIT VDS = 24 V, VGS = 0 V 0.002 0.15 mA Gate-to-Source Forward Leakage VGS = 5 V 0.004 2 mA Gate-to-Source Reverse Leakage VGS = -4 V 0.002 0.15 mA Drain-to-Source Voltage Drain-Source Leakage MIN VGS = 0 V, ID = 0.25 mA 30 V VGS(TH) Gate Threshold Voltage VDS = VGS, ID = 2 mA 1.4 2.5 V RDS(on) Drain-Source On Resistance VGS = 5 V, ID = 15 A 14 19 mΩ VSD Source-Drain Forward Voltage IS = 0.5 A, VGS = 0 V 1.8 BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 0.4 mA IDSS Drain-Source Leakage IGSS Q2 MAX IDSS IGSS Q1 TYP BVDSS TEST CONDITIONS 0.8 V 30 V VDS = 24 V, VGS = 0 V 0.005 0.3 mA Gate-to-Source Forward Leakage VGS = 5 V 0.01 4.5 mA Gate-to-Source Reverse Leakage VGS = -4 V 0.005 0.3 mA VGS(TH) Gate Threshold Voltage VDS = VGS, ID = 5 mA 1.4 2.5 V RDS(on) Drain-Source On Resistance VGS = 5 V, ID = 15 A 6 8 mΩ VSD Source-Drain Forward Voltage IS = 0.5 A, VGS = 0 V 1.8 0.8 V Dynamic Characteristics DEVICE Q1 Q2 PARAMETER CISS Input Capacitance CRSS Reverse Transfer Capacitance COSS Output Capacitance COSS(ER) Effective Output Capacitance, Energy Related (Note 2) COSS(TR) Effective Output Capacitance, Time Related (Note 3) RG Gate Resistance QG Total Gate Charge QGS Gate-to-Source Charge QGD Gate-to-Drain Charge QG(TH) Gate Charge at Threshold QOSS Output Charge QRR Source-Drain Recovery Charge CISS Input Capacitance CRSS Reverse Transfer Capacitance COSS Output Capacitance COSS(ER) Effective Output Capacitance, Energy Related (Note 2) COSS(TR) Effective Output Capacitance, Time Related (Note 3) RG Gate Resistance QG Total Gate Charge QGS Gate-to-Source Charge QGD Gate-to-Drain Charge QG(TH) Gate Charge at Threshold QOSS Output Charge QRR Source-Drain Recovery Charge TEST CONDITIONS VDS = 15 V, VGS = 0 V MIN TYP MAX 190 230 8 170 VDS = 0 to 15 V, VGS = 0 V UNIT 255 pF 204 217 0.5 VDS = 15 V, VGS = 5 V, ID = 15 A 1.7 2.2 0.6 VDS = 15 V, ID = 15 A 0.3 nC 0.4 VDS = 15 V, VGS = 0 V 3.3 5 0 495 VDS = 15 V, VGS = 0 V 21 490 VDS = 0 to 15 V, VGS = 0 V 595 735 pF 590 637 0.4 VDS = 15 V, VGS = 5 V, ID = 15 A 4.5 5.8 1.4 VDS = 15 V, ID = 15 A 0.8 nC 1 VDS = 15 V, VGS = 0 V 9.6 15 0 Note 2: COSS(ER) is a fixed capacitance that gives the same stored energy as COSS while VDS is rising from 0 to 50% BVDSS. Note 3: COSS(TR) is a fixed capacitance that gives the same charging time as COSS while VDS is rising from 0 to 50% BVDSS. EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 2 eGaN® FET DATASHEET EPC2111 Figure 1a (Q1): Typical Output Characteristics at 25°C Figure 1b (Q2): Typical Output Characteristics at 25°C 50 VGS = 5 V 120 VGS = 4 V ID – Drain Current (A) ID – Drain Current (A) 40 30 VGS = 5 V 20 VGS = 4 V VGS = 3 V VGS = 2 V 80 40 VGS = 2 V 10 0 VGS = 3 V 0 0.5 1.0 1.5 2.0 2.5 VDS – Drain-to-Source Voltage (V) 0 3.0 Figure 2a (Q1): Transfer Characteristics 0 0.5 1.0 1.5 2.0 2.5 VDS – Drain-to-Source Voltage (V) 3.0 Figure 2b (Q2): Transfer Characteristics 50 120 25˚C 125˚C ID – Drain Current (A) ID – Drain Current (A) 40 VDS = 3 V 30 20 25˚C 125˚C VDS = 3 V 80 40 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VGS – Gate-to-Source Voltage (V) 4.0 4.5 0 0.5 5.0 RDS(on) – Drain-to-Source Resistance (mΩ) RDS(on) – Drain-to-Source Resistance (mΩ) 50 ID = 5 A ID = 10 A ID = 15 A ID = 20 A 30 20 10 0 2.5 3.0 3.5 4.0 4.5 1.5 2.0 2.5 3.0 3.5 VGS – Gate-to-Source Voltage (V) 4.0 4.5 5.0 Figure 3b (Q2): RDS(on) vs. VGS for Various Drain Currents Figure 3a (Q1): RDS(on) vs. VGS for Various Drain Currents 40 1.0 5.0 VGS – Gate-to-Source Voltage (V) EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | 20 ID = 5 A ID = 10 A ID = 15 A ID = 20 A 15 10 5 0 2.5 3.0 3.5 4.0 4.5 5.0 VGS – Gate-to-Source Voltage (V) | 3 eGaN® FET DATASHEET EPC2111 Figure 4a (Q1): RDS(on) vs. VGS for Various Temperatures Figure 4b (Q2): RDS(on) vs. VGS for Various Temperatures RDS(on) – Drain-to-Source Resistance (mΩ) RDS(on) – Drain-to-Source Resistance (mΩ) 50 25˚C 125˚C 40 ID = 15 A 30 20 10 0 2.5 3.0 3.5 4.0 VGS – Gate-to-Source Voltage (V) 4.5 20 ID = 15 A 15 10 5 0 5.0 25˚C 125˚C Figure 5a (Q1): Capacitance (Linear Scale) 2.5 3.0 3.5 4.0 VGS – Gate-to-Source Voltage (V) 4.5 5.0 Figure 5b (Q2): Capacitance (Linear Scale) 1000 COSS = CGD + CSD CISS = CGD + CGS CRSS = CGD COSS = CGD + CSD CISS = CGD + CGS CRSS = CGD 800 Capacitance (pF) Capacitance (pF) 300 200 600 400 100 200 0 5 10 15 20 25 0 30 VDS – Drain-to-Source Voltage (V) Figure Output Charge COSS Stored Energy Figure 6a 6a:(Q1): Output Charge and Cand OSS Stored Energy 70 60 5 50 4 40 3 30 2 20 1 10 0 5 10 15 20 25 30 20 0 VDS – Drain-to-Source Voltage (V) EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | QOSS – Output Charge (nC) 6 0 5 10 15 20 25 30 VDS – Drain-to-Source Voltage (V) EOSS – COSS Stored Energy (nJ) QOSS – Output Charge (nC) 7 0 Figure Output Charge COSS Stored Energy Figure 6b 6a:(Q2): Output Charge and Cand OSS Stored Energy 200 15 150 10 100 5 50 0 0 5 10 15 20 25 EOSS – COSS Stored Energy (nJ) 0 0 30 VDS – Drain-to-Source Voltage (V) | 4 eGaN® FET DATASHEET EPC2111 Figure 7b (Q2): Gate Charge Figure 7a (Q1): Gate Charge 5 ID = 15 A VDS = 15 V 4 VGS – Gate-to-Source Voltage (V) VGS – Gate-to-Source Voltage (V) 5 3 2 1 0 0 0.5 1.0 1.5 QG – Gate Charge (nC) 3 2 1 0 2.0 ID = 15 A VDS = 15 V 4 0 Figure 8a (Q1): Reverse Drain-Source Characteristics 1 2 3 4 QG – Gate Charge (nC) 5 Figure 8b (Q2): Reverse Drain-Source Characteristics 120 25˚C 125˚C 40 ISD – Source-to-Drain Current (A) ISD – Source-to-Drain Current (A) 50 VGSDS = 03 V 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VSD – Source-to-Drain Voltage (V) 4.5 Normalized On-State Resistance RDS(on) Normalized On-State Resistance RDS(on) 1.8 ID = 15 A VGS = 5 V 1.4 1.2 1.0 0 25 50 75 100 TJ – Junction Temperature (°C) 125 40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VSD – Source-to-Drain Voltage (V) 4.5 5.0 2.0 2.0 0.8 80 Figure 9b (Q2): Normalized On-State Resistance vs. Temperature Figure 9a (Q1): Normalized On-State Resistance vs. Temperature 1.6 VGS = 0 V 0 5.0 25˚C 125˚C 150 EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | 1.8 ID = 15 A VGS = 5 V 1.6 1.4 1.2 1.0 0.8 0 25 50 75 100 TJ – Junction Temperature (°C) 125 150 | 5 eGaN® FET DATASHEET EPC2111 Figure 10b (Q2): Normalized Threshold Voltage vs. Temperature 1.4 1.4 1.3 1.3 1.2 Normalized Threshold Voltage Normalized Threshold Voltage Figure 10a (Q1): Normalized Threshold Voltage vs. Temperature ID = 2 mA 1.1 1.0 0.9 0.8 1.2 1.1 1.0 0.9 0.8 0.7 0.7 0.6 0 25 50 75 100 TJ – Junction Temperature (°C) 125 0.6 150 Figure 11a (Q1): Safe Operating Area 0 25 50 75 100 TJ – Junction Temperature (°C) 125 150 Figure 11b (Q2): Safe Operating Area 100 1000 100 10 I D – Drain Current (A) I D – Drain Current (A) ID = 5 mA Limited by RDS(on) ms Pulse100 Width 10 ms 1 ms 1 ms 250 µs 1 10 Limited by RDS(on) 1 Pulse Width 1 ms 250 µs 100 µs 100 µs 0.1 0.1 1 10 0.1 0.1 100 VDS – Drain-Source Voltage (V) TJ = Max Rated, TC = +25°C, Single Pulse 1 10 100 VDS – Drain-Source Voltage (V) TJ = Max Rated, TC = +25°C, Single Pulse Positive G1 Q1 SW G2 Q2 Ground Figure 12 Typical Application Circuit EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 6 eGaN® FET DATASHEET (Q1 & Q2) Junction-to-Board 1 ZθJB, Normalized Thermal Impedance Figure 13a Transient Thermal Response Curves EPC2111 Duty Cycle: 0.5 0.2 0.1 0.1 0.05 PDM 0.02 t1 0.01 0.01 Notes: Duty Factor: D = t1/t2 Peak TJ = PDM x ZθJB x RθJB + TB Single Pulse 0.001 10-5 t2 10-4 10-3 10-2 10-1 1 101 tp, Rectangular Pulse Duration, seconds (Q1 & Q2) Junction-to-Case ZθJC, Normalized Thermal Impedance Figure 13b Transient Thermal Response Curves 1 Duty Cycle: 0.5 0.2 0.1 0.1 0.05 PDM t1 0.02 0.01 0.01 Notes: Duty Factor: D = t1/t2 Peak TJ = PDM x ZθJC x RθJC + TC Single Pulse 0.001 10-6 10-5 10-4 10-3 10-2 10-1 1 tp, Rectangular Pulse Duration, seconds EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 7 eGaN® FET DATASHEET EPC2111 TAPE AND REEL CONFIGURATION 4mm pitch, 12mm wide tape on 7” reel 7” reel d e f g Loaded Tape Feed Direction Gate bumps are along this edge of the die b c ZZZZ YYYY a Die orientation dot 2111 DIM EPC2111 (Note 1) a b c (Note 2) d e f (Note 2) g Dimension (mm) Target MIN MAX 12.00 11.90 12.30 1.75 1.65 1.85 5.50 5.45 5.55 4.00 3.90 4.10 4.00 3.90 4.10 2.00 1.95 2.05 1.50 1.50 1.60 Die is placed into pocket solder ball side down (face side down) Note 1: MSL 1 (moisture sensitivity level 1) classified according to IPC/ JEDEC industry standard. Note 2: Pocket position is relative to the sprocket hole measured as true position of the pocket, not the pocket hole. DIE MARKINGS 2111 YYYY ZZZZ Die orientation dot Part Number EPC2111 Laser Markings Part # Marking Line 1 Lot_Date Code Marking Line 2 Lot_Date Code Marking Line 3 2111 YYYY ZZZZ Pin 1 is under this corner EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | | 8 eGaN® FET DATASHEET EPC2111 DIE OUTLINE Solder Bump View A 6 9 2 5 8 12 15 18 21 11 14 17 20 4 7 10 13 16 19 Side View A B c d e 3470 1470 500 500 238 3500 1500 500 500 264 3530 1530 500 500 290 200+/−20 Seating plane MAX Pad 1 is G1; Pad 3 is G2; Pads 4, 7, 10, 13, 16, 19 are VIN; Pads 2, 5, 8, 11, 14, 17, 20 are SN; Pads 6, 9, 12, 15, 18, 21 are GND d (685) 1 Nominal (885) e MIN B c 3 DIM RECOMMENDED LAND PATTERN (measurements in µm) A 4 7 2 5 8 10 13 16 19 14 17 20 15 18 21 11 500 230 3 B 500 1 The land pattern is solder mask defined. Solder mask is10 µm smaller per side than bump. 6 9 12 RECOMMENDED STENCIL DRAWING (measurements in µm) Recommended stencil should be 4 mil (100 µm) thick, must be laser cut, openings per drawing. The corner has a radius of R60. 3500 1 4 7 10 13 16 19 5 8 11 6 17 9 12 20 R60 500 275 3 14 1500 2 275 Intended for use with SAC305 Type 4 solder, reference 88.5% metals content. 15 18 21 Efficient Power Conversion Corporation (EPC) reserves the right to make changes without further notice to any products herein to improve reliability, function or design. EPC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. eGaN® is a registered trademark of Efficient Power Conversion Corporation. EPC Patent Listing: epc-co.com/epc/AboutEPC/Patents.aspx EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2020 | Additional assembly resources available at: https://epc-co.com/epc/DesignSupport/ AssemblyBasics.aspx Information subject to change without notice. Revised June, 2020 | 9