EPC9010

Figure 4: Typical Waveforms for VIN = 48 V to 5 V/7 A (1000kHz) Buck converter CH1: VPWM Input voltage – CH2: (IOUT) Switch node current – CH4: (VOUT) Switch node voltage NOTE. The EPC9010 development board does not have any current or thermal protection on board. Figure 3: Proper Measurement of Switch Node – OUT Minimize loop EFFICIENT POWER CONVERSION EPC The EPC9010 development board showcases the EPC2016 eGaN FET. Although the electrical performance surpasses that for traditional silicon devices, their relatively smaller size does magnify the thermal management requirements. The EPC9010 is intended for bench evaluation with low ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C. Place probe in large via at OUT Ground probe against TP3 THERMAL CONSIDERATIONS NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See Figure 3 for proper scope probe technique. Figure 2: Proper Connection and Measurement Setup EFFICIENT POWER CONVERSION Figure 1: Block Diagram of EPC9010 Development Board PWM Input – (For Efficiency Measurement) VDD Logic and Dead-time Adjust LM5113 Gate Driver Gate Drive Gate Drive Supply Regulator – VIN V OUT VIN Half-Bridge with Bypass Switch Node + IIN VIN Supply +