Figure 4: Typical Waveforms for VIN = 24 V to 1.2 V/25 A (1000kHz) Buck converter
CH2: Switch node voltage (VSW) – CH4: PWM input voltage (VPWM)
NOTE. The EPC9016 development board does not have any current or thermal protection on board.
Figure 3: Proper Measurement of Switch Node – VSW
Minimize loop
EFFICIENT POWER CONVERSION
EPC
The EPC9016 development board showcases the EPC2015 eGaN FET. Although the electrical performance surpasses that for traditional silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9016 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
Place probe in large via at OUT
Ground probe
against TP3
THERMAL CONSIDERATIONS
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
Rev. 1.0
Figure 2: Proper Connection and Measurement Setup
EFFICIENT POWER CONVERSION
PWM Input
Figure 1: Block Diagram of EPC9016 Development Board
–
(For Efficiency
Measurement)
PWM
Input
VDD
Gate Drive
Regulator
Switch Node
+
IIN
OUT
VIN
Gate Drive
Supply
–
VIN V
LM5113
Gate
Driver
Half-Bridge with Bypass
–
7 V – 12 V
+
< 28 V
A
+
Gate Drive Supply
(Note Polarity)
VDD Supply
VIN Supply
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Bhasy Nair
Global FAE Support
Office: +1.972.805.8585
Mobile: +1.469.879.2424
bhasy.nair@epc-co.com
Logic and
Dead-time
Adjust
External Circuit
Stephen Tsang
Sales, Asia
Mobile: +852.9408.8351
stephen.tsang@epc-co.com
Please contact info@epc-co.com
or your local sales representative
Development Board EPC9016
Quick Start Guide
Visit our website:
www.epc-co.com
40 V Half-Bridge with Gate Drive, Using EPC2015
For More Information:
Sign-up to receive EPC updates at
bit.ly/EPCupdates
or text “EPC” to 22828
Peter Cheng
FAE Support, Asia
Mobile: +886.938.009.706
peter.cheng@epc-co.com
EPC Products are distributed through Digi-Key.
www.digikey.com
Development Board / Demonstration Board Notification
The EPC9016 board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not
designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations.
As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are
not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications
assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
EPC reserves the right at any time, without notice, to change said circuitry and specifications.
Quick Start Procedure
EPC
Renee Yawger
WW Marketing
Office: +1.908.475.5702
Mobile: +1.908.619.9678
renee.yawger@epc-co.com
Development board EPC9016 is easy to set up to evaluate the performance of the EPC2015 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +VIN (J5, J6) and ground / return to –VIN (J7, J8).
2. With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +VDD (J1, Pin-1) and ground return to –VDD (J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 40 V on VOUT).
7. Turn on the controller / PWM input source and probe switching node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
Do not use probe ground lead
eGaN® FET © EPC 2013
EPC90016, 40 V DEVELOPMENT BOARD
Contact us:
DESCRIPTION
www.epc-co.com
The EPC9016 development board features the 40 V EPC2015 enhancement mode (eGaN ®) field effect transistor (FET) operating
up to a 25 A maximum output current in a half bridge configuration with onboard gate drives. The purpose of this development
board is to simplify the evaluation process of the EPC2015 eGaN
FET by including all the critical components on a single board that
can be easily connected into any existing converter.
device and two parallel bottom devices and is recommended for
high step-down ratio buck applications. The board contains all
critical components and the printed circuit board (PCB) layout
is designed for optimal switching performance. There are also
various probe points to facilitate simple waveform measurement
and evaluate eGaN FET efficiency. A complete block diagram of
the circuit is given in Figure 1.
The EPC9016 development board is 2” x 1.5” and features three
EPC2015 eGaN FETs in a half bridge configuration using the Texas
Instruments LM5113 gate driver. The design features a single top
For more information on the EPC2015s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide.
Table 1: Performance Summary (TA = 25°C)
SYMBOL PARAMETER
VDD
Gate Drive Input Supply Range
CONDITIONS
MIN
7
MAX
12
UNITS
V
28*
V
VIN
Bus Input Voltage Range
VOUT
Switch Node Output Voltage
40
V
IOUT
Switch Node Output Current
25*
A
VPWM
PWM Logic Input Voltage Threshold
3.5
6
V
1.5
Input ‘High’
Input ‘Low’
0
Minimum ‘High’ State Input Pulse Width
VPWM rise and fall time < 10ns
60
ns
Minimum ‘Low’ State Input Pulse Width
VPWM rise and fall time < 10ns
200#
ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
V
Figure 4: Typical Waveforms for VIN = 24 V to 1.2 V/25 A (1000kHz) Buck converter
CH2: Switch node voltage (VSW) – CH4: PWM input voltage (VPWM)
NOTE. The EPC9016 development board does not have any current or thermal protection on board.
Figure 3: Proper Measurement of Switch Node – VSW
Minimize loop
EFFICIENT POWER CONVERSION
EPC
The EPC9016 development board showcases the EPC2015 eGaN FET. Although the electrical performance surpasses that for traditional silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9016 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
Place probe in large via at OUT
Ground probe
against TP3
THERMAL CONSIDERATIONS
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
Rev. 1.0
Figure 2: Proper Connection and Measurement Setup
EFFICIENT POWER CONVERSION
PWM Input
Figure 1: Block Diagram of EPC9016 Development Board
–
(For Efficiency
Measurement)
PWM
Input
VDD
Gate Drive
Regulator
Switch Node
+
IIN
OUT
VIN
Gate Drive
Supply
–
VIN V
LM5113
Gate
Driver
Half-Bridge with Bypass
–
7 V – 12 V
+
< 28 V
A
+
Gate Drive Supply
(Note Polarity)
VDD Supply
VIN Supply
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Bhasy Nair
Global FAE Support
Office: +1.972.805.8585
Mobile: +1.469.879.2424
bhasy.nair@epc-co.com
Logic and
Dead-time
Adjust
External Circuit
Stephen Tsang
Sales, Asia
Mobile: +852.9408.8351
stephen.tsang@epc-co.com
Please contact info@epc-co.com
or your local sales representative
Development Board EPC9016
Quick Start Guide
Visit our website:
www.epc-co.com
40 V Half-Bridge with Gate Drive, Using EPC2015
For More Information:
Sign-up to receive EPC updates at
bit.ly/EPCupdates
or text “EPC” to 22828
Peter Cheng
FAE Support, Asia
Mobile: +886.938.009.706
peter.cheng@epc-co.com
EPC Products are distributed through Digi-Key.
www.digikey.com
Development Board / Demonstration Board Notification
The EPC9016 board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not
designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations.
As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are
not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications
assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
EPC reserves the right at any time, without notice, to change said circuitry and specifications.
Quick Start Procedure
EPC
Renee Yawger
WW Marketing
Office: +1.908.475.5702
Mobile: +1.908.619.9678
renee.yawger@epc-co.com
Development board EPC9016 is easy to set up to evaluate the performance of the EPC2015 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +VIN (J5, J6) and ground / return to –VIN (J7, J8).
2. With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +VDD (J1, Pin-1) and ground return to –VDD (J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 40 V on VOUT).
7. Turn on the controller / PWM input source and probe switching node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
Do not use probe ground lead
eGaN® FET © EPC 2013
EPC90016, 40 V DEVELOPMENT BOARD
Contact us:
DESCRIPTION
www.epc-co.com
The EPC9016 development board features the 40 V EPC2015 enhancement mode (eGaN ®) field effect transistor (FET) operating
up to a 25 A maximum output current in a half bridge configuration with onboard gate drives. The purpose of this development
board is to simplify the evaluation process of the EPC2015 eGaN
FET by including all the critical components on a single board that
can be easily connected into any existing converter.
device and two parallel bottom devices and is recommended for
high step-down ratio buck applications. The board contains all
critical components and the printed circuit board (PCB) layout
is designed for optimal switching performance. There are also
various probe points to facilitate simple waveform measurement
and evaluate eGaN FET efficiency. A complete block diagram of
the circuit is given in Figure 1.
The EPC9016 development board is 2” x 1.5” and features three
EPC2015 eGaN FETs in a half bridge configuration using the Texas
Instruments LM5113 gate driver. The design features a single top
For more information on the EPC2015s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide.
Table 1: Performance Summary (TA = 25°C)
SYMBOL PARAMETER
VDD
Gate Drive Input Supply Range
CONDITIONS
MIN
7
MAX
12
UNITS
V
28*
V
VIN
Bus Input Voltage Range
VOUT
Switch Node Output Voltage
40
V
IOUT
Switch Node Output Current
25*
A
VPWM
PWM Logic Input Voltage Threshold
3.5
6
V
1.5
Input ‘High’
Input ‘Low’
0
Minimum ‘High’ State Input Pulse Width
VPWM rise and fall time < 10ns
60
ns
Minimum ‘Low’ State Input Pulse Width
VPWM rise and fall time < 10ns
200#
ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
V
NOTE. The EPC9016 development board does not have any current or thermal protection on board.
Figure 4: Typical Waveforms for VIN = 24 V to 1.2 V/25 A (1000kHz) Buck converter
CH2: Switch node voltage (VSW) – CH4: PWM input voltage (VPWM)
Figure 3: Proper Measurement of Switch Node – VSW
EFFICIENT POWER CONVERSION
EPC
The EPC9016 development board showcases the EPC2015 eGaN FET. Although the electrical performance surpasses that for traditional silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9016 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
Minimize loop
Place probe in large via at OUT
Ground probe
against TP3
THERMAL CONSIDERATIONS
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
Do not use probe ground lead
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Figure 2: Proper Connection and Measurement Setup
EFFICIENT POWER CONVERSION
EPC
PWM Input
Figure 1: Block Diagram of EPC9016 Development Board
–
(For Efficiency
Measurement)
External Circuit
–
VIN V
Switch Node
+
IIN
OUT
VIN Supply
+
< 28 V
A
+
Gate Drive Supply
(Note Polarity)
–
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Contact us:
Renee Yawger
WW Marketing
Office: +1.908.475.5702
Mobile: +1.908.619.9678
renee.yawger@epc-co.com
LM5113
Gate
Driver
VIN
VDD Supply
Half-Bridge with Bypass
7 V – 12 V
Stephen Tsang
Sales, Asia
Mobile: +852.9408.8351
stephen.tsang@epc-co.com
Logic and
Dead-time
Adjust
Gate Drive
Regulator
Gate Drive
Supply
Bhasy Nair
Global FAE Support
Office: +1.972.805.8585
Mobile: +1.469.879.2424
bhasy.nair@epc-co.com
PWM
Input
VDD
Development Board EPC9016
Quick Start Guide
For More Information:
Please contact info@epc-co.com
or your local sales representative
Visit our website:
www.epc-co.com
40 V Half-Bridge with Gate Drive, Using EPC2015
Sign-up to receive EPC updates at
bit.ly/EPCupdates
or text “EPC” to 22828
Peter Cheng
FAE Support, Asia
Mobile: +886.938.009.706
peter.cheng@epc-co.com
Development board EPC9016 is easy to set up to evaluate the performance of the EPC2015 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +VIN (J5, J6) and ground / return to –VIN (J7, J8).
2. With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +VDD (J1, Pin-1) and ground return to –VDD (J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 40 V on VOUT).
7. Turn on the controller / PWM input source and probe switching node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
Quick Start Procedure
DESCRIPTION
www.epc-co.com
For more information on the EPC2015s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide.
The EPC9016 development board is 2” x 1.5” and features three
EPC2015 eGaN FETs in a half bridge configuration using the Texas
Instruments LM5113 gate driver. The design features a single top
device and two parallel bottom devices and is recommended for
high step-down ratio buck applications. The board contains all
critical components and the printed circuit board (PCB) layout
is designed for optimal switching performance. There are also
various probe points to facilitate simple waveform measurement
and evaluate eGaN FET efficiency. A complete block diagram of
the circuit is given in Figure 1.
The EPC9016 development board features the 40 V EPC2015 enhancement mode (eGaN ®) field effect transistor (FET) operating
up to a 25 A maximum output current in a half bridge configuration with onboard gate drives. The purpose of this development
board is to simplify the evaluation process of the EPC2015 eGaN
FET by including all the critical components on a single board that
can be easily connected into any existing converter.
Table 1: Performance Summary (TA = 25°C)
SYMBOL PARAMETER
V
Gate Drive Input Supply Range
CONDITIONS
DD
EPC Products are distributed through Digi-Key.
www.digikey.com
Switch Node Output Current
OUT
Switch Node Output Voltage
VOUT
Bus Input Voltage Range
VIN
I
VPWM
Development Board / Demonstration Board Notification
The EPC9016 board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not
designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations.
As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are
not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications
assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
PWM Logic Input Voltage Threshold
Minimum ‘High’ State Input Pulse Width
Minimum ‘Low’ State Input Pulse Width
MIN
7
MAX
12
28*
40
25*
0
Input ‘Low’
3.5
Input ‘High’
V
PWM
rise and fall time < 10ns
VPWM rise and fall time < 10ns
6
1.5
60
UNITS
V
V
V
A
V
V
ns
200#
ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
EPC reserves the right at any time, without notice, to change said circuitry and specifications.
NOTE. The EPC9016 development board does not have any current or thermal protection on board.
Figure 4: Typical Waveforms for VIN = 24 V to 1.2 V/25 A (1000kHz) Buck converter
CH2: Switch node voltage (VSW) – CH4: PWM input voltage (VPWM)
Figure 3: Proper Measurement of Switch Node – VSW
EFFICIENT POWER CONVERSION
EPC
The EPC9016 development board showcases the EPC2015 eGaN FET. Although the electrical performance surpasses that for traditional silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9016 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
Minimize loop
Place probe in large via at OUT
Ground probe
against TP3
THERMAL CONSIDERATIONS
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
Do not use probe ground lead
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Figure 2: Proper Connection and Measurement Setup
EFFICIENT POWER CONVERSION
EPC
PWM Input
Figure 1: Block Diagram of EPC9016 Development Board
–
(For Efficiency
Measurement)
PWM
Input
VDD
Logic and
Dead-time
Adjust
Gate Drive
Regulator
LM5113
Gate
Driver
External Circuit
–
VIN V
Switch Node
+
IIN
OUT
VIN
Gate Drive
Supply
–
VIN Supply
+
< 28 V
A
+
Gate Drive Supply
(Note Polarity)
VDD Supply
Half-Bridge with Bypass
7 V – 12 V
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Development Board EPC9016
Quick Start Guide
For More Information:
40 V Half-Bridge with Gate Drive, Using EPC2015
Please contact info@epc-co.com
or your local sales representative
Visit our website:
www.epc-co.com
Sign-up to receive
EPC updates at
bit.ly/EPCupdates
or text “EPC” to 22828
Development board EPC9016 is easy to set up to evaluate the performance of the EPC2015 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +VIN (J5, J6) and ground / return to –VIN (J7, J8).
2. With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +VDD (J1, Pin-1) and ground return to –VDD (J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 40 V on VOUT).
7. Turn on the controller / PWM input source and probe switching node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
Quick Start Procedure
DESCRIPTION
www.epc-co.com
For more information on the EPC2015s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide.
The EPC9016 development board is 2” x 1.5” and features three
EPC2015 eGaN FETs in a half bridge configuration using the Texas
Instruments LM5113 gate driver. The design features a single top
device and two parallel bottom devices and is recommended for
high step-down ratio buck applications. The board contains all
critical components and the printed circuit board (PCB) layout
is designed for optimal switching performance. There are also
various probe points to facilitate simple waveform measurement
and evaluate eGaN FET efficiency. A complete block diagram of
the circuit is given in Figure 1.
The EPC9016 development board features the 40 V EPC2015 enhancement mode (eGaN ®) field effect transistor (FET) operating
up to a 25 A maximum output current in a half bridge configuration with onboard gate drives. The purpose of this development
board is to simplify the evaluation process of the EPC2015 eGaN
FET by including all the critical components on a single board that
can be easily connected into any existing converter.
Table 1: Performance Summary (TA = 25°C)
SYMBOL PARAMETER
V
Gate Drive Input Supply Range
CONDITIONS
DD
EPC Products are distributed through Digi-Key.
www.digikey.com
Switch Node Output Current
OUT
Switch Node Output Voltage
VOUT
Bus Input Voltage Range
VIN
I
VPWM
Development Board / Demonstration Board Notification
The EPC9016 board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not
designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations.
As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are
not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications
assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
PWM Logic Input Voltage Threshold
Minimum ‘High’ State Input Pulse Width
Minimum ‘Low’ State Input Pulse Width
MIN
7
MAX
12
28*
40
25*
0
Input ‘Low’
3.5
Input ‘High’
V
PWM
rise and fall time < 10ns
VPWM rise and fall time < 10ns
6
1.5
60
UNITS
V
V
V
A
V
V
ns
200#
ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
EPC reserves the right at any time, without notice, to change said circuitry and specifications.
Table 2 : Bill of Material
Item
Qty
Reference
Part Description
Manufacturer / Part #
1
3
C4, C10, C11,
Capacitor, 1uF, 10%, 25V, X5R
Murata, GRM188R61E105KA12D
2
2
C16, C17
Capacitor, 100pF, 5%, 50V, NP0
Kemet, C0402C101K5GACTU
3
2
C9, C19
Capacitor, 0.1uF, 10%, 25V, X5R
TDK, C1005X5R1E104K
4
3
C21, C22, C23
Capacitor, 4.7uF, 10%, 50V, X5R
TDK, C2012X5R1H475K125AB
5
2
D1, D2
Schottky Diode, 30V
Diodes Inc., SDM03U40-7
6
3
J1, J2, J9
Connector
2pins of Tyco, 4-103185-0
7
1
J3, J4, J5, J6, J7, J8
Connector
FCI, 68602-224HLF
8
3
Q1, Q2, Q3
eGaN® FET
EPC, EPC2015
9
1
R1
Resistor, 10.0K, 5%, 1/8W
Stackpole, RMCF0603FT10K0
10
2
R2, R15
Resistor, 0 Ohm, 1/8W
Stackpole, RMCF0603ZT0R00
11
1
R4
Resistor, 22 Ohm, 1%, 1/8W
Stackpole, RMCF0603FT22R0
12
1
R5
Resistor, 47 Ohm, 1%, 1/8W
Stackpole, RMCF0603FT47R0
13
6
R19, R20, R21, R22, R23, R24
Resistor, 0 Ohm, 1/16W
Stackpole, RMCF0402ZT0R00
14
2
TP1, TP2
Test Point
Keystone Elect, 5015
15
1
TP3
Connector
1/40th of Tyco, 4-103185-0
16
1
U1
I.C., Logic
Fairchild, NC7SZ00L6X
17
1
U2
I.C., Gate driver
Texas Instruments, LM5113TME
18
1
U3
I.C., Regulator
Microchip, MCP1703T-5002E/MC
19
1
U4
I.C., Logic
Fairchild, NC7SZ08L6X
20
0
R14
Optional Resistor
21
0
D3
Optional Diode
22
0
P1, P2
Optional Potentiometer
1
2
4
3
5
6
7 - 12 Vdc
J1
A
1
2
CON2
C10
1uF, 25V
8
U3
IN
7
NC
MCP1703
OUT 1
NC 2
6
NC
NC
3
NC
GND
4
C11
1uF, 25V
C4
1uF, 25V
9
GND
5
A
VCC
J6
CON4
Y
NC7SZ00L6X
R2
Zero
U4
A
VDD
P1
Optional
B
Y
GND
P2
Optional
J3
CON4
SW OUT
0.1uF, 25V
C9
U2
SDM03U40
R4
22.0
2
D2
C
2
D1
NC7SZ08L6X
PWM2
B
4
3
2
1
Q1
EPC2015
GND
CON2
1
2
3
4
28V Max
B
R1
10k
R14
SDM03U40
R5
Optional
47.0
R19
Zero
R22
Zero
J4
CON4
C16
100pF
0.1uF, 25V
C19
LM5113TM
R21
Zero
R24
Zero
(Optional)
C
CON1
Q3
EPC2015
Zero
R23
C17
100pF
R15
Zero
TP3
1
Q2
EPC2015
Zero
R20
C21
C22 C23
4.7uF, 50V
D3
Optional
J7
CON4
1
2
3
4
B
CON2
J9
1
2
VCC
VDD
1
2
3
4
U1
A
1
2
4
3
2
1
J2
J5
CON4
1
PWM1
TP2
Keystone 5015
TP1
Keystone 5015
4
3
2
1
1
GND
J8
CON4
D
D
40V Half-Bridge with Gate Drive, using EPC2015
Rev 1.0
1
2
3
4
5
6
Table 2 : Bill of Material
Item
Qty
Reference
Part Description
Manufacturer / Part #
1
3
C4, C10, C11,
Capacitor, 1uF, 10%, 25V, X5R
Murata, GRM188R61E105KA12D
2
2
C16, C17
Capacitor, 100pF, 5%, 50V, NP0
Kemet, C0402C101K5GACTU
3
2
C9, C19
Capacitor, 0.1uF, 10%, 25V, X5R
TDK, C1005X5R1E104K
4
3
C21, C22, C23
Capacitor, 4.7uF, 10%, 50V, X5R
TDK, C2012X5R1H475K125AB
5
2
D1, D2
Schottky Diode, 30V
Diodes Inc., SDM03U40-7
6
3
J1, J2, J9
Connector
2pins of Tyco, 4-103185-0
7
1
J3, J4, J5, J6, J7, J8
Connector
FCI, 68602-224HLF
8
3
Q1, Q2, Q3
eGaN® FET
EPC, EPC2015
9
1
R1
Resistor, 10.0K, 5%, 1/8W
Stackpole, RMCF0603FT10K0
10
2
R2, R15
Resistor, 0 Ohm, 1/8W
Stackpole, RMCF0603ZT0R00
11
1
R4
Resistor, 22 Ohm, 1%, 1/8W
Stackpole, RMCF0603FT22R0
12
1
R5
Resistor, 47 Ohm, 1%, 1/8W
Stackpole, RMCF0603FT47R0
13
6
R19, R20, R21, R22, R23, R24
Resistor, 0 Ohm, 1/16W
Stackpole, RMCF0402ZT0R00
14
2
TP1, TP2
Test Point
Keystone Elect, 5015
15
1
TP3
Connector
1/40th of Tyco, 4-103185-0
16
1
U1
I.C., Logic
Fairchild, NC7SZ00L6X
17
1
U2
I.C., Gate driver
Texas Instruments, LM5113TME
18
1
U3
I.C., Regulator
Microchip, MCP1703T-5002E/MC
19
1
U4
I.C., Logic
Fairchild, NC7SZ08L6X
20
0
R14
Optional Resistor
21
0
D3
Optional Diode
22
0
P1, P2
Optional Potentiometer
1
2
4
3
5
6
7 - 12 Vdc
J1
A
1
2
CON2
C10
1uF, 25V
8
U3
IN
7
NC
MCP1703
OUT 1
NC 2
6
NC
NC
3
NC
GND
4
C11
1uF, 25V
C4
1uF, 25V
9
GND
5
A
VCC
J6
CON4
Y
NC7SZ00L6X
R2
Zero
U4
A
VDD
P1
Optional
B
Y
GND
P2
Optional
J3
CON4
SW OUT
0.1uF, 25V
C9
U2
SDM03U40
R4
22.0
2
D2
C
2
D1
NC7SZ08L6X
PWM2
B
4
3
2
1
Q1
EPC2015
GND
CON2
1
2
3
4
28V Max
B
R1
10k
R14
SDM03U40
R5
Optional
47.0
R19
Zero
R22
Zero
J4
CON4
C16
100pF
0.1uF, 25V
C19
LM5113TM
R21
Zero
R24
Zero
(Optional)
C
CON1
Q3
EPC2015
Zero
R23
C17
100pF
R15
Zero
TP3
1
Q2
EPC2015
Zero
R20
C21
C22 C23
4.7uF, 50V
D3
Optional
J7
CON4
1
2
3
4
B
CON2
J9
1
2
VCC
VDD
1
2
3
4
U1
A
1
2
4
3
2
1
J2
J5
CON4
1
PWM1
TP2
Keystone 5015
TP1
Keystone 5015
4
3
2
1
1
GND
J8
CON4
D
D
40V Half-Bridge with Gate Drive, using EPC2015
Rev 1.0
1
2
3
4
5
6
Figure 4: Typical Waveforms for VIN = 24 V to 1.2 V/25 A (1000kHz) Buck converter
CH2: Switch node voltage (VSW) – CH4: PWM input voltage (VPWM)
NOTE. The EPC9016 development board does not have any current or thermal protection on board.
Figure 3: Proper Measurement of Switch Node – VSW
Minimize loop
EFFICIENT POWER CONVERSION
EPC
The EPC9016 development board showcases the EPC2015 eGaN FET. Although the electrical performance surpasses that for traditional silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9016 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
Place probe in large via at OUT
Ground probe
against TP3
THERMAL CONSIDERATIONS
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
Development board EPC9016 is easy to set up to evaluate the performance of the EPC2015 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +VIN (J5, J6) and ground / return to –VIN (J7, J8).
2. With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +VDD (J1, Pin-1) and ground return to –VDD (J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 40 V on VOUT).
7. Turn on the controller / PWM input source and probe switching node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
Rev. 1.0
Figure 2: Proper Connection and Measurement Setup
EFFICIENT POWER CONVERSION
PWM Input
EPC
Figure 1: Block Diagram of EPC9016 Development Board
–
(For Efficiency
Measurement)
PWM
Input
VDD
Quick Start Procedure
Do not use probe ground lead
eGaN® FET © EPC 2013
EPC90016, 40 V DEVELOPMENT BOARD
Logic and
Dead-time
Adjust
Gate Drive
Regulator
–
VIN V
LM5113
Gate
Driver
Switch Node
+
IIN
OUT
VIN
Gate Drive
Supply
External Circuit
Half-Bridge with Bypass
–
7 V – 12 V
+
< 28 V
A
+
Gate Drive Supply
(Note Polarity)
VDD Supply
VIN Supply
eGaN® FET © EPC 2013
Rev. 1.0
EPC90016, 40 V DEVELOPMENT BOARD
Development Board EPC9016
Quick Start Guide
For More Information:
Please contact info@epc-co.com
or your local sales representative
Visit our website:
www.epc-co.com
Sign-up to receive
EPC updates at
bit.ly/EPCupdates
or text “EPC” to 22828
40 V Half-Bridge with Gate Drive, Using EPC2015
DESCRIPTION
The EPC9016 development board features the 40 V EPC2015 enhancement mode (eGaN ®) field effect transistor (FET) operating
up to a 25 A maximum output current in a half bridge configuration with onboard gate drives. The purpose of this development
board is to simplify the evaluation process of the EPC2015 eGaN
FET by including all the critical components on a single board that
can be easily connected into any existing converter.
device and two parallel bottom devices and is recommended for
high step-down ratio buck applications. The board contains all
critical components and the printed circuit board (PCB) layout
is designed for optimal switching performance. There are also
various probe points to facilitate simple waveform measurement
and evaluate eGaN FET efficiency. A complete block diagram of
the circuit is given in Figure 1.
The EPC9016 development board is 2” x 1.5” and features three
EPC2015 eGaN FETs in a half bridge configuration using the Texas
Instruments LM5113 gate driver. The design features a single top
For more information on the EPC2015s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide.
Table 1: Performance Summary (TA = 25°C)
SYMBOL PARAMETER
VDD
Gate Drive Input Supply Range
EPC Products are distributed through Digi-Key.
www.digikey.com
Development Board / Demonstration Board Notification
The EPC9016 board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not
designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations.
As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are
not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications
assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
EPC reserves the right at any time, without notice, to change said circuitry and specifications.
www.epc-co.com
CONDITIONS
MIN
7
MAX
12
UNITS
V
28*
V
VIN
Bus Input Voltage Range
VOUT
Switch Node Output Voltage
40
V
IOUT
Switch Node Output Current
25*
A
VPWM
PWM Logic Input Voltage Threshold
3.5
6
V
1.5
Input ‘High’
Input ‘Low’
0
Minimum ‘High’ State Input Pulse Width
VPWM rise and fall time < 10ns
60
ns
Minimum ‘Low’ State Input Pulse Width
VPWM rise and fall time < 10ns
200#
ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
V
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